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Nico Weber [Fri, 29 Mar 2019 14:30:01 +0000 (14:30 +0000)]
gn build: Merge r357259
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@357260
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Roman Lebedev [Fri, 29 Mar 2019 14:24:27 +0000 (14:24 +0000)]
[NFC][llvm-exegesis] Refactor ResolvedSchedClass & friends
Summary:
`ResolvedSchedClass` will need to be used outside of `Analysis`
(before `InstructionBenchmarkClustering` even), therefore promote
it into a non-private top-level class, and while there also
move all of the functions that are only called by `ResolvedSchedClass`
into that same new file.
Reviewers: courbet, gchatelet
Reviewed By: courbet
Subscribers: mgorny, tschuett, mgrang, jdoerfert, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D59993
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@357259
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Sanjay Patel [Fri, 29 Mar 2019 14:20:38 +0000 (14:20 +0000)]
[DAGCombiner] simplify shuffle of shuffle
After investigating the examples from D59777 targeting an SSE4.1 machine,
it looks like a very different problem due to how we map illegal types (256-bit in these cases).
We're missing a shuffle simplification that maps elements of a vector back to a shuffled operand.
We have a more general version of this transform in DAGCombiner::visitVECTOR_SHUFFLE(), but that
generality means it is limited to patterns with a one-use constraint, and the examples here have
2 uses. We don't need any uses or legality limitations for a simplification (no new value is
created).
It looks like we miss this pattern in IR too.
In one of the zext examples here, we have shuffle masks like this:
Shuf0 = vector_shuffle<0,u,3,7,0,u,3,7>
Shuf = vector_shuffle<4,u,6,7,u,u,u,u>
...so that's moving the high half of the 1st vector into the low half. But the high half of the
1st vector is already identical to the low half.
Differential Revision: https://reviews.llvm.org/D59961
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@357258
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Florian Hahn [Fri, 29 Mar 2019 14:10:24 +0000 (14:10 +0000)]
Recommit "[DSE] Preserve basic block ordering using OrderedBasicBlock."
Updated to use DenseMap::insert instead of [] operator for insertion, to
avoid a crash caused by epoch checks.
This reverts commit
2b85de438326f9d27bc96dc934ec98b98abdb337.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@357257
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Nirav Dave [Fri, 29 Mar 2019 14:09:47 +0000 (14:09 +0000)]
[DAGCombine] Improve Lifetime node chains.
Improve both start and end lifetime nodes chain dependencies.
Reviewers: courbet
Reviewed By: courbet
Subscribers: hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D59795
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@357256
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Sanjay Patel [Fri, 29 Mar 2019 13:49:08 +0000 (13:49 +0000)]
[DAGCombiner] fold sext into decrement
This is a sibling to rL357178 that I noticed we'd hit if we chose
an alternate transform in D59818.
%z = zext i8 %x to i32
%dec = add i32 %z, -1
%r = sext i32 %dec to i64
=>
%z2 = zext i8 %x to i64
%r = add i64 %z2, -1
https://rise4fun.com/Alive/kPP
The x86 vector diffs show a slight regression, so there's a chance
that we should limit this and the previous transform to scalars.
But given that we allowed vectors before, I'm matching that behavior
here. We should change both transforms together if that's the right
thing to do.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@357254
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Hans Wennborg [Fri, 29 Mar 2019 13:40:05 +0000 (13:40 +0000)]
Switch lowering: exploit unreachable fall-through when lowering case range cluster
In the example below, we would previously emit two range checks, one for cases
1--3 and one for 4--6. This patch makes us exploit the fact that the
fall-through is unreachable and only one range check is necessary.
switch i32 %i, label %default [
i32 1, label %bb1
i32 2, label %bb1
i32 3, label %bb1
i32 4, label %bb2
i32 5, label %bb2
i32 6, label %bb2
]
default: unreachable
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@357252
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Sanjay Patel [Fri, 29 Mar 2019 13:34:48 +0000 (13:34 +0000)]
[x86] add tests for decrement+sext; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@357251
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Dmitry Preobrazhensky [Fri, 29 Mar 2019 12:16:04 +0000 (12:16 +0000)]
[AMDGPU][MC] Corrected handling of tied src for atomic return MUBUF opcodes
See bug 40917: https://bugs.llvm.org/show_bug.cgi?id=40917
Reviewers: artem.tamazov, arsenm
Differential Revision: https://reviews.llvm.org/D59878
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@357249
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Andrea Di Biagio [Fri, 29 Mar 2019 12:15:37 +0000 (12:15 +0000)]
[MCA] Add an experimental MicroOpQueue stage.
This patch adds an experimental stage named MicroOpQueueStage.
MicroOpQueueStage can be used to simulate a hardware micro-op queue (basically,
a decoupling queue between 'decode' and 'dispatch'). Users can specify a queue
size, as well as a optional MaxIPC (which - in the absence of a "Decoders" stage
- can be used to simulate a different throughput from the decoders).
This stage is added to the default pipeline between the EntryStage and the
DispatchStage only if PipelineOption::MicroOpQueue is different than zero. By
default, llvm-mca sets PipelineOption::MicroOpQueue to the value of hidden flag
-micro-op-queue-size.
Throughput from the decoder can be simulated via another hidden flag named
-decoder-throughput. That flag allows us to quickly experiment with different
frontend throughputs. For targets that declare a loop buffer, flag
-decoder-throughput allows users to do multiple runs, each time simulating a
different throughput from the decoders.
This stage can/will be extended in future. For example, we could add a "buffer
full" event to notify bottlenecks caused by backpressure. flag
-decoder-throughput would probably go away if in future we delegate to another
stage (DecoderStage?) the simulation of a (potentially variable) throughput from
the decoders. For now, flag -decoder-throughput is "good enough" to run some
simple experiments.
Differential Revision: https://reviews.llvm.org/D59928
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@357248
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Konstantin Zhuravlyov [Fri, 29 Mar 2019 12:04:18 +0000 (12:04 +0000)]
AMDGPU: Make sram-ecc off by default for Vega20
Differential Revision: https://reviews.llvm.org/D59718
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@357247
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James Henderson [Fri, 29 Mar 2019 11:47:19 +0000 (11:47 +0000)]
[llvm-readelf]Merge dynamic and static relocation printing to avoid code duplication
The majority of the printRelocation and printDynamicRelocation functions
were identical. This patch factors this all out into a new function.
There are a couple of minor differences to do with printing of symbols
without names, but I think these are harmless, and in some cases a small
improvement.
Reviewed by: grimar, rupprecht, Higuoxing
Differential Revision: https://reviews.llvm.org/D59823
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@357246
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Roman Lebedev [Fri, 29 Mar 2019 11:36:08 +0000 (11:36 +0000)]
[NFC][llvm-exegesis] Refactor Analysis::SchedClassCluster::measurementsMatch()
Summary:
The diff looks scary but it really isn't:
1. I moved the check for the number of measurements into `SchedClassClusterCentroid::validate()`
2. While there, added a check that we can only have a single inverse throughput measurement. I missed that when adding it initially.
3. In `Analysis::SchedClassCluster::measurementsMatch()` is called with the current LLVM values from schedule class and the values from Centroid.
3.1. The values from centroid we can already get from `SchedClassClusterCentroid::getAsPoint()`.
This isn't 100% a NFC, because previously for inverse throughput we used `min()`. I have asked whether i have done that correctly in
https://reviews.llvm.org/D57647?id=184939#inline-510384 but did not hear back. I think `avg()` should be used too, thus it is a fix.
3.2. Finally, refactor the computation of the LLVM-specified values into `Analysis::SchedClassCluster::getSchedClassPoint()`
I will need that function for [[ https://bugs.llvm.org/show_bug.cgi?id=41275 | PR41275 ]]
Reviewers: courbet, gchatelet
Reviewed By: courbet
Subscribers: tschuett, jdoerfert, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D59951
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@357245
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Simon Pilgrim [Fri, 29 Mar 2019 11:25:58 +0000 (11:25 +0000)]
[X86] Add X86TargetLowering::isCommutativeBinOp override.
We currently just have test coverage for PMULUDQ - will add more in the future.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@357244
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Simon Pilgrim [Fri, 29 Mar 2019 10:41:00 +0000 (10:41 +0000)]
[SLP] Add support for swapping icmp/fcmp predicates to permit vectorization
We should be able to match elements with the swapped predicate as well - as long as we commute the source operands.
Differential Revision: https://reviews.llvm.org/D59956
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@357243
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Kang Zhang [Fri, 29 Mar 2019 08:45:24 +0000 (08:45 +0000)]
[PowerPC] Add the support for __builtin_setrnd()
Summary:
PowerPC64/PowerPC64le supports the builtin function __builtin_setrnd to set the floating point rounding mode. This function will use the least significant two bits of integer argument to set the floating point rounding mode.
double __builtin_setrnd(int mode);
The effective values for mode are:
0 - round to nearest
1 - round to zero
2 - round to +infinity
3 - round to -infinity
Note that the mode argument will modulo 4, so if the int argument is greater than 3, it will only use the least significant two bits of the mode. Namely, builtin_setrnd(102)) is equal to builtin_setrnd(2).
Reviewed By: jsji
Differential Revision: https://reviews.llvm.org/D59405
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@357241
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Clement Courbet [Fri, 29 Mar 2019 08:33:05 +0000 (08:33 +0000)]
[ScheduleDAG] Move `Topo` and `addEdge` to base class.
Some DAG mutations can only be applied to `ScheduleDAGMI`, and have to
internally cast a `ScheduleDAGInstrs` to `ScheduleDAGMI`.
There is nothing actually specific to `ScheduleDAGMI` in `Topo`.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@357239
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Fangrui Song [Fri, 29 Mar 2019 08:08:20 +0000 (08:08 +0000)]
[llvm-objcopy] Delete two redundant reinterpret_cast. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@357238
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Jim Lin [Fri, 29 Mar 2019 05:05:21 +0000 (05:05 +0000)]
Test commit. Fix typo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@357237
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Matt Arsenault [Fri, 29 Mar 2019 03:54:56 +0000 (03:54 +0000)]
AMDGPU/GlobalISel: Insert waterfall loop for vector indexing
The register index can only really be an SGPR. Lie that a VGPR index
is legal, and then rewrite the instruction in a waterfall loop to
handle the index.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@357235
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Zi Xuan Wu [Fri, 29 Mar 2019 03:08:39 +0000 (03:08 +0000)]
[PowerPC] Strength reduction of multiply by a constant by shift and add/sub in place
A shift and add/sub sequence combination is faster in place of a multiply by constant.
Because the cycle or latency of multiply is not huge, we only consider such following
worthy patterns.
```
(mul x, 2^N + 1) => (add (shl x, N), x)
(mul x, -(2^N + 1)) => -(add (shl x, N), x)
(mul x, 2^N - 1) => (sub (shl x, N), x)
(mul x, -(2^N - 1)) => (sub x, (shl x, N))
```
And the cycles or latency is subtarget-dependent so that we need consider the
subtarget to determine to do or not do such transformation.
Also data type is considered for different cycles or latency to do multiply.
Differential Revision: https://reviews.llvm.org/D58950
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@357233
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Nico Weber [Fri, 29 Mar 2019 02:49:13 +0000 (02:49 +0000)]
gn build: Add check-clang-tools to run clang-tools-extra lit tests
Only runs the clang-tools-extra lit tests; not yet the unit tests.
Add a build file for clangd-indexer too, since it's needed for
the tests.
Differential Revision: https://reviews.llvm.org/D59955
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@357232
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Xing GUO [Fri, 29 Mar 2019 01:26:36 +0000 (01:26 +0000)]
[llvm-readobj] Change variable names to match LLVM-style. NFC.
Summary: This patch helps change variable names to match LLVM-style
Reviewers: jhenderson, Higuoxing
Reviewed By: Higuoxing
Subscribers: rupprecht, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D59931
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@357230
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Florian Hahn [Fri, 29 Mar 2019 00:22:26 +0000 (00:22 +0000)]
Revert Recommit "[DSE] Preserve basic block ordering using OrderedBasicBlock."
Another buildbot failure
http://lab.llvm.org:8011/builders/clang-cmake-x86_64-sde-avx512-linux/builds/20402
clang-9: /home/ssglocal/clang-cmake-x86_64-sde-avx512-linux/clang-cmake-x86_64-sde-avx512-linux/llvm/include/llvm/ADT/DenseMap.h:1228: llvm::DenseMapIterator<KeyT, ValueT, KeyInfoT, Bucket, IsConst>::value_type* llvm::DenseMapIterator<KeyT, ValueT, KeyInfoT, Bucket, IsConst>::operator->() const [with KeyT = const llvm::Instruction*; ValueT = unsigned int; KeyInfoT = llvm::DenseMapInfo<const llvm::Instruction*>; Bucket = llvm::detail::DenseMapPair<const llvm::Instruction*, unsigned int>; bool IsConst = false; llvm::DenseMapIterator<KeyT, ValueT, KeyInfoT, Bucket, IsConst>::pointer = llvm::detail::DenseMapPair<const llvm::Instruction*, unsigned int>*; llvm::DenseMapIterator<KeyT, ValueT, KeyInfoT, Bucket, IsConst>::value_type = llvm::detail::DenseMapPair<const llvm::Instruction*, unsigned int>]: Assertion `isHandleInSync() && "invalid iterator access!"' failed.
0. Program arguments: /home/ssglocal/clang-cmake-x86_64-sde-avx512-linux/clang-cmake-x86_64-sde-avx512-linux/stage1.install/bin/clang-9 -cc1 -triple x86_64-unknown-linux-gnu -emit-obj -disable-free -main-file-name ArchiveCommandLine.cpp -mrelocation-model static -mthread-model posix -fmath-errno -masm-verbose -mconstructor-aliases -munwind-tables -fuse-init-array -target-cpu skylake-avx512 -dwarf-column-info -debugger-tuning=gdb -momit-leaf-frame-pointer -coverage-notes-file /home/ssglocal/clang-cmake-x86_64-sde-avx512-linux/clang-cmake-x86_64-sde-avx512-linux/test/sandbox/build/MultiSource/Benchmarks/7zip/Output/ArchiveCommandLine.llvm.gcno -resource-dir /home/ssglocal/clang-cmake-x86_64-sde-avx512-linux/clang-cmake-x86_64-sde-avx512-linux/stage1.install/lib/clang/9.0.0 -I /home/ssglocal/clang-cmake-x86_64-sde-avx512-linux/clang-cmake-x86_64-sde-avx512-linux/test/sandbox/build/MultiSource/Benchmarks/7zip -I /home/ssglocal/clang-cmake-x86_64-sde-avx512-linux/clang-cmake-x86_64-sde-avx512-linux/test/test-suite/MultiSource/Benchmarks/7zip -I /home/ssglocal/clang-cmake-x86_64-sde-avx512-linux/clang-cmake-x86_64-sde-avx512-linux/test/test-suite/include -I ../../../include -D _GNU_SOURCE -D __STDC_LIMIT_MACROS -D NDEBUG -D BREAK_HANDLER -D UNICODE -D _UNICODE -I /home/ssglocal/clang-cmake-x86_64-sde-avx512-linux/clang-cmake-x86_64-sde-avx512-linux/test/test-suite/MultiSource/Benchmarks/7zip/C -I /home/ssglocal/clang-cmake-x86_64-sde-avx512-linux/clang-cmake-x86_64-sde-avx512-linux/test/test-suite/MultiSource/Benchmarks/7zip/CPP/myWindows -I /home/ssglocal/clang-cmake-x86_64-sde-avx512-linux/clang-cmake-x86_64-sde-avx512-linux/test/test-suite/MultiSource/Benchmarks/7zip/CPP/include_windows -I /home/ssglocal/clang-cmake-x86_64-sde-avx512-linux/clang-cmake-x86_64-sde-avx512-linux/test/test-suite/MultiSource/Benchmarks/7zip/CPP -I . -D _FILE_OFFSET_BITS=64 -D _LARGEFILE_SOURCE -D NDEBUG -D _REENTRANT -D ENV_UNIX -D _7ZIP_LARGE_PAGES -internal-isystem /usr/lib/gcc/x86_64-linux-gnu/5.4.0/../../../../include/c++/5.4.0 -internal-isystem /usr/lib/gcc/x86_64-linux-gnu/5.4.0/../../../../include/x86_64-linux-gnu/c++/5.4.0 -internal-isystem /usr/lib/gcc/x86_64-linux-gnu/5.4.0/../../../../include/x86_64-linux-gnu/c++/5.4.0 -internal-isystem /usr/lib/gcc/x86_64-linux-gnu/5.4.0/../../../../include/c++/5.4.0/backward -internal-isystem /usr/local/include -internal-isystem /home/ssglocal/clang-cmake-x86_64-sde-avx512-linux/clang-cmake-x86_64-sde-avx512-linux/stage1.install/lib/clang/9.0.0/include -internal-externc-isystem /usr/include/x86_64-linux-gnu -internal-externc-isystem /include -internal-externc-isystem /usr/include -O3 -std=gnu++98 -fdeprecated-macro -fdebug-compilation-dir /home/ssglocal/clang-cmake-x86_64-sde-avx512-linux/clang-cmake-x86_64-sde-avx512-linux/test/sandbox/build/MultiSource/Benchmarks/7zip -ferror-limit 19 -fmessage-length 0 -pthread -fobjc-runtime=gcc -fcxx-exceptions -fexceptions -fdiagnostics-show-option -vectorize-loops -vectorize-slp -o Output/ArchiveCommandLine.llvm.o -x c++ /home/ssglocal/clang-cmake-x86_64-sde-avx512-linux/clang-cmake-x86_64-sde-avx512-linux/test/test-suite/MultiSource/Benchmarks/7zip/CPP/7zip/UI/Common/ArchiveCommandLine.cpp -faddrsig
This reverts r357222 (git commit
64cccfcc72c44ea62f441b782d2177a90912769a)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@357227
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Thomas Lively [Fri, 29 Mar 2019 00:14:01 +0000 (00:14 +0000)]
[WebAssembly] Merge used feature sets, update atomics linkage policy
Summary:
It does not currently make sense to use WebAssembly features in some functions
but not others, so this CL adds an IR pass that takes the union of all used
feature sets and applies it to each function in the module. This allows us to
prevent atomics from being lowered away if some function has opted in to using
them. When atomics is not enabled anywhere, we detect whether there exists any
atomic operations or thread local storage that would be stripped and disallow
linking with objects that contain atomics if and only if atomics or tls are
stripped. When atomics is enabled, mark it as used but do not require it of
other objects in the link. These changes allow libraries that do not use atomics
to be built once and linked into both single-threaded and multithreaded
binaries.
Reviewers: aheejin, sbc100, dschuff
Subscribers: jgravelle-google, hiraditya, sunfish, jfb, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D59625
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@357226
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Florian Hahn [Thu, 28 Mar 2019 23:11:00 +0000 (23:11 +0000)]
Recommit "[DSE] Preserve basic block ordering using OrderedBasicBlock."
Recommitting after addressing a buildbot failure.
This reverts commit
c87869ebea000dd6483de7c7451cb36c1d36f866.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@357222
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Jordan Rupprecht [Thu, 28 Mar 2019 23:08:06 +0000 (23:08 +0000)]
[llvm-readobj] Fix formatting of unknown note types
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@357221
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Puyan Lotfi [Thu, 28 Mar 2019 22:55:08 +0000 (22:55 +0000)]
[yaml2obj] Fixing opening empty yaml files.
Essentially echo "" | yaml2obj crashes. This patch attempts to trim whitespace
and determine if the yaml string in the file is empty or not. If the input is
empty then it will not properly print out an error message and return an error
code.
Differential Revision: https://reviews.llvm.org/D59964
A test/tools/yaml2obj/empty.yaml
M tools/yaml2obj/yaml2obj.cpp
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@357219
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Rumeet Dhindsa [Thu, 28 Mar 2019 22:26:51 +0000 (22:26 +0000)]
Update lit config for ld.lld command to match "ld\.lld" instead of trying to match respective regex. (It was able to work with ld-lld and ld1lld as well)
Differential Revision: https://reviews.llvm.org/D59962
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@357218
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Florian Hahn [Thu, 28 Mar 2019 22:17:29 +0000 (22:17 +0000)]
[LSR] Fix signed overflow in GenerateCrossUseConstantOffsets.
For the attached test case, unchecked addition of immediate starts and
ends overflows, as they can be arbitrary i64 constants.
Proof: https://rise4fun.com/Alive/Plqc
Reviewers: qcolombet, gilr, efriedma
Reviewed By: efriedma
Differential Revision: https://reviews.llvm.org/D59218
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@357217
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Yonghong Song [Thu, 28 Mar 2019 21:59:49 +0000 (21:59 +0000)]
[BPF] add proper multi-dimensional array support
For multi-dimensional array like below
int a[2][3];
the previous implementation generates BTF_KIND_ARRAY type
like below:
. element_type: int
. index_type: unsigned int
. number of elements: 6
This is not the best way to represent arrays, esp.,
when converting BTF back to headers and users will see
int a[6];
instead.
This patch generates proper support for multi-dimensional arrays.
For "int a[2][3]", the two BTF_KIND_ARRAY types will be
generated:
Type #n:
. element_type: int
. index_type: unsigned int
. number of elements: 3
Type #(n+1):
. element_type: #n
. index_type: unsigned int
. number of elements: 2
The linux kernel already supports such a multi-dimensional
array representation properly.
Signed-off-by: Yonghong Song <yhs@fb.com>
Differential Revision: https://reviews.llvm.org/D59943
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@357215
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Eli Friedman [Thu, 28 Mar 2019 21:12:28 +0000 (21:12 +0000)]
[MC] Fix floating-point literal lexing.
This patch has three related fixes to improve float literal lexing:
1. Make AsmLexer::LexDigit handle floats without a decimal point more
consistently.
2. Make AsmLexer::LexFloatLiteral print an error for floats which are
apparently missing an "e".
3. Make APFloat::convertFromString use binutils-compatible exponent
parsing.
Together, this fixes some cases where a float would be incorrectly
rejected, fixes some cases where the compiler would crash, and improves
diagnostics in some cases.
Patch by Brandon Jones.
Differential Revision: https://reviews.llvm.org/D57321
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@357214
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Craig Topper [Thu, 28 Mar 2019 20:52:22 +0000 (20:52 +0000)]
[SelectionDAGBuilder] Fix 80 column violation. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@357213
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Eli Friedman [Thu, 28 Mar 2019 20:44:50 +0000 (20:44 +0000)]
[InterleavedAccessPass] Don't increase the number of bytes loaded.
Even if the interleaving transform would otherwise be legal, we shouldn't
introduce an interleaved load that is wider than the original load: it might
have undefined behavior.
It might be possible to perform some sort of mask-narrowing transform in
some cases (using a narrower interleaved load, then extending the
results using shufflevectors). But I haven't tried to implement that,
at least for now.
Fixes https://bugs.llvm.org/show_bug.cgi?id=41245 .
Differential Revision: https://reviews.llvm.org/D59954
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@357212
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Florian Hahn [Thu, 28 Mar 2019 20:36:24 +0000 (20:36 +0000)]
Revert [DSE] Preserve basic block ordering using OrderedBasicBlock.
This reverts r357208 (git commit
c0bfd37d385c93711ef3a349599dba20e6b101ef)
This causes a buildbot failure: http://lab.llvm.org:8011/builders/clang-with-thin-lto-ubuntu/builds/16124
FAILED: lib/IR/CMakeFiles/LLVMCore.dir/IRBuilder.cpp.o
/home/buildslave/ps4-buildslave1/clang-with-thin-lto-ubuntu/install/stage2/bin/clang++ -DGTEST_HAS_RTTI=0 -D_DEBUG -D_GNU_SOURCE -D__STDC_CONSTANT_MACROS -D__STDC_FORMAT_MACROS -D__STDC_LIMIT_MACROS -Ilib/IR -I/home/buildslave/ps4-buildslave1/clang-with-thin-lto-ubuntu/llvm.src/lib/IR -Iinclude -I/home/buildslave/ps4-buildslave1/clang-with-thin-lto-ubuntu/llvm.src/include -fPIC -fvisibility-inlines-hidden -Werror -Werror=date-time -Werror=unguarded-availability-new -std=c++11 -Wall -Wextra -Wno-unused-parameter -Wwrite-strings -Wcast-qual -Wmissing-field-initializers -pedantic -Wno-long-long -Wimplicit-fallthrough -Wcovered-switch-default -Wno-noexcept-type -Wnon-virtual-dtor -Wdelete-non-virtual-dtor -Wstring-conversion -fdiagnostics-color -ffunction-sections -fdata-sections -flto=thin -O3 -UNDEBUG -fno-exceptions -fno-rtti -MD -MT lib/IR/CMakeFiles/LLVMCore.dir/IRBuilder.cpp.o -MF lib/IR/CMakeFiles/LLVMCore.dir/IRBuilder.cpp.o.d -o lib/IR/CMakeFiles/LLVMCore.dir/IRBuilder.cpp.o -c /home/buildslave/ps4-buildslave1/clang-with-thin-lto-ubuntu/llvm.src/lib/IR/IRBuilder.cpp
clang-9: /home/buildslave/ps4-buildslave1/clang-with-thin-lto-ubuntu/llvm.src/lib/Analysis/OrderedBasicBlock.cpp:38: bool llvm::OrderedBasicBlock::comesBefore(const llvm::Instruction *, const llvm::Instruction *): Assertion `!(LastInstFound == BB->end() && NextInstPos != 0) && "Instruction supposed to be in NumberedInsts"' failed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@357211
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Florian Hahn [Thu, 28 Mar 2019 20:02:33 +0000 (20:02 +0000)]
[DSE] Preserve basic block ordering using OrderedBasicBlock.
By extending OrderedBB to allow removing and replacing cached
instructions, we can preserve OrderedBBs in DSE easily. This eliminates
one source of quadratic compile time in DSE.
Fixes PR38829.
Reviewers: rnk, efriedma, hfinkel
Reviewed By: efriedma
Differential Revision: https://reviews.llvm.org/D59789
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@357208
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Florian Hahn [Thu, 28 Mar 2019 19:17:31 +0000 (19:17 +0000)]
[MemDepAnalysis] Allow caller to pass in an OrderedBasicBlock.
If the caller can preserve the OBB, we can avoid recomputing the order
for each getDependency call.
Reviewers: efriedma, rnk, hfinkel
Reviewed By: rnk
Differential Revision: https://reviews.llvm.org/D59788
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@357206
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Simon Pilgrim [Thu, 28 Mar 2019 19:13:38 +0000 (19:13 +0000)]
[SLP][X86] Add tests showing failure to commute icmp/fcmp by swapping predicate
By swapping icmp/fcmp predicates we can commute their operands to improve vectorization
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@357204
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Simon Pilgrim [Thu, 28 Mar 2019 19:03:53 +0000 (19:03 +0000)]
[SLP][X86] Add tests showing failure to commute icmp/fcmp operands
Some predicates are fully commutative - we should be able to easily commute their operands to improve vectorization
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@357202
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Adrian Prantl [Thu, 28 Mar 2019 18:34:34 +0000 (18:34 +0000)]
Temporarily revert "SafepointIRVerifier port to new Pass Manager"
to unbreak the modular bots and its follow-up commit.
This reverts commit https://reviews.llvm.org/D59825
because it introduced a
fatal error: cyclic dependency in module 'LLVM_intrinsic_gen': LLVM_intrinsic_gen -> LLVM_IR -> LLVM_intrinsic_gen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@357201
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Jordan Rupprecht [Thu, 28 Mar 2019 18:27:00 +0000 (18:27 +0000)]
[llvm-objcopy][NFC] Move ELF-specific logic into /ELF/ directory
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@357199
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Craig Topper [Thu, 28 Mar 2019 18:05:37 +0000 (18:05 +0000)]
[X86] Teach the isel optimization for (x << C1) op C2 to (x op (C2>>C1)) << C1 to consider cases where C2>>C1 can fit an unsigned 32-bit immediate
For 64-bit operations we should consider if the immediate can be made to fit
in an unsigned 32-bits immedate. For OR/XOR this allows us to load the immediate
with MOV32ri instead of movabsq. For AND this allows us to fold the immediate.
Differential Revision: https://reviews.llvm.org/D59867
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@357196
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Reid Kleckner [Thu, 28 Mar 2019 17:33:41 +0000 (17:33 +0000)]
Delay initialization of three static global maps, NFC
This avoids allocating a few KB of heap memory on startup, and instead
allocates these maps lazily. I noticed this while profiling LLD.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@357192
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Benjamin Kramer [Thu, 28 Mar 2019 17:18:42 +0000 (17:18 +0000)]
Make helper functions static. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@357187
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Petar Avramovic [Thu, 28 Mar 2019 16:58:12 +0000 (16:58 +0000)]
[MIPS GlobalISel] Select float constants
Select 32 and 64 bit float constants for MIPS32.
Differential Revision: https://reviews.llvm.org/D59933
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@357183
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Nico Weber [Thu, 28 Mar 2019 16:53:32 +0000 (16:53 +0000)]
gn build: Add some build files for clangd
Enough to build the clangd binaries, but this is still missing build
files for:
- fuzzer
- indexer
- index/dex/dexp
- benchmarks
- xpc
Differential Revision: https://reviews.llvm.org/D59899
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@357182
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Jordan Rupprecht [Thu, 28 Mar 2019 16:15:28 +0000 (16:15 +0000)]
Add "git llvm revert" and "git llvm svn-lookup" subcommands
Summary:
The current git-svnrevert script only works with git-svn repos (e.g. using "git svn find-rev" to find the commit to revert). This adds a similar implementation that works with the llvm git command handler.
Usage:
```
// Revert by svn id
$ git llvm revert r123456
// See what commands would be run instead of actually reverting
$ git llvm revert -n r123456
<full git revert + git commit commands>
// Git commit hash also fine
$ git llvm revert
abc123456
// For convenience, the git->svn method can be used directly:
$ git llvm svn-lookup
abc123456
r123456
// Push revert upstream (drop the -n when ready)
$ git llvm push -n
```
Regardless of how the command is invoked (with a svn revision or git hash), the message is:
```
Revert [LibFoo] Change Foo implementation
This reverts r123456 (git commit abc123)
```
Reviewers: jyknight, mehdi_amini, jlebar
Reviewed By: jlebar
Subscribers: llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D59837
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@357180
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Nirav Dave [Thu, 28 Mar 2019 15:53:01 +0000 (15:53 +0000)]
[DAG] Fix Lifetime Node ID hashing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@357179
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Sanjay Patel [Thu, 28 Mar 2019 15:46:02 +0000 (15:46 +0000)]
[DAGCombiner] fold sext into negation
As noted in D59818:
%z = zext i8 %x to i32
%neg = sub i32 0, %z
%r = sext i32 %neg to i64
=>
%z2 = zext i8 %x to i64
%r = sub i64 0, %z2
https://rise4fun.com/Alive/KzSR
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@357178
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Sanjay Patel [Thu, 28 Mar 2019 15:30:09 +0000 (15:30 +0000)]
[x86] add vector test for sext of negate; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@357177
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Scott Linder [Thu, 28 Mar 2019 15:08:52 +0000 (15:08 +0000)]
[AMDGPU] Clarify Code Object V2/V3 differences in AMDGPUUsage
Ensure Code Object V2 documentation is complete, but always contains a
warning and a link to the equivalent Code Object V3 documentation.
Explicitly indicate that any note records present in a code object that
are not documented must be considered deprecated and ignored.
Differential Revision: https://reviews.llvm.org/D59782
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@357176
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Michael Platings [Thu, 28 Mar 2019 14:42:21 +0000 (14:42 +0000)]
[Documentation] Proposal to change variable names
Differential Revision: https://reviews.llvm.org/D59251
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@357174
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Sanjay Patel [Thu, 28 Mar 2019 14:16:13 +0000 (14:16 +0000)]
[x86] avoid cmov in movmsk reduction
This is probably the least important of our movmsk problems, but I'm starting
at the bottom to reduce distractions.
We were creating a select_cc which bypasses the select and bitmask codegen
optimizations that we have now. If we produce a compare+negate instead, we
allow things like neg/sbb carry bit hacks, and in all cases we avoid a cmov.
There's no partial register update danger in these sequences because we always
produce the zero-register xor ahead of the 'set' if needed.
There seems to be a missing fold for sext of a bool bit here:
negl %ecx
movslq %ecx, %rax
...but that's an independent transform.
Differential Revision: https://reviews.llvm.org/D59818
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@357172
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Clement Courbet [Thu, 28 Mar 2019 14:12:46 +0000 (14:12 +0000)]
[X86MacroFusion] Handle branch fusion (AMD CPUs).
Summary:
This adds a BranchFusion feature to replace the usage of the MacroFusion
for AMD CPUs.
See D59688 for context.
Reviewers: andreadb, lebedev.ri
Subscribers: hiraditya, jdoerfert, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D59872
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@357171
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Matt Arsenault [Thu, 28 Mar 2019 14:01:39 +0000 (14:01 +0000)]
AMDGPU: Make exec mask optimzations more resistant to block splits
Also improve the check for SALU instructions to also ignore
implicit_def and other fake instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@357170
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Roman Lebedev [Thu, 28 Mar 2019 13:40:34 +0000 (13:40 +0000)]
[X86] AMD Piledriver (BdVer2): fine-tune some latencies
Based on llvm-exegesis measurements.
Now that llvm-exegesis is ~2 magnitudes faster, and is a bit smarter,
it is now possible to continue cleanup of the scheduler model.
With this, there are no more latency inconsistencies for the
opcodes that produce stable measurements, and only a few inconsistencies
for unstable measurements (MMX_* opcodes, opcodes that llvm-exegesis
measures by chaining - CMP, TEST, BT, SETcc, CVT, MOV, etc.)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@357169
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Clement Courbet [Thu, 28 Mar 2019 13:38:58 +0000 (13:38 +0000)]
[NFC] Format InlineFeatureIgnoreList.
To avoid more spurious clang-format changes when adding features (D59872).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@357168
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Xing GUO [Thu, 28 Mar 2019 12:51:56 +0000 (12:51 +0000)]
- Addressed comments
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@357166
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Xing GUO [Thu, 28 Mar 2019 12:51:46 +0000 (12:51 +0000)]
- Addressed @jhenderson 's comments
- Format patch
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@357165
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Xing GUO [Thu, 28 Mar 2019 12:51:35 +0000 (12:51 +0000)]
[llvm-readobj] Add new helper function `getSymbolVersionByIndex()`
Summary: When implementing `GNU style` dumper for `.gnu.version` section, we should find symbol version name by `vs_index`.
Reviewers: jhenderson, rupprecht
Reviewed By: rupprecht
Subscribers: arphaman, rupprecht, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D59545
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@357164
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Simon Pilgrim [Thu, 28 Mar 2019 11:34:21 +0000 (11:34 +0000)]
[DAGCombiner] Fold truncate(build_vector(x,y)) -> build_vector(truncate(x),truncate(y))
If scalar truncates are free, attempt to pre-truncate build_vectors source operands.
Only attempt to do this before legalization as we often end up with truncations/extensions during build_vector lowering.
Differential Revision: https://reviews.llvm.org/D59654
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@357161
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Diana Picus [Thu, 28 Mar 2019 10:57:29 +0000 (10:57 +0000)]
[ARM GlobalISel] Run regbankselect test for Thumb. NFCI
This should just work, since ARM mode and Thumb2 mode are at the same
level of support now and should map the same to GPR and FPR.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@357159
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George Rimar [Thu, 28 Mar 2019 10:52:14 +0000 (10:52 +0000)]
[yaml2obj][obj2yaml] - Teach yaml2obj/obj2yaml tools about STB_GNU_UNIQUE symbols.
yaml2obj/obj2yaml does not support the symbols with STB_GNU_UNIQUE yet.
Currently, obj2yaml fails with llvm_unreachable when met such a symbol.
I faced it when investigated the https://bugs.llvm.org/show_bug.cgi?id=41196.
Differential revision: https://reviews.llvm.org/D59875
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@357158
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Pierre Gousseau [Thu, 28 Mar 2019 10:51:24 +0000 (10:51 +0000)]
[asan] Add options -asan-detect-invalid-pointer-cmp and -asan-detect-invalid-pointer-sub options.
This is in preparation to a driver patch to add gcc 8's -fsanitize=pointer-compare and -fsanitize=pointer-subtract.
Disabled by default as this is still an experimental feature.
Reviewed By: morehouse, vitalybuka
Differential Revision: https://reviews.llvm.org/D59220
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@357157
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Florian Hahn [Thu, 28 Mar 2019 10:37:12 +0000 (10:37 +0000)]
[VPlan] Determine Vector Width programmatically.
With this change, the VPlan native path is triggered with the directive:
#pragma clang loop vectorize(enable)
There is no need to specify the vectorize_width(N) clause.
Patch by Francesco Petrogalli <francesco.petrogalli@arm.com>
Differential Revision: https://reviews.llvm.org/D57598
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@357156
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Simon Pilgrim [Thu, 28 Mar 2019 10:25:13 +0000 (10:25 +0000)]
[X85][AVX] Add missing vXi16 broadcast fold patterns
Now that D59484 has landed its easier to add these.
Added missing AVX512BW v32i16 equivalents while I was at it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@357155
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Diana Picus [Thu, 28 Mar 2019 09:09:36 +0000 (09:09 +0000)]
[ARM GlobalISel] Fix G_STORE with s1
G_STORE for 1-bit values uses a STRBi12, which stores the whole byte.
Zero out the undefined bits before writing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@357154
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Diana Picus [Thu, 28 Mar 2019 09:09:27 +0000 (09:09 +0000)]
[ARM GlobalISel] Fix selection of G_SELECT
G_SELECT uses a 1-bit scalar for the condition, and is currently
implemented with a plain CMPri against 0. This means that values such as
0x1110 are interpreted as true, when instead the higher bits should be
treated as undefined and therefore ignored. Replace the CMPri with a
TSTri against 0x1, which performs an implicit AND, yielding the expected
result.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@357153
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Roman Lebedev [Thu, 28 Mar 2019 08:55:01 +0000 (08:55 +0000)]
[llvm-exegesis] Introduce a 'naive' clustering algorithm (PR40880)
Summary:
This is an alternative to D59539.
Let's suppose we have measured 4 different opcodes, and got: `0.5`, `1.0`, `1.5`, `2.0`.
Let's suppose we are using `-analysis-clustering-epsilon=0.5`.
By default now we will start processing the `0.5` point, find that `1.0` is it's neighbor, add them to a new cluster.
Then we will notice that `1.5` is a neighbor of `1.0` and add it to that same cluster.
Then we will notice that `2.0` is a neighbor of `1.5` and add it to that same cluster.
So all these points ended up in the same cluster.
This may or may not be a correct implementation of dbscan clustering algorithm.
But this is rather horribly broken for the reasons of comparing the clusters with the LLVM sched data.
Let's suppose all those opcodes are currently in the same sched cluster.
If i specify `-analysis-inconsistency-epsilon=0.5`, then no matter
the LLVM values this cluster will **never** match the LLVM values,
and thus this cluster will **always** be displayed as inconsistent.
The solution is obviously to split off some of these opcodes into different sched cluster.
But how do i do that? Out of 4 opcodes displayed in the inconsistency report,
which ones are the "bad ones"? Which ones are the most different from the checked-in data?
I'd need to go in to the `.yaml` and look it up manually.
The trivial solution is to, when creating clusters, don't use the full dbscan algorithm,
but instead "pick some unclustered point, pick all unclustered points that are it's neighbor,
put them all into a new cluster, repeat". And just so as it happens, we can arrive
at that algorithm by not performing the "add neighbors of a neighbor to the cluster" step.
But that won't work well once we teach analyze mode to operate in on-1D mode
(i.e. on more than a single measurement type at a time), because the clustering would
depend on the order of the measurements.
Instead, let's just create a single cluster per opcode, and put all the points of that opcode into said cluster.
And simultaneously check that every point in that cluster is a neighbor of every other point in the cluster,
and if they are not, the cluster (==opcode) is unstable.
This is //yet another// step to bring me closer to being able to continue cleanup of bdver2 sched model..
Fixes [[ https://bugs.llvm.org/show_bug.cgi?id=40880 | PR40880 ]].
Reviewers: courbet, gchatelet
Reviewed By: courbet
Subscribers: tschuett, jdoerfert, RKSimon, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D59820
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@357152
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Piotr Sobczak [Thu, 28 Mar 2019 07:06:26 +0000 (07:06 +0000)]
[SelectionDAG] Add 2 tests for selection across basic blocks
Summary:
Add tests for selection across basic block boundary:
* one test containing a buffer load, where part of the offset
computation is placed in the predecessor of the load
* similar test, but containing two buffer loads and shared
computations
Please note that the behaviour being tested will be updated in
a subsequent commit.
This commit was extracted from https://reviews.llvm.org/D59535.
Reviewers: RKSimon
Reviewed By: RKSimon
Subscribers: jvesely, nhaehnle, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D59690
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@357149
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Serguei Katkov [Thu, 28 Mar 2019 07:02:00 +0000 (07:02 +0000)]
SafepointIRVerifier port to new Pass Manager
Add missed include.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@357148
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Serguei Katkov [Thu, 28 Mar 2019 06:00:09 +0000 (06:00 +0000)]
SafepointIRVerifier port to new Pass Manager
Straightforward port of StatepointIRVerifier pass to new Pass Manager framework.
Reviewers: fedor.sergeev, reames
Reviewed By: fedor.sergeev
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D59825
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@357147
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Sam Clegg [Thu, 28 Mar 2019 02:07:28 +0000 (02:07 +0000)]
[WebAssembly] Rename wasm fixup kinds
These fixup kinds are not explicitly related to the code section. They
are there to signal how to apply the fixup.
Also, a couple of other minor wasm cleanups.
Differential Revision: https://reviews.llvm.org/D59908
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@357145
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Eric Christopher [Thu, 28 Mar 2019 01:56:16 +0000 (01:56 +0000)]
Add reproduction instructions to llvm-objdump's embedded source test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@357142
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Eric Christopher [Thu, 28 Mar 2019 01:12:13 +0000 (01:12 +0000)]
Fix typoed variable name.
NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@357138
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Chandler Carruth [Thu, 28 Mar 2019 00:51:36 +0000 (00:51 +0000)]
[NewPM] Fix a nasty bug with analysis invalidation in the new PM.
The issue here is that we actually allow CGSCC passes to mutate IR (and
therefore invalidate analyses) outside of the current SCC. At a minimum,
we need to support mutating parent and ancestor SCCs to support the
ArgumentPromotion pass which rewrites all calls to a function.
However, the analysis invalidation infrastructure is heavily based
around not needing to invalidate the same IR-unit at multiple levels.
With Loop passes for example, they don't invalidate other Loops. So we
need to customize how we handle CGSCC invalidation. Doing this without
gratuitously re-running analyses is even harder. I've avoided most of
these by using an out-of-band preserved set to accumulate the cross-SCC
invalidation, but it still isn't perfect in the case of re-visiting the
same SCC repeatedly *but* it coming off the worklist. Unclear how
important this use case really is, but I wanted to call it out.
Another wrinkle is that in order for this to successfully propagate to
function analyses, we have to make sure we have a proxy from the SCC to
the Function level. That requires pre-creating the necessary proxy.
The motivating test case now works cleanly and is added for
ArgumentPromotion.
Thanks for the review from Philip and Wei!
Differential Revision: https://reviews.llvm.org/D59869
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@357137
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Craig Topper [Wed, 27 Mar 2019 23:12:19 +0000 (23:12 +0000)]
[X86] Add test cases from PR27202.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@357132
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Sam Clegg [Wed, 27 Mar 2019 23:00:12 +0000 (23:00 +0000)]
[ARM] Remove dead function ARMMCCodeEmitter::getSOImmOpValue
The last reference to this function was removed from the ARM
td files in 2015 in rL225266.
Differential Revision: https://reviews.llvm.org/D59868
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@357130
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Sanjay Patel [Wed, 27 Mar 2019 22:42:11 +0000 (22:42 +0000)]
[x86] improve AVX lowering of vector zext
If we know the 2 halves of an oversized zext-in-reg are the same,
don't create those halves independently.
I tried several different approaches to fold this, but it's difficult
to get right during legalization. In the default path, we are creating
a generic shuffle that looks like an unpack high, but it can get
transformed into a different mask (a blend), so it's not
straightforward to match that. If we try to fold after it actually
becomes an X86ISD::UNPCKH node, we can't be sure what the operand node
is - it might be a generic shuffle, or it could be some x86-specific op.
From the test output, we should be doing something like this for SSE4.1
as well, but I'd rather leave that as a follow-up since it involves
changing lowering actions.
Differential Revision: https://reviews.llvm.org/D59777
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@357129
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Sanjay Patel [Wed, 27 Mar 2019 22:24:03 +0000 (22:24 +0000)]
[x86] look through bitcast operand of MOVMSK
This is not exactly NFC because it should make further combines
of MOVMSK easier to match, but there should be no outward differences
because we have isel patterns in place specifically to allow this. See:
// Also support integer VTs to avoid a int->fp bitcast in the DAG.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@357128
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Craig Topper [Wed, 27 Mar 2019 21:05:07 +0000 (21:05 +0000)]
[X86ISelDAGToDAG] Move initialization of OptForSize and OptForMinSize from PreprocessISelDAG to runOnMachineFunction. NFCI
This makes more sense as a place to initialize these. I don't think runOnMachineFunction was overriden when these cached values were originally created.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@357123
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Daniel Sanders [Wed, 27 Mar 2019 20:43:47 +0000 (20:43 +0000)]
test/CodeGen/X86/codegen-prepare-replacephi.mir requires a default triple
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@357122
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Nirav Dave [Wed, 27 Mar 2019 20:37:08 +0000 (20:37 +0000)]
[DAGCombiner] Teach TokenFactor pruning to peek through lifetime nodes
Summary: Lifetime nodes were inhibiting TokenFactor simplification inhibiting chain-based optimizations.
Reviewers: courbet, jyknight
Subscribers: hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D59897
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@357121
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Justin Bogner [Wed, 27 Mar 2019 20:35:56 +0000 (20:35 +0000)]
[LegalizeVectorTypes] Allow single loads and stores for more short vectors
When lowering a load or store for TypeWidenVector, the type legalizer
would use a single load or store if the associated integer type was legal
or promoted. E.g. it loads a v4i8 as an i32 if i32 is legal/promotable.
(See https://reviews.llvm.org/rL236528 for reference.)
This applies that behaviour to vector types. If the vector type is
TypePromoteInteger, the element type is going to be TypePromoteInteger
as well, which will lead to have a single promoting load rather than N
individual promoting loads. For instance, if we have a v3i1, we would
now have a load of v4i1 instead of 3 loads of i1.
Patch by Guillaume Marques. Thanks!
Differential Revision: https://reviews.llvm.org/D56201
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@357120
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Nikita Popov [Wed, 27 Mar 2019 20:18:51 +0000 (20:18 +0000)]
[ConstantRangeTest] Add exhaustive intersectWith() test
Add a test that checks the intersectWith() implementation against
all 4-bit range pairs. The test uses a more explicit way of
calculating the possible intersections, and checks that the right
one is picked out according to the smallest set heuristic.
This is in preparation for introducing intersectWith() variants that
use different heuristics to pick an intersection range, if there are
multiple possibilities.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@357119
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Evgeniy Stepanov [Wed, 27 Mar 2019 20:15:08 +0000 (20:15 +0000)]
Fix llvm-rc tests.
Summary:
Follow-up for D56743.
* Add more "--" in llvm-rc invocations.
* Add llvm-rc to the tools list. This uses full path to llvm-rc in test
RUN lines (llvm-lit -v), making them copy-pasteable.
Reviewers: mstorsjo, zturner
Subscribers: llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D59858
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@357118
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Alon Zakai [Wed, 27 Mar 2019 20:12:42 +0000 (20:12 +0000)]
[WebAssembly] Add some whitespace to WebAssemblyFixIrreducibleControlFlow
Differential Revision: https://reviews.llvm.org/D59855
modified: llvm/lib/Target/WebAssembly/WebAssemblyFixIrreducibleControlFlow.cpp
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@357117
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Nirav Dave [Wed, 27 Mar 2019 19:54:41 +0000 (19:54 +0000)]
Revert r356996 "[DAG] Avoid smart constructor-based dangling nodes."
This patch appears to trigger very large compile time increases in
halide builds.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@357116
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Nikita Popov [Wed, 27 Mar 2019 19:12:09 +0000 (19:12 +0000)]
[ConstantRange] Add isWrappedSet() and isUpperSignWrapped()
Split off from D59749. This adds isWrappedSet() and
isUpperSignWrapped() set with the same behavior as isSignWrappedSet()
and isUpperWrapped() for the respectively other domain.
The methods isWrappedSet() and isSignWrappedSet() will not consider
ranges of the form [X, Max] == [X, 0) and [X, SignedMax] == [X, SignedMin)
to be wrapping, while isUpperWrapped() and isUpperSignWrapped() will.
Also replace the checks in getUnsignedMin() and friends with method
calls that implement the same logic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@357112
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Teresa Johnson [Wed, 27 Mar 2019 18:44:25 +0000 (18:44 +0000)]
[CGP] Reset DT when optimizing select instructions
Summary:
A recent fix (r355751) caused a compile time regression because setting
the ModifiedDT flag in optimizeSelectInst means that each time a select
instruction is optimized the function walk in runOnFunction stops and
restarts again (which was needed to build a new DT before we started
building it lazily in r356937). Now that the DT is built lazily, a
simple fix is to just reset the DT at this point, rather than restarting
the whole function walk.
In the future other places that set ModifiedDT may want to switch to
just resetting the DT directly. But that will require an evaluation to
ensure that they don't otherwise need to restart the function walk.
Reviewers: spatel
Subscribers: jdoerfert, llvm-commits, xur
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D59889
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@357111
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Jessica Paquette [Wed, 27 Mar 2019 18:35:04 +0000 (18:35 +0000)]
[opt-viewer] Teach optrecord.py about !Failure tags
WarnMissedTransforms.cpp produces remarks that use !Failure tags.
These weren't supported in optrecord.py, so if you encountered one in any of
the tools, the tool would crash.
Add them as a type of missed optimization.
Differential Revision: https://reviews.llvm.org/D59895
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@357110
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Eli Friedman [Wed, 27 Mar 2019 18:33:30 +0000 (18:33 +0000)]
[ARM] Don't confuse the scheduler for very large VLDMDIA etc.
ARMBaseInstrInfo::getNumLDMAddresses is making bad assumptions about the
memory operands of load and store-multiple operations. This doesn't
really fix the problem properly, but it's enough to prevent crashing,
at least.
Fixes https://bugs.llvm.org/show_bug.cgi?id=41231 .
Differential Revision: https://reviews.llvm.org/D59834
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@357109
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Amara Emerson [Wed, 27 Mar 2019 18:31:46 +0000 (18:31 +0000)]
[AArch64][GlobalISel] Make G_PHI of v2s64, v4s32, v2s32 legal.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@357108
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Nikita Popov [Wed, 27 Mar 2019 18:19:33 +0000 (18:19 +0000)]
[ConstantRange] Rename isWrappedSet() to isUpperWrapped()
Split out from D59749. The current implementation of isWrappedSet()
doesn't do what it says on the tin, and treats ranges like
[X, Max] as wrapping, because they are represented as [X, 0) when
using half-inclusive ranges. This also makes it inconsistent with
the semantics of isSignWrappedSet().
This patch renames isWrappedSet() to isUpperWrapped(), in preparation
for the introduction of a new isWrappedSet() method with corrected
behavior.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@357107
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Jessica Paquette [Wed, 27 Mar 2019 18:14:32 +0000 (18:14 +0000)]
[opt-viewer] Make filter_=None by default in get_remarks and gather_results
Right now, if you try to use optdiff.py on any opt records, it will fail because
its calls to gather_results weren't updated to support filtering.
Since filters are supposed to be optional, this makes them None by default in
get_remarks and in gather_results. This allows other tools that don't support
filtering to still use the functions as is.
Differential Revision: https://reviews.llvm.org/D59894
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@357106
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Matt Arsenault [Wed, 27 Mar 2019 18:14:02 +0000 (18:14 +0000)]
RegPressure: Fix crash on blocks with only dbg_value
If there were only dbg_values in the block, recede would hit the
beginning of the block and try to use thet dbg_value as a real
instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@357105
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Nikita Popov [Wed, 27 Mar 2019 17:56:15 +0000 (17:56 +0000)]
[InstCombine] Use uadd.sat and usub.sat for canonicalization
Start using the uadd.sat and usub.sat intrinsics for the existing
canonicalizations. These intrinsics should optimize better than
expanded IR, have better handling in the X86 backend and should
be no worse than expanded IR in other backends, as far as we know.
rL357012 already introduced use of uadd.sat for the add+umin pattern.
Differential Revision: https://reviews.llvm.org/D58872
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@357103
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Amara Emerson [Wed, 27 Mar 2019 17:47:42 +0000 (17:47 +0000)]
[GlobalISel] Fix legalizer artifact combiner from crashing with invalid dead instructions.
The artifact combiners push instructions which have been marked for deletion
onto an list for the legalizer to deal with on return. However, for trunc(ext)
combines the combiner routine recursively calls itself. When it does this the
dead instructions list may not be empty, and the other combiners don't expect
to be dealing with essentially invalid MIR (multiple vreg defs etc).
This change fixes it by ensuring that the dead instructions are processed on
entry into tryCombineInstruction.
As a result, this fix exposed a few places in tests where G_TRUNC instructions
were not being deleted even though they were dead.
Differential Revision: https://reviews.llvm.org/D59892
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@357101
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Clement Courbet [Wed, 27 Mar 2019 17:44:16 +0000 (17:44 +0000)]
[X86MacroFusion][NFC] Add a bulldozer test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@357099
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Matt Arsenault [Wed, 27 Mar 2019 17:31:29 +0000 (17:31 +0000)]
Reapply "AMDGPU: Scavenge register instead of findUnusedReg"
This reapplies r356149, using the correct overload of findUnusedReg
which passes the current iterator.
This worked most of the time, because the scavenger iterator was moved
at the end of the frame index loop in PEI. This would fail if the
spill was the first instruction. This was further hidden by the fact
that the scavenger wasn't passed in for normal frame index
elimination.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@357098
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