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Andreas Gampe [Tue, 2 Dec 2014 19:25:48 +0000 (19:25 +0000)]
Merge "ART: Add some thread abort logging"
Andreas Gampe [Tue, 2 Dec 2014 19:25:07 +0000 (19:25 +0000)]
Merge "ART: Print initialization failures to file"
Ian Rogers [Tue, 2 Dec 2014 19:24:06 +0000 (19:24 +0000)]
Merge "Remove MethodHelper from the interpreter."
Ian Rogers [Tue, 2 Dec 2014 19:13:19 +0000 (11:13 -0800)]
Remove MethodHelper from the interpreter.
Use ShadowFrame to get the executing method to avoid a handle for the current
method.
Various associated bits of header file clean-up and removal of an unnecessary
use of MethodHelper in CompilerDriver.
Change-Id: I3b6f4413701e8fc6b0c58b0041a0dd15472bedaa
Mathieu Chartier [Tue, 2 Dec 2014 19:09:49 +0000 (19:09 +0000)]
Merge "Add a way to pass GDB commands"
Mathieu Chartier [Fri, 17 Oct 2014 22:58:01 +0000 (15:58 -0700)]
Add a way to pass GDB commands
Passing --gdb-arg to run-test sends the arg to GDB, example:
test/run-test --host --gdb --gdb-arg "--command=command.txt" 001-HelloWorld
Would run the test with the GDB script at command.txt on the host, this is
useful for running tests in GDB in a loop.
Bug:
17387969
Change-Id: I5ad455159a6d92783eacb17eecbb0f1e670cb4a3
Andreas Gampe [Tue, 2 Dec 2014 18:29:34 +0000 (18:29 +0000)]
Merge "ART: Avoid a recursive abort"
Nicolas Geoffray [Tue, 2 Dec 2014 14:59:43 +0000 (14:59 +0000)]
Merge "Fix OOM throwing if it happens in finalizer reference (take 2)"
Pavel Vyssotski [Tue, 2 Dec 2014 13:54:50 +0000 (19:54 +0600)]
Fix OOM throwing if it happens in finalizer reference (take 2)
The Class::Alloc should return null if OOM happened during
adding finalizer reference, even if finalizable object is
allocated succesfully.
Added new more reliable test.
Change-Id: Id5fed3bdb16297d6d3a2b14ce62cc305aa703d60
Signed-off-by: Dmitry Petrochenko <dmitry.petrochenko@intel.com>
Signed-off-by: Serguei Katkov <serguei.i.katkov@intel.com>
Signed-off-by: Pavel Vyssotski <pavel.n.vyssotski@intel.com>
Calin Juravle [Tue, 2 Dec 2014 14:52:39 +0000 (14:52 +0000)]
Merge "[optimizing compiler] Fix invoke-direct"
Nicolas Geoffray [Tue, 2 Dec 2014 13:52:01 +0000 (13:52 +0000)]
Merge "Add a branch to ensure the test is compiled."
Nicolas Geoffray [Tue, 2 Dec 2014 13:48:19 +0000 (13:48 +0000)]
Add a branch to ensure the test is compiled.
The compiler will now not compile large methods with no branch.
Change-Id: Iaea284c648f7f3f754cb8ec721ad2ecffbd2f6af
Nicolas Geoffray [Tue, 2 Dec 2014 12:41:26 +0000 (12:41 +0000)]
Merge "Add some heursitics for compiling, close to Quick's."
Nicolas Geoffray [Tue, 2 Dec 2014 12:28:11 +0000 (12:28 +0000)]
Merge "Treat SSA transformation special, as we may have to bailout."
Nicolas Geoffray [Tue, 2 Dec 2014 11:51:19 +0000 (11:51 +0000)]
Treat SSA transformation special, as we may have to bailout.
We forgot to bailout when we found a non-natural loop (on which
our optimizations don't work).
Change-Id: I11976b5af4c98f4f29267a74c74d34b5ad81e20c
Calin Juravle [Tue, 2 Dec 2014 11:42:34 +0000 (11:42 +0000)]
[optimizing compiler] Fix invoke-direct
Always compute invoke info via compiler driver. This ensures that the
method is not called directly if its access cannot be verified.
Change-Id: I04b35563a1148bc5cb16b37324419e2a977ec8db
Nicolas Geoffray [Tue, 2 Dec 2014 12:13:34 +0000 (12:13 +0000)]
Merge "Don't run optimizations after baseline."
Nicolas Geoffray [Tue, 2 Dec 2014 10:19:51 +0000 (10:19 +0000)]
Add some heursitics for compiling, close to Quick's.
Quick has more machinery to give up/not give up, but we can
backport them later.
Change-Id: I5eb62c664246f4ce46f0400cf24ec34a72afb51e
Christopher Ferris [Tue, 2 Dec 2014 03:10:22 +0000 (03:10 +0000)]
Merge "Fix fault handler invoked before vm running."
Mathieu Chartier [Tue, 2 Dec 2014 01:08:02 +0000 (01:08 +0000)]
Merge "Try normal allocation if large object allocation fails"
Mathieu Chartier [Mon, 1 Dec 2014 23:00:27 +0000 (15:00 -0800)]
Try normal allocation if large object allocation fails
If a large object allocation fails, we now try the normal allocators.
Bug:
18124612
(cherry picked from commit
f1c4d0e3a27e9b39916750147ecdea1418fcc231)
Change-Id: Ib83ebe53fbdd83aa2d23fd10a8bb10e149f8918f
Mathieu Chartier [Tue, 2 Dec 2014 00:53:40 +0000 (00:53 +0000)]
Merge "Fix growth limit / footprint limit problems"
Mathieu Chartier [Mon, 1 Dec 2014 21:40:48 +0000 (13:40 -0800)]
Fix growth limit / footprint limit problems
We now properly clear the growth limit of all the spaces when
ClearGrowthLimit is called. Previously we didn't clear the growth
limit of the background space.
This wasn't caught by heap test since it only manifested itself
when we had a zygote space.
Bug:
18504942
(cherry picked from commit
d59c170057dcc213a858652abc71eec710898a41)
Change-Id: I6e4394b9c9f7f22aabc5f5955adb8dd4511c2617
Mathieu Chartier [Mon, 1 Dec 2014 22:32:35 +0000 (22:32 +0000)]
Merge "Set dex_cache_strings_ when we call Class::SetDexCache"
Nicolas Geoffray [Mon, 1 Dec 2014 22:09:43 +0000 (22:09 +0000)]
Don't run optimizations after baseline.
We have enough coverage now. This was also motivated
by having to call RunOptimizations instead, which does invoke
InstructionSimplifier, required by the code generators (for, e.g.
removing useless HTypeConversion nodes).
Change-Id: I4e616dae771b8ced60e1f418e3da834f44edb717
Mathieu Chartier [Mon, 1 Dec 2014 18:31:15 +0000 (10:31 -0800)]
Set dex_cache_strings_ when we call Class::SetDexCache
Ensures that these two variables never get out of sync. The error
was presumably related to not doing this for proxy classes. This
caused java code which was looking at the dex_cache_strings_ field
to incorrectly access a null array.
Bug:
18548887
(cherry picked from commit
ea1c3d77b92b30ec527f2ca5bfe316a882b698e0)
Change-Id: I022d9311b38b61e160ed70e3c5d9639797adb29c
Bill Buzbee [Mon, 1 Dec 2014 19:10:14 +0000 (19:10 +0000)]
Merge "ART: x86 specific clearing higher bits when converting long to int"
Vladimir Marko [Mon, 1 Dec 2014 19:04:28 +0000 (19:04 +0000)]
Merge "Quick: Fix neg-long on ARM for overlapping regs."
Vladimir Marko [Mon, 1 Dec 2014 17:57:04 +0000 (17:57 +0000)]
Merge "Refactor handling of conditional branches with known result."
Vladimir Marko [Mon, 1 Dec 2014 17:56:41 +0000 (17:56 +0000)]
Merge "Quick: Use 16-bit conditional branch in Thumb2."
Vladimir Marko [Mon, 1 Dec 2014 17:56:27 +0000 (17:56 +0000)]
Merge "Quick: Use 16-bit Thumb2 PUSH/POP when possible."
Vladimir Marko [Mon, 1 Dec 2014 16:48:48 +0000 (16:48 +0000)]
Quick: Fix neg-long on ARM for overlapping regs.
Bug:
18569347
Change-Id: I764a4648b7ea5fd92f1ffbb9038b9d101b50d137
Nicolas Geoffray [Mon, 1 Dec 2014 14:52:01 +0000 (14:52 +0000)]
Merge "Remove type conversion nodes converting to the same type."
Nicolas Geoffray [Mon, 1 Dec 2014 14:16:20 +0000 (14:16 +0000)]
Remove type conversion nodes converting to the same type.
When optimizing, we ensure these conversions do not reach the
code generators. When not optimizing, we cannot get such situations.
Change-Id: I717247c957667675dc261183019c88efa3a38452
Nicolas Geoffray [Mon, 1 Dec 2014 12:29:09 +0000 (12:29 +0000)]
Merge "Opt Compiler: Arm64: Add support for more IRs plus various fixes."
Nicolas Geoffray [Mon, 1 Dec 2014 12:28:51 +0000 (12:28 +0000)]
Merge "Vixl: Update the VIXL interface to VIXL 1.7 and enable VIXL debug."
Nicolas Geoffray [Mon, 1 Dec 2014 12:04:49 +0000 (12:04 +0000)]
Merge "Fix insertion of parallel move when connecting siblings."
Nicolas Geoffray [Mon, 1 Dec 2014 09:50:04 +0000 (09:50 +0000)]
Fix insertion of parallel move when connecting siblings.
Also add a check that ensures parallel moves have been inserted
correctly.
This fixes tests:
org.apache.harmony.tests.java.util.BitSetTest#test_nextSetBitI
org.apache.harmony.tests.java.util.BitSetTest#test_31036_set
On host/x64.
Change-Id: I59d29aca393b5344bac933e2813ab409fea9d9b5
Nicolas Geoffray [Mon, 1 Dec 2014 10:40:12 +0000 (10:40 +0000)]
Merge "Don't walk the libcore tree when finding tests."
Nicolas Geoffray [Mon, 1 Dec 2014 10:12:15 +0000 (10:12 +0000)]
Don't walk the libcore tree when finding tests.
vogar will run tests twice if it is given, for example,
libcore.java.lang and libcore.java.lang.ref.
Also currently disable math tests until expectations/fixes
are in.
Change-Id: Iba2edad3ce0a6b27947ce6897d70abedf8d1e6b3
Nicolas Geoffray [Fri, 28 Nov 2014 16:27:01 +0000 (16:27 +0000)]
Merge "Print the right default for the compiler backend."
Nicolas Geoffray [Fri, 28 Nov 2014 16:22:11 +0000 (16:22 +0000)]
Print the right default for the compiler backend.
Change-Id: I7083c640af6e2af1c333d5551ba2391ab672954d
Nicolas Geoffray [Fri, 28 Nov 2014 16:04:38 +0000 (16:04 +0000)]
Merge "Don't use CanHoldArm in the code generator."
Nicolas Geoffray [Fri, 28 Nov 2014 15:00:02 +0000 (15:00 +0000)]
Don't use CanHoldArm in the code generator.
CanHoldArm was ARM32 specific. Instead use a virtual
Assembler::ShifterOperandCanHold that both thumb2 and arm32
implement.
Change-Id: I33794a93caf02ee5d78d32a8471d9fd6fe4f0a00
Nicolas Geoffray [Fri, 28 Nov 2014 15:54:54 +0000 (15:54 +0000)]
Merge "Add a script for running libcore tests."
Nicolas Geoffray [Fri, 28 Nov 2014 14:24:28 +0000 (14:24 +0000)]
Add a script for running libcore tests.
Script contains a list of packages that have no vogar failures,
that is, vogar finds the right test expectations.
Change-Id: Ie47bead6bb5457d055498570204187a54db45efa
Vladimir Marko [Fri, 28 Nov 2014 13:38:28 +0000 (13:38 +0000)]
Refactor handling of conditional branches with known result.
Detect IF_cc and IF_ccZ instructions with known results in
the basic block optimization phase (instead for the codegen
phase) and replace them with GOTO/NOP. Kill blocks that are
unreachable as a result.
Change-Id: I169c2fa6f1e8af685f4f3a7fe622f5da862ce329
Serban Constantinescu [Thu, 13 Nov 2014 14:05:07 +0000 (14:05 +0000)]
Opt Compiler: Arm64: Add support for more IRs plus various fixes.
Add support for more IRs and update others.
Change-Id: Iae1bef01dc3c0d238a46fbd2800e71c38288b1d2
Signed-off-by: Serban Constantinescu <serban.constantinescu@arm.com>
Serban Constantinescu [Tue, 25 Nov 2014 20:05:46 +0000 (20:05 +0000)]
Vixl: Update the VIXL interface to VIXL 1.7 and enable VIXL debug.
This patch updates the interface to VIXL 1.7 and enables the debug version of
VIXL when ART is built in debug mode.
Change-Id: I443fb941bec3cffefba7038f93bb972e6b7d8db5
Signed-off-by: Serban Constantinescu <serban.constantinescu@arm.com>
Nicolas Geoffray [Fri, 28 Nov 2014 11:26:24 +0000 (11:26 +0000)]
Merge "Fix a bug in the linear scan register allocator."
Nicolas Geoffray [Fri, 28 Nov 2014 11:07:27 +0000 (11:07 +0000)]
Merge "Fix bogus assumption for live registers at safe point."
Nicolas Geoffray [Fri, 28 Nov 2014 11:06:26 +0000 (11:06 +0000)]
Merge "Fix a bug in GVN."
Nicolas Geoffray [Thu, 27 Nov 2014 12:01:59 +0000 (12:01 +0000)]
Fix a bug in GVN.
When a predecessor block was killing instructions in a set, we were
not taking into account side effects of blocks between the dominator to
this predecessor.
Implementation now intersects the copied set of the dominator with
the predecessors to take these side effects into account.
Change-Id: If297439cc4e50cee91e9fffd028216a3e49e19ef
Roland Levillain [Fri, 28 Nov 2014 10:29:35 +0000 (10:29 +0000)]
Merge "Add support for long-to-float in the optimizing compiler."
Roland Levillain [Thu, 27 Nov 2014 18:31:21 +0000 (18:31 +0000)]
Add support for long-to-float in the optimizing compiler.
- Add support for the long-to-float Dex instruction in the
optimizing compiler.
- Have art::x86_64::X86_64Assembler::cvtsi2ss work with
64-bit operands.
- Generate x86, x86-64 and ARM (but not ARM64) code for
long to float HTypeConversion nodes.
- Add related tests to test/422-type-conversion.
Change-Id: Ic983cbeb1ae2051add40bc519a8f00a6196166c9
Roland Levillain [Thu, 27 Nov 2014 17:32:58 +0000 (17:32 +0000)]
Merge "Wrap long lines in the optimizing compiler."
Roland Levillain [Thu, 27 Nov 2014 17:15:16 +0000 (17:15 +0000)]
Wrap long lines in the optimizing compiler.
Change-Id: I5dee0c65e6652de574ae952b1f1dfc7355859e45
Roland Levillain [Thu, 27 Nov 2014 15:42:08 +0000 (15:42 +0000)]
Merge "Ensure opt. compiler doesn't get core & FP registers mixed up."
Roland Levillain [Thu, 27 Nov 2014 15:41:28 +0000 (15:41 +0000)]
Merge "Fix neg-float & neg-double for null values in opt. compiler."
Nicolas Geoffray [Thu, 27 Nov 2014 15:38:07 +0000 (15:38 +0000)]
Merge "Fix Move64 by using ParallelMoves."
Nicolas Geoffray [Thu, 27 Nov 2014 14:54:18 +0000 (14:54 +0000)]
Fix Move64 by using ParallelMoves.
Destination and source might overlap in a Move64, so we have to
use a parallel move resolver.
Change-Id: Ica6c72d91ab8e2e2ee4661b211ac1ee8f054b9ef
Roland Levillain [Thu, 27 Nov 2014 15:23:57 +0000 (15:23 +0000)]
Ensure opt. compiler doesn't get core & FP registers mixed up.
Replace Location::As<T>() with two method methods
(Location::AsRegister<T>() and Location::AsFpuRegister<T>())
checking the kind of the location (register).
Change-Id: I22b4abee1a124b684becd2dc1caf33652b911070
Roland Levillain [Thu, 27 Nov 2014 15:03:41 +0000 (15:03 +0000)]
Fix neg-float & neg-double for null values in opt. compiler.
- Implement float and double negation as an exclusive or
with a bit sign mask in x86 and x86-64 code generators.
- Enable requests of temporary FPU (double) registers during
register allocation.
- Update test cases in test/415-optimizing-arith-neg.
Change-Id: I9572c24b27c645ba698825e60cd5b3956b4895fa
Calin Juravle [Thu, 27 Nov 2014 13:13:34 +0000 (13:13 +0000)]
Merge "[optimizing compiler] Add CMP{L,G}_{FLOAT,DOUBLE}"
Calin Juravle [Tue, 25 Nov 2014 20:56:51 +0000 (20:56 +0000)]
[optimizing compiler] Add CMP{L,G}_{FLOAT,DOUBLE}
Adds:
- float comparison for arm, x86, x86_64 backends.
- ucomis{s,d} assembly to x86 and x86_64.
- vmstat assebmly for thumb2
- new assembly tests
Change-Id: Ie3e19d0c08b3b875cd0a4be4ee4e9c8a4a076290
Roland Levillain [Thu, 27 Nov 2014 12:30:22 +0000 (12:30 +0000)]
Merge "Add support for long-to-double in the optimizing compiler."
Vladimir Marko [Thu, 27 Nov 2014 12:26:18 +0000 (12:26 +0000)]
Merge "Optimizing: Use 16-bit Thumb2 PUSH/POP when possible."
Roland Levillain [Thu, 27 Nov 2014 12:06:00 +0000 (12:06 +0000)]
Add support for long-to-double in the optimizing compiler.
- Add support for the long-to-double Dex instruction in the
optimizing compiler.
- Enable requests of temporary FPU (double) registers during
code generation.
- Fix art::x86::X86Assembler::LoadLongConstant and extend
it to int64_t values.
- Have art::x86_64::X86_64Assembler::cvtsi2sd work with
64-bit operands.
- Generate x86, x86-64 and ARM (but not ARM64) code for
long to double HTypeConversion nodes.
- Add related tests to test/422-type-conversion.
Change-Id: Ie73d9e5e25bd2e15f585c371e8fc2dcb83438ccd
Yevgeny Rouban [Wed, 26 Nov 2014 12:11:54 +0000 (18:11 +0600)]
ART: x86 specific clearing higher bits when converting long to int
The following problem description is taken from
https://android-review.googlesource.com/107261
If destination and source of long-to-int is the same physical
register on 64-bit then we do not emit any instructions but
consider that destination is a 32-bit view of source register.
As a result high part contains garbage. If the destination is
used later as index to array access then this garbage is used
in computation of address because address is 64-bit. For all
other cases garbage is just ignored.
A generic solution (113023) for all hw platforms was suggested
but rejected later for the sake of HW specific solution:
https://android-review.googlesource.com/113023
https://android-review.googlesource.com/114436
This patch is a rework of patch 113023 to stick with x86_64
specific changes: for 64-bit target this patch forces generating
reg-to-reg copy if the src and dest are the same physical
registers. This makes the higher bits be zeroed by 32-bit move
instruction.
Change-Id: Id29af839506ff9319ffba08b2e86e240fef4dafd
Signed-off-by: Serguei Katkov <serguei.i.katkov@intel.com>
Signed-off-by: Yevgeny Rouban <yevgeny.y.rouban@intel.com>
Mathieu Chartier [Thu, 27 Nov 2014 00:06:57 +0000 (00:06 +0000)]
Merge "Trim reference tables when we trim the heap"
Mathieu Chartier [Wed, 26 Nov 2014 19:21:15 +0000 (11:21 -0800)]
Trim reference tables when we trim the heap
Before:
System server:
virtual shared shared private private
size RSS PSS clean dirty clean dirty # object
2200 300 229 0 80 0 220 77 /dev/ashmem/dalvik-indirect ref table (deleted)
Location:
1896 128 102 0 28 0 100 39 /dev/ashmem/dalvik-indirect ref table (deleted)
After:
virtual shared shared private private
size RSS PSS clean dirty clean dirty # object
System server:
2216 64 64 0 0 0 64 79 /dev/ashmem/dalvik-indirect ref table (deleted)
Location:
2120 48 48 0 0 0 48 67 /dev/ashmem/dalvik-indirect ref table (deleted)
No pause time regression measured in memalloc test.
(cherry picked from commit
84dc99d2fa67e5dff018685661cb2bff62132989)
Change-Id: I80d9bd3b98e888fa8f77d03df69f8479ed209986
Mathieu Chartier [Thu, 27 Nov 2014 00:06:30 +0000 (00:06 +0000)]
Merge "Add a way to change the IMT size"
Andreas Gampe [Wed, 26 Nov 2014 19:58:42 +0000 (11:58 -0800)]
ART: Avoid a recursive abort
When waiting for checkpoints on abort, don't abort on timeout.
Change-Id: Ic87c25d466021d391563f870642251b69dd62af5
Andreas Gampe [Wed, 26 Nov 2014 06:21:42 +0000 (22:21 -0800)]
ART: Print initialization failures to file
Add the ability to print boot image initialization failures to a
file.
Add a tool to convert said file into a Graphviz file.
Change-Id: Iedcc337bdf05654c154aa553236f20bdd15572ee
Stephen Hines [Wed, 26 Nov 2014 22:32:34 +0000 (22:32 +0000)]
Merge "Add a missing SHARED_LOCKS_REQUIRED(mutator_lock_)."
Mathieu Chartier [Wed, 26 Nov 2014 02:36:01 +0000 (18:36 -0800)]
Add a way to change the IMT size
Useful for having smaller imts on memory constrainted devices.
Setting ART_IMT_SIZE=x will change the size of the IMT.
(cherry picked from commit
8ee96437f8cd24e1eb0b2adc6cef3346ed4b6a98)
Change-Id: Ia74946ffc57ad32de5a8d60be3412462f19f8076
Nicolas Geoffray [Wed, 26 Nov 2014 18:30:23 +0000 (18:30 +0000)]
Fix a bug in the linear scan register allocator.
Triggered by:
org.apache.harmony.tests.java.util.jar.JarFileTest#testGetJarEntry.
By miscompling:
okhttp.CacheControl#parse.
A move occuring just before the first instruction of a block
should not be handled by ConnectSplitSiblings, but by ConnectSiblings
instead.
Change-Id: I8ad409734809e6787bb7321563e1331e7a6906c0
Vladimir Marko [Wed, 26 Nov 2014 18:09:30 +0000 (18:09 +0000)]
Optimizing: Use 16-bit Thumb2 PUSH/POP when possible.
JNI compiler uses the same assembler but always pushes
and pops registers that require the 32-bit PUSH/POP.
Change-Id: I7e857ae799316586cd09d6547cf971ef439af147
Calin Juravle [Wed, 26 Nov 2014 19:01:33 +0000 (19:01 +0000)]
Merge "Revert "[optimizing compiler] Add CMP{L,G}_{FLOAT,DOUBLE}""
Calin Juravle [Wed, 26 Nov 2014 19:01:09 +0000 (19:01 +0000)]
Revert "[optimizing compiler] Add CMP{L,G}_{FLOAT,DOUBLE}"
Fails on arm due to missing vmrs op after vcmp. I revert this instead of pushing the fix because I don't understand yet why it compiles with run-test but not with dex2oat.
This reverts commit
fd861249f31ab360c12dd1ffb131d50f02b0bfc6.
Change-Id: Idc2d30f6a0f39ddd3596aa18a532ae90f8aaf62f
Andreas Gampe [Wed, 26 Nov 2014 17:52:32 +0000 (17:52 +0000)]
Merge "ART: Use Overwrite instead of Put"
Calin Juravle [Wed, 26 Nov 2014 17:03:53 +0000 (17:03 +0000)]
Merge "[optimizing compiler] Add CMP{L,G}_{FLOAT,DOUBLE}"
Calin Juravle [Tue, 25 Nov 2014 20:56:51 +0000 (20:56 +0000)]
[optimizing compiler] Add CMP{L,G}_{FLOAT,DOUBLE}
- adds float comparison for arm, x86, x86_64 backends.
- adds ucomis{s,d} assembly to x86 and x86_64.
Change-Id: I232d2b6e9ecf373beb5cc63698dd97a658ff9c83
Vladimir Marko [Wed, 26 Nov 2014 12:33:45 +0000 (12:33 +0000)]
Quick: Use 16-bit conditional branch in Thumb2.
We were using the 32-bit version because the compilation
time impact of having to change the instruction length and
reassemble instructions when the target is out of range was
too high. However, the assembly phase has been rewritten
since making that decision and the compile time impact is
now insignificant, so we prefer to save space.
Change-Id: Ib90f90d3f4e0c4e310267af272e3b16611026bbe
Vladimir Marko [Wed, 26 Nov 2014 15:42:32 +0000 (15:42 +0000)]
Quick: Use 16-bit Thumb2 PUSH/POP when possible.
Generate correct PUSH/POP in Gen{Entry,Exit}Sequence()
to avoid extra processing during insn fixup.
Change-Id: I396168e2a42faee6980d40779c7de9657531867b
Nicolas Geoffray [Wed, 26 Nov 2014 15:46:52 +0000 (15:46 +0000)]
Fix bogus assumption for live registers at safe point.
We did not take into account inactive intervals going
into active when computing live registers at a slow path
safe point. So we must ensure the safepoint interval is always
handled after all intervals starting at the same position have
been handled.
Change-Id: I05ea2161016a90b0ee3ba0b18cd54a8e46860f1e
Nicolas Geoffray [Wed, 26 Nov 2014 14:46:09 +0000 (14:46 +0000)]
Merge "Revert "[optimizing compiler] Add CMP{L,G}_{FLOAT,DOUBLE}""
Nicolas Geoffray [Wed, 26 Nov 2014 14:45:52 +0000 (14:45 +0000)]
Revert "[optimizing compiler] Add CMP{L,G}_{FLOAT,DOUBLE}"
Fails on x86_64 and target.
This reverts commit
cea28ec4b9e94ec942899acf1dbf20f8999b36b4.
Change-Id: I30c1d188c7ecfe765f137a307022ede84f15482c
Calin Juravle [Wed, 26 Nov 2014 12:04:39 +0000 (12:04 +0000)]
Merge "[optimizing compiler] Add CMP{L,G}_{FLOAT,DOUBLE}"
Nicolas Geoffray [Wed, 26 Nov 2014 12:00:16 +0000 (12:00 +0000)]
Merge "Add ART_USE_OPTIMIZING_COMPILER flag."
Calin Juravle [Tue, 25 Nov 2014 20:56:51 +0000 (20:56 +0000)]
[optimizing compiler] Add CMP{L,G}_{FLOAT,DOUBLE}
- adds float comparison for arm, x86, x86_64 backends.
- adds ucomis{s,d} assembly to x86 and x86_64.
Change-Id: Ie91e04bfb402025073054f3803a3a569e4705caa
Andreas Gampe [Wed, 26 Nov 2014 04:40:08 +0000 (20:40 -0800)]
ART: Use Overwrite instead of Put
Allow threads exiting twice when tracing.
Bug:
18469797
Change-Id: I88ce5ea8237e53a76ad68fd4b28a367f58e6d635
Andreas Gampe [Wed, 26 Nov 2014 06:12:27 +0000 (22:12 -0800)]
ART: Add some thread abort logging
This hits intermittently on tests. Print out the thread name and
the state it wants to go to.
Change-Id: I86c8f0d61e23cbe4d46175a5eefaef03c23a2a81
Stephen Hines [Wed, 26 Nov 2014 09:24:13 +0000 (01:24 -0800)]
Add a missing SHARED_LOCKS_REQUIRED(mutator_lock_).
This was caught by Clang 3.6 using -Wthread-safety-analysis.
Change-Id: If2f25331f111ba6c67570e5aece1fba38f714d05
Mathieu Chartier [Wed, 26 Nov 2014 00:03:31 +0000 (00:03 +0000)]
Merge "Move dexCacheStrings from ArtMethod to Class"
Mathieu Chartier [Tue, 25 Nov 2014 02:29:54 +0000 (18:29 -0800)]
Move dexCacheStrings from ArtMethod to Class
Adds one load for const strings which are not direct.
Saves >= 60KB of memory avg per app.
Image size: -350KB.
Bug:
17643507
Change-Id: I2d1a3253d9de09682be9bc6b420a29513d592cc8
(cherry picked from commit
f521f423b66e952f746885dd9f6cf8ef2788955d)
Nicolas Geoffray [Tue, 25 Nov 2014 23:42:00 +0000 (23:42 +0000)]
Add ART_USE_OPTIMIZING_COMPILER flag.
Change-Id: I86065aec5bfe59729c6a4064a3e54d5b523ca45c
Mathieu Chartier [Tue, 25 Nov 2014 23:31:24 +0000 (23:31 +0000)]
Merge "Fix oatwriter code deduping"
Mathieu Chartier [Tue, 25 Nov 2014 19:20:28 +0000 (11:20 -0800)]
Fix oatwriter code deduping
Now that the GC maps are part of the oat method header they need
to be checked in CodeOffsetsKeyComparator.
Bug:
18523556
Change-Id: I539a6e7216166342b22515c1e2cf831dad32e41e
(cherry picked from commit
4cdf4508903d13fd0f9fba5690aeac1b368db81b)
Andreas Gampe [Tue, 25 Nov 2014 21:30:20 +0000 (21:30 +0000)]
Merge "ART: Avoid recursive abort"