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7 years ago[BypassSlowDivision] Use ValueTracking to simplify run-time checks
Nikolai Bozhenov [Thu, 2 Mar 2017 22:12:15 +0000 (22:12 +0000)]
[BypassSlowDivision] Use ValueTracking to simplify run-time checks

ValueTracking is used for more thorough analysis of operands. Based on the
analysis, either run-time checks can be simplified (e.g. check only one operand
instead of two) or the transformation can be avoided. For example, it is quite
often the case that a divisor is promoted from a shorter type and run-time
checks for it are redundant.

With additional compile-time analysis of values, two special cases naturally
arise and are addressed by the patch:

 1) Both operands are known to be short enough. Then, the long division can be
    simply replaced with a short one without CFG modification.

 2) If a division is unsigned and the dividend is known to be short then the
    long division is not needed at all. Because if the divisor is too big for
    short division then the quotient is obviously zero (and the remainder is
    equal to the dividend). Actually, the division is not needed when
    (divisor > dividend).

Differential Revision: https://reviews.llvm.org/D29897

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296832 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoCMake: Clean up VersionFromVCS.cmake
Tom Stellard [Thu, 2 Mar 2017 22:05:13 +0000 (22:05 +0000)]
CMake: Clean up VersionFromVCS.cmake

Summary:
Fix a few problems in VersionFromVCS.cmake to make it more reliable:

- Stop using git svn info to retrieve the svn revision.  I am unable to
  determine what the svn revision returned by this command means.
  During my testing this command returned a revision from a month
  ago which was not the HEAD of any of my local branches.

  Also, this revision was never actually added to the version string due
  to a typo in the script.  All it was used for was to reject the
  revision number returned by git svn find-rev HEAD when the revision
  numbers didn't match.

- Populate GIT_COMMIT even when we detect a git repo without any
  svn information.

Reviewers: mehdi_amini, beanz

Reviewed By: beanz

Subscribers: mgorny, llvm-commits

Differential Revision: https://reviews.llvm.org/D30092

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296829 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[BypassSlowDivision] Refactor fast division insertion logic (NFC)
Nikolai Bozhenov [Thu, 2 Mar 2017 22:05:07 +0000 (22:05 +0000)]
[BypassSlowDivision] Refactor fast division insertion logic (NFC)

The most important goal of the patch is to break large insertFastDiv function
into separate pieces, so that later a different fast insertion logic can be
implemented using some of these pieces.

Differential Revision: https://reviews.llvm.org/D29896

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296828 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[DAGCombiner] Fix DebugLoc propagation when folding !(x cc y) -> (x !cc y)
Taewook Oh [Thu, 2 Mar 2017 21:58:35 +0000 (21:58 +0000)]
[DAGCombiner] Fix DebugLoc propagation when folding !(x cc y) -> (x !cc y)

Summary:
Currently, when 't1: i1 = setcc t2, t3, cc' followed by 't4: i1 = xor t1, Constant:i1<-1>' is folded into 't5: i1 = setcc t2, t3 !cc', SDLoc of newly created SDValue 't5' follows SDLoc of 't4', not 't1'. However, as the opcode of newly created SDValue is 'setcc', it make more sense to take DebugLoc from 't1' than 't4'. For the code below

```
extern int bar();
extern int baz();

int foo(int x, int y) {
  if (x != y)
    return bar();
  else
    return baz();
}
```

, following is the bitcode representation of 'foo' at the end of llvm-ir level optimization:

```
define i32 @foo(i32 %x, i32 %y) !dbg !4 {
entry:
  tail call void @llvm.dbg.value(metadata i32 %x, i64 0, metadata !9, metadata !11), !dbg !12
  tail call void @llvm.dbg.value(metadata i32 %y, i64 0, metadata !10, metadata !11), !dbg !13
  %cmp = icmp ne i32 %x, %y, !dbg !14
  br i1 %cmp, label %if.then, label %if.else, !dbg !16

if.then:                                          ; preds = %entry
  %call = tail call i32 (...) @bar() #3, !dbg !17
  br label %return, !dbg !18

if.else:                                          ; preds = %entry
  %call1 = tail call i32 (...) @baz() #3, !dbg !19
  br label %return, !dbg !20

return:                                           ; preds = %if.else, %if.then
  %retval.0 = phi i32 [ %call, %if.then ], [ %call1, %if.else ]
  ret i32 %retval.0, !dbg !21
}

!14 = !DILocation(line: 5, column: 9, scope: !15)
!16 = !DILocation(line: 5, column: 7, scope: !4)

```

As you can see, in 'entry' block, 'icmp' instruction and 'br' instruction have different debug locations. However, with current implementation, there's no distinction between debug locations of these two when they are lowered to asm instructions. This is because 'icmp' and 'br' become 'setcc' 'xor' and 'brcond' in SelectionDAG, where SDLoc of 'setcc' follows the debug location of 'icmp' but SDLOC of 'xor' and 'brcond' follows the debug location of 'br' instruction, and SDLoc of 'xor' overwrites SDLoc of 'setcc' when they are folded. This patch addresses this issue.

Reviewers: atrick, bogner, andreadb, craig.topper, aprantl

Reviewed By: andreadb

Subscribers: jlebar, mkuper, jholewinski, andreadb, llvm-commits

Differential Revision: https://reviews.llvm.org/D29813

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296825 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[DAG] early exit to improve readability and formatting of visitMemCmpCall(); NFCI
Sanjay Patel [Thu, 2 Mar 2017 21:56:43 +0000 (21:56 +0000)]
[DAG] early exit to improve readability and formatting of visitMemCmpCall(); NFCI

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296824 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[Hexagon] Pick the right branch opcode depending on branch probabilities
Krzysztof Parzyszek [Thu, 2 Mar 2017 21:49:49 +0000 (21:49 +0000)]
[Hexagon] Pick the right branch opcode depending on branch probabilities

Specifically, pick the opcode with the correct branch prediction, i.e.
jump:t or jump:nt.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296821 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRevert "AMDGPU: Re-do update for branch-relaxation test"
Tobias Grosser [Thu, 2 Mar 2017 21:47:51 +0000 (21:47 +0000)]
Revert "AMDGPU: Re-do update for branch-relaxation test"

This commit also relied on r296812, which I just reverted. We should probably
apply it again, after the r296812 has been discussed and been reapplied in some
variant.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296820 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoCodeGen: MachineBlockPlacement: Remove the unused outlining heuristic.
Kyle Butt [Thu, 2 Mar 2017 21:44:24 +0000 (21:44 +0000)]
CodeGen: MachineBlockPlacement: Remove the unused outlining heuristic.

Outlining optional branches isn't a good heuristic, and it's never been
on by default. Remove it to clean things up.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296818 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[ARM] Fix insert point for store rescheduling.
Eli Friedman [Thu, 2 Mar 2017 21:39:39 +0000 (21:39 +0000)]
[ARM] Fix insert point for store rescheduling.

In ARMPreAllocLoadStoreOpt::RescheduleOps, LastOp should be the last
operation which we want to merge. If we break out of the loop because
an operation has the wrong offset, we shouldn't use that operation
as LastOp.

This patch fixes some cases where we would move stores to the wrong
insert point.

Re-commit with a fix to increment NumMove in the right place.

Differential Revision: https://reviews.llvm.org/D30124

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296815 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRevert "Fix PR 24415 (at least), by making our post-dominator tree behavior sane."
Tobias Grosser [Thu, 2 Mar 2017 21:08:37 +0000 (21:08 +0000)]
Revert "Fix PR 24415 (at least), by making our post-dominator tree behavior sane."

and also "clang-format GenericDomTreeConstruction.h, since the current
formatting makes it look like their is a bug in the loop indentation, and there
is not"

This reverts commit r296535.

There are still some open design questions which I would like to discuss. I
revert this for Daniel (who gave the OK), as he is on vacation.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296812 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[PPC] Fix code generation for bswap(int32) followed by store16
Guozhi Wei [Thu, 2 Mar 2017 21:07:59 +0000 (21:07 +0000)]
[PPC] Fix code generation for bswap(int32) followed by store16

This patch fixes pr32063.

Current code in PPCTargetLowering::PerformDAGCombine can transform

bswap
store

into a single PPCISD::STBRX instruction. but it doesn't consider the case that the operand size of bswap may be larger than store size. When it occurs, we need 2 modifications,

1 For the last operand of PPCISD::STBRX, we should not use DAG.getValueType(N->getOperand(1).getValueType()), instead we should use cast<StoreSDNode>(N)->getMemoryVT().

2 Before PPCISD::STBRX, we need to shift the original operand of bswap to the right side.

Differential Revision: https://reviews.llvm.org/D30362

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296811 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[Support] Move Stream library from MSF -> Support.
Zachary Turner [Thu, 2 Mar 2017 20:52:51 +0000 (20:52 +0000)]
[Support] Move Stream library from MSF -> Support.

After several smaller patches to get most of the core improvements
finished up, this patch is a straight move and header fixup of
the source.

Differential Revision: https://reviews.llvm.org/D30266

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296810 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[AArch64] Extend redundant copy elimination pass to handle non-zero stores.
Chad Rosier [Thu, 2 Mar 2017 20:48:11 +0000 (20:48 +0000)]
[AArch64] Extend redundant copy elimination pass to handle non-zero stores.

This patch extends the current functionality of the AArch64 redundant copy
elimination pass to handle non-zero cases such as:

BB#0:
  cmp x0, #1
  b.eq .LBB0_1
.LBB0_1:
  orr x0, xzr, #0x1  ; <-- redundant copy; x0 known to hold #1.

Differential Revision: https://reviews.llvm.org/D29344

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296809 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[DAG] improve documentation comments; NFC
Sanjay Patel [Thu, 2 Mar 2017 20:48:08 +0000 (20:48 +0000)]
[DAG] improve documentation comments; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296808 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[MSP430] Add SRet support to MSP430 target
Vadzim Dambrouski [Thu, 2 Mar 2017 20:25:10 +0000 (20:25 +0000)]
[MSP430] Add SRet support to MSP430 target

This patch adds support for struct return values to the MSP430
target backend. It also reverses the order of argument and return
registers in the calling convention to bring it into closer
alignment with the published EABI from TI.

Patch by Andrew Wygle (awygle).

Differential Revision: https://reviews.llvm.org/D29069

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296807 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoThe patch fixes r296770
Evgeny Stupachenko [Thu, 2 Mar 2017 19:41:38 +0000 (19:41 +0000)]
The patch fixes r296770
Summary:

Extend -unroll-partial-threshold to 200 for runtime-loop3.ll test
as epilogue unroll initially add 1 more IV to the loop.

From: Evgeny Stupachenko <evstupac@gmail.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296803 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[NVPTX] Reduce amount of boilerplate code used to select load instruction opcode.
Artem Belevich [Thu, 2 Mar 2017 19:14:14 +0000 (19:14 +0000)]
[NVPTX] Reduce amount of boilerplate code used to select load instruction opcode.

Make opcode selection code for the load instruction a bit easier
to read and maintain.

This patch also catches number of f16 load/store variants that were
not handled before.

Differential Revision: https://reviews.llvm.org/D30513

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296785 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[NVPTX] Added missing LDU/LDG intrinsics for f16.
Artem Belevich [Thu, 2 Mar 2017 19:14:10 +0000 (19:14 +0000)]
[NVPTX] Added missing LDU/LDG intrinsics for f16.

Differential Revision: https://reviews.llvm.org/D30512

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296784 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFix some Wdocumentation warnings
Simon Pilgrim [Thu, 2 Mar 2017 18:59:07 +0000 (18:59 +0000)]
Fix some Wdocumentation warnings

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296783 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[X86][MMX] Fixed i32 extraction on 32-bit targets
Simon Pilgrim [Thu, 2 Mar 2017 18:56:06 +0000 (18:56 +0000)]
[X86][MMX] Fixed i32 extraction on 32-bit targets

MMX extraction often ends up as extract_i32(bitcast_v2i32(extract_i64(bitcast_v1i64(x86mmx v), 0)), 0) which fails to simplify on 32-bit targets as i64 isn't legal

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296782 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoCast to the right type on Windows.
Vassil Vassilev [Thu, 2 Mar 2017 18:12:59 +0000 (18:12 +0000)]
Cast to the right type on Windows.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296778 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[Hexagon] Skip blocks that define vector predicate registers in early-if
Krzysztof Parzyszek [Thu, 2 Mar 2017 18:10:59 +0000 (18:10 +0000)]
[Hexagon] Skip blocks that define vector predicate registers in early-if

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296777 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRemove redundant include.
Vassil Vassilev [Thu, 2 Mar 2017 18:04:44 +0000 (18:04 +0000)]
Remove redundant include.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296775 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoReland r296442 with modifications reverted in r296463.
Vassil Vassilev [Thu, 2 Mar 2017 17:56:45 +0000 (17:56 +0000)]
Reland r296442 with modifications reverted in r296463.

Original commit message:

"Allow externally dlopen-ed libraries to be registered as permanent libraries.

This is also useful in cases when llvm is in a shared library. First we dlopen
the llvm shared library and then we register it as a permanent library in order
to keep the JIT and other services working.

Patch reviewed by Vedant Kumar (D29955)!"

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296774 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[Hexagon] Properly handle 'q' constraint in 128-byte vector mode
Krzysztof Parzyszek [Thu, 2 Mar 2017 17:50:24 +0000 (17:50 +0000)]
[Hexagon] Properly handle 'q' constraint in 128-byte vector mode

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296772 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[PowerPC][ELFv2ABI] Allocate parameter area on-demand to reduce stack frame size
Nemanja Ivanovic [Thu, 2 Mar 2017 17:38:59 +0000 (17:38 +0000)]
[PowerPC][ELFv2ABI] Allocate parameter area on-demand to reduce stack frame size

This patch reduces the stack frame size by not allocating the parameter area if
it is not required. In the current implementation LowerFormalArguments_64SVR4
already handles the parameter area, but LowerCall_64SVR4 does not
(when calculating the stack frame size). What this patch does is make
LowerCall_64SVR4 consistent with LowerFormalArguments_64SVR4.

Committing on behalf of Hiroshi Inoue.

Differential Revision: https://reviews.llvm.org/D29881

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296771 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoThe patch turns on epilogue unroll for loops with constant recurency start.
Evgeny Stupachenko [Thu, 2 Mar 2017 17:38:46 +0000 (17:38 +0000)]
The patch turns on epilogue unroll for loops with constant recurency start.
Summary:

Set unroll remainder to epilog if a loop contains a phi with constant parameter:

  loop:
  pn = phi [Const, PreHeader], [pn.next, Latch]
  ...

Reviewer: hfinkel

Differential Revision: http://reviews.llvm.org/D27004

From: Evgeny Stupachenko <evstupac@gmail.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296770 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[DAGCombiner] avoid assertion when folding binops with opaque constants
Sanjay Patel [Thu, 2 Mar 2017 17:18:56 +0000 (17:18 +0000)]
[DAGCombiner] avoid assertion when folding binops with opaque constants

This bug was introduced with:
https://reviews.llvm.org/rL296699

There may be a way to loosen the restriction, but for now just bail out
on any opaque constant.

The tests show that opacity is target-specific. This goes back to cost
calculations in ConstantHoisting based on TTI->getIntImmCost().

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296768 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoNew tool: opt-diff.py
Adam Nemet [Thu, 2 Mar 2017 17:00:59 +0000 (17:00 +0000)]
New tool: opt-diff.py

This tool allows generating the different between two optimization record
files.  The result is a YAML file too that can be visualized with opt-viewer.

This is very useful to see what optimization were added and removed by a
change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296767 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[opt-viewer] Treat remarks with different attributes as different
Adam Nemet [Thu, 2 Mar 2017 17:00:56 +0000 (17:00 +0000)]
[opt-viewer] Treat remarks with different attributes as different

We used to exclude arguments but for a diffed YAML file, it's interesting to
show these as changes.

Turns out this also affects gvn/LoadClobbered because we used to squash
multiple entries of this on the same line even if they reported clobbers
by *different* instructions.  This increases the number of unique entries now
and the share of gvn/LoadClobbered.

Total number of remarks      902287

Top 10 remarks by pass:
  inline                         43%
  gvn                            37%
  licm                           11%
  loop-vectorize                  4%
  asm-printer                     3%
  regalloc                        1%
  loop-unroll                     1%
  inline-cost                     0%
  slp-vectorizer                  0%
  loop-delete                     0%

Top 10 remarks:
  gvn/LoadClobbered              33%
  inline/Inlined                 16%
  inline/CanBeInlined            14%
  inline/NoDefinition             7%
  licm/Hoisted                    6%
  licm/LoadWithLoopInvariantAddressInvalidated  5%
  gvn/LoadElim                    3%
  asm-printer/InstructionCount    3%
  inline/TooCostly                2%
  loop-vectorize/MissedDetails    2%

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296766 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[opt-viewer] Don't use __getattr__ for missing YAML attributes
Adam Nemet [Thu, 2 Mar 2017 17:00:53 +0000 (17:00 +0000)]
[opt-viewer] Don't use __getattr__ for missing YAML attributes

__getattr__ does not work well with debugging.  If the attribute function has
a run-time error, a missing attribute is reported instead.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296765 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[opt-viewer] Sort entries with identical hotness by source line
Adam Nemet [Thu, 2 Mar 2017 17:00:49 +0000 (17:00 +0000)]
[opt-viewer] Sort entries with identical hotness by source line

We want entries that are close to each other in the source appear next to each
other.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296764 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAllow use of spaces in Bugpoint ‘--compile-command’ argument
David Bozier [Thu, 2 Mar 2017 16:50:48 +0000 (16:50 +0000)]
Allow use of spaces in Bugpoint â€˜--compile-command’ argument

Bug-Point functionality needs extending due to the patch D29185 by bd1976llvm (Allow llvm's build and test systems to support paths with spaces ). It requires Bugpoint to accept the use of spaces within â€˜--compile-command’ tokens.

Details
Bugpoint uses the argument â€˜--compile-command’ to pass in a command line argument as a string, the string is tokenized by the â€˜lexCommand’ function using spaces as a delimiter. Patch D29185 will cause the unit test compile-custom.ll to fail as spaces are now required within tokens and as a delimiter. This patch allows the use of escape characters as below:

Two consecutive '\' evaluate to a single '\'.
A space after a '\' evaluates to a space that is not interpreted as a delimiter.
Any other instances of the '\' character are removed.

Committed on behalf of Owen Reynolds

Differential revision: https://reviews.llvm.org/D29940

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296763 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agofix typo in comment; NFC
Sanjay Patel [Thu, 2 Mar 2017 16:37:24 +0000 (16:37 +0000)]
fix typo in comment; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296760 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRe-apply "[GVNHoist] Move GVNHoist to function simplification part of pipeline."
Geoff Berry [Thu, 2 Mar 2017 16:16:47 +0000 (16:16 +0000)]
Re-apply "[GVNHoist] Move GVNHoist to function simplification part of pipeline."

This re-applies r289696, which caused TSan perf regression, which has
since been addressed in separate changes (see PR for details).

See PR31382.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296759 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoGlobalISel: record correct stack usage for signext parameters.
Tim Northover [Thu, 2 Mar 2017 15:34:18 +0000 (15:34 +0000)]
GlobalISel: record correct stack usage for signext parameters.

The CallingConv.td rules allocate 8 bytes for these kinds of arguments
on AAPCS targets, but we were only recording the smaller amount. The
difference is theoretical on AArch64 because we don't actually store
more than the smaller amount, but it's still much better to have these
two components in agreement.

Based on Diana Picus's ARM equivalent patch (where it matters a lot
more).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296754 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[InstCombine] Avoid faulty combines of select-cmp-br
Bjorn Pettersson [Thu, 2 Mar 2017 15:18:58 +0000 (15:18 +0000)]
[InstCombine] Avoid faulty combines of select-cmp-br

Summary:
When InstCombine is optimizing certain select-cmp-br patterns
it replaces the result of the select in uses outside of the
basic block containing the select. This is only legal if the
path from the select to the outside use is disjoint from all
other paths out from the originating basic block.

The problem found was that InstCombiner::replacedSelectWithOperand
did not consider the case when both edges out from the br pointed
to the same label. In that case the paths aren't disjoint and the
transformation is illegal. This patch avoids the faulty rewrites
by verifying that there is a single flow to the successor where
we want to replace uses.

Reviewers: llvm-commits, spatel, majnemer

Differential Revision: https://reviews.llvm.org/D30455

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296752 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[ARM/AArch64] Update costs for interleaved accesses with wide types
Matthew Simpson [Thu, 2 Mar 2017 15:15:35 +0000 (15:15 +0000)]
[ARM/AArch64] Update costs for interleaved accesses with wide types

After r296750, we're able to match interleaved accesses having types wider than
128 bits. This patch updates the associated TTI costs.

Differential Revision: https://reviews.llvm.org/D29675

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296751 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[ARM/AArch64] Support wide interleaved accesses
Matthew Simpson [Thu, 2 Mar 2017 15:11:20 +0000 (15:11 +0000)]
[ARM/AArch64] Support wide interleaved accesses

This patch teaches (ARM|AArch64)ISelLowering.cpp to match illegal vector types
to interleaved access intrinsics as long as the types are multiples of the
vector register width. A "wide" access will now be mapped to multiple
interleave intrinsics similar to the way in which non-interleaved accesses with
illegal types are legalized into multiple accesses. I'll update the associated
TTI costs (in getInterleavedMemoryOpCost) as a follow-on.

Differential Revision: https://reviews.llvm.org/D29466

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296750 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoDo not leak OpenedHandles.
Vassil Vassilev [Thu, 2 Mar 2017 14:30:05 +0000 (14:30 +0000)]
Do not leak OpenedHandles.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296748 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[LV] Considier non-consecutive but vectorizable accesses for VF selection
Matthew Simpson [Thu, 2 Mar 2017 13:55:05 +0000 (13:55 +0000)]
[LV] Considier non-consecutive but vectorizable accesses for VF selection

When computing the smallest and largest types for selecting the maximum
vectorization factor, we currently ignore loads and stores of pointer types if
the memory access is non-consecutive. We do this because such accesses must be
scalarized regardless of vectorization factor, and thus shouldn't be considered
when determining the factor. This patch makes this check less aggressive by
also considering non-consecutive accesses that may be vectorized, such as
interleaved accesses. Because we don't know at the time of the check if an
accesses will certainly be vectorized (this is a cost model decision given a
particular VF), we consider all accesses that can potentially be vectorized.

Differential Revision: https://reviews.llvm.org/D30305

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296747 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAdded special test covering a problem with PIC relocation model on SLM architecture...
Andrew V. Tischenko [Thu, 2 Mar 2017 13:47:03 +0000 (13:47 +0000)]
Added special test covering a problem with PIC relocation model on SLM architecture. The fix will come in D26855.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296746 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoDo not verify MachimeDominatorTree if it is not calculated
Serge Pavlov [Thu, 2 Mar 2017 12:00:10 +0000 (12:00 +0000)]
Do not verify MachimeDominatorTree if it is not calculated

If dominator tree is not calculated or is invalidated, set corresponding
pointer in the pass state to nullptr. Such pointer value will indicate
that operations with dominator tree are not allowed. In particular, it
allows to skip verification for such pass state. The dominator tree is
not calculated if the machine dominator pass was skipped, it occures in
the case of entities with linkage available_externally.

The change fixes some test fails observed when expensive checks
are enabled.

Differential Revision: https://reviews.llvm.org/D29280

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296742 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoFix typo. NFCI
Xin Tong [Thu, 2 Mar 2017 08:39:11 +0000 (08:39 +0000)]
Fix typo. NFCI

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296735 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agocmake: Configure the ThinLTO cache directory when using ELF lld or gold.
Peter Collingbourne [Thu, 2 Mar 2017 03:01:12 +0000 (03:01 +0000)]
cmake: Configure the ThinLTO cache directory when using ELF lld or gold.

Differential Revision: https://reviews.llvm.org/D30522

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296730 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoLTO: When creating a local cache, create the cache directory if it does not already...
Peter Collingbourne [Thu, 2 Mar 2017 02:02:38 +0000 (02:02 +0000)]
LTO: When creating a local cache, create the cache directory if it does not already exist.

Differential Revision: https://reviews.llvm.org/D30519

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296726 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoLiveRegMatrix: Fix some subreg interference checks
Matthias Braun [Thu, 2 Mar 2017 00:35:08 +0000 (00:35 +0000)]
LiveRegMatrix: Fix some subreg interference checks

Surprisingly, one of the three interference checks in LiveRegMatrix was
using the main live range instead of the apropriate subregister range
resulting in unnecessarily conservative results.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296722 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoLiveIntervalUnion: Remove unused function; NFC
Matthias Braun [Thu, 2 Mar 2017 00:15:06 +0000 (00:15 +0000)]
LiveIntervalUnion: Remove unused function; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296721 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRevert r296708; causing test failures on ARM hosts.
Eli Friedman [Thu, 2 Mar 2017 00:08:50 +0000 (00:08 +0000)]
Revert r296708; causing test failures on ARM hosts.

Original commit message:

[ARM] Fix insert point for store rescheduling.

In ARMPreAllocLoadStoreOpt::RescheduleOps, LastOp should be the last
operation which we want to merge. If we break out of the loop because
an operation has the wrong offset, we shouldn't use that operation as
LastOp.

This patch fixes some cases where we would sink stores for no reason.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296718 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[Support] Fix some Clang-tidy modernize and Include What You Use warnings; other...
Eugene Zelenko [Wed, 1 Mar 2017 23:59:26 +0000 (23:59 +0000)]
[Support] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296714 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRemove spurious use of LLVM_FALLTHROUGH (NFC)
Paul Robinson [Wed, 1 Mar 2017 23:59:11 +0000 (23:59 +0000)]
Remove spurious use of LLVM_FALLTHROUGH (NFC)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296713 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[DAGCombiner] mulhi + 1 never overflow.
Amaury Sechet [Wed, 1 Mar 2017 23:44:17 +0000 (23:44 +0000)]
[DAGCombiner] mulhi + 1 never overflow.

Summary:
This can be used to optimize large multiplications after legalization.

Depends on D29565

Reviewers: mkuper, spatel, RKSimon, zvi, bkramer, aaboud, craig.topper

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D29587

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296711 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[GlobalISel] Add a way for targets to enable GISel.
Ahmed Bougacha [Wed, 1 Mar 2017 23:33:08 +0000 (23:33 +0000)]
[GlobalISel] Add a way for targets to enable GISel.

Until now, we've had to use -global-isel to enable GISel.  But using
that on other targets that don't support it will result in an abort, as we
can't build a full pipeline.
Additionally, we want to experiment with enabling GISel by default for
some targets: we can't just enable GISel by default, even among those
target that do have some support, because the level of support varies.

This first step adds an override for the target to explicitly define its
level of support.  For AArch64, do that using
a new command-line option (I know..):
  -aarch64-enable-global-isel-at-O=<N>
Where N is the opt-level below which GISel should be used.

Default that to -1, so that we still don't enable GISel anywhere.
We're not there yet!

While there, remove a couple LLVM_UNLIKELYs.  Building the pipeline is
such a cold path that in practice that shouldn't matter at all.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296710 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoImprove mulhi overflow test. NFC
Amaury Sechet [Wed, 1 Mar 2017 23:31:19 +0000 (23:31 +0000)]
Improve mulhi overflow test. NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296709 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[ARM] Fix insert point for store rescheduling.
Eli Friedman [Wed, 1 Mar 2017 23:20:29 +0000 (23:20 +0000)]
[ARM] Fix insert point for store rescheduling.

In ARMPreAllocLoadStoreOpt::RescheduleOps, LastOp should be the last
operation which we want to merge. If we break out of the loop because
an operation has the wrong offset, we shouldn't use that operation as
LastOp.

This patch fixes some cases where we would sink stores for no reason.

Differential Revision: https://reviews.llvm.org/D30124

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296708 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAdd polly to svn:ignore.
Eli Friedman [Wed, 1 Mar 2017 23:16:35 +0000 (23:16 +0000)]
Add polly to svn:ignore.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296705 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[ARM] Check correct instructions for load/store rescheduling.
Eli Friedman [Wed, 1 Mar 2017 22:56:20 +0000 (22:56 +0000)]
[ARM] Check correct instructions for load/store rescheduling.

This code starts from the high end of the sorted vector of offsets, and
works backwards: it tries to find contiguous offsets, process them, then
pops them from the end of the vector. Most of the code agrees with this
order of processing, but one loop doesn't: it instead processes elements
from the low end of the vector (which are nodes with unrelated offsets).
Fix that loop to process the correct elements.

This has a few implications. One, we don't incorrectly return early when
processing multiple groups of offsets in the same block (which allows
rescheduling prera-ldst-insertpt.mir). Two, we pick the correct insert
point for loads, so they're correctly sorted (which affects the
scheduling of vldm-liveness.ll). I think it might also impact some of
the heuristics slightly.

Differential Revision: https://reviews.llvm.org/D30368

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296701 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[DAGCombiner] fold binops with constant into select-of-constants
Sanjay Patel [Wed, 1 Mar 2017 22:51:31 +0000 (22:51 +0000)]
[DAGCombiner] fold binops with constant into select-of-constants

This is part of the ongoing attempt to improve select codegen for all targets and select
canonicalization in IR (see D24480 for more background). The transform is a subset of what
is done in InstCombine's FoldOpIntoSelect().

I first noticed a regression in the x86 avx512-insert-extract.ll tests with a patch that
hopes to convert more selects to basic math ops. This appears to be a general missing DAG
transform though, so I added tests for all standard binops in rL296621
(PowerPC was chosen semi-randomly; it has scripted FileCheck support, but so do ARM and x86).

The poor output for "sel_constants_shl_constant" is tracked with:
https://bugs.llvm.org/show_bug.cgi?id=32105

Differential Revision: https://reviews.llvm.org/D30502

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296699 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[Constant Hoisting] Avoid inserting instructions before EH pads
Reid Kleckner [Wed, 1 Mar 2017 22:41:12 +0000 (22:41 +0000)]
[Constant Hoisting] Avoid inserting instructions before EH pads

Now that terminators can be EH pads, this code needs to iterate over the
immediate dominators of the EH pad to find a valid insertion point.

Fix for PR32107

Patch by Robert Olliff!

Differential Revision: https://reviews.llvm.org/D30511

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296698 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[MC] Fix MachineLocation constructor broken in r294685 (NFC).
Eugene Zelenko [Wed, 1 Mar 2017 22:28:23 +0000 (22:28 +0000)]
[MC] Fix MachineLocation constructor broken in r294685 (NFC).

Problem spotted by Frej Drejhammar.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296697 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAdd test case for mulhi's overflow. NFC
Amaury Sechet [Wed, 1 Mar 2017 22:27:21 +0000 (22:27 +0000)]
Add test case for mulhi's overflow. NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296696 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[DebugInfo] [DWARFv5] Unique abbrevs for DIEs with different implicit_const values
Victor Leschuk [Wed, 1 Mar 2017 22:13:42 +0000 (22:13 +0000)]
[DebugInfo] [DWARFv5] Unique abbrevs for DIEs with different implicit_const values

Take DW_FORM_implicit_const attribute value into account when profiling
DIEAbbrevData.

Currently if we have two similar types with implicit_const attributes and
different values we end up with only one abbrev in .debug_abbrev section.
For example consider two structures: S1 with implicit_const attribute ATTR
and value VAL1 and S2 with implicit_const ATTR and value VAL2.
The .debug_abbrev section will contain only 1 related record:

[N] DW_TAG_structure_type       DW_CHILDREN_yes
        DW_AT_ATTR        DW_FORM_implicit_const  VAL1
        // ....

This is incorrect as struct S2 (with VAL2) will use abbrev record with VAL1.

With this patch we will have two different abbreviations here:

[N] DW_TAG_structure_type       DW_CHILDREN_yes
        DW_AT_ATTR        DW_FORM_implicit_const  VAL1
        // ....

[M] DW_TAG_structure_type       DW_CHILDREN_yes
        DW_AT_ATTR        DW_FORM_implicit_const  VAL2
        // ....

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296691 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[DAGCombiner] Remove non-ascii character and reflow comment.
Benjamin Kramer [Wed, 1 Mar 2017 22:10:43 +0000 (22:10 +0000)]
[DAGCombiner] Remove non-ascii character and reflow comment.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296690 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoLIU:::Query: Query LiveRange instead of LiveInterval; NFC
Matthias Braun [Wed, 1 Mar 2017 21:48:12 +0000 (21:48 +0000)]
LIU:::Query: Query LiveRange instead of LiveInterval; NFC

- We only need the information from the base class, not the additional
  details in the LiveInterval class.
- Spread more `const`
- Some code cleanup

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296684 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoElide argument copies during instruction selection
Reid Kleckner [Wed, 1 Mar 2017 21:42:00 +0000 (21:42 +0000)]
Elide argument copies during instruction selection

Summary:
Avoids tons of prologue boilerplate when arguments are passed in memory
and left in memory. This can happen in a debug build or in a release
build when an argument alloca is escaped.  This will dramatically affect
the code size of x86 debug builds, because X86 fast isel doesn't handle
arguments passed in memory at all. It only handles the x86_64 case of up
to 6 basic register parameters.

This is implemented by analyzing the entry block before ISel to identify
copy elision candidates. A copy elision candidate is an argument that is
used to fully initialize an alloca before any other possibly escaping
uses of that alloca. If an argument is a copy elision candidate, we set
a flag on the InputArg. If the the target generates loads from a fixed
stack object that matches the size and alignment requirements of the
alloca, the SelectionDAG builder will delete the stack object created
for the alloca and replace it with the fixed stack object. The load is
left behind to satisfy any remaining uses of the argument value. The
store is now dead and is therefore elided. The fixed stack object is
also marked as mutable, as it may now be modified by the user, and it
would be invalid to rematerialize the initial load from it.

Supersedes D28388

Fixes PR26328

Reviewers: chandlerc, MatzeB, qcolombet, inglorion, hans

Subscribers: igorb, llvm-commits

Differential Revision: https://reviews.llvm.org/D29668

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296683 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoNew tool: opt-stats.py
Adam Nemet [Wed, 1 Mar 2017 21:35:00 +0000 (21:35 +0000)]
New tool: opt-stats.py

I am planning to use this tool to find too noisy (missed) optimization
remarks.  Long term it may actually be better to just have another tool that
exports the remarks into an sqlite database and perform queries like this in
SQL.

This splits out the YAML parsing from opt-viewer.py into a new Python module
optrecord.py.

This is the result of the script on the LLVM testsuite:

Total number of remarks        714433

Top 10 remarks by pass:
  inline                         52%
  gvn                            24%
  licm                           13%
  loop-vectorize                  5%
  asm-printer                     3%
  loop-unroll                     1%
  regalloc                        1%
  inline-cost                     0%
  slp-vectorizer                  0%
  loop-delete                     0%

Top 10 remarks:
  gvn/LoadClobbered              20%
  inline/Inlined                 19%
  inline/CanBeInlined            18%
  inline/NoDefinition             9%
  licm/LoadWithLoopInvariantAddressInvalidated  6%
  licm/Hoisted                    6%
  asm-printer/InstructionCount    3%
  inline/TooCostly                3%
  gvn/LoadElim                    3%
  loop-vectorize/MissedDetails    2%

Beside some refactoring, I also changed optrecords not to use context to
access global data (max_hotness).  Because of the separate module this would
have required splitting context into two.  However it's not possible to access
the optrecord context from the SourceFileRenderer when calling back to
Remark.RelativeHotness.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296682 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRe-enable BinaryStreamTest.StreamReaderObject.
Zachary Turner [Wed, 1 Mar 2017 21:30:06 +0000 (21:30 +0000)]
Re-enable BinaryStreamTest.StreamReaderObject.

This was failing because I was using memcmp to compare two
objects that included padding bytes, which were uninitialized.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296681 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[APInt] Optimize APInt creation from uint64_t
Craig Topper [Wed, 1 Mar 2017 21:06:18 +0000 (21:06 +0000)]
[APInt] Optimize APInt creation from uint64_t

Summary:
This patch moves the clearUnusedBits calls into the two different initialization paths for APInt from a uint64_t. This allows the compiler to better optimize the clearing of the unused bits for the single word case. And it puts the clearing for the multi word case into the initSlowCase function to save code. In the common case of initializing with 0 this allows the clearing to be completely optimized out for the single word case.

On my local x86 build this is showing a ~45kb reduction in the size of the opt binary.

Reviewers: RKSimon, hans, majnemer, davide, MatzeB

Reviewed By: hans

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D30486

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296677 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoLIU::Query: Remove unused getter; NFC
Matthias Braun [Wed, 1 Mar 2017 21:02:56 +0000 (21:02 +0000)]
LIU::Query: Remove unused getter; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296676 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoLIU::Query: Remove always false member+getter; NFC
Matthias Braun [Wed, 1 Mar 2017 21:02:52 +0000 (21:02 +0000)]
LIU::Query: Remove always false member+getter; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296675 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoLiveIntervalUnion: Remove unused functions; NFC
Matthias Braun [Wed, 1 Mar 2017 21:02:47 +0000 (21:02 +0000)]
LiveIntervalUnion: Remove unused functions; NFC

Remove two unused functions that are in fact bad API and should not be
called anyway.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296674 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[InstCombine] use -instnamer and auto-generate complete checks; NFC
Sanjay Patel [Wed, 1 Mar 2017 20:59:56 +0000 (20:59 +0000)]
[InstCombine] use -instnamer and auto-generate complete checks; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296673 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoDisable BinaryStreamTest.StreamReaderObject.
Zachary Turner [Wed, 1 Mar 2017 20:58:28 +0000 (20:58 +0000)]
Disable BinaryStreamTest.StreamReaderObject.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296672 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[x86] add vector tests for more coverage of D30502; NFC
Sanjay Patel [Wed, 1 Mar 2017 20:31:23 +0000 (20:31 +0000)]
[x86] add vector tests for more coverage of D30502; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296671 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoImprove scheduling with branch coalescing
Nemanja Ivanovic [Wed, 1 Mar 2017 20:29:34 +0000 (20:29 +0000)]
Improve scheduling with branch coalescing

This patch adds a MachineSSA pass that coalesces blocks that branch
on the same condition.

Committing on behalf of Lei Huang.

Differential Revision: https://reviews.llvm.org/D28249

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296670 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[DAG] Prevent Stale nodes from entering worklist
Nirav Dave [Wed, 1 Mar 2017 20:19:38 +0000 (20:19 +0000)]
[DAG] Prevent Stale nodes from entering worklist

Add check that deleted nodes do not get added to worklist. This can
occur when a node's operand is simplified to an existing node.

This fixes PR32108.

Reviewers: jyknight, hfinkel, chandlerc

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D30506

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296668 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAdd test cases for merging stores of multiply used stores
Nirav Dave [Wed, 1 Mar 2017 20:18:14 +0000 (20:18 +0000)]
Add test cases for merging stores of multiply used stores

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296667 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[RDF] Replace {} with explicit constructor, since not all compilers like it
Krzysztof Parzyszek [Wed, 1 Mar 2017 19:59:28 +0000 (19:59 +0000)]
[RDF] Replace {} with explicit constructor, since not all compilers like it

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296666 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoNewGVN: Add debug counter for value numbering
Daniel Berlin [Wed, 1 Mar 2017 19:59:26 +0000 (19:59 +0000)]
NewGVN: Add debug counter for value numbering

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296665 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[DWARF] Print leading zeros in type signature
Paul Robinson [Wed, 1 Mar 2017 19:43:29 +0000 (19:43 +0000)]
[DWARF] Print leading zeros in type signature

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296663 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[RDF] Add recursion limit to getAllReachingDefsRec
Krzysztof Parzyszek [Wed, 1 Mar 2017 19:30:42 +0000 (19:30 +0000)]
[RDF] Add recursion limit to getAllReachingDefsRec

For large programs this function can take significant amounts of time.
Let it abort gracefully when the program is too complex.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296662 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[PDB] Fix and re-enable BinaryStreamArray test.
Zachary Turner [Wed, 1 Mar 2017 19:29:11 +0000 (19:29 +0000)]
[PDB] Fix and re-enable BinaryStreamArray test.

This was due to the test stream choosing an arbitrary partition
index for introducing the discontinuity rather than choosing
an index that would be correctly aligned for the type of data.

Also added an assertion into FixedStreamArray so that this will
be caught on all bots in the future, and not just the UBSan bot.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296661 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoReorder fields for better packing. (NFC)
Paul Robinson [Wed, 1 Mar 2017 19:26:41 +0000 (19:26 +0000)]
Reorder fields for better packing. (NFC)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296660 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoenable building with LTO on Windows using clang-cl and lld
Bob Haarman [Wed, 1 Mar 2017 19:22:18 +0000 (19:22 +0000)]
enable building with LTO on Windows using clang-cl and lld

Summary: With clang-cl gaining support for link-time optimization, we can now enable builds using LTO when using clang-cl and lld on Windows. To do this, we must not pass the -flto flag to the linker; lld-link does not understand it, but will perform LTO automatically when it encounters bitcode files. We also don't pass /Brepro when using LTO - the compiler doesn't generate object files for LTO, so passing the flag would only result in a warning about it being unused.

Reviewers: rnk, ruiu, hans

Reviewed By: hans

Subscribers: mgorny, mehdi_amini, llvm-commits

Differential Revision: https://reviews.llvm.org/D30240

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296658 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoAlphabetize some cases (NFC)
Paul Robinson [Wed, 1 Mar 2017 19:01:47 +0000 (19:01 +0000)]
Alphabetize some cases (NFC)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296655 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRevert r296575 "[SLP] Fixes the bug due to absence of in order uses of scalars which...
Hans Wennborg [Wed, 1 Mar 2017 18:57:16 +0000 (18:57 +0000)]
Revert r296575 "[SLP] Fixes the bug due to absence of in order uses of scalars which needs to be available"

It caused miscompiles, e.g. in Chromium (PR32109).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296654 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[DWARF] Default lower bound should respect requested DWARF version.
Paul Robinson [Wed, 1 Mar 2017 18:32:37 +0000 (18:32 +0000)]
[DWARF] Default lower bound should respect requested DWARF version.

DWARF may define a default lower-bound for arrays in languages defined
in a particular DWARF version.  But the logic to suppress an
unnecessary lower-bound attribute was looking at the hard-coded
default DWARF version, not the version that had been requested.

Also updated the list with all languages defined in DWARF v5.

Differential Revision: http://reviews.llvm.org/D30484

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296652 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[DAGCombiner] Support {a|s}ext, {a|z|s}ext load nodes in load combine
Artur Pilipenko [Wed, 1 Mar 2017 18:12:29 +0000 (18:12 +0000)]
[DAGCombiner] Support {a|s}ext, {a|z|s}ext load nodes in load combine

Resubmit r295336 after the bug with non-zero offset patterns on BE targets is fixed (r296336).

Support {a|s}ext, {a|z|s}ext load nodes as a part of load combine patters.

Reviewed By: filcab

Differential Revision: https://reviews.llvm.org/D29591

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296651 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[Hexagon] Fix testcase accidentally broken by r296645
Krzysztof Parzyszek [Wed, 1 Mar 2017 17:53:42 +0000 (17:53 +0000)]
[Hexagon] Fix testcase accidentally broken by r296645

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296647 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[Hexagon] Fix lowering of formal arguments of type i1
Krzysztof Parzyszek [Wed, 1 Mar 2017 17:30:10 +0000 (17:30 +0000)]
[Hexagon] Fix lowering of formal arguments of type i1

On Hexagon, values of type i1 are passed in registers of type i32,
even though i1 is not a legal value for these registers. This is a
special case and needs special handling to maintain consistency of
the lowering information.

This fixes PR32089.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296645 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[PDB] Re-add BinaryStreamTest.
Zachary Turner [Wed, 1 Mar 2017 17:22:36 +0000 (17:22 +0000)]
[PDB] Re-add BinaryStreamTest.

This re-adds all the binary stream tests.  This was reverted due
to some misaligned reads.  For now the offending test is
disabled while I investigate.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296643 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[GVNHoist] Don't hoist unsafe scalars at -Oz (PR31729)
Hans Wennborg [Wed, 1 Mar 2017 17:15:08 +0000 (17:15 +0000)]
[GVNHoist] Don't hoist unsafe scalars at -Oz (PR31729)

Based on Aditya Kumar's patch:

Differential Revision: https://reviews.llvm.org/D29092

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296642 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoRemove unittests/DebugInfo/PDB/BinaryStreamTest.cpp (from r296555)
Vedant Kumar [Wed, 1 Mar 2017 17:10:03 +0000 (17:10 +0000)]
Remove unittests/DebugInfo/PDB/BinaryStreamTest.cpp (from r296555)

It breaks the ToT UBSan bots:

/Users/vk/Desktop/llvm/include/llvm/DebugInfo/MSF/BinaryStreamArray.h:246:12: runtime error: reference binding to misaligned address 0x7f925540939a for type 'const int', which requires 4 byte alignment
0x7f925540939a: note: pointer points here
 05 00  00 00 01 00 00 00 02 00  00 00 03 00 00 00 00 00  00 00 00 00 00 00 00 00  70 98 50 06 01 00
              ^
0  DebugInfoPDBTests                   0x0000000106263cbd llvm::sys::PrintStackTrace(llvm::raw_ostream&) + 45
1  DebugInfoPDBTests                   0x00000001062628ff llvm::sys::RunSignalHandlers() + 159
2  DebugInfoPDBTests                   0x0000000106264593 SignalHandler(int) + 179
3  libsystem_platform.dylib            0x0000000107bb3fba _sigtramp + 26
4  libsystem_pthread.dylib             0x0000000107bd82c8 _pthread_keys + 9720
5  libsystem_c.dylib                   0x0000000107947f83 abort + 127
6  libclang_rt.ubsan_osx_dynamic.dylib 0x0000000106bb5fc2 __sanitizer::Abort() + 66
7  DebugInfoPDBTests                   0x000000010613f880 llvm::FixedStreamArrayIterator<int>::operator+=(long) + 0
8  DebugInfoPDBTests                   0x000000010613f615 llvm::FixedStreamArrayIterator<int>::operator*() const + 37
9  DebugInfoPDBTests                   0x000000010613f3cb std::__1::enable_if<__is_forward_iterator<llvm::FixedStreamArrayIterator<int> >::value, void>::type std::__1::vector<int, std::__1::allocator<int> >::__construct_at_end<llvm::FixedStreamArrayIterator<int> >(llvm::FixedStreamArrayIterator<int>, llvm::FixedStreamArrayIterator<int>, unsigned long) + 251
10 DebugInfoPDBTests                   0x000000010613f292 std::__1::vector<int, std::__1::allocator<int> >::vector<llvm::FixedStreamArrayIterator<int> >(llvm::FixedStreamArrayIterator<int>, std::__1::enable_if<(__is_forward_iterator<llvm::FixedStreamArrayIterator<int> >::value) && (is_constructible<int, std::__1::iterator_traits<llvm::FixedStreamArrayIterator<int> >::reference>::value), llvm::FixedStreamArrayIterator<int> >::type) + 226
11 DebugInfoPDBTests                   0x000000010613ddb7 std::__1::vector<int, std::__1::allocator<int> >::vector<llvm::FixedStreamArrayIterator<int> >(llvm::FixedStreamArrayIterator<int>, std::__1::enable_if<(__is_forward_iterator<llvm::FixedStreamArrayIterator<int> >::value) && (is_constructible<int, std::__1::iterator_traits<llvm::FixedStreamArrayIterator<int> >::reference>::value), llvm::FixedStreamArrayIterator<int> >::type) + 87
12 DebugInfoPDBTests                   0x000000010613d4af (anonymous namespace)::BinaryStreamTest_StreamReaderIntegerArray_Test::TestBody() + 1279
13 DebugInfoPDBTests                   0x00000001062780f3 testing::Test::Run() + 179
14 DebugInfoPDBTests                   0x0000000106279594 testing::TestInfo::Run() + 308
15 DebugInfoPDBTests                   0x000000010627a6a3 testing::TestCase::Run() + 307
16 DebugInfoPDBTests                   0x00000001062849d4 testing::internal::UnitTestImpl::RunAllTests() + 756
17 DebugInfoPDBTests                   0x0000000106284558 testing::UnitTest::Run() + 152
18 DebugInfoPDBTests                   0x0000000106266fa5 main + 117
19 libdyld.dylib                       0x00000001078506a5 start + 1
zsh: abort      ./unittests/DebugInfo/PDB/DebugInfoPDBTests

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296641 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[PDB] Remove use of std error codes.
Zachary Turner [Wed, 1 Mar 2017 17:02:41 +0000 (17:02 +0000)]
[PDB] Remove use of std error codes.

I already created a BinaryStreamError class for this purpose,
so update the code to use that on the remaining occurrences
of errc values.

This should also address the issue which led to r296583.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296640 91177308-0d34-0410-b5e6-96231b3b80d8

7 years agoclang-format r296631
Diana Picus [Wed, 1 Mar 2017 15:54:21 +0000 (15:54 +0000)]
clang-format r296631

Apparently I forgot to run it after fixing up some things...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296634 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[ARM] GlobalISel: Lower call params that need extensions
Diana Picus [Wed, 1 Mar 2017 15:35:14 +0000 (15:35 +0000)]
[ARM] GlobalISel: Lower call params that need extensions

Lower i1, i8 and i16 call parameters by extending them before storing them on
the stack. Also make sure we encode the correct, extended size in the
corresponding memory operand, and that we compute the correct stack size in the
end.

The latter is a bit more complicated because we used to compute the stack size
in the getStackAddress method, based on the Size and Offset of the parameters.
However, if the last parameter is sign extended, we'd be using the wrong,
non-extended size, and we'd end up with a smaller stack than we need to hold the
extended value. Instead of hacking this up based on the value of Size in
getStackAddress, we move our stack size handling logic to assignArg, where we
have access to the CCState which knows everything we could possibly want to know
about the stack. This way we don't need to duplicate any knowledge or resort to
any ugly hacks.

On this same occasion, update the IRTranslator test to check the sizes of the
stores everywhere, not just for sign extended paramteres.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296631 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[x86] auto-generate checks; NFC
Sanjay Patel [Wed, 1 Mar 2017 14:46:59 +0000 (14:46 +0000)]
[x86] auto-generate checks; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296629 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[x86] regenerate checks; NFC
Sanjay Patel [Wed, 1 Mar 2017 14:41:57 +0000 (14:41 +0000)]
[x86] regenerate checks; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296628 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[DeadStoreElimination] Check function modref behavior before considering memory clobbered
Igor Laevsky [Wed, 1 Mar 2017 14:38:29 +0000 (14:38 +0000)]
[DeadStoreElimination] Check function modref behavior before considering memory clobbered

Differential Revision: https://reviews.llvm.org/D29996

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296625 91177308-0d34-0410-b5e6-96231b3b80d8

7 years ago[mips] Drop unneeded REQUIRES line in test. NFCI
Simon Dardis [Wed, 1 Mar 2017 14:31:09 +0000 (14:31 +0000)]
[mips] Drop unneeded REQUIRES line in test. NFCI

rL296111 provides the proper fix.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296622 91177308-0d34-0410-b5e6-96231b3b80d8