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Justin Bogner [Mon, 20 Aug 2018 06:37:11 +0000 (06:37 +0000)]
[SimplifyCFG] Replace some uses of bitwise or with logical or
It's clearer to use logical or for boolean values. Thanks to Steven
Zhang for noticing!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@340153
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Craig Topper [Mon, 20 Aug 2018 05:35:12 +0000 (05:35 +0000)]
[InstCombine] Move some variable declarations into a more appropriate scope. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@340150
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QingShan Zhang [Mon, 20 Aug 2018 02:52:55 +0000 (02:52 +0000)]
[PowerPC] Add a peephole post RA to transform the inst that fed by add
If the arch is P8, we will select XFLOAD to load the floating point, and then, expand it to vsx and non-vsx X-form instruction post RA. This patch is trying to convert the X-form to D-form if it meets the requirement that one operand of the x-form inst is the special Zero register, and another operand fed by add inst. i.e.
y = add imm, reg
LFDX. 0, y
-->
LFD imm(reg)
Reviewers: Nemanjai
Differential Revision: https://reviews.llvm.org/D49007
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@340149
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whitequark [Sun, 19 Aug 2018 23:40:05 +0000 (23:40 +0000)]
[bindings/go] Add coroutine passes
Add Go bindings for CoroEarly, CoroSplit, CoroElide and CoroCleanup.
Differential Revision: https://reviews.llvm.org/D50951
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@340148
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whitequark [Sun, 19 Aug 2018 23:39:57 +0000 (23:39 +0000)]
[LLVM-C] Add coroutine passes
Differential Revision: https://reviews.llvm.org/D50950
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@340147
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whitequark [Sun, 19 Aug 2018 23:39:47 +0000 (23:39 +0000)]
[C-API][DIBuilder] Added DIFlags in LLVMDIBuilderCreateBasicType
Added DIFlags in LLVMDIBuilderCreateBasicType to add optional DWARF
attributes, such as DW_AT_endianity.
Patch by Chirag Patel.
Differential Revision: https://reviews.llvm.org/D50832
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@340146
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Craig Topper [Sun, 19 Aug 2018 18:03:34 +0000 (18:03 +0000)]
[InstCombine] Add test cases for an icmp combine that is missing support for splat vector constants.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@340144
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Simon Pilgrim [Sun, 19 Aug 2018 17:47:50 +0000 (17:47 +0000)]
[SelectionDAG] Add basic demanded elements support to ComputeNumSignBits for BITCAST nodes
Only adds support to the existing 'large element' scalar/vector to 'small element' vector bitcasts.
The next step would be to support cases where the large elements aren't all sign bits, and determine the small element equivalent based on the demanded elements.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@340143
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Simon Pilgrim [Sun, 19 Aug 2018 16:01:47 +0000 (16:01 +0000)]
[X86][SSE] Add PACKSS test showing ComputeNumSignBits failure to handle demanded elts through a bitcast
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@340139
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Craig Topper [Sun, 19 Aug 2018 04:26:31 +0000 (04:26 +0000)]
[X86] Fix an issue in the matching for ADDUS.
We were basically assuming only one operand of the compare could be an ADD node and using that to swap operands. But we can have a normal add followed by a saturing add.
This rewrites the canonicalization to just be based on the condition code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@340134
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Craig Topper [Sun, 19 Aug 2018 04:26:29 +0000 (04:26 +0000)]
[X86] Add a test case showing an issue in our addusw pattern matching.
We are unable to handle a normal add followed by a saturing add with certain operand orders on the icmp.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@340133
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Aditya Kumar [Sat, 18 Aug 2018 20:17:19 +0000 (20:17 +0000)]
Updating MergeFunctions.rst
Improving readability, removing redundant contents.
Reviewers: hiraditya
Differential Revision: https://reviews.llvm.org/D50686
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@340131
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Craig Topper [Sat, 18 Aug 2018 19:16:56 +0000 (19:16 +0000)]
[X86] Use SDValue::operator== instead of DAG.isEqualTo in strictly integer matching.
isEqualTo is more useful for floating point. operator== is sufficient for integer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@340130
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Craig Topper [Sat, 18 Aug 2018 18:51:04 +0000 (18:51 +0000)]
[X86] Simplify the PADDUS legality check in combineSelect to match PSUBUS. NFC
While there remove some trailing whitespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@340129
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Craig Topper [Sat, 18 Aug 2018 18:51:03 +0000 (18:51 +0000)]
[X86] Add support for using 512-bit PSUBUS to combineSelect.
The code already support 128 and 256 and even knows to split 256 for AVX1. So we really just needed to stop looking for specific VTs and subtarget features and just look for legal VTs with i8/i16 elements.
While there, add some curly braces around outer if statement bodies that contain only another if. It makes all the closing curly braces look more regular.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@340128
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Craig Topper [Sat, 18 Aug 2018 18:50:59 +0000 (18:50 +0000)]
[X86] Add test cases to show missed opportunities to use 512-bit PSUBUS.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@340127
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Zachary Turner [Sat, 18 Aug 2018 18:49:48 +0000 (18:49 +0000)]
[MS Demangler] Resolve backreferences eagerly, not lazily.
A while back I submitted a patch to resolve backreferences
lazily, thinking this that it was not always possible to know
in advance what type you were looking at until you had completed
a full pass over the input, and therefore it would be impossible
to resolve backreferences eagerly.
This was mistaken though, and turned out to be an unrelated
problem. In fact, the reverse is true. You *must* resolve
backreferences eagerly. This is because certain types of nested
mangled symbols do not share a backreference context with their
parent symbol, and as such, if you try to resolve them lazily
their backreference context will have been lost by the time you
finish demangling the entire input. On the other hand, resolving
them eagerly appears to always work, and enables us to port
many more tests over.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@340126
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Lang Hames [Sat, 18 Aug 2018 18:38:37 +0000 (18:38 +0000)]
[RuntimeDyld] Fix a bug in RuntimeDyld::loadObjectImpl that was over-allocating
space for common symbols.
Patch by Dmitry Sidorov. Thanks Dmitry!
Differential revision: https://reviews.llvm.org/D50240
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@340125
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Simon Pilgrim [Sat, 18 Aug 2018 18:04:29 +0000 (18:04 +0000)]
[X86] Replace all single match schedule class instregexs with instrs entries
Helps reduce cost of instrw collection
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@340124
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Simon Pilgrim [Sat, 18 Aug 2018 15:58:19 +0000 (15:58 +0000)]
[X86] Merge shift/rotate schedule class instregexs
Helps reduce cost of instrw collection
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@340123
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Hsiangkai Wang [Sat, 18 Aug 2018 14:55:34 +0000 (14:55 +0000)]
[DebugInfo] In FastISel, convert llvm.dbg.label to DBG_LABEL MI.
Convert llvm.dbg.label(!label_metadata) to DBG_LABEL !label_metadata.
Differential Revision: https://reviews.llvm.org/D50622
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@340122
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Craig Topper [Sat, 18 Aug 2018 06:00:16 +0000 (06:00 +0000)]
[X86] Add a signed test case for PR38622. Use nounwind to reduce the output on the unsigned test case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@340121
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Craig Topper [Sat, 18 Aug 2018 05:52:42 +0000 (05:52 +0000)]
[DAGCombiner] Allow divide by constant optimization on opaque constants.
Summary:
I believe this restores the behavior we had before r339147.
Fixes PR38622.
Reviewers: RKSimon, chandlerc, spatel
Reviewed By: chandlerc
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D50936
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@340120
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Zachary Turner [Sat, 18 Aug 2018 03:54:16 +0000 (03:54 +0000)]
Add the extended XMM registers mappings for AVX-512.
After this we should have the entire AVX-512 register set
mapping in place.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@340118
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Lang Hames [Sat, 18 Aug 2018 02:48:02 +0000 (02:48 +0000)]
[ORC] Fix some parameter names. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@340116
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Lang Hames [Sat, 18 Aug 2018 02:06:18 +0000 (02:06 +0000)]
[ORC] Rename 'finalize' to 'emit' to avoid potential confusion.
An emitted symbol has had its contents written and its memory protections
applied, but it is not automatically ready to execute.
Prior to ORC supporting concurrent compilation, the term "finalized" could be
interpreted two different (but effectively equivalent) ways: (1) The finalized
symbol's contents have been written and its memory protections applied, and (2)
the symbol is ready to run. Now that ORC supports concurrent compilation, sense
(1) no longer implies sense (2). We have already introduced a new term, 'ready',
to capture sense (2), so rename sense (1) to 'emitted' to avoid any lingering
confusion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@340115
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Peter Collingbourne [Sat, 18 Aug 2018 00:54:46 +0000 (00:54 +0000)]
MC: Remove dead code from WinCOFFObjectWriter.cpp. NFCI.
Remove code for writing auxiliary symbols of type function definition
and begin function. These types of symbols are associated with
pre-CodeView debug info and we never emit them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@340113
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Aditya Nandakumar [Sat, 18 Aug 2018 00:01:54 +0000 (00:01 +0000)]
[GISel]: Add Legalization/lowering code for bit counting operations
https://reviews.llvm.org/D48847#inline-448257
Ported legalization expansions for CTLZ/CTTZ from DAG to GISel.
Reviewed by rtereshin.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@340111
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Philip Reames [Fri, 17 Aug 2018 23:17:31 +0000 (23:17 +0000)]
[AST] Clarify printing of unknown size locations [NFC]
Printing "unknown" is much more clear than an arbitrary large integer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@340108
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Jordan Rupprecht [Fri, 17 Aug 2018 22:34:48 +0000 (22:34 +0000)]
[llvm-objcopy] Implement -G/--keep-global-symbol(s).
Summary:
Port GNU Objcopy -G/--keep-global-symbol(s).
This is slightly different than the already-implemented --globalize-symbol, which marks a symbol as global when copying. When --keep-global-symbol (alias -G) is used, *only* those symbols marked will stay global, and all other globals are demoted to local. (Also note that it doesn't *promote* a symbol to global). Additionally, there is a pluralized version of the flag --keep-global-symbols, which effectively applies --keep-global-symbol for every non-comment in a file.
Reviewers: jakehehrlich, jhenderson, alexshap
Reviewed By: jhenderson
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D50589
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@340105
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George Burgess IV [Fri, 17 Aug 2018 22:34:04 +0000 (22:34 +0000)]
[DebugCounters] don't do redundant map lookups; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@340104
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Philip Reames [Fri, 17 Aug 2018 21:58:26 +0000 (21:58 +0000)]
[AST][Tests] Clarify what each test is doing
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@340100
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Philip Reames [Fri, 17 Aug 2018 21:45:57 +0000 (21:45 +0000)]
[AST[Tests] Shorten tests using noalias params
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@340099
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Philip Reames [Fri, 17 Aug 2018 21:42:18 +0000 (21:42 +0000)]
[AST] Add tests for argmemonly calls [NFC]
First step towards building a test set to rebase D50730 on top of. Starting with clone of memtransfer tests, more to come.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@340095
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Matt Arsenault [Fri, 17 Aug 2018 21:39:52 +0000 (21:39 +0000)]
ValueTracking: Add tests for isKnownNeverNaN
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@340090
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Reid Kleckner [Fri, 17 Aug 2018 21:35:14 +0000 (21:35 +0000)]
[MC] Improve error message when a codeview register is unknown
This is in MCRegisterInfo, we can print the actual register name easily.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@340089
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Zachary Turner [Fri, 17 Aug 2018 21:32:07 +0000 (21:32 +0000)]
[MS Demangler] Properly print all thunk types.
We were only printing the vtordisp thunk before as the previous
patch was more aimed at getting special operators working, one
of which was a thunk. This patch gets all thunk types to print
properly, and adds a test for each one.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@340088
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Craig Topper [Fri, 17 Aug 2018 21:19:28 +0000 (21:19 +0000)]
[X86] Remove detectAddSubSatPattern.
This was added very recently in r339650, but appears to be completely untested and has at least one bug in it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@340086
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Matt Arsenault [Fri, 17 Aug 2018 21:19:22 +0000 (21:19 +0000)]
DAG: Fix isKnownNeverNaN for basic non-sNaN cases
fadd/fsub/fmul need to worry about infinities as well
as fdiv.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@340085
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Lang Hames [Fri, 17 Aug 2018 21:18:18 +0000 (21:18 +0000)]
[ORC] Rename VSO to JITDylib.
VSO was a little close to VDSO (an acronym on Linux for Virtual Dynamic Shared
Object) for comfort. It also risks giving the impression that instances of this
class could be shared between ExecutionSessions, which they can not.
JITDylib seems moderately less confusing, while still hinting at how this
class is intended to be used, i.e. as a JIT-compiled stand-in for a dynamic
library (code that would have been a dynamic library if you had wanted to
compile it ahead of time).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@340084
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Zachary Turner [Fri, 17 Aug 2018 21:18:05 +0000 (21:18 +0000)]
[MS Demangler] Demangle all remaining types of operators.
This demangles all remaining special operators including thunks,
RTTI Descriptors, and local static guard variables.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@340083
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Krzysztof Parzyszek [Fri, 17 Aug 2018 21:12:37 +0000 (21:12 +0000)]
[Hexagon] Remove unused functions from HexagonInstPrinter, NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@340081
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Michael Kruse [Fri, 17 Aug 2018 19:31:41 +0000 (19:31 +0000)]
[AST] Adapt Polly to AnalysisSetTracker changes. NFC.
The method AliasSetTracker::getAliasSetForPointer was removed and replaced by AliasSetTracker::getAliasSetFor for the restructuring in r339930.
Since Polly uses AliasSetTracker::getAliasSetForPointer, a temporary fix has been committed in r339937 with a comment:
Can someone from polly please migrate usage and then delete the wrapper?
This commit is doing exactly that.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@340072
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Jordan Rupprecht [Fri, 17 Aug 2018 19:18:20 +0000 (19:18 +0000)]
Fix windows buildbots by removing : from filenames
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@340071
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Jordan Rupprecht [Fri, 17 Aug 2018 18:51:11 +0000 (18:51 +0000)]
[llvm-objcopy] Add support for -I binary -B <arch>.
Summary:
The -I (--input-target) and -B (--binary-architecture) flags exist but are currently silently ignored. This adds support for -I binary for architectures i386, x86-64 (and alias i386:x86-64), arm, aarch64, sparc, and ppc (powerpc:common64). This is largely based on D41687.
This is done by implementing an additional subclass of Reader, BinaryReader, which works by interpreting the input file as contents for .data field, sets up a synthetic header, and adds additional sections/symbols (e.g. _binary__tmp_data_txt_start).
Reviewers: jakehehrlich, alexshap, jhenderson, javed.absar
Reviewed By: jhenderson
Subscribers: jyknight, nemanjai, kbarton, fedor.sergeev, jrtc27, kristof.beyls, paulsemel, llvm-commits
Differential Revision: https://reviews.llvm.org/D50343
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@340070
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Jun Lim [Fri, 17 Aug 2018 18:40:41 +0000 (18:40 +0000)]
Test commit
I just removed a blank space.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@340069
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Vedant Kumar [Fri, 17 Aug 2018 18:39:19 +0000 (18:39 +0000)]
Remove a hardcoded address in test/DebugInfo/X86/vla-multi.ll
This relaxes a test to make it less brittle.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@340068
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Alina Sbirlea [Fri, 17 Aug 2018 18:37:15 +0000 (18:37 +0000)]
[IDF] Make GD const.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@340067
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Matt Davis [Fri, 17 Aug 2018 18:06:01 +0000 (18:06 +0000)]
[llvm-mca] Reformat a few lines (fix spacing). NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@340065
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Reka Kovacs [Fri, 17 Aug 2018 18:05:38 +0000 (18:05 +0000)]
[Support] NFC: Fix docstring in FileSystem.h.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@340063
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Simon Pilgrim [Fri, 17 Aug 2018 18:03:11 +0000 (18:03 +0000)]
[X86][SSE] Lower constant vXi8 ISD::SRL/ISD::SRA using PMULLW
Extending the concept introduced in D49562, this patch lowers constant vXi8 ISD::SRL/ISD::SRA by zero/sign extending to vXi16 and using PMULLW and then truncating the high 8 bits of the result.
Differential Revision: https://reviews.llvm.org/D50781
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@340062
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Evandro Menezes [Fri, 17 Aug 2018 17:59:53 +0000 (17:59 +0000)]
[InstCombine] Refactor the simplification of pow() (NFC)
Refactor all cases dealing with `exp{,2,10}()` into one function in
preparation for D49273. Otherwise, NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@340061
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Evandro Menezes [Fri, 17 Aug 2018 17:59:38 +0000 (17:59 +0000)]
[NFC] Expand test cases for simplifying pow()
In prepatration for the improvements that D49273 enables.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@340060
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Craig Topper [Fri, 17 Aug 2018 17:57:25 +0000 (17:57 +0000)]
[X86] Use hasOneUse instead of isOnlyUserOf. NFCI
isOnlyUserOf is a little heavier because it allows the node to be used multiple times by the other node. In this case we are looking at a truncate which only has one operand so we know it can only use it once. Thus hasOneUse is better.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@340059
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Simon Pilgrim [Fri, 17 Aug 2018 17:45:15 +0000 (17:45 +0000)]
[TableGen] Don't separately search for DefaultMode when we're going to iterate the set anyway. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@340055
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Alina Sbirlea [Fri, 17 Aug 2018 17:39:15 +0000 (17:39 +0000)]
[IDF] Teach Iterated Dominance Frontier to use a snapshot CFG based on a GraphDiff.
Summary:
Create the ability to compute IDF using a CFG View.
For this, we'll need a new DT created using a list of Updates (to be refactored later to a GraphDiff), and the GraphTraits based on the same GraphDiff.
Reviewers: kuhar, george.burgess.iv, mzolotukhin
Subscribers: sanjoy, jlebar, llvm-commits
Differential Revision: https://reviews.llvm.org/D50675
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@340052
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Teresa Johnson [Fri, 17 Aug 2018 16:53:47 +0000 (16:53 +0000)]
[ThinLTO] Add option for printing import failure reasons
Summary:
Adds the option for the printing of summary information about functions
considered but rejected for importing during the thin link.
Reviewers: davidxl
Subscribers: mehdi_amini, inglorion, eraman, steven_wu, dexonsmith, llvm-commits
Differential Revision: https://reviews.llvm.org/D50881
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@340047
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Zachary Turner [Fri, 17 Aug 2018 16:14:05 +0000 (16:14 +0000)]
[MS Demangler] Rework the way operators are demangled.
Previously, some of the code for actually parsing mangled
operator names was more like formatting code in nature,
and was interspersed with the demangling code which builds
the AST. This means that by the time we got to the printing
code, we had lost all information about what type of operator
we had, and all we were left with was a string that we just
had to print. However, not all operators are actually even
operators. it's basically just a catch-all mangling for
"special names", and for some of the other types it helps
to know when we're actually doing the printing what it is.
This patch changes the way things work by introducing an
OperatorInfo structure and corresponding enumeration. When
we demangle we store the enumeration value and demangled
components separately. This gives more flexibility during
printing.
In doing so, some demanglings of special names which we didn't
previously support come out of this for free, so we now demangle
those.
A few are more complex and are better left for a followup patch
though.
An exhaustive test of every possible operator code is included,
with the ones that don't yet work commented out.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@340046
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Simon Pilgrim [Fri, 17 Aug 2018 15:54:07 +0000 (15:54 +0000)]
[TableGen] TypeInfer - Cache the legal types as TypeSetByHwMode
We were just caching the MVT set of legal types, then every call creating a new TypeSetByHwMode with it and passing it back on the stack. There's no need to do this - we can create and cache the whole TypeSetByHwMode once and return a const reference to it each time.
Additionally, TypeInfer::expandOverloads wasn't making use of the fact that the cache just contains a default mode containing all the types.
Saves up to 30secs in debug builds of x86 -gen-dag-isel.
Differential Revision: https://reviews.llvm.org/D50903
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@340042
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Hsiangkai Wang [Fri, 17 Aug 2018 15:22:04 +0000 (15:22 +0000)]
[DebugInfo] Generate DWARF debug information for labels. (Fix leak problems)
There are two forms for label debug information in DWARF format.
1. Labels in a non-inlined function:
DW_TAG_label
DW_AT_name
DW_AT_decl_file
DW_AT_decl_line
DW_AT_low_pc
2. Labels in an inlined function:
DW_TAG_label
DW_AT_abstract_origin
DW_AT_low_pc
We will collect label information from DBG_LABEL. Before every DBG_LABEL,
we will generate a temporary symbol to denote the location of the label.
The symbol could be used to get DW_AT_low_pc afterwards. So, we create a
mapping between 'inlined label' and DBG_LABEL MachineInstr in DebugHandlerBase.
The DBG_LABEL in the mapping is used to query the symbol before it.
The AbstractLabels in DwarfCompileUnit is used to process labels in inlined
functions.
We also keep a mapping between scope and labels in DwarfFile to help to
generate correct tree structure of DIEs.
It also generates label debug information under global isel.
Differential Revision: https://reviews.llvm.org/D45556
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@340039
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Stefan Pintilie [Fri, 17 Aug 2018 15:15:26 +0000 (15:15 +0000)]
[PowerPC] Generate lxsd instead of the ld->mtvsrd sequence for vector loads
This patch addresses:
- Implementation within PPCISelLowering.cpp to check if we should use direct
load into vector instructions (such as lxsd/lfd ) when the scalar_to_vector
function is used; which will allow us to catch as many cases of the
scalar_to_vector uses as possible to translate the ld->mtvsrd sequence into
lxsd.
- Test cases to exhibit the behaviour of emitting lxsd/lfd.
Patch by amyk
Differential revision: https://reviews.llvm.org/D49698
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@340037
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Andrea Di Biagio [Fri, 17 Aug 2018 15:01:37 +0000 (15:01 +0000)]
[llvm-mca] Removed references to HWStallEvent in Scheduler.h. NFCI
class Scheduler should not know anything of hardware event listeners and
hardware stall events (HWStallEvent). HWStallEvent objects should only be
constructed by pipeline stages to notify listeners of hardware events.
No functional change intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@340036
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Francis Visoiu Mistrih [Fri, 17 Aug 2018 14:47:01 +0000 (14:47 +0000)]
[x86] Fix test breaking on Darwin after r339962
* -march=x86-64 -> -mtriple=x86_64-unknown-linux to avoid _ prefixes to
symbols
* add -start-before to avoid running the whole codegen on the IR. I
assumed it is meant to be running after X86SpeculativeLoadHardening.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@340034
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Francis Visoiu Mistrih [Fri, 17 Aug 2018 14:46:56 +0000 (14:46 +0000)]
[X86] Fix liveness information when expanding X86::EH_SjLj_LongJmp64
test/CodeGen/X86/shadow-stack.ll has the following machine verifier
errors:
```
*** Bad machine code: Using a killed virtual register ***
- function: bar
- basic block: %bb.6 entry (0x7fdc81857818)
- instruction: %3:gr64 = MOV64rm killed %2:gr64, 1, $noreg, 8, $noreg
- operand 1: killed %2:gr64
*** Bad machine code: Using a killed virtual register ***
- function: bar
- basic block: %bb.6 entry (0x7fdc81857818)
- instruction: $rsp = MOV64rm killed %2:gr64, 1, $noreg, 16, $noreg
- operand 1: killed %2:gr64
*** Bad machine code: Virtual register killed in block, but needed live out. ***
- function: bar
- basic block: %bb.2 entry (0x7fdc818574f8)
Virtual register %2 is used after the block.
```
The fix here is to only copy the machine operand's register without the
kill flags for all the instructions except the very last one of the
sequence.
I had to insert dummy PHIs in the test case to force the NoPHI function
property to be set to false. More on this here: https://llvm.org/PR38439
Differential Revision: https://reviews.llvm.org/D50260
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@340033
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Florian Hahn [Fri, 17 Aug 2018 14:39:53 +0000 (14:39 +0000)]
[NewGVN] Add tests for r340031.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@340032
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Florian Hahn [Fri, 17 Aug 2018 14:39:04 +0000 (14:39 +0000)]
[InstrSimplify,NewGVN] Add option to ignore additional instr info when simplifying.
NewGVN uses InstructionSimplify for simplifications of leaders of
congruence classes. It is not guaranteed that the metadata or other
flags/keywords (like nsw or exact) of the leader is available for all members
in a congruence class, so we cannot use it for simplification.
This patch adds a InstrInfoQuery struct with a boolean field
UseInstrInfo (which defaults to true to keep the current behavior as
default) and a set of helper methods to get metadata/keywords for a
given instruction, if UseInstrInfo is true. The whole thing might need a
better name, to avoid confusion with TargetInstrInfo but I am not sure
what a better name would be.
The current patch threads through InstrInfoQuery to the required
places, which is messier then it would need to be, if
InstructionSimplify and ValueTracking would share the same Query struct.
The reason I added it as a separate struct is that it can be shared
between InstructionSimplify and ValueTracking's query objects. Also,
some places do not need a full query object, just the InstrInfoQuery.
It also updates some interfaces that do not take a Query object, but a
set of optional parameters to take an additional boolean UseInstrInfo.
See https://bugs.llvm.org/show_bug.cgi?id=37540.
Reviewers: dberlin, davide, efriedma, sebpop, hiraditya
Reviewed By: hiraditya
Differential Revision: https://reviews.llvm.org/D47143
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@340031
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Krzysztof Parzyszek [Fri, 17 Aug 2018 14:24:24 +0000 (14:24 +0000)]
[Hexagon] Expand vgather pseudos during packetization
This will allow packetizing the vgather expansion with other instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@340028
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Alex Bradbury [Fri, 17 Aug 2018 14:03:37 +0000 (14:03 +0000)]
[AtomicExpandPass] Widen partword atomicrmw or/xor/and before tryExpandAtomicRMW
This patch performs a widening transformation of bitwise atomicrmw
{or,xor,and} and applies it prior to tryExpandAtomicRMW. This operates
similarly to convertCmpXchgToIntegerType. For these operations, the i8/i16
atomicrmw can be implemented in terms of the 32-bit atomicrmw by appropriately
manipulating the operands. There is no functional change for the handling of
partword or/xor, but the transformation for partword 'and' is new.
The advantage of performing this transformation early is that the same
code-path can be used regardless of the approach used to expand the atomicrmw
(AtomicExpansionKind). i.e. the same logic is used for
AtomicExpansionKind::CmpXchg and can also be used by the intrinsic-based
expansion in D47882.
Differential Revision: https://reviews.llvm.org/D48129
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@340027
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Anna Thomas [Fri, 17 Aug 2018 13:44:00 +0000 (13:44 +0000)]
[LICM] Add a diagnostic analysis for identifying alias information
Summary:
Currently, in LICM, we use the alias set tracker to identify if the
instruction (we're interested in hoisting) aliases with instruction that
modifies that memory location.
This patch adds an LICM alias analysis diagnostic tool that checks the
mod ref info of the instruction we are interested in hoisting/sinking,
with every instruction in the loop. Because of O(N^2) complexity this
is now only a diagnostic tool to show the limitation we have with the
alias set tracker and is OFF by default.
Test cases show the difference with the diagnostic analysis tool, where
we're able to hoist out loads and readonly + argmemonly calls from the
loop, where the alias set tracker analysis is not able to hoist these
instructions out.
Reviewers: reames, mkazantsev, fedor.sergeev, hfinkel
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D50854
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@340026
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Roger Ferrer Ibanez [Fri, 17 Aug 2018 13:40:03 +0000 (13:40 +0000)]
[RISCV] Remove unused function
This function is not virtual, it is private and it is not called anywhere. No
regression is introduced by removing it.
I think we can safely remove it.
Differential Revision: https://reviews.llvm.org/D50836
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@340024
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Sanjay Patel [Fri, 17 Aug 2018 13:23:44 +0000 (13:23 +0000)]
[ConstantFolding] add simplifications for funnel shift intrinsics
This is another step towards being able to canonicalize to the funnel shift
intrinsics in IR (see D49242 for the initial patch).
We should not have any loss of simplification power in IR between these and
the equivalent IR constructs.
Differential Revision: https://reviews.llvm.org/D50848
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@340022
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Simon Pilgrim [Fri, 17 Aug 2018 13:03:17 +0000 (13:03 +0000)]
[TableGen] TypeSetByHwMode::insert - cache the default MVT. NFCI.
Avoids repeated count()/find() calls that we've already have the default values for.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@340020
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Luke Cheeseman [Fri, 17 Aug 2018 12:53:22 +0000 (12:53 +0000)]
[AArch64] - Generate pointer authentication instructions
- Generate pointer authentication instructions
- The functions instrumented depend on function attribtues:
all (all functions instrumentent)
non-leaf (only those that spill LR)
none
- Function epilogues sign the LR before spilling to the stack and authenticate
the LR once restored
- If the target is v8.3a or greater than can use the combined authenticate and
return instruction
Differential revision: https://reviews.llvm.org/D49793
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@340018
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Nemanja Ivanovic [Fri, 17 Aug 2018 12:41:49 +0000 (12:41 +0000)]
Revert extraneous directory added by accident in rL340016
It appears that the way this patch was produced ended up creating an
extra 'llvm' directory where the test was placed. When I committed the
patch, that directory ended up being created upstream. This commit should
revert that.
Sorry for the noise.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@340017
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Nemanja Ivanovic [Fri, 17 Aug 2018 12:35:44 +0000 (12:35 +0000)]
[PowerPC] Generate Power9 extswsli extend sign and shift immediate instruction
Add a DAG combine for the PowerPC code generator to generate the Power9 extswsli
extend sign and shift immediate instruction.
Patch by RolandF.
Differential revision: https://reviews.llvm.org/D49879
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@340016
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Simon Pilgrim [Fri, 17 Aug 2018 12:25:18 +0000 (12:25 +0000)]
[DAGCombiner] extractShiftForRotate - fix out of range shift issue
Don't just check for negative shift amounts.
Fixes OSS Fuzz #9935
https://bugs.chromium.org/p/oss-fuzz/issues/detail?id=9935
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@340015
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Andrea Di Biagio [Fri, 17 Aug 2018 11:33:48 +0000 (11:33 +0000)]
[InstCombine] Remove unused method FAddCombine::createFDiv(). NFC
This commit fixes a (gcc 7.3.0) [-Wunused-function] warning caused by the
presence of unused method FaddCombine::createFDiv().
The last use of that method was removed at r339519.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@340014
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Bernard Ogden [Fri, 17 Aug 2018 11:29:49 +0000 (11:29 +0000)]
[ARM/AArch64] Support FP16 +fp16fml instructions
Add +fp16fml feature for new FP16 instructions, which are a
mandatory part of FP16 from v8.4-A and an optional part of FP16
from v8.2-A. It doesn't seem to be possible to model this in
LLVM, but the relationship between the options is handled by
the related clang patch.
In keeping with what I think is the usual practice, the fp16fml
extension is accepted regardless of base architecture version.
Builds on/replaces Sjoerd Meijer's patch to add these instructions at
https://reviews.llvm.org/D49839.
Differential Revision: https://reviews.llvm.org/D50228
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@340013
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Bernard Ogden [Fri, 17 Aug 2018 11:26:57 +0000 (11:26 +0000)]
[ARM/AArch64] TargetParserTest fixes
Adds some missing tests for the FP16 extension,
fixes an existing test that misnames it.
Differential Revision: https://reviews.llvm.org/D50227
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@340012
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Simon Pilgrim [Fri, 17 Aug 2018 10:52:49 +0000 (10:52 +0000)]
[DAGCombine] Improve (sra (sra x, c1), c2) -> (sra x, (add c1, c2)) folding
Add support for cases where only some c1+c2 results exceed the max bitshift, clamping accordingly.
Differential Revision: https://reviews.llvm.org/D35722
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@340010
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Daniel Cederman [Fri, 17 Aug 2018 10:40:00 +0000 (10:40 +0000)]
[Sparc] Get sret arg size from CallLoweringInfo.getArgs()
Summary:
Looking at the callee argument list, as is done now, might not work if
the function has been typecasted into one that is expected to return
a struct. This change also simplifies the code.
The isFP128ABICall() function can be removed as it is no longer needed.
The test in fp128.ll has been updated to verify this.
Reviewers: jyknight, venkatra
Reviewed By: jyknight
Subscribers: fedor.sergeev, jrtc27, llvm-commits
Differential Revision: https://reviews.llvm.org/D48117
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@340008
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Simon Pilgrim [Fri, 17 Aug 2018 09:47:52 +0000 (09:47 +0000)]
Fix "control reaches end of non-void function" -Wreturn-type warning. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@340006
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Daniel Cederman [Fri, 17 Aug 2018 09:18:31 +0000 (09:18 +0000)]
[Sparc] Flush register windows for @llvm.returnaddress(1)
Summary: When @llvm.returnaddress is called with a value higher than 0
it needs to read from the call stack to get the return address. This
means that the register windows needs to be flushed to the stack to
guarantee that the data read is valid. For values higher than 1 this
is done indirectly by the call to getFRAMEADDR(), but not for the value 1.
Reviewers: jyknight, venkatra
Reviewed By: jyknight
Subscribers: fedor.sergeev, jrtc27, llvm-commits
Differential Revision: https://reviews.llvm.org/D48636
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@340003
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Chen Zheng [Fri, 17 Aug 2018 07:51:01 +0000 (07:51 +0000)]
[MISC]Fix wrong usage of std::equal()
Differential Revision: https://reviews.llvm.org/D49958
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@340000
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Sjoerd Meijer [Fri, 17 Aug 2018 07:34:01 +0000 (07:34 +0000)]
[ARM][NFC] ARMCodeGenPrepare: some refactoring and algorithm description
Differential Revision: https://reviews.llvm.org/D50846
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@339997
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Max Kazantsev [Fri, 17 Aug 2018 06:19:17 +0000 (06:19 +0000)]
[MustExecute] Fix algorithmic bug in isGuaranteedToExecute. PR38514
The description of `isGuaranteedToExecute` does not correspond to its implementation.
According to description, it should return `true` if an instruction is executed under the
assumption that its loop is *entered*. However there is a sophisticated alrogithm inside
that tries to prove that the instruction is executed if the loop is *exited*, which is not the
same thing for infinite loops. There is an attempt to protect from dealing with infinite loops
by prohibiting loops without exit blocks, however an infinite loop can have exit blocks.
As result of that, MustExecute can falsely consider some blocks that are never entered as
mustexec, and LICM can hoist dangerous instructions out of them basing on this fact.
This may introduce UB to programs which did not contain it initially.
This patch removes the problematic algorithm and replaced it with a one which tries to
prove what is required in description.
Differential Revision: https://reviews.llvm.org/D50558
Reviewed By: reames
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@339984
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Max Kazantsev [Fri, 17 Aug 2018 05:20:25 +0000 (05:20 +0000)]
[NFC] Add tests to ensure that improvement of MustThrow analysis will not lead to problems in future
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@339983
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Chandler Carruth [Fri, 17 Aug 2018 04:47:16 +0000 (04:47 +0000)]
Revert r339977: [GISel]: Add Opcodes for a few LLVM Intrinsics
This is breaking ~all the bots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@339982
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Brian Cain [Fri, 17 Aug 2018 04:38:41 +0000 (04:38 +0000)]
[llvm-mc-assemble-fuzzer] Update API - Pass MCObjectWriter instead of a stream
Fixes build breakage of llvm-mc-assemble-fuzzer introduced by r332749.
Fix provided by pbhatu (Pratik Bhatu)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@339981
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Graydon Hoare [Fri, 17 Aug 2018 04:13:19 +0000 (04:13 +0000)]
[Support] Add a public API to allow clearing all (static) timer groups.
Summary:
Formerly, all timer groups were automatically cleared when printed out. In
https://reviews.llvm.org/rL324788 this behaviour was changed to not-clearing
timers on printout, to allow printing timers more than once, but as a result
clients (specifically Swift) that relied on the clear-on-print behaviour to
inhibit duplicate timer printing on shutdown were broken.
Rather than revert that change, this change adds a new API that enables
clients that _want_ to clear all timers to do so explicitly.
Reviewers: george.karpenkov, thegameg
Reviewed By: george.karpenkov
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D50874
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@339980
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Aditya Nandakumar [Fri, 17 Aug 2018 01:41:56 +0000 (01:41 +0000)]
[GISel]: Add Opcodes for a few LLVM Intrinsics
https://reviews.llvm.org/D50401
Add opcodes for llvm.intrinsic.trunc, round, and update the IRTranslator
for the same.
Reviewed by: dsanders.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@339977
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Chandler Carruth [Fri, 17 Aug 2018 01:10:33 +0000 (01:10 +0000)]
[ADT] Replace a member initializer of a union with an explicit
constructor.
This breaking an old/weird host compiler is my best bet for the current
crashes I'm getting from bots since this functionality was added to this
ADT.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@339975
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Heejin Ahn [Fri, 17 Aug 2018 00:12:04 +0000 (00:12 +0000)]
[WebAssembly] Modify LateEHPrepare one-line description (NFC)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@339972
91177308-0d34-0410-b5e6-
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David Blaikie [Thu, 16 Aug 2018 23:57:15 +0000 (23:57 +0000)]
DebugInfo: Remove command line (& target-based) disabling of pubnames in favor of metadata
Now that Clang disables NVPTX pubnames via metadata there's no need for
this fallback to target detection in the backend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@339970
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Heejin Ahn [Thu, 16 Aug 2018 23:50:59 +0000 (23:50 +0000)]
[WebAssembly] CFG stackify support for exception handling
Summary:
This adds support for exception handling to CFGStackify pass. This only
adds TRY / END_TRY markers and DOES NOT yet fix unwind mismatches that
can be created by the linearization of the CFG into the structural wasm
format. The mismatch fix will be added by following patches.
In detail, this patch
- Added support for TRY / END_TRY markers to support EH
- Changed many static functions into class member functions as they take
too many arguments now
- Added several more bookeeping data structures
- Refactored routines that decide where to insert markers, because
without refactoring this got too complicated as we added support for new
kinds of markers (TRY/END_TRY).
- Rewrote rethrow instructions' BB arguments to relative depths in EH
pad stack.
Reviewers: dschuff, sunfish
Subscribers: sbc100, jgravelle-google, llvm-commits
Differential Revision: https://reviews.llvm.org/D48273
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@339967
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Chandler Carruth [Thu, 16 Aug 2018 23:11:05 +0000 (23:11 +0000)]
[x86/MIR] Implement support for pre- and post-instruction symbols, as
well as MIR parsing support for `MCSymbol` `MachineOperand`s.
The only real way to test pre- and post-instruction symbol support is to
use them in operands, so I ended up implementing that within the patch
as well. I can split out the operand support if folks really want but it
doesn't really seem worth it.
The functional implementation of pre- and post-instruction symbols is
now *completely trivial*. Two tiny bits of code in the (misnamed)
AsmPrinter. It should be completely target independent as well. We emit
these exactly the same way as we emit basic block labels. Most of the
code here is to give full dumping, MIR printing, and MIR parsing support
so that we can write useful tests.
The MIR parsing of MC symbol operands still isn't 100%, as it forces the
symbols to be non-temporary and non-local symbols with names. However,
those names often can encode most (if not all) of the special semantics
desired, and unnamed symbols seem especially annoying to serialize and
de-serialize. While this isn't perfect or full support, it seems plenty
to write tests that exercise usage of these kinds of operands.
The MIR support for pre-and post-instruction symbols was quite
straightforward. I chose to print them out in an as-if-operand syntax
similar to debug locations as this seemed the cleanest way and let me
use nice introducer tokens rather than inventing more magic punctuation
like we use for memoperands.
However, supporting MIR-based parsing of these symbols caused me to
change the design of the symbol support to allow setting arbitrary
symbols. Without this, I don't see any reasonable way to test things
with MIR.
Differential Revision: https://reviews.llvm.org/D50833
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@339962
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Sanjay Patel [Thu, 16 Aug 2018 22:46:20 +0000 (22:46 +0000)]
[InstCombine] add reflection fold for tan(-x)
This is a follow-up suggested with rL339604.
For tan(), we don't have a corresponding LLVM
intrinsic -- unlike sin/cos -- so this is the
only way/place that we can do this fold currently.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@339958
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Vedant Kumar [Thu, 16 Aug 2018 22:24:47 +0000 (22:24 +0000)]
[InstrProf] Use atomic profile counter updates for TSan
Thread sanitizer instrumentation fails to skip all loads and stores to
profile counters. This can happen if profile counter updates are merged:
%.sink = phi i64* ...
%pgocount5 = load i64, i64* %.sink
%27 = add i64 %pgocount5, 1
%28 = bitcast i64* %.sink to i8*
call void @__tsan_write8(i8* %28)
store i64 %27, i64* %.sink
To suppress TSan diagnostics about racy counter updates, make the
counter updates atomic when TSan is enabled. If there's general interest
in this mode it can be surfaced as a clang/swift driver option.
Testing: check-{llvm,clang,profile}
rdar://
40477803
Differential Revision: https://reviews.llvm.org/D50867
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@339955
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Sanjay Patel [Thu, 16 Aug 2018 22:05:51 +0000 (22:05 +0000)]
[InstCombine] add tests for tan with negated arg; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@339953
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Alina Sbirlea [Thu, 16 Aug 2018 21:58:44 +0000 (21:58 +0000)]
Update MemorySSA in Local utils removing blocks.
Summary: Extend Local utils to update MemorySSA.
Subscribers: sanjoy, jlebar, Prazek, george.burgess.iv, llvm-commits
Differential Revision: https://reviews.llvm.org/D48790
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@339951
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