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Kevin Wolf [Thu, 25 May 2023 12:47:12 +0000 (14:47 +0200)]
iotests: Make verify_virtio_scsi_pci_or_ccw() public
It has no internal callers, so its only use is being called from
individual test cases. If the name starts with an underscore, it is
considered private and linters warn against calling it. 256 only gets
away with it currently because it's on the exception list for linters.
Signed-off-by: Kevin Wolf <kwolf@redhat.com>
Message-Id: <
20230525124713.401149-12-kwolf@redhat.com>
Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
Signed-off-by: Kevin Wolf <kwolf@redhat.com>
Kevin Wolf [Thu, 25 May 2023 12:47:11 +0000 (14:47 +0200)]
block: Fix AioContext locking in bdrv_insert_node()
While calling bdrv_new_open_driver_opts(), the main AioContext lock must
be held, not the lock of the AioContext of the block subtree it will be
added to afterwards.
Signed-off-by: Kevin Wolf <kwolf@redhat.com>
Message-Id: <
20230525124713.401149-11-kwolf@redhat.com>
Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
Signed-off-by: Kevin Wolf <kwolf@redhat.com>
Kevin Wolf [Thu, 25 May 2023 12:47:10 +0000 (14:47 +0200)]
block: Take AioContext lock in bdrv_open_driver()
bdrv_refresh_total_sectors() and bdrv_refresh_limits() expect to be
called under the AioContext lock of the node. Take the lock.
Signed-off-by: Kevin Wolf <kwolf@redhat.com>
Message-Id: <
20230525124713.401149-10-kwolf@redhat.com>
Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
Signed-off-by: Kevin Wolf <kwolf@redhat.com>
Kevin Wolf [Thu, 25 May 2023 12:47:09 +0000 (14:47 +0200)]
copy-before-write: Fix open with child in iothread
The AioContext lock must not be held for bdrv_open_child(), but it is
necessary for the following operations, in particular those using nested
event loops in coroutine wrappers.
Temporarily dropping the main AioContext lock is not necessary because
we know we run in the main thread.
Signed-off-by: Kevin Wolf <kwolf@redhat.com>
Message-Id: <
20230525124713.401149-9-kwolf@redhat.com>
Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
Signed-off-by: Kevin Wolf <kwolf@redhat.com>
Kevin Wolf [Thu, 25 May 2023 12:47:08 +0000 (14:47 +0200)]
raw-format: Fix open with 'file' in iothread
When opening the 'file' child moves bs to an iothread, we need to hold
the AioContext lock of it before we can call raw_apply_options() (and
more specifically, bdrv_getlength() inside of it).
Signed-off-by: Kevin Wolf <kwolf@redhat.com>
Message-Id: <
20230525124713.401149-8-kwolf@redhat.com>
Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
Signed-off-by: Kevin Wolf <kwolf@redhat.com>
Kevin Wolf [Thu, 25 May 2023 12:47:07 +0000 (14:47 +0200)]
qcow2: Fix open with 'file' in iothread
qcow2_open() doesn't work correctly when opening the 'file' child moves
bs to an iothread, for several reasons:
- It uses BDRV_POLL_WHILE() to wait for the qcow2_open_entry()
coroutine, which involves dropping the AioContext lock for bs when it
is not in the main context - but we don't hold it, so this crashes.
- It runs the qcow2_open_entry() coroutine in the current thread instead
of the new AioContext of bs.
- qcow2_open_entry() doesn't notify the main loop when it's done.
This patches fixes these issues around delegating work to a coroutine.
Temporarily dropping the main AioContext lock is not necessary because
we know we run in the main thread.
Signed-off-by: Kevin Wolf <kwolf@redhat.com>
Message-Id: <
20230525124713.401149-7-kwolf@redhat.com>
Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
Signed-off-by: Kevin Wolf <kwolf@redhat.com>
Kevin Wolf [Thu, 25 May 2023 12:47:06 +0000 (14:47 +0200)]
mirror: Hold main AioContext lock for calling bdrv_open_backing_file()
bdrv_open_backing_file() calls bdrv_open_inherit(), so all callers must
hold the main AioContext lock.
Signed-off-by: Kevin Wolf <kwolf@redhat.com>
Message-Id: <
20230525124713.401149-6-kwolf@redhat.com>
Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
Signed-off-by: Kevin Wolf <kwolf@redhat.com>
Kevin Wolf [Thu, 25 May 2023 12:47:05 +0000 (14:47 +0200)]
block-backend: Fix blk_new_open() for iothreads
This fixes blk_new_open() to not assume that bs is in the main context.
In particular, the BlockBackend must be created with the right
AioContext because it will refuse to move to a different context
afterwards. (blk->allow_aio_context_change is false.)
Use this opportunity to use blk_insert_bs() instead of duplicating the
bdrv_root_attach_child() call. This is consistent with what
blk_new_with_bs() does. Add comments to document the locking rules.
Signed-off-by: Kevin Wolf <kwolf@redhat.com>
Message-Id: <
20230525124713.401149-5-kwolf@redhat.com>
Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
Signed-off-by: Kevin Wolf <kwolf@redhat.com>
Kevin Wolf [Thu, 25 May 2023 12:47:04 +0000 (14:47 +0200)]
block: Take main AioContext lock when calling bdrv_open()
The function documentation already says that all callers must hold the
main AioContext lock, but not all of them do. This can cause assertion
failures when functions called by bdrv_open() try to drop the lock. Fix
a few more callers to take the lock before calling bdrv_open().
Signed-off-by: Kevin Wolf <kwolf@redhat.com>
Message-Id: <
20230525124713.401149-4-kwolf@redhat.com>
Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
Signed-off-by: Kevin Wolf <kwolf@redhat.com>
Kevin Wolf [Thu, 25 May 2023 12:47:03 +0000 (14:47 +0200)]
block: Clarify locking rules for bdrv_open(_inherit)()
These functions specify that the caller must hold the "@filename
AioContext lock". This doesn't make sense, file names don't have an
AioContext. New BlockDriverStates always start in the main AioContext,
so this is what we really need here.
Signed-off-by: Kevin Wolf <kwolf@redhat.com>
Message-Id: <
20230525124713.401149-3-kwolf@redhat.com>
Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
Signed-off-by: Kevin Wolf <kwolf@redhat.com>
Kevin Wolf [Thu, 25 May 2023 12:47:02 +0000 (14:47 +0200)]
block-coroutine-wrapper: Take AioContext lock in no_co_wrappers
All of the functions that currently take a BlockDriverState, BdrvChild
or BlockBackend as their first parameter expect the associated
AioContext to be locked when they are called. In the case of
no_co_wrappers, they are called from bottom halves directly in the main
loop, so no other caller can be expected to take the lock for them. This
can result in assertion failures because a lock that isn't taken is
released in nested event loops.
Looking at the first parameter is already done by co_wrappers to decide
where the coroutine should run, so doing the same in no_co_wrappers is
only consistent. Take the lock in the generated bottom halves to fix the
problem.
Signed-off-by: Kevin Wolf <kwolf@redhat.com>
Message-Id: <
20230525124713.401149-2-kwolf@redhat.com>
Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
Signed-off-by: Kevin Wolf <kwolf@redhat.com>
Richard Henderson [Mon, 29 May 2023 21:31:52 +0000 (14:31 -0700)]
Merge tag 'pull-ppc-
20230528' of https://gitlab.com/danielhb/qemu into staging
ppc patch queue for 2023-05-28:
This queue includes several assorted fixes for PowerPC SPR
emulation, a change in the default Pegasos2 CPU, the addition
of AIL mode 3 for spapr, a PIC->CPU interrupt fix for prep and
performance enhancements in fpu_helper.c.
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# gpg: Good signature from "Daniel Henrique Barboza <danielhb413@gmail.com>" [unknown]
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* tag 'pull-ppc-
20230528' of https://gitlab.com/danielhb/qemu:
ppc/pegasos2: Change default CPU to 7457
target/ppc: Add POWER9 DD2.2 model
target/ppc: Merge COMPUTE_CLASS and COMPUTE_FPRF
pnv_lpc: disable reentrancy detection for lpc-hc
target/ppc: Use SMT4 small core chip type in POWER9/10 PVRs
hw/ppc/prep: Fix wiring of PIC -> CPU interrupt
spapr: Add SPAPR_CAP_AIL_MODE_3 for AIL mode 3 support for H_SET_MODE hcall
target/ppc: Alignment faults do not set DSISR in ISA v3.0 onward
target/ppc: Fix width of some 32-bit SPRs
target/ppc: Fix fallback to MFSS for MFFS* instructions on pre 3.0 ISAs
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Richard Henderson [Mon, 29 May 2023 20:15:10 +0000 (13:15 -0700)]
Merge tag 'ui-pull-request' of https://gitlab.com/marcandre.lureau/qemu into staging
UI queue
- virtio: add virtio-multitouch device
- sdl: various keyboard grab fixes
- gtk: enable multi-touch events
- misc fixes
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# gpg: Good signature from "Marc-André Lureau <marcandre.lureau@redhat.com>" [full]
# gpg: aka "Marc-André Lureau <marcandre.lureau@gmail.com>" [full]
* tag 'ui-pull-request' of https://gitlab.com/marcandre.lureau/qemu:
ui/gtk: enable backend to send multi-touch events
ui: add helpers for virtio-multitouch events
virtio-input-pci: add virtio-multitouch-pci
virtio-input: add a virtio-mulitouch device
ui: add the infrastructure to support MT events
virtio-input: generalize virtio_input_key_config()
ui/cursor: make width/height unsigned 16-bit integer
ui/sdl2: disable SDL_HINT_GRAB_KEYBOARD on Windows
ui/sdl2: Grab Alt+F4 also under Windows
ui/sdl2: Grab Alt+Tab also in fullscreen mode
ui/dbus: add a FIXME about texture/dmabuf scanout handling
gtk: add gl-area support on win32
virtio-gpu: add a FIXME for virtio_gpu_load()
win32: wrap socket close() with an exception handler
ui/dbus: fix compilation when GBM && !OPENGL
ui/sdl2: fix surface_gl_update_texture: Assertion 'gls' failed
ui/gtk-egl: fix scaling for cursor position in scanout mode
ui/gtk: use widget size for cursor motion event
ui/gtk: fix passing y0_top parameter to scanout
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
BALATON Zoltan [Sun, 28 May 2023 15:29:37 +0000 (17:29 +0200)]
ppc/pegasos2: Change default CPU to 7457
Previously 7400 was selected as a safe choice as that is used by other
machines so it's better tested but AmigaOS does not know this CPU and
disables some features when running on it. The real hardware has
7447/7457 G4 CPU so change the default to match that now that it was
confirmed to work better with AmigaOS.
Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
Tested-by: Rene Engel <ReneEngel80@emailn.de>
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Message-Id: <
20230528152937.
B8DAD74633D@zero.eik.bme.hu>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Nicholas Piggin [Mon, 15 May 2023 16:02:01 +0000 (02:02 +1000)]
target/ppc: Add POWER9 DD2.2 model
POWER9 DD2.1 and earlier had significant limitations when running KVM,
including lack of "mixed mode" MMU support (ability to run HPT and RPT
mode on threads of the same core), and a translation prefetch issue
which is worked around by disabling "AIL" mode for the guest.
These processors are not widely available, and it's difficult to deal
with all these quirks in qemu +/- KVM, so create a POWER9 DD2.2 CPU
and make it the default POWER9 CPU.
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Reviewed-by: Frederic Barrat <fbarrat@linux.ibm.com>
Reviewed-by: Harsh Prateek Bora <harshpb@linux.ibm.com>
Message-Id: <
20230515160201.394587-1-npiggin@gmail.com>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Sergio Lopez [Fri, 26 May 2023 11:29:25 +0000 (13:29 +0200)]
ui/gtk: enable backend to send multi-touch events
GTK3 provides the infrastructure to receive and process multi-touch
events through the "touch-event" signal and the GdkEventTouch type.
Make use of it to transpose events from the host to the guest.
This allows users of machines with hardware capable of receiving
multi-touch events to run guests that can also receive those events
and interpret them as gestures, when appropriate.
An example of this in action can be seen here:
https://fosstodon.org/@slp/
109545849296546767
Signed-off-by: Sergio Lopez <slp@redhat.com>
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Message-Id: <
20230526112925.38794-7-slp@redhat.com>
Richard Henderson [Tue, 23 May 2023 20:25:07 +0000 (13:25 -0700)]
target/ppc: Merge COMPUTE_CLASS and COMPUTE_FPRF
Instead of computing an artificial "class" bitmask then converting that
to the fprf value, compute the final value from the start.
Reorder the tests to check the most likely cases first.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Tested-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <
20230523202507.688859-1-richard.henderson@linaro.org>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Alexander Bulekov [Fri, 26 May 2023 07:38:50 +0000 (09:38 +0200)]
pnv_lpc: disable reentrancy detection for lpc-hc
As lpc-hc is designed for re-entrant calls from xscom, mark it
re-entrancy safe.
Reported-by: Thomas Huth <thuth@redhat.com>
Signed-off-by: Alexander Bulekov <alxndr@bu.edu>
[clg: mark opb_master_regs as re-entrancy safe also ]
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Frederic Barrat <fbarrat@linux.ibm.com>
Tested-by: Thomas Huth <thuth@redhat.com>
Message-Id: <
20230526073850.
2772197-1-clg@kaod.org>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Nicholas Piggin [Mon, 15 May 2023 16:01:31 +0000 (02:01 +1000)]
target/ppc: Use SMT4 small core chip type in POWER9/10 PVRs
QEMU's PVR value for POWER9 DD2.0 has chip type 1, which is the SMT4
"small core" type that OpenPOWER processors use. QEMU's PVR for all
other POWER9/10 have chip type 0, which "enterprise" systems use.
The difference does not really matter to QEMU (because it does not care
about SMT mode in the target), but for consistency all PVRs should use
the same chip type. We'll go with the SMT4 OpenPOWER type.
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Message-Id: <
20230515160131.394562-1-npiggin@gmail.com>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Bernhard Beschow [Sat, 4 Mar 2023 11:40:41 +0000 (12:40 +0100)]
hw/ppc/prep: Fix wiring of PIC -> CPU interrupt
Commit
cef2e7148e32 ("hw/isa/i82378: Remove intermediate IRQ forwarder")
passes s->cpu_intr to i8259_init() in i82378_realize() directly. However, s-
>cpu_intr isn't initialized yet since that happens after the south bridge's
pci_realize_and_unref() in board code. Fix this by initializing s->cpu_intr
before realizing the south bridge.
Fixes:
cef2e7148e32 ("hw/isa/i82378: Remove intermediate IRQ forwarder")
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Message-Id: <
20230304114043.121024-4-shentey@gmail.com>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Nicholas Piggin [Mon, 15 May 2023 16:02:16 +0000 (02:02 +1000)]
spapr: Add SPAPR_CAP_AIL_MODE_3 for AIL mode 3 support for H_SET_MODE hcall
The behaviour of the Address Translation Mode on Interrupt resource is
not consistently supported by all CPU versions or all KVM versions: KVM
HV does not support mode 2, and does not support mode 3 on POWER7 or
early POWER9 processesors. KVM PR only supports mode 0. TCG supports all
modes (0, 2, 3) on CPUs with support for the corresonding LPCR[AIL] mode.
This leads to inconsistencies in guest behaviour and could cause problems
migrating guests.
This was not noticable for Linux guests for a long time because the
kernel only uses modes 0 and 3, and it used to consider AIL-3 to be
advisory in that it would always keep the AIL-0 vectors around, so it
did not matter whether or not interrupts were delivered according to
the AIL mode. Recent Linux guests depend on AIL mode 3 working as
specified in order to support the SCV facility interrupt. If AIL-3 can
not be provided, then H_SET_MODE must return an error to Linux so it can
disable the SCV facility (failure to do so can lead to userspace being
able to crash the guest kernel).
Add the ail-mode-3 capability to specify that AIL-3 is supported. AIL-0
is implied as the baseline, and AIL-2 is no longer supported by spapr.
AIL-2 is not known to be used by any software, but support in TCG could
be restored with an ail-mode-2 capability quite easily if a regression
is reported.
Modify the H_SET_MODE Address Translation Mode on Interrupt resource
handler to check capabilities and correctly return error if not
supported.
KVM has a cap to advertise support for AIL-3.
Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Message-Id: <
20230515160216.394612-1-npiggin@gmail.com>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Sergio Lopez [Fri, 26 May 2023 11:29:24 +0000 (13:29 +0200)]
ui: add helpers for virtio-multitouch events
Add helpers for generating Multi-touch events from the UI backends that
can be sent to the guest through a virtio-multitouch device.
Signed-off-by: Sergio Lopez <slp@redhat.com>
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Message-Id: <
20230526112925.38794-6-slp@redhat.com>
Sergio Lopez [Fri, 26 May 2023 11:29:23 +0000 (13:29 +0200)]
virtio-input-pci: add virtio-multitouch-pci
Add virtio-multitouch-pci, a Multitouch-capable input device, to the
list of devices that can be provided by virtio-input-pci.
Signed-off-by: Sergio Lopez <slp@redhat.com>
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Message-Id: <
20230526112925.38794-5-slp@redhat.com>
Sergio Lopez [Fri, 26 May 2023 11:29:22 +0000 (13:29 +0200)]
virtio-input: add a virtio-mulitouch device
Add a virtio-multitouch device to the family of devices emulated by
virtio-input implementing the Multi-touch protocol as descripted here:
https://www.kernel.org/doc/html/latest/input/multi-touch-protocol.html?highlight=multi+touch
This patch just add the device itself, without connecting it to any
backends. The following patches will add a PCI-based multitouch device,
some helpers in "ui" and will enable the GTK3 backend to transpose
multi-touch events from the host to the guest.
Signed-off-by: Sergio Lopez <slp@redhat.com>
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Message-Id: <
20230526112925.38794-4-slp@redhat.com>
Sergio Lopez [Fri, 26 May 2023 11:29:21 +0000 (13:29 +0200)]
ui: add the infrastructure to support MT events
Add the required infrastructure to support generating multitouch events.
Signed-off-by: Sergio Lopez <slp@redhat.com>
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Reviewed-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <
20230526112925.38794-3-slp@redhat.com>
Sergio Lopez [Fri, 26 May 2023 11:29:20 +0000 (13:29 +0200)]
virtio-input: generalize virtio_input_key_config()
As there are other bitmap-based config properties that need to be dealt in a
similar fashion as VIRTIO_INPUT_CFG_EV_BITS, generalize the function to
receive select and subsel as arguments, and rename it to
virtio_input_extend_config()
Signed-off-by: Sergio Lopez <slp@redhat.com>
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Message-Id: <
20230526112925.38794-2-slp@redhat.com>
Mauro Matteo Cascella [Tue, 23 May 2023 16:30:23 +0000 (18:30 +0200)]
ui/cursor: make width/height unsigned 16-bit integer
Although not actually exploitable at the moment, a negative width/height
could make datasize wrap around and potentially lead to buffer overflow.
Since there is no reason a negative width/height is ever appropriate,
modify QEMUCursor struct and cursor_alloc prototype to accept uint16_t.
This protects us against accidentally introducing future bugs.
Signed-off-by: Mauro Matteo Cascella <mcascell@redhat.com>
Reported-by: Jacek Halon <jacek.halon@gmail.com>
Reported-by: Yair Mizrahi <yairh33@gmail.com>
Reported-by: Elsayed El-Refa'ei <e.elrefaei99@gmail.com>
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Message-Id: <
20230523163023.608121-1-mcascell@redhat.com>
Volker Rümelin [Tue, 18 Apr 2023 06:28:23 +0000 (08:28 +0200)]
ui/sdl2: disable SDL_HINT_GRAB_KEYBOARD on Windows
Windows sends an extra left control key up/down input event for
every right alt key up/down input event for keyboards with
international layout. Since commit
830473455f ("ui/sdl2: fix
handling of AltGr key on Windows") QEMU uses a Windows low level
keyboard hook procedure to reliably filter out the special left
control key and to grab the keyboard on Windows.
The SDL2 version 2.0.16 introduced its own Windows low level
keyboard hook procedure to grab the keyboard. Windows calls this
callback before the QEMU keyboard hook procedure. This disables
the special left control key filter when the keyboard is grabbed.
To fix the problem, disable the SDL2 Windows low level keyboard
hook procedure.
Reported-by: Bernhard Beschow <shentey@gmail.com>
Signed-off-by: Volker Rümelin <vr_qemu@t-online.de>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Tested-by: Bernhard Beschow <shentey@gmail.com>
Message-Id: <
20230418062823.5683-1-vr_qemu@t-online.de>
Bernhard Beschow [Mon, 17 Apr 2023 19:21:39 +0000 (21:21 +0200)]
ui/sdl2: Grab Alt+F4 also under Windows
SDL doesn't grab Alt+F4 under Windows by default. Pressing Alt+F4 thus closes
the VM immediately without confirmation, possibly leading to data loss. Fix
this by always grabbing Alt+F4 on Windows hosts, too.
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Volker Rümelin <vr_qemu@t-online.de>
Message-Id: <
20230417192139.43263-3-shentey@gmail.com>
Bernhard Beschow [Mon, 17 Apr 2023 19:21:38 +0000 (21:21 +0200)]
ui/sdl2: Grab Alt+Tab also in fullscreen mode
By default, SDL grabs Alt+Tab only in non-fullscreen mode. This causes Alt+Tab
to switch tasks on the host rather than in the VM in fullscreen mode while it
switches tasks in non-fullscreen mode in the VM. Fix this confusing behavior
by grabbing Alt+Tab in fullscreen mode, always causing tasks to be switched in
the VM.
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Volker Rümelin <vr_qemu@t-online.de>
Message-Id: <
20230417192139.43263-2-shentey@gmail.com>
Marc-André Lureau [Mon, 15 May 2023 13:25:36 +0000 (17:25 +0400)]
ui/dbus: add a FIXME about texture/dmabuf scanout handling
Except SDL, display backends seem to fail at handing full scanout
geometry correctly. It would need some test/reproducer to actually check
it. In the meantime, fill some missing fields, and leave a FIXME.
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Message-Id: <
20230515132537.
1026310-1-marcandre.lureau@redhat.com>
Marc-André Lureau [Mon, 15 May 2023 13:25:27 +0000 (17:25 +0400)]
gtk: add gl-area support on win32
On Windows, we don't use the low-level GBM/EGL helpers (no dmabuf etc),
we can turn on GL area support for the rest of rendering.
(fwiw, GDK backend may be either WGL or EGL)
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Tested-by: Bernhard Beschow <shentey@gmail.com>
Message-Id: <
20230515132527.
1026064-1-marcandre.lureau@redhat.com>
Marc-André Lureau [Mon, 15 May 2023 13:25:18 +0000 (17:25 +0400)]
virtio-gpu: add a FIXME for virtio_gpu_load()
It looks like the virtio_gpu_load() does not compute and set the offset,
the same way virtio_gpu_set_scanout() does. This probably results in
incorrect display until the scanout/framebuffer is updated again, I
guess we should fix it, although I haven't checked this yet.
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Message-Id: <
20230515132518.
1025853-1-marcandre.lureau@redhat.com>
Marc-André Lureau [Mon, 15 May 2023 13:24:40 +0000 (17:24 +0400)]
win32: wrap socket close() with an exception handler
Since commit
abe34282 ("win32: avoid mixing SOCKET and file descriptor
space"), we set HANDLE_FLAG_PROTECT_FROM_CLOSE on the socket FD, to
prevent closing the HANDLE with CloseHandle. This raises an exception
which under gdb is fatal, and qemu exits.
Let's catch the expected error instead.
Note: this appears to work, but the mingw64 macro is not well documented
or tested, and it's not obvious how it is meant to be used.
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Message-Id: <
20230515132440.
1025315-1-marcandre.lureau@redhat.com>
Marc-André Lureau [Mon, 15 May 2023 13:23:48 +0000 (17:23 +0400)]
ui/dbus: fix compilation when GBM && !OPENGL
commit
4814d3cbf ("ui/dbus: restrict opengl to gbm-enabled config")
assumes that whenever GBM is available, OpenGL is. This is not always
the case, let's further restrict opengl-related paths and fix some
compilation issues.
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Message-Id: <
20230515132348.
1024663-1-marcandre.lureau@redhat.com>
Marc-André Lureau [Thu, 11 May 2023 07:42:17 +0000 (11:42 +0400)]
ui/sdl2: fix surface_gl_update_texture: Assertion 'gls' failed
Before sdl2_gl_update() is called, sdl2_gl_switch() may decide to
destroy the console window and its associated shaders.
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1644
Fixes:
c84ab0a500a8 ("ui/console: optionally update after gfx switch")
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Tested-by: Bin Meng <bin.meng@windriver.com>
Message-Id: <
20230511074217.
4171842-1-marcandre.lureau@redhat.com>
Erico Nunes [Mon, 20 Mar 2023 16:08:56 +0000 (17:08 +0100)]
ui/gtk-egl: fix scaling for cursor position in scanout mode
vc->gfx.w and vc->gfx.h are not updated appropriately in this code path,
which leads to a different scaling factor for rendering the cursor on
some edge cases (e.g. the focus has left and re-entered the gtk window).
This can be reproduced using vhost-user-gpu with the gtk ui on the x11
backend.
Use the surface dimensions which are already updated accordingly.
Signed-off-by: Erico Nunes <ernunes@redhat.com>
Acked-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Message-Id: <
20230320160856.364319-2-ernunes@redhat.com>
Erico Nunes [Mon, 20 Mar 2023 16:08:55 +0000 (17:08 +0100)]
ui/gtk: use widget size for cursor motion event
The gd_motion_event size has some calculations for the cursor position,
which also take into account things like different size of the
framebuffer compared to the window size.
The use of window size makes things more difficult though, as at least
in the case of Wayland includes the size of ui elements like a menu bar
at the top of the window. This leads to a wrong position calculation by
a few pixels.
Fix it by using the size of the widget, which already returns the size
of the actual space to render the framebuffer.
Signed-off-by: Erico Nunes <ernunes@redhat.com>
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Acked-by: Vivek Kasireddy <vivek.kasireddy@intel.com>
Message-Id: <
20230320160856.364319-1-ernunes@redhat.com>
Erico Nunes [Mon, 20 Feb 2023 17:56:05 +0000 (18:56 +0100)]
ui/gtk: fix passing y0_top parameter to scanout
The dmabuf->y0_top flag is passed to .dpy_gl_scanout_dmabuf(), however
in the gtk ui both implementations dropped it when doing the next
scanout_texture call.
Fixes flipped linux console using vhost-user-gpu with the gtk ui
display.
Signed-off-by: Erico Nunes <ernunes@redhat.com>
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Message-Id: <
20230220175605.43759-1-ernunes@redhat.com>
Nicholas Piggin [Mon, 15 May 2023 09:26:50 +0000 (19:26 +1000)]
target/ppc: Alignment faults do not set DSISR in ISA v3.0 onward
This optional behavior was removed from the ISA in v3.0, see
Summary of Changes preface:
Data Storage Interrupt Status Register for Alignment Interrupt:
Simplifies the Alignment interrupt by remov- ing the Data Storage
Interrupt Status Register (DSISR) from the set of registers modified
by the Alignment interrupt.
Reviewed-by: Fabiano Rosas <farosas@suse.de>
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Message-Id: <
20230515092655.171206-5-npiggin@gmail.com>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Nicholas Piggin [Mon, 15 May 2023 09:26:47 +0000 (19:26 +1000)]
target/ppc: Fix width of some 32-bit SPRs
Some 32-bit SPRs are incorrectly implemented as 64-bits on 64-bit
targets.
This changes VRSAVE, DSISR, HDSISR, DAWRX0, PIDR, LPIDR, DEXCR,
HDEXCR, CTRL, TSCR, MMCRH, and PMC[1-6] from to be 32-bit registers.
This only goes by the 32/64 classification in the architecture, it
does not try to implement finer details of SPR implementation (e.g.,
not all bits implemented as simple read/write storage).
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Reviewed-by: Harsh Prateek Bora <harshpb@linux.ibm.com>
Message-Id: <
20230515092655.171206-2-npiggin@gmail.com>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Richard Purdie [Wed, 10 May 2023 11:19:13 +0000 (12:19 +0100)]
target/ppc: Fix fallback to MFSS for MFFS* instructions on pre 3.0 ISAs
The following commits changed the code such that the fallback to MFSS for MFFSCRN,
MFFSCRNI, MFFSCE and MFFSL on pre 3.0 ISAs was removed and became an illegal instruction:
bf8adfd88b547680aa857c46098f3a1e94373160 - target/ppc: Move mffscrn[i] to decodetree
394c2e2fda70da722f20fb60412d6c0ca4bfaa03 - target/ppc: Move mffsce to decodetree
3e5bce70efe6bd1f684efbb21fd2a316cbf0657e - target/ppc: Move mffsl to decodetree
The hardware will handle them as a MFFS instruction as the code did previously.
This means applications that were segfaulting under qemu when encountering these
instructions which is used in glibc libm functions for example.
The fallback for MFFSCDRN and MFFSCDRNI added in a later patch was also missing.
This patch restores the fallback to MFSS for these instructions on pre 3.0s ISAs
as the hardware decoder would, fixing the segfaulting libm code. It doesn't have
the fallback for 3.0 onwards to match hardware behaviour.
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
Reviewed-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <
20230510111913.
1718734-1-richard.purdie@linuxfoundation.org>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Richard Henderson [Fri, 26 May 2023 21:40:55 +0000 (14:40 -0700)]
Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging
* build system fixes and cleanups
* use subproject() for the dtc and keycodemapdb submodules
* fix virtio memory leak
* update slirp.wrap to latest commit in the master branch
# -----BEGIN PGP SIGNATURE-----
#
# iQFIBAABCAAyFiEE8TM4V0tmI4mGbHaCv/vSX3jHroMFAmRwi6cUHHBib256aW5p
# QHJlZGhhdC5jb20ACgkQv/vSX3jHroO3awf9GsLa0sip+lUsV2JgzZGm2mL7Fo9A
# kBbuehaT+5gI2PGY6Sp1RVdDnf/JS4HkU11TBBVYFpJdDwqerCNcprgOO3Y5Mung
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# =NRBc
# -----END PGP SIGNATURE-----
# gpg: Signature made Fri 26 May 2023 03:36:23 AM PDT
# gpg: using RSA key
F13338574B662389866C7682BFFBD25F78C7AE83
# gpg: issuer "pbonzini@redhat.com"
# gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [undefined]
# gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" [undefined]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1
# Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83
* tag 'for-upstream' of https://gitlab.com/bonzini/qemu:
configure: ignore --make
meson: use subproject for keycodemapdb
meson: use subproject for internal libfdt
meson: simplify logic for -Dfdt
virtio: qmp: fix memory leak
slirp: update wrap to latest master
meson: Add static glib dependency for initrd-stress.img
meson: Remove leftover comment
configure: unset harmful environment variables
Makefile: remove $(TESTS_PYTHON)
tests/vm: fix and simplify HOST_ARCH definition
tests/docker: simplify HOST_ARCH definition
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Richard Henderson [Fri, 26 May 2023 16:25:42 +0000 (09:25 -0700)]
Merge tag 'pull-hex-
20230526' of https://github.com/quic/qemu into staging
Hexagon update
# -----BEGIN PGP SIGNATURE-----
#
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# =vczK
# -----END PGP SIGNATURE-----
# gpg: Signature made Fri 26 May 2023 07:18:12 AM PDT
# gpg: using RSA key
3635C788CE62B91FD4C59AB47B0244FB12DE4422
# gpg: Good signature from "Taylor Simpson (Rock on) <tsimpson@quicinc.com>" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 3635 C788 CE62 B91F D4C5 9AB4 7B02 44FB 12DE 4422
* tag 'pull-hex-
20230526' of https://github.com/quic/qemu:
Hexagon (target/hexagon) Change Hexagon maintainer
Hexagon: fix outdated `hex_new_*` comments
target/hexagon/*.py: clean up used 'toss' and 'numregs' vars
Hexagon (target/hexagon) Fix assignment to tmp registers
Hexagon (tests/tcg/hexagon) Clean up Hexagon check-tcg tests
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Richard Henderson [Fri, 26 May 2023 14:14:23 +0000 (07:14 -0700)]
Merge tag 'pull-loongarch-
20230526' of https://gitlab.com/gaosong/qemu into staging
pull-loongarch-
20230526
# -----BEGIN PGP SIGNATURE-----
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# =yu/e
# -----END PGP SIGNATURE-----
# gpg: Signature made Fri 26 May 2023 02:22:31 AM PDT
# gpg: using RSA key
B8FF1DA0D2FDCB2DA09C6C2C40A2FFF239263EDF
# gpg: Good signature from "Song Gao <m17746591750@163.com>" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: B8FF 1DA0 D2FD CB2D A09C 6C2C 40A2 FFF2 3926 3EDF
* tag 'pull-loongarch-
20230526' of https://gitlab.com/gaosong/qemu:
target/loongarch: Fix the vinsgr2vr/vpickve2gr instructions cause system coredump
target/loongarch: Fix LD/ST{LE/GT} instructions get wrong CSR_ERA and CSR_BADV
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Richard Henderson [Fri, 26 May 2023 14:13:27 +0000 (07:13 -0700)]
Merge tag 'pull-request-2023-05-26' of https://gitlab.com/thuth/qemu into staging
* Use MachineClass->default_nic in more machines to allow running them
without "--nodefaults" in builds that used "--without-default-devices"
* Improve qtests for such builds
* Add up-/downsampling qtest
* Avoid crash if default RAM backend name has been stolen
* Fix reentrant DMA problem in the lsi53c895a device (CVE-2023-0330)
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# -----END PGP SIGNATURE-----
# gpg: Signature made Fri 26 May 2023 02:06:51 AM PDT
# gpg: using RSA key
27B88847EEE0250118F3EAB92ED9D774FE702DB5
# gpg: issuer "thuth@redhat.com"
# gpg: Good signature from "Thomas Huth <th.huth@gmx.de>" [undefined]
# gpg: aka "Thomas Huth <thuth@redhat.com>" [undefined]
# gpg: aka "Thomas Huth <th.huth@posteo.de>" [unknown]
# gpg: aka "Thomas Huth <huth@tuxfamily.org>" [undefined]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 27B8 8847 EEE0 2501 18F3 EAB9 2ED9 D774 FE70 2DB5
* tag 'pull-request-2023-05-26' of https://gitlab.com/thuth/qemu:
hw/scsi/lsi53c895a: Fix reentrancy issues in the LSI controller (CVE-2023-0330)
lsi53c895a: disable reentrancy detection for MMIO region, too
machine: do not crash if default RAM backend name has been stolen
tests/qtest/ac97-test: add up-/downsampling tests
tests/qtest/usb-hcd-ehci-test: Check for EHCI and UHCI HCDs before using them
tests/qtest/rtl8139-test: Check whether the rtl8139 device is available
tests/qtest: Check for virtio-blk before using -cdrom with the arm virt machine
tests/qtest/usb-hcd-uhci-test: Check whether "usb-storage" is available
hw/mips: Use MachineClass->default_nic in the virt machine
hw/arm: Use MachineClass->default_nic in the sbsa-ref machine
hw/xtensa: Use MachineClass->default_nic in the virt machine
hw/loongarch64: Use MachineClass->default_nic in the virt machine
hw/arm: Use MachineClass->default_nic in the virt machine
hw/alpha: Use MachineClass->default_nic in the alpha machine
hw/hppa: Use MachineClass->default_nic in the hppa machine
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Taylor Simpson [Wed, 24 May 2023 16:11:26 +0000 (09:11 -0700)]
Hexagon (target/hexagon) Change Hexagon maintainer
Change Hexagon maintainer from Taylor Simpson to Brian Cain
Put Taylor's gmail address in .mailmap
Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org
Message-Id: <
20230524165355.
3157700-2-tsimpson@quicinc.com>
Matheus Tavares Bernardino [Wed, 24 May 2023 14:41:48 +0000 (11:41 -0300)]
Hexagon: fix outdated `hex_new_*` comments
Some code comments refer to hex_new_value and hex_new_pred_value, which
have been transferred to DisasContext and, in the case of hex_new_value,
should now be accessed through get_result_gpr().
In order to fix this outdated comments and also avoid having to tweak
them whenever we make a variable name change in the future, let's
replace them with pseudocode.
Suggested-by: Taylor Simpson <tsimpson@quicinc.com>
Signed-off-by: Matheus Tavares Bernardino <quic_mathbern@quicinc.com>
Reviewed-by: Taylor Simpson <tsimpson@quicinc.com>
Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
Message-Id: <
8e1689e28dd7b1318369b55127cf47b82ab75921.
1684939078.git.quic_mathbern@quicinc.com>
Matheus Tavares Bernardino [Wed, 24 May 2023 14:41:47 +0000 (11:41 -0300)]
target/hexagon/*.py: clean up used 'toss' and 'numregs' vars
Many Hexagon python scripts call hex_common.get_tagregs(), but only one
call site use the full reg structure given by this function. To make the
code cleaner, let's make get_tagregs() filter out the unused fields
(i.e. 'toss' and 'numregs'), properly removed the unused variables at
the call sites. The hex_common.bad_register() function is also adjusted
to work exclusively with 'regtype' and 'regid' args. For the single call
site that does use toss/numregs, we provide an optional parameter to
get_tagregs() which will restore the old full behavior.
Suggested-by: Taylor Simpson <tsimpson@quicinc.com>
Signed-off-by: Matheus Tavares Bernardino <quic_mathbern@quicinc.com>
Reviewed-by: Taylor Simpson <tsimpson@quicinc.com>
Tested-by: Taylor Simpson <tsimpson@quicinc.com>
Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
Message-Id: <
3ffd4ccb972879f57f499705c624e8eaba7f8b52.
1684939078.git.quic_mathbern@quicinc.com>
Marco Liebel [Mon, 22 May 2023 17:47:08 +0000 (10:47 -0700)]
Hexagon (target/hexagon) Fix assignment to tmp registers
The order in which instructions are generated by gen_insn() influences
assignment to tmp registers. During generation, tmp instructions (e.g.
generate_V6_vassign_tmp) use vreg_src_off() to determine what kind of
register to use as source. If some instruction (e.g.
generate_V6_vmpyowh_64_acc) uses a tmp register but is generated prior
to the corresponding tmp instruction, the vregs_updated_tmp bit map
isn't updated in time.
Exmple:
{ v14.tmp = v16; v25 = v14 } This works properly because
generate_V6_vassign_tmp is generated before generate_V6_vassign
and the bit map is updated.
{ v15:14.tmp = vcombine(v21, v16); v25:24 += vmpyo(v18.w,v14.h) }
This does not work properly because vmpyo is generated before
vcombine and therefore the bit map does not yet know that there's
a tmp register.
The parentheses in the decoding function were in the wrong place.
Moving them to the correct location makes shuffling of .tmp vector
registers work as expected.
Signed-off-by: Marco Liebel <quic_mliebel@quicinc.com>
Reviewed-by: Taylor Simpson <tsimpson@quicinc.com>
Tested-by: Taylor Simpson <tsimpson@quicinc.com>
Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
Reviewed-by: Brian Cain <bcain@quicinc.com>
Message-Id: <
20230522174708.464197-1-quic_mliebel@quicinc.com>
Taylor Simpson [Fri, 19 May 2023 16:05:59 +0000 (09:05 -0700)]
Hexagon (tests/tcg/hexagon) Clean up Hexagon check-tcg tests
Move test infra to header file
check functions (always print line number on error)
USR manipulation
Useful floating point values
Use stdint.h types
Use stdbool.h bool where appropriate
Use trip counts local to for loop
Suggested-by: Anton Johansson <anjo@rev.ng>
Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
Reviewed-by: Anton Johansson <anjo@rev.ng>
Tested-by: Anton Johansson <anjo@rev.ng>
Message-Id: <
20230522174341.
1805460-1-tsimpson@quicinc.com>
Paolo Bonzini [Tue, 7 Jun 2022 10:48:49 +0000 (12:48 +0200)]
configure: ignore --make
Setting the MAKE variable to a GNU Make executable does not really have
any effect: if a non-GNU Make is used, the QEMU Makefile will fail to
parse. Just remove everything related to --make and $make as dead code.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Paolo Bonzini [Thu, 18 May 2023 12:07:22 +0000 (12:07 +0000)]
meson: use subproject for keycodemapdb
By using a subproject, our own meson.build can use variables from
the subproject instead of hard-coded paths. This is also the first step
towards managing downloads with .wrap files instead of submodule.
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Paolo Bonzini [Thu, 18 May 2023 12:07:22 +0000 (12:07 +0000)]
meson: use subproject for internal libfdt
Recent dtc/libfdt can use either Make or meson as the build system.
By using a subproject, our own meson.build can remove the hard
coded list of source files.
This is also the first step towards managing downloads with .wrap
files instead of submodule.
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Paolo Bonzini [Thu, 18 May 2023 15:29:04 +0000 (17:29 +0200)]
meson: simplify logic for -Dfdt
fdt_opt == 'disabled' is going to give an error if libfdt is required
by any target, so catch that immediately. For fdt_opt == 'enabled',
instead, do not check immediately whether the internal libfdt is present.
Instead do the check after ascertaining that libfdt is absent or too old.
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Paolo Bonzini [Mon, 15 May 2023 13:26:04 +0000 (15:26 +0200)]
virtio: qmp: fix memory leak
The VirtioInfoList is already allocated by QAPI_LIST_PREPEND and
need not be allocated by the caller.
Fixes Coverity CID
1508724.
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Paolo Bonzini [Tue, 23 May 2023 07:04:45 +0000 (09:04 +0200)]
slirp: update wrap to latest master
It is recommended to use SSIZE_T for ssize_t on win32, but the commit
that is being used for slirp.wrap uses int. Update to include the fix
as well as the other bugfix commit "ip: Enforce strict aliasing".
Reported-by: Michael Tokarev <mjt@tls.msk.ru>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Fabiano Rosas [Thu, 25 May 2023 21:20:44 +0000 (18:20 -0300)]
meson: Add static glib dependency for initrd-stress.img
We recently moved glib detection code to meson but this changes the
linker command line from -lglib-2.0 to using a path to libglib-2.0.so.
This does not work for static linking, which is used by stress.c:
$ make V=1 tests/migration/initrd-stress.img
cc -m64 -mcx16 -o tests/migration/stress ... -static -Wl,--start-group
/usr/lib64/libglib-2.0.so -Wl,--end-group
...
bin/ld: attempted static link of dynamic object `/usr/lib64/libglib-2.0.so'
Add a specific dependency for stress.c, which is linked statically.
The compiler command line is now:
cc -m64 -mcx16 -o tests/migration/stress ... -static -pthread
-Wl,--start-group -lm /usr/lib64/libpcre.a -lglib-2.0 -Wl,--end-group
Fixes:
fc9a809e0d ("build: move glib detection and workarounds to meson")
Signed-off-by: Fabiano Rosas <farosas@suse.de>
Message-Id: <
20230525212044.30222-3-farosas@suse.de>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Fabiano Rosas [Thu, 25 May 2023 21:20:43 +0000 (18:20 -0300)]
meson: Remove leftover comment
Commit
d2e6f9272d ("fuzz: remove fork-fuzzing scaffolding") removed
the linker script and forgot to remove the comment.
Signed-off-by: Fabiano Rosas <farosas@suse.de>
Message-Id: <
20230525212044.30222-2-farosas@suse.de>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Song Gao [Thu, 25 May 2023 12:00:05 +0000 (20:00 +0800)]
target/loongarch: Fix the vinsgr2vr/vpickve2gr instructions cause system coredump
The vinsgr2vr/vpickve2gr instructions need use get_src/get_dst to get
gpr registers value, not cpu_gpr[]. The $zero register does not
have cpu_gpr[0] allocated.
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1662
Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <
20230525120005.
2223413-1-gaosong@loongson.cn>
Song Gao [Mon, 15 May 2023 13:00:42 +0000 (21:00 +0800)]
target/loongarch: Fix LD/ST{LE/GT} instructions get wrong CSR_ERA and CSR_BADV
1.helper_asrtle_d/helper_asrtgt_d need use GETPC() to get PC;
2 LD/ST{LE/GT} need set CSR_BADV = gpr[rj];
3 ASRTLE.D/ASRTGT.D also write CSR_BADV, but this value is random
and has no reference value.
Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <
20230515130042.
2719712-1-gaosong@loongson.cn>
Paolo Bonzini [Thu, 25 May 2023 15:46:07 +0000 (17:46 +0200)]
configure: unset harmful environment variables
Apart from CLICOLOR_FORCE and GREP_OPTIONS, there are other variables
that are listed in the Autoconf manual. While Autoconf neutralizes them
very early, and assumes it does not (yet) run in a shell that has "unset",
QEMU assumes that the user invoked configure under a POSIX shell, and
therefore can simply use "unset" to clear them.
CDPATH is particularly nasty because it messes up "cd ... && pwd".
Reported-by: Juan Quintela <quintela@redhat.com>
Cc: qemu-stable@nongnu.org
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Paolo Bonzini [Thu, 25 May 2023 09:56:13 +0000 (11:56 +0200)]
Makefile: remove $(TESTS_PYTHON)
It is now the same as $(PYTHON), since the latter always points at pyvenv/bin/python3.
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Paolo Bonzini [Thu, 25 May 2023 09:52:49 +0000 (11:52 +0200)]
tests/vm: fix and simplify HOST_ARCH definition
ARCH is always empty, so just define HOST_ARCH as the result of uname.
The incorrect definition was not being used because the "ifeq" statement
is wrong; replace it with the same idiom based on $(realpath) that the
main Makefile uses.
With this change, vm-build-netbsd in a configured tree will not use
the PYTHONPATH hack.
Reported-by: John Snow <jsnow@redhat.com>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Paolo Bonzini [Thu, 25 May 2023 09:51:45 +0000 (11:51 +0200)]
tests/docker: simplify HOST_ARCH definition
ARCH is always empty, so just define HOST_ARCH as the result of uname.
Acked-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Thomas Huth [Mon, 22 May 2023 09:10:11 +0000 (11:10 +0200)]
hw/scsi/lsi53c895a: Fix reentrancy issues in the LSI controller (CVE-2023-0330)
We cannot use the generic reentrancy guard in the LSI code, so
we have to manually prevent endless reentrancy here. The problematic
lsi_execute_script() function has already a way to detect whether
too many instructions have been executed - we just have to slightly
change the logic here that it also takes into account if the function
has been called too often in a reentrant way.
The code in fuzz-lsi53c895a-test.c has been taken from an earlier
patch by Mauro Matteo Cascella.
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1563
Message-Id: <
20230522091011.
1082574-1-thuth@redhat.com>
Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
Reviewed-by: Alexander Bulekov <alxndr@bu.edu>
Signed-off-by: Thomas Huth <thuth@redhat.com>
Thomas Huth [Tue, 16 May 2023 09:05:56 +0000 (11:05 +0200)]
lsi53c895a: disable reentrancy detection for MMIO region, too
While trying to use a SCSI disk on the LSI controller with an
older version of Fedora (25), I'm getting:
qemu: warning: Blocked re-entrant IO on MemoryRegion: lsi-mmio at addr: 0x34
and the SCSI controller is not usable. Seems like we have to
disable the reentrancy checker for the MMIO region, too, to
get this working again.
The problem could be reproduced it like this:
./qemu-system-x86_64 -accel kvm -m 2G -machine q35 \
-device lsi53c810,id=lsi1 -device scsi-hd,drive=d0 \
-drive if=none,id=d0,file=.../somedisk.qcow2 \
-cdrom Fedora-Everything-netinst-i386-25-1.3.iso
Where somedisk.qcow2 is an image that contains already some partitions
and file systems.
In the boot menu of Fedora, go to
"Troubleshooting" -> "Rescue a Fedora system" -> "3) Skip to shell"
Then check "dmesg | grep -i 53c" for failure messages, and try to mount
a partition from somedisk.qcow2.
Message-Id: <
20230516090556.553813-1-thuth@redhat.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
Igor Mammedov [Mon, 22 May 2023 13:17:17 +0000 (15:17 +0200)]
machine: do not crash if default RAM backend name has been stolen
QEMU aborts when default RAM backend should be used (i.e. no
explicit '-machine memory-backend=' specified) but user
has created an object which 'id' equals to default RAM backend
name used by board.
$QEMU -machine pc \
-object memory-backend-ram,id=pc.ram,size=
4294967296
Actual results:
QEMU 7.2.0 monitor - type 'help' for more information
(qemu) Unexpected error in object_property_try_add() at ../qom/object.c:1239:
qemu-kvm: attempt to add duplicate property 'pc.ram' to object (type 'container')
Aborted (core dumped)
Instead of abort, check for the conflicting 'id' and exit with
an error, suggesting how to remedy the issue.
Buglink: https://bugzilla.redhat.com/show_bug.cgi?id=2207886
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Message-Id: <
20230522131717.
3780533-1-imammedo@redhat.com>
Tested-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Shaoqin Huang <shahuang@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Thomas Huth <thuth@redhat.com>
Volker Rümelin [Sat, 20 May 2023 11:33:13 +0000 (13:33 +0200)]
tests/qtest/ac97-test: add up-/downsampling tests
Test if the audio subsystem can handle extreme up- and down-
sampling ratios like 44100/1 and 1/44100. For some time these
used to trigger QEMU aborts. The test was taken from
https://gitlab.com/qemu-project/qemu/-/issues/71 where it was
used to demonstrate a very different issue.
Suggested-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Signed-off-by: Volker Rümelin <vr_qemu@t-online.de>
Message-Id: <
20230520113313.5177-1-vr_qemu@t-online.de>
Signed-off-by: Thomas Huth <thuth@redhat.com>
Thomas Huth [Thu, 25 May 2023 08:10:16 +0000 (10:10 +0200)]
tests/qtest/usb-hcd-ehci-test: Check for EHCI and UHCI HCDs before using them
The devices might not be available in the binary (e.g. when compiling
with "--without-default-devices"), so we have to check before we can
use them.
Message-Id: <
20230525081016.
1870364-5-thuth@redhat.com>
Reviewed-by: Ani Sinha <anisinha@redhat.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
Thomas Huth [Thu, 25 May 2023 08:10:15 +0000 (10:10 +0200)]
tests/qtest/rtl8139-test: Check whether the rtl8139 device is available
Though we are already using CONFIG_RTL8139_PCI in the meson.build file
for testing whether the rtl8139 device is available or not, this is not
enough: The CONFIG switch might have been selected by another target
(e.g. the mips fuloong2e machine has the rtl8139 chip soldered on the
board), so CONFIG_RTL8139_PCI ends up in config_all_devices and the
test then gets executed on x86. We need an additional run-time check
to be on the safe side to make this test also work when configure has
been run with "--without-default-devices".
Message-Id: <
20230525081016.
1870364-4-thuth@redhat.com>
Reviewed-by: Fabiano Rosas <farosas@suse.de>
Signed-off-by: Thomas Huth <thuth@redhat.com>
Thomas Huth [Thu, 25 May 2023 08:10:14 +0000 (10:10 +0200)]
tests/qtest: Check for virtio-blk before using -cdrom with the arm virt machine
The arm "virt" machine needs "virtio-blk-pci" for devices that get attached
via the "-cdrom" option. Since this is an optional device that might not
be available in the binary, we should check for the availability of this
device first before using it.
Message-Id: <
20230525081016.
1870364-3-thuth@redhat.com>
Reviewed-by: Fabiano Rosas <farosas@suse.de>
Signed-off-by: Thomas Huth <thuth@redhat.com>
Thomas Huth [Thu, 25 May 2023 08:10:13 +0000 (10:10 +0200)]
tests/qtest/usb-hcd-uhci-test: Check whether "usb-storage" is available
The "usb-storage" device might not have been compiled into the binary
(e.g. when compiling with "--without-default-devices"), so we have to
check first before using it.
Message-Id: <
20230525081016.
1870364-2-thuth@redhat.com>
Reviewed-by: Ani Sinha <anisinha@redhat.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
Philippe Mathieu-Daudé [Wed, 24 May 2023 12:25:59 +0000 (14:25 +0200)]
hw/mips: Use MachineClass->default_nic in the virt machine
Mark the default NIC via the new MachineClass->default_nic setting
so that the machine-defaults code in vl.c can decide whether the
default NIC is usable or not (for example when compiling with the
"--without-default-devices" configure switch).
Inspired-by: Thomas Huth <thuth@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <
20230524122559.28863-1-philmd@linaro.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
Thomas Huth [Tue, 23 May 2023 14:41:56 +0000 (16:41 +0200)]
hw/arm: Use MachineClass->default_nic in the sbsa-ref machine
Mark the default NIC via the new MachineClass->default_nic setting
so that the machine-defaults code in vl.c can decide whether the
default NIC is usable or not (for example when compiling with the
"--without-default-devices" configure switch).
Message-Id: <
20230524082037.
1620952-1-thuth@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Tested-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
Signed-off-by: Thomas Huth <thuth@redhat.com>
Thomas Huth [Tue, 23 May 2023 11:04:35 +0000 (13:04 +0200)]
hw/xtensa: Use MachineClass->default_nic in the virt machine
Mark the default NIC via the new MachineClass->default_nic setting
so that the machine-defaults code in vl.c can decide whether the
default NIC is usable or not (for example when compiling with the
"--without-default-devices" configure switch).
Message-Id: <
20230523110435.
1375774-6-thuth@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Thomas Huth <thuth@redhat.com>
Thomas Huth [Tue, 23 May 2023 11:04:34 +0000 (13:04 +0200)]
hw/loongarch64: Use MachineClass->default_nic in the virt machine
Mark the default NIC via the new MachineClass->default_nic setting
so that the machine-defaults code in vl.c can decide whether the
default NIC is usable or not (for example when compiling with the
"--without-default-devices" configure switch).
Message-Id: <
20230523110435.
1375774-5-thuth@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Song Gao <gaosong@loongson.cn>
Tested-by: Song Gao <gaosong@loongson.cn>
Signed-off-by: Thomas Huth <thuth@redhat.com>
Thomas Huth [Tue, 23 May 2023 11:04:33 +0000 (13:04 +0200)]
hw/arm: Use MachineClass->default_nic in the virt machine
Mark the default NIC via the new MachineClass->default_nic setting
so that the machine-defaults code in vl.c can decide whether the
default NIC is usable or not (for example when compiling with the
"--without-default-devices" configure switch).
Message-Id: <
20230523110435.
1375774-4-thuth@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Thomas Huth <thuth@redhat.com>
Thomas Huth [Tue, 23 May 2023 11:04:32 +0000 (13:04 +0200)]
hw/alpha: Use MachineClass->default_nic in the alpha machine
Mark the default NIC via the new MachineClass->default_nic setting
so that the machine-defaults code in vl.c can decide whether the
default NIC is usable or not (for example when compiling with the
"--without-default-devices" configure switch).
Message-Id: <
20230523110435.
1375774-3-thuth@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Thomas Huth <thuth@redhat.com>
Thomas Huth [Tue, 23 May 2023 11:04:31 +0000 (13:04 +0200)]
hw/hppa: Use MachineClass->default_nic in the hppa machine
Mark the default NIC via the new MachineClass->default_nic setting
so that the machine-defaults code in vl.c can decide whether the
default NIC is usable or not (for example when compiling with the
"--without-default-devices" configure switch).
Message-Id: <
20230523110435.
1375774-2-thuth@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Thomas Huth <thuth@redhat.com>
Richard Henderson [Thu, 25 May 2023 18:11:52 +0000 (11:11 -0700)]
Merge tag 'pull-tcg-
20230525' of https://gitlab.com/rth7680/qemu into staging
tcg/mips:
- Constant formation improvements
- Replace MIPS_BE with HOST_BIG_ENDIAN
- General cleanups
tcg/riscv:
- Improve setcond
- Support movcond
- Support Zbb, Zba
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* tag 'pull-tcg-
20230525' of https://gitlab.com/rth7680/qemu: (23 commits)
tcg/riscv: Support CTZ, CLZ from Zbb
tcg/riscv: Implement movcond
tcg/riscv: Improve setcond expansion
tcg/riscv: Support CPOP from Zbb
tcg/riscv: Support REV8 from Zbb
tcg/riscv: Support rotates from Zbb
tcg/riscv: Use ADD.UW for guest address generation
tcg/riscv: Support ADD.UW, SEXT.B, SEXT.H, ZEXT.H from Zba+Zbb
tcg/riscv: Support ANDN, ORN, XNOR from Zbb
tcg/riscv: Probe for Zba, Zbb, Zicond extensions
disas/riscv: Decode czero.{eqz,nez}
tcg/mips: Replace MIPS_BE with HOST_BIG_ENDIAN
tcg/mips: Use qemu_build_not_reached for LO/HI_OFF
tcg/mips: Try three insns with shift and add in tcg_out_movi
tcg/mips: Try tb-relative addresses in tcg_out_movi
tcg/mips: Aggressively use the constant pool for n64 calls
tcg/mips: Use the constant pool for 64-bit constants
tcg/mips: Split out tcg_out_movi_two
tcg/mips: Split out tcg_out_movi_one
tcg/mips: Create and use TCG_REG_TB
...
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Richard Henderson [Thu, 25 May 2023 15:36:10 +0000 (08:36 -0700)]
Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging
* hot-unplug fixes for ioport
* purge qatomic_mb_read/set from monitor
* build system fixes
* OHCI fix from gitlab
* provide EPYC-Rome CPU model not susceptible to XSAVES erratum
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# -----END PGP SIGNATURE-----
# gpg: Signature made Thu 25 May 2023 01:21:37 AM PDT
# gpg: using RSA key
F13338574B662389866C7682BFFBD25F78C7AE83
# gpg: issuer "pbonzini@redhat.com"
# gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [undefined]
# gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" [undefined]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1
# Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83
* tag 'for-upstream' of https://gitlab.com/bonzini/qemu:
monitor: do not use mb_read/mb_set
monitor: extract request dequeuing to a new function
monitor: introduce qmp_dispatcher_co_wake
monitor: cleanup fetching of QMP requests
monitor: cleanup detection of qmp_dispatcher_co shutting down
monitor: do not use mb_read/mb_set for suspend_cnt
monitor: add more *_locked() functions
monitor: allow calling monitor_resume under mon_lock
monitor: use QEMU_LOCK_GUARD a bit more
softmmu/ioport.c: make MemoryRegionPortioList owner of portio_list MemoryRegions
softmmu/ioport.c: QOMify MemoryRegionPortioList
softmmu/ioport.c: allocate MemoryRegionPortioList ports on the heap
usb/ohci: Set pad to 0 after frame update
meson: move -no-pie from linker to compiler
meson: fix rule for qemu-ga installer
meson.build: Fix glib -Wno-unused-function workaround
target/i386: EPYC-Rome model without XSAVES
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Richard Henderson [Wed, 26 Apr 2023 13:21:55 +0000 (14:21 +0100)]
tcg/riscv: Support CTZ, CLZ from Zbb
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Richard Henderson [Wed, 26 Apr 2023 10:59:55 +0000 (11:59 +0100)]
tcg/riscv: Implement movcond
Implement with and without Zicond. Without Zicond, we were letting
the middle-end expand to a 5 insn sequence; better to use a branch
over a single insn.
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Richard Henderson [Wed, 26 Apr 2023 08:38:32 +0000 (09:38 +0100)]
tcg/riscv: Improve setcond expansion
Split out a helper function, tcg_out_setcond_int, which does not
always produce the complete boolean result, but returns a set of
flags to do so.
Based on
21af16198425, the same improvement for loongarch64.
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Richard Henderson [Wed, 26 Apr 2023 08:16:11 +0000 (09:16 +0100)]
tcg/riscv: Support CPOP from Zbb
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Richard Henderson [Tue, 25 Apr 2023 16:04:53 +0000 (17:04 +0100)]
tcg/riscv: Support REV8 from Zbb
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Richard Henderson [Tue, 25 Apr 2023 15:34:07 +0000 (16:34 +0100)]
tcg/riscv: Support rotates from Zbb
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Richard Henderson [Tue, 25 Apr 2023 15:19:44 +0000 (16:19 +0100)]
tcg/riscv: Use ADD.UW for guest address generation
The instruction is a combined zero-extend and add.
Use it for exactly that.
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Richard Henderson [Tue, 25 Apr 2023 15:04:16 +0000 (16:04 +0100)]
tcg/riscv: Support ADD.UW, SEXT.B, SEXT.H, ZEXT.H from Zba+Zbb
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Richard Henderson [Tue, 25 Apr 2023 14:47:34 +0000 (15:47 +0100)]
tcg/riscv: Support ANDN, ORN, XNOR from Zbb
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Richard Henderson [Tue, 25 Apr 2023 14:29:03 +0000 (15:29 +0100)]
tcg/riscv: Probe for Zba, Zbb, Zicond extensions
Define a useful subset of the extensions. Probe for them
via compiler pre-processor feature macros and SIGILL.
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Richard Henderson [Wed, 26 Apr 2023 12:33:05 +0000 (13:33 +0100)]
disas/riscv: Decode czero.{eqz,nez}
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Richard Henderson [Wed, 17 May 2023 13:56:44 +0000 (06:56 -0700)]
tcg/mips: Replace MIPS_BE with HOST_BIG_ENDIAN
Since
e03b56863d2b, which replaced HOST_WORDS_BIGENDIAN
with HOST_BIG_ENDIAN, there is no need to define a second
symbol which is [0,1].
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Richard Henderson [Mon, 28 Nov 2022 20:31:56 +0000 (12:31 -0800)]
tcg/mips: Use qemu_build_not_reached for LO/HI_OFF
The new(ish) macro produces a compile-time error instead
of a link-time error.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Richard Henderson [Fri, 6 Aug 2021 21:18:25 +0000 (11:18 -1000)]
tcg/mips: Try three insns with shift and add in tcg_out_movi
These sequences are inexpensive to test. Maxing out at three insns
results in the same space as a load plus the constant pool entry.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Richard Henderson [Fri, 6 Aug 2021 21:30:35 +0000 (11:30 -1000)]
tcg/mips: Try tb-relative addresses in tcg_out_movi
These addresses are often loaded by the qemu_ld/st slow path,
for loading the retaddr value.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Richard Henderson [Fri, 6 Aug 2021 23:17:20 +0000 (13:17 -1000)]
tcg/mips: Aggressively use the constant pool for n64 calls
Repeated calls to a single helper are common -- especially
the ones for softmmu memory access. Prefer the constant pool
to longer sequences to increase sharing.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Richard Henderson [Fri, 6 Aug 2021 23:07:41 +0000 (13:07 -1000)]
tcg/mips: Use the constant pool for 64-bit constants
During normal processing, the constant pool is accessible via
TCG_REG_TB. During the prologue, it is accessible via TCG_REG_T9.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Richard Henderson [Fri, 6 Aug 2021 22:14:53 +0000 (12:14 -1000)]
tcg/mips: Split out tcg_out_movi_two
Emit all 32-bit signed constants, which can be loaded in two insns.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>