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Damien Lespiau [Tue, 29 Jul 2014 17:06:21 +0000 (18:06 +0100)]
drm/i915: Fix stale comment for intel_ddi_pll_select()
Since the run-time PM on DPMS series, this function has an outdated
comment. Refresh it a bit.
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Damien Lespiau [Tue, 29 Jul 2014 17:06:20 +0000 (18:06 +0100)]
drm/i915: Restrict hsw_dp_set_ddi_pll_sel() to HSW/BDW
Future platform will use config->ddi_pll_sel in a different way.
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Damien Lespiau [Tue, 29 Jul 2014 17:06:19 +0000 (18:06 +0100)]
drm/i915: Extract the HSW/BDW shared dpll init code
So we can easily provide an alternate implementation in the future.
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Damien Lespiau [Tue, 29 Jul 2014 17:06:18 +0000 (18:06 +0100)]
drm/i915: Extract the HSW DDI selection code into its own function
Future platform will slightly change that.
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Damien Lespiau [Tue, 29 Jul 2014 17:06:17 +0000 (18:06 +0100)]
drm/i915: Add a space to the shared DPLL debug message
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Damien Lespiau [Tue, 29 Jul 2014 17:06:16 +0000 (18:06 +0100)]
drm/i915: Specify when the PLL hw state fields are valid
Not all those fields are valid on a given platform. Make it explicit.
Unions could also be used, but were cluttering some code paths with
if/else ladders.
v2: Don't use anonymous unions (Daniel)
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Ville Syrjälä [Fri, 27 Jun 2014 23:04:25 +0000 (02:04 +0300)]
drm/i915: Add DP training pattern 3 for CHV
CHV supports DP training pattern 3. Add the required stuff.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Ville Syrjälä [Fri, 27 Jun 2014 23:04:18 +0000 (02:04 +0300)]
drm/i915: Split a few long debug prints
Split some WM debug prints to multiple lines. This shouldn't hurt
grappability since the important part is at the start and the rest
is just repeated stuff for each pipe.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Rafael Barbalho [Mon, 28 Jul 2014 18:56:27 +0000 (19:56 +0100)]
drm/i915: Fix read back of plane stride register
According to the specifications bit 6 is actually valid in the stride register.
Cc: Jesse Barnes <jbarnes@virtuousgeek.org>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Rafael Barbalho <rafael.barbalho@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Ville Syrjälä [Fri, 27 Jun 2014 23:04:13 +0000 (02:04 +0300)]
drm/i915: Add chv port D TX wells
Add the TX wells for port D. The Punit subsystem numbers are a total
guess at this time. Also I'm not sure these even exist. Certainly the
Punit in current hardware doesn't deal with these.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Ville Syrjälä [Fri, 27 Jun 2014 23:04:12 +0000 (02:04 +0300)]
drm/i915: Add chv port B and C TX wells
Add the TX wells for ports B and C just like on VLV.
Again Punit doesn't seem ready (or the wells don't even exist anymore)
so leave it iffed out.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Ville Syrjälä [Fri, 27 Jun 2014 23:04:11 +0000 (02:04 +0300)]
drm/i915: Add per-pipe power wells for chv
CHV has a power well for each pipe. Add the code to deal with them.
The Punit in current hardware doesn't seem ready for this yet, so
leave it iffed out.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Ville Syrjälä [Fri, 27 Jun 2014 23:04:10 +0000 (02:04 +0300)]
drm/i915: Add disp2d power well for chv
Not sure if it's still there since chv has per-pipe power wells.
At least with current Punit this doesn't work. Also the display
irq handling would need to be adjusted for pipe C. So leave the
code iffed out for now.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Ville Syrjälä [Fri, 27 Jun 2014 23:04:09 +0000 (02:04 +0300)]
drm/i915: Kill intel_reset_dpio()
Both VLV and CHV handle the cmnreset stuff in the power well code now,
so intel_reset_dpio() is no longer needed.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Ville Syrjälä [Fri, 27 Jun 2014 23:04:08 +0000 (02:04 +0300)]
drm/i915: Add chv cmnlane power wells
CHV has two display PHYs so there are also two cmnlane power wells. Add
the approriate code to power the wells up/down.
Like on VLV we do the cmnreset assert/deassert and the DPLL refclock
enabling at approriate times.
This code actually works on my bsw.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Ville Syrjälä [Fri, 27 Jun 2014 23:04:07 +0000 (02:04 +0300)]
drm/i915: Add chv_power_wells[]
Add chv_power_wells[] so we can start to build up the power well support
for chv. Just the "always on" well there initialy.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Tested-by: Rafael Barbalho <rafael.barbalho@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Ville Syrjälä [Thu, 22 May 2014 16:00:50 +0000 (19:00 +0300)]
drm/i915: Kill intel_crtc->vbl_wait
Share the waitqueue that drm_irq uses when performing the vblank evade
trick for atomic pipe updates.
v2: Keep intel_pipe_handle_vblank() (Chris)
Suggested-by: Daniel Vetter <daniel@ffwll.ch>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Ville Syrjälä [Thu, 22 May 2014 16:36:03 +0000 (19:36 +0300)]
drm: Add drm_crtc_vblank_waitqueue()
Add a small static inline helper to grab the vblank wait queue based on
the drm_crtc.
This is useful for drivers to do internal vblank waits using
wait_event() & co.
v2: Pimp commit message (Daniel)
Add kernel doc (Daniel)
Suggested-by: Daniel Vetter <daniel@ffwll.ch>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Vandana Kannan [Tue, 5 Aug 2014 14:51:23 +0000 (07:51 -0700)]
drm/i915: State readout and cross-checking for dp_m2_n2
Adding relevant read out comparison code, in check_crtc_state, for the new
member of crtc_config, dp_m2_n2, which was introduced to store link_m_n
values for a DP downclock mode (if available). Suggested by Daniel.
v2: Changed patch title.
Daniel's review comments incorporated.
Added relevant state readout code for M2_N2. dp_m2_n2 comparison to be done
only when high RR is not in use (This is because alternate m_n register
programming will be done only when low RR is being used).
v3: Modified call to get_m2_n2 which had dp_m_n as param by mistake.
Compare dp_m_n and dp_m2_n2 for gen 7 and below. compare the structures
based on DRRS state for gen 8 and above.
Save and restore M2 N2 registers for gen 7 and below
v4: For Gen>=8, check M_N registers against dp_m_n and dp_m2_n2 as there is
only one set of M_N registers
v5: Removed the chunk which saves and restores M2_N2 registers. Modified
get_m_n() to get M2_N2 registers as well. Modified the macro which compares
hw.dp_m_n against sw.dp_m2_n2/sw.dp_m_n for gen > 8.
v6: Added check to compare dp_m2_n2 only when DRRS is enabled
v7: Modified drrs check to use has_drrs
v8: Add has_drrs check before reading M2_N2 registers
Signed-off-by: Vandana Kannan <vandana.kannan@intel.com>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Cc: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Vandana Kannan [Tue, 5 Aug 2014 14:51:22 +0000 (07:51 -0700)]
drm/i915: Set M2_N2 registers during mode set
For Gen < 8, set M2_N2 registers on every mode set. This is required to make
sure M2_N2 registers are set during boot, resume from sleep for cross-
checking the state. The register is set only if DRRS is supported.
v2: Patch rebased
v3: Daniel's review comments
- Removed HAS_DRRS(dev) and added bool has_drrs to pipe_config to
track drrs support
v4: Jesse's review comments
- Made changes to set m2_n2 in intel_dp_set_m_n()
Signed-off-by: Vandana Kannan <vandana.kannan@intel.com>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Cc: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Rodrigo Vivi [Mon, 4 Aug 2014 18:15:19 +0000 (11:15 -0700)]
Revert "drm/i915: Enable semaphores on BDW"
This reverts commit
521e62e49a42661a4ee0102644517dbe2f100a23.
Although POST_SYNC brought a bit of stability to Semaphores on BDW
it didn't solved all issues and some hungs can still occour when
semaphores are enabled on BDW. Also some sloweness can be found on some
igt tests, althoguth it apparently doesn't affect real workloads.
Besides that, no real performance gain was found on our tests with different
and even multiple workloads.
Let's disable it again for now. At least until we are sure it is safe
to re-enable it.
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Jiri Kosina [Thu, 7 Aug 2014 14:29:53 +0000 (16:29 +0200)]
drm/i915: read HEAD register back in init_ring_common() to enforce ordering
Withtout this, ring initialization fails reliabily during resume with
[drm:init_ring_common] *ERROR* render ring initialization failed ctl
0001f001 head
ffffff8804 tail
00000000 start
000e4000
This is not a complete fix, but it is verified to make the ring
initialization failures during resume much less likely.
We were not able to root-cause this bug (likely HW-specific to Gen4 chips)
yet. This is therefore used as a ducttape before problem is fully
understood and proper fix created, so that people don't suffer from
completely unusable systems in the meantime.
The discussion and debugging is happening at
https://bugs.freedesktop.org/show_bug.cgi?id=76554
Signed-off-by: Jiri Kosina <jkosina@suse.cz>
Cc: stable@vger.kernel.org
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Rafael Barbalho [Thu, 24 Jul 2014 14:16:12 +0000 (15:16 +0100)]
drm/i915: Fix crash when failing to parse MIPI VBT
This particular nasty presented itself while trying to register the
intelfb device (intel_fbdev.c). During the process of registering the device
the driver will disable the crtc via i9xx_crtc_disable. These will
also disable the panel using the generic mipi panel functions in
dsi_mod_vbt_generic.c. The stale MIPI generic data sequence pointers would
cause a crash within those functions. However, all of this is happening
while console_lock is held from do_register_framebuffer inside fbcon.c. Which
means that you got kernel log and just the device appearing to reboot/hang for
no apparent reason.
The fault started from the FB_EVENT_FB_REGISTERED event using the
fb_notifier_call_chain call in fbcon.c.
This regression has been introduced in
commit
d3b542fcfc72d7724585e3fd2c5e75351bc3df47
Author: Shobhit Kumar <shobhit.kumar@intel.com>
Date: Mon Apr 14 11:00:34 2014 +0530
drm/i915: Add parsing support for new MIPI blocks in VBT
Cc: Shobhit Kumar <shobhit.kumar@intel.com>
Signed-off-by: Rafael Barbalho <rafael.barbalho@intel.com>
Reviewed-by: Shobhit Kumar <shobhit.kumar@intel.com>
[danvet: Add regression citation.]
Cc: stable@vger.kernel.org
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Deepak S [Tue, 5 Aug 2014 14:51:20 +0000 (07:51 -0700)]
drm/i915: Bring GPU Freq to min while suspending.
We might be leaving the PGU Frequency (and thus vnn) high during the suspend.
Flusing the delayed work queue should take care of this.
Signed-off-by: Deepak S <deepak.s@linux.intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Rodrigo Vivi [Tue, 5 Aug 2014 17:07:13 +0000 (10:07 -0700)]
drm/i915: Fix DEIER and GTIER collecting for BDW.
BDW has many other Display Engine interrupts and GT interrupts registers.
Collecting it properly on gpu_error_state.
On debugfs all was properly listed already but besides we were also listing old
DEIER and GTIER that doesn't exist on BDW anymore. This was causing
unclaimed register messages
v2: Fix small issues of first version and don't read DEIER regs when pipe's
power well is disabled
v3: bikeshed accepted: use enum pipe pipe instead of int i for pipe interection
v4: Ben notice previous version was checking for display_power_enabled without
using propper locks. Using _unlocked version isn't reliable and we cannot
get this registers when power well is off. So let's avoid getting all DE_IER
per pipe for now. If someone think this is an useful information it can be
added later.
v5: Ben: put back debugfs stuff that might be coverred by pm_get and use
gen >= 8 trying to predict future.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=81701
Cc: Ben Widawsky <ben@bwidawsk.net>
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: (v3) Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Mika Kuoppala [Tue, 5 Aug 2014 14:16:26 +0000 (17:16 +0300)]
drm/i915: Don't accumulate hangcheck score on forward progress
If the actual head has progressed forward inside a batch (request),
don't accumulate hangcheck score.
As the hangcheck score in increased only by acthd jumping backwards,
the result is that we only declare an active batch as stuck if it is
trapped inside a loop. Or that the looping will dominate the batch
progression so that it overcomes the bonus that forward progress gives.
v2: Improved commit message (Chris Wilson)
Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com>
[danvet: s/active_loop/active (loop)/ as requested by Chris.]
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Kenneth Graunke [Mon, 27 Jan 2014 22:20:16 +0000 (14:20 -0800)]
drm/i915: Add the WaCsStallBeforeStateCacheInvalidate:bdw workaround.
On Broadwell, any PIPE_CONTROL with the "State Cache Invalidate" bit set
must be preceded by a PIPE_CONTROL with the "CS Stall" bit set.
Documented on the BSpec 3D workarounds page.
Reviewed-by: Rafael Barbalho <rafael.barbalho@intel.com>
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
[vsyrjala: add chv w/a note too]
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Kenneth Graunke [Fri, 27 Jun 2014 23:04:20 +0000 (02:04 +0300)]
drm/i915: Refactor Broadwell PIPE_CONTROL emission into a helper.
We'll want to reuse this for a workaround.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
[danvet: Rmove now unused int.]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Ville Syrjälä [Fri, 27 Jun 2014 21:40:34 +0000 (00:40 +0300)]
drm/i915: Fix threshold for choosing 32 vs. 64 precisions for VLV DDL values
The DDL registers can hold 7bit numbers. Make the most of those seven
bits by adjusting the threshold where we switch between the 64 vs. 32
precision multipliers.
Also we compute 'entries' to make the decision about precision, and then
we recompute the same value to calculate the actual drain latency. Just
use the already calculate 'entries' there.
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Zhenyu Wang [Thu, 27 Feb 2014 22:50:06 +0000 (06:50 +0800)]
drm/i915: Fix drain latency precision multipler for VLV
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Rodrigo Vivi [Fri, 1 Aug 2014 16:12:27 +0000 (09:12 -0700)]
drm/i915: Collect gtier properly on HSW.
GTIER and DEIER doesn't have same interface on HSW so this "or" operation
makes the information provided useless.
v2: since we have gtier variable already let's split for everybody
and avoid the strange | op.
Also avoid overriding the value that was set for vlv. In this case I
believe that we should reorganize the whole function, but I'll respect
the comment that ask to not touch the order and let this organization
work to be done later.
v3: moving VLV check to the right place.
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Daniel Vetter [Mon, 4 Aug 2014 09:17:25 +0000 (11:17 +0200)]
drm/i915: Tune down MCH_SSKPD values warning
Users often can't do anything about this since their vendors stopped
providing BIOS updates. Also we seem to be able to hack around it
with increased latency values, and thus far the only reports have
been for screens with really high resolutions. So tune it down to a
level where only developers can see it.
Also drop some of the end-user fluff.
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Daniel Vetter [Mon, 4 Aug 2014 09:15:56 +0000 (11:15 +0200)]
drm/i915: Tune done rc6 enabling output
Power users spot this and then get adventurous and try to adjust
module driver options. Nothing good ever came out of that, so
hide it better.
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Daniel Vetter [Mon, 4 Aug 2014 08:45:00 +0000 (10:45 +0200)]
drm/i915: Don't require dev->struct_mutex in psr_match_conditions
Since I've reworked psr support to no longer require x-tiling we don't
check any state protected by the Giant GEM Lock. So drop that check.
Also boo for lockdep_assert_held for not yelling when lockdep is
disabled.
Cc: Paulo Zanoni <przanoni@gmail.com>
Reported-by: Paulo Zanoni <przanoni@gmail.com>
Acked-by: Paulo Zanoni <przanoni@gmail.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Rodrigo Vivi [Fri, 1 Aug 2014 11:51:30 +0000 (04:51 -0700)]
drm/i915: Fix error state collecting
Fix signal_offset when recording semaphore state on BDW.
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Imre Deak [Thu, 31 Jul 2014 11:03:36 +0000 (14:03 +0300)]
drm/i915: fix VDD state tracking after system resume
Just like during booting the BIOS can leave the VDD bit enabled after
system resume. So apply the same state sanitization there too. This
fixes a problem where after resume the port power domain refcount gets
unbalanced.
v2:
- unchanged
v3:
- call edp sanitizing from the encoder reset handler (Daniel)
Reported-and-tested-by: Jarkko Nikula <jarkko.nikula@linux.intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Shobhit Kumar [Wed, 30 Jul 2014 15:02:37 +0000 (20:32 +0530)]
drm/i915: Add correct hw/sw config check for DSI encoder
Check in vlv_crtc_clock_get if DPLL is enabled before calling dpio read.
It will not be enabled for DSI and avoid dpio read WARN dumps.
Absence of ->get_config was causing other WARN dumps as well. Update
dpll_hw_state as well correctly
v2: Address review comments by Daniel
- Check if DPLL is enabled rather than checking pipe output type
- set adjusted_mode->flags to 0 in compute_config rather than using
pipe_config->quirks
- Add helper function in intel_dsi_pll.c and use that in intel_dsi.c
- updated dpll_hw_state correctly
- Updated commit message and title
v3: Address review comments by Imre
- Proper masking of P1, M1 fields while computing divisors
- assert in case of bpp mismatch
- guard for divide by 0 while computing pclk
- Use ARRAY_SIZE instead of direct calculation
Signed-off-by: Shobhit Kumar <shobhit.kumar@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Imre Deak [Wed, 30 Jul 2014 12:57:31 +0000 (15:57 +0300)]
drm/i915: factor out intel_edp_panel_vdd_sanitize
This will be needed by an upcoming patch too that needs to sanitize the
VDD state during resume. The additional async disabling is only needed
for the resume path, here it doesn't make a difference since we enable
VDD right after the sanitize call.
v2:
- don't set intel_dp ptr for non-eDP encoders (Ville)
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Shobhit Kumar [Sat, 12 Jul 2014 11:47:22 +0000 (17:17 +0530)]
drm/i915: wait for all DSI FIFOs to be empty
Ensure that the DSI packets for a particular sequence are completely
sent before going ahead in the enabling or disabling of the panel
Signed-off-by: Shobhit Kumar <shobhit.kumar@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Pavel Machek [Mon, 28 Jul 2014 11:20:58 +0000 (13:20 +0200)]
drm/i915: work around warning in i915_gem_gtt
Gcc warns that addr might be used uninitialized. It may not, but I see
why gcc gets confused.
Additionally, hiding code with side-effects inside WARN_ON() argument
seems uncool, so I moved it outside.
Signed-off-by: Pavel Machek <pavel@ucw.cz>
[danvet: Add obligatory /* shuts up gcc */ comment.]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Daniel Vetter [Fri, 25 Jul 2014 20:53:39 +0000 (22:53 +0200)]
drm/i915: Update DRIVER_DATE to
20140725
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Tetsuo Handa [Sun, 3 Aug 2014 11:02:31 +0000 (20:02 +0900)]
drm/ttm: Pass GFP flags in order to avoid deadlock.
Commit
7dc19d5a "drivers: convert shrinkers to new count/scan API" added
deadlock warnings that ttm_page_pool_free() and ttm_dma_page_pool_free()
are currently doing GFP_KERNEL allocation.
But these functions did not get updated to receive gfp_t argument.
This patch explicitly passes sc->gfp_mask or GFP_KERNEL to these functions,
and removes the deadlock warning.
Signed-off-by: Tetsuo Handa <penguin-kernel@I-love.SAKURA.ne.jp>
Cc: stable <stable@kernel.org> [2.6.35+]
Signed-off-by: Dave Airlie <airlied@redhat.com>
Tetsuo Handa [Sun, 3 Aug 2014 11:02:03 +0000 (20:02 +0900)]
drm/ttm: Fix possible stack overflow by recursive shrinker calls.
While ttm_dma_pool_shrink_scan() tries to take mutex before doing GFP_KERNEL
allocation, ttm_pool_shrink_scan() does not do it. This can result in stack
overflow if kmalloc() in ttm_page_pool_free() triggered recursion due to
memory pressure.
shrink_slab()
=> ttm_pool_shrink_scan()
=> ttm_page_pool_free()
=> kmalloc(GFP_KERNEL)
=> shrink_slab()
=> ttm_pool_shrink_scan()
=> ttm_page_pool_free()
=> kmalloc(GFP_KERNEL)
Change ttm_pool_shrink_scan() to do like ttm_dma_pool_shrink_scan() does.
Signed-off-by: Tetsuo Handa <penguin-kernel@I-love.SAKURA.ne.jp>
Cc: stable <stable@kernel.org> [2.6.35+]
Signed-off-by: Dave Airlie <airlied@redhat.com>
Tetsuo Handa [Sun, 3 Aug 2014 11:01:10 +0000 (20:01 +0900)]
drm/ttm: Use mutex_trylock() to avoid deadlock inside shrinker functions.
I can observe that RHEL7 environment stalls with 100% CPU usage when a
certain type of memory pressure is given. While the shrinker functions
are called by shrink_slab() before the OOM killer is triggered, the stall
lasts for many minutes.
One of reasons of this stall is that
ttm_dma_pool_shrink_count()/ttm_dma_pool_shrink_scan() are called and
are blocked at mutex_lock(&_manager->lock). GFP_KERNEL allocation with
_manager->lock held causes someone (including kswapd) to deadlock when
these functions are called due to memory pressure. This patch changes
"mutex_lock();" to "if (!mutex_trylock()) return ...;" in order to
avoid deadlock.
Signed-off-by: Tetsuo Handa <penguin-kernel@I-love.SAKURA.ne.jp>
Cc: stable <stable@kernel.org> [3.3+]
Signed-off-by: Dave Airlie <airlied@redhat.com>
Tetsuo Handa [Sun, 3 Aug 2014 11:00:40 +0000 (20:00 +0900)]
drm/ttm: Choose a pool to shrink correctly in ttm_dma_pool_shrink_scan().
We can use "unsigned int" instead of "atomic_t" by updating start_pool
variable under _manager->lock. This patch will make it possible to avoid
skipping when choosing a pool to shrink in round-robin style, after next
patch changes mutex_lock(_manager->lock) to !mutex_trylock(_manager->lork).
Signed-off-by: Tetsuo Handa <penguin-kernel@I-love.SAKURA.ne.jp>
Cc: stable <stable@kernel.org> [3.3+]
Signed-off-by: Dave Airlie <airlied@redhat.com>
Tetsuo Handa [Sun, 3 Aug 2014 10:59:35 +0000 (19:59 +0900)]
drm/ttm: Fix possible division by 0 in ttm_dma_pool_shrink_scan().
list_empty(&_manager->pools) being false before taking _manager->lock
does not guarantee that _manager->npools != 0 after taking _manager->lock
because _manager->npools is updated under _manager->lock.
Signed-off-by: Tetsuo Handa <penguin-kernel@I-love.SAKURA.ne.jp>
Cc: stable <stable@kernel.org> [3.3+]
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Tue, 5 Aug 2014 00:34:33 +0000 (10:34 +1000)]
drm/tda998x: update for new drm connector APIs.
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Mon, 4 Aug 2014 23:41:42 +0000 (09:41 +1000)]
drm/sti: fix warning in build.
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Mon, 4 Aug 2014 23:28:37 +0000 (09:28 +1000)]
Merge branch 'drm_kms_for_next-v8' of git://git.linaro.org/people/benjamin.gaignard/kernel into drm-next
This series of patches add the support of DRM/KMS drivers for STMicroelectronics
chipsets stih416 and stih407.
Hardware is split in two main blocks: Compositor and TVout. Each of them
includes specific hardware IPs and the display timing are controlled by a specific
Video Timing Generator hardware IP (VTG).
Compositor is made of the follow hardware IPs:
- GDP (Generic Display Pipeline) which is an entry point for graphic (RGB)
buffers
- VDP (Video Diplay Pipeline) which is an entry point for video (YUV) buffers
- HQVDP (High Quality Video Display Processor) that supports scaling,
deinterlacing and some miscellaneous image quality improvements.
It fetches the Video decoded buffers from memory, processes them and pushes
them to the Compositor through a HW dedicated bus.
- Mixer is responsible of mixing all the entries depending of their
respective z-order and layout
TVout is divided in 3 parts:
- HDMI to generate HDMI signals, depending of chipset version HDMI phy can
change.
- HDA to generate signals for HD analog TV
- VIP to control/switch data path coming from Compositor
On stih416 compositor and Tvout are on different dies so a Video Trafic Advance
inter-die Communication mechanism (VTAC) is needed.
+---------------------------------------------+ +----------------------------------------+
| +-------------------------------+ +----+ | | +----+ +--------------------------+ |
| | | | | | | | | | +---------+ +----+ | |
| | +----+ +------+ | | | | | | | | | VIP |---->|HDMI| | |
| | |GPD +------------->| | | | | | | | | | | | +----+ | |
| | +----+ |Mixer |--|-->| | | | | |---|->| switcher| | |
| | | | | | | | | | | | | | +----+ | |
| | | | | | | | | | | | | |---->|HDA | | |
| | +------+ | |VTAC|========>|VTAC| | +---------+ +----+ | |
| | | | | | | | | | | |
| | Compositor | | | | | | | | TVout | |
| +-------------------------------+ | | | | | | +--------------------------+ |
| ^ | | | | | | ^ |
| | | | | | | | | |
| +--------------+ | | | | | | +-------------+ |
| | VTG (master) |----->| | | | | |----->| VTG (slave) | |
| +--------------+ +----+ | | +----+ +-------------+ |
|Digital die | | Analog Die|
+---------------------------------------------+ +----------------------------------------+
On stih407 Compositor and Tvout are on the same die
+-----------------------------------------------------------------+
| +-------------------------------+ +--------------------------+ |
| | | | +---------+ +----+ | |
| | +----+ +------+ | | | VIP |---->|HDMI| | |
| | |GPD +------------->| | | | | | +----+ | |
| | +----+ |Mixer |--|--|->| switcher| | |
| | +----+ +-----+ | | | | | | +----+ | |
| | |VDP +-->+HQVDP+--->| | | | | |---->|HDA | | |
| | +----+ +-----+ +------+ | | +---------+ +----+ | |
| | | | | |
| | Compositor | | TVout | |
| +-------------------------------+ +--------------------------+ |
| ^ ^ |
| | | |
| +--------------+ |
| | VTG | |
| +--------------+ |
|Digital die |
+-----------------------------------------------------------------+
In addition of the drivers for the IPs listed before a thin I2C driver (hdmiddc) is used
by HDMI driver to retrieve EDID for monitor.
To unify interfaces of GDP and VDP we create a "layer" interface called by
compositor to control both GPD and VDP.
Hardware have memory contraints (alignment, contiguous) so we use CMA drm helpers functions
to allocate frame buffer.
File naming convention is:
- sti_* for IPs drivers
- sti_drm_* for drm functions implementation.
* 'drm_kms_for_next-v8' of git://git.linaro.org/people/benjamin.gaignard/kernel:
drm: sti: Add DRM driver itself
drm: sti: add Compositor
drm: sti: add Mixer
drm: sti: add VID layer
drm: sti: add GDP layer
drm: sti: add TVOut driver
drm: sti: add HDA driver
drm: sti: add HDMI driver
drm: sti: add VTAC drivers
drm: sti: add VTG driver
drm: sti: add bindings for DRM driver
Dave Airlie [Mon, 4 Aug 2014 23:26:09 +0000 (09:26 +1000)]
Merge branch 'tda998x-devel' of git://ftp.arm.linux.org.uk/~rmk/linux-cubox into drm-next
This builds upon the previous set of fixes which were pulled on 6th July.
Included in this set are:
- an update from Jean-Francois to add the missing reg documentation entry
to the device tree documentation.
- conversion of the tda998x driver to the component helpers.
* 'tda998x-devel' of git://ftp.arm.linux.org.uk/~rmk/linux-cubox:
drm/i2c: tda998x: add component support
drm/i2c: tda998x: allow re-use of tda998x support code
drm/i2c: tda998x: fix lack of required reg in DT documentation
Conflicts:
drivers/gpu/drm/i2c/tda998x_drv.c
Dave Airlie [Mon, 4 Aug 2014 23:22:27 +0000 (09:22 +1000)]
Merge branch 'msm-next' of git://people.freedesktop.org/~robclark/linux into drm-next
This time around we have a mix of new hw enablement (mdp5 v1.3 /
apq8084), plus devicetree and various upstream changes (mostly
adapting to CCF vs downstream clk driver differences) for mdp4 /
apq8064. With these drm/msm patches plus a few other small patchsets
(from linaro qcom integration branch.. mostly stuff queued up for
3.17) we have the inforce ifc6410 board working, with gpu. Much nicer
to work with than ancient vendor android branch :-)
* 'msm-next' of git://people.freedesktop.org/~robclark/linux:
drm/msm/hdmi: fix HDMI_MUX_EN gpio request typo
drm/msm/hdmi: enable lpm-mux if it is present
drm/msm/mdp5: add support for MDP5 v1.3
drm/msm: fix potential deadlock in gpu init
drm/msm: use upstream iommu
drm/msm: no mmu is only error if not using vram carveout
drm/msm: fix BUG_ON() in error cleanup path
drm/msm/mdp4: add mdp axi clk
drm/msm: hdmi phy 8960 phy pll
drm/msm: update generated headers
drm/msm: DT support for 8960/8064 (v3)
drm/msm: Implement msm drm fb_mmap callback function
drm/msm: activate iommu support
drm/msm: fix double struct_mutex acquire
Dave Airlie [Mon, 4 Aug 2014 23:04:59 +0000 (09:04 +1000)]
Merge tag 'v3.16' into drm-next
Linux 3.16
backmerge requested by i915, nouveau and radeon authors
Conflicts:
drivers/gpu/drm/i915/i915_gem_render_state.c
drivers/gpu/drm/i915/intel_drv.h
Beeresh Gopal [Thu, 31 Jul 2014 15:48:50 +0000 (11:48 -0400)]
drm/msm/hdmi: fix HDMI_MUX_EN gpio request typo
HDMI_MUX_EN gpio is requested. If an error occurs, the same name
should be printed (HDMI_MUX_EN) instead of HDMI_MUX_SEL (typo).
Signed-off-by: Beeresh Gopal <gbeeresh@codeaurora.org>
Signed-off-by: Stephane Viau <sviau@codeaurora.org>
Reviewed-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Beeresh Gopal [Thu, 31 Jul 2014 15:48:49 +0000 (11:48 -0400)]
drm/msm/hdmi: enable lpm-mux if it is present
lpm-mux is programmed to enable HDMI connector
on the docking station for S805 chipset based
devices.
Signed-off-by: Beeresh Gopal <gbeeresh@codeaurora.org>
Signed-off-by: Stephane Viau <sviau@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Stephane Viau [Mon, 7 Jul 2014 14:34:01 +0000 (10:34 -0400)]
drm/msm/mdp5: add support for MDP5 v1.3
MDP5 has several functional blocks (ie: VIG/RGB pipes, LMs, ...).
From one revision to another, these blocks' base addresses might
change due to the number of instances present in the MDP5 hw.
A way of dealing with these offset changes is to introduce
dynamic offsets 'per block'.
This change adds support for the new revision of MDP5: v1.3.
The idea is to define one hw config per MDP version and select
either one of them at runtime, after reading the MDP5 version.
Once the MDP version is known, 'per block' dynamic offsets
are initialized through a global pointer, which is then used for
read/write register access.
Signed-off-by: Stephane Viau <sviau@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Rob Clark [Fri, 11 Jul 2014 15:59:22 +0000 (11:59 -0400)]
drm/msm: fix potential deadlock in gpu init
Somewhere along the way, the firmware loader sprouted another lock
dependency, resulting in possible deadlock scenario:
&dev->struct_mutex --> &sb->s_type->i_mutex_key#2 --> &mm->mmap_sem
which is problematic vs things like gem mmap.
So introduce a separate mutex to synchronize gpu init.
Signed-off-by: Rob Clark <robdclark@gmail.com>
Rob Clark [Thu, 10 Jul 2014 02:08:15 +0000 (22:08 -0400)]
drm/msm: use upstream iommu
Downstream kernel IOMMU had a non-standard way of dealing with multiple
devices and multiple ports/contexts. We don't need that on upstream
kernel, so rip out the crazy.
Note that we have to move the pinning of the ringbuffer to after the
IOMMU is attached. No idea how that managed to work properly on the
downstream kernel.
For now, I am leaving the IOMMU port name stuff in place, to simplify
things for folks trying to backport latest drm/msm to device kernels.
Once we no longer have to care about pre-DT kernels, we can drop this
and instead backport upstream IOMMU driver.
Signed-off-by: Rob Clark <robdclark@gmail.com>
Rob Clark [Tue, 1 Jul 2014 18:49:55 +0000 (14:49 -0400)]
drm/msm: no mmu is only error if not using vram carveout
Signed-off-by: Rob Clark <robdclark@gmail.com>
Rob Clark [Tue, 1 Jul 2014 18:49:25 +0000 (14:49 -0400)]
drm/msm: fix BUG_ON() in error cleanup path
Signed-off-by: Rob Clark <robdclark@gmail.com>
Rob Clark [Mon, 30 Jun 2014 22:50:51 +0000 (18:50 -0400)]
drm/msm/mdp4: add mdp axi clk
Downstream kernel holds this clk via a fake-parent relationship.
Upstream clock framework requires that we hold it explicitly.
Signed-off-by: Rob Clark <robdclark@gmail.com>
Rob Clark [Wed, 25 Jun 2014 13:54:36 +0000 (09:54 -0400)]
drm/msm: hdmi phy 8960 phy pll
On downstream kernel the clk driver directly bangs hdmi phy registers.
For upstream kernel, we need to model this as a clock and register with
the clock framework.
Signed-off-by: Rob Clark <robdclark@gmail.com>
Rob Clark [Wed, 25 Jun 2014 13:01:19 +0000 (09:01 -0400)]
drm/msm: update generated headers
Signed-off-by: Rob Clark <robdclark@gmail.com>
Rob Clark [Sun, 15 Dec 2013 21:23:05 +0000 (16:23 -0500)]
drm/msm: DT support for 8960/8064 (v3)
Now that we (almost) have enough dependencies in place (MMCC, RPM, etc),
add necessary DT support so that we can use drm/msm on upstream kernel.
v2: update for review comments
v3: rebase on component helper changes
Signed-off-by: Rob Clark <robdclark@gmail.com>
Hai Li [Wed, 18 Jun 2014 20:55:27 +0000 (16:55 -0400)]
drm/msm: Implement msm drm fb_mmap callback function
This change implements msm drm specific fb_mmap function for fb device
to properly map the fb address to userspace.
Signed-off-by: Hai Li <hali@codeaurora.org>
Signed-off-by: Stephane Viau <sviau@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com> (+ minor comment tweak)
Stephane Viau [Tue, 17 Jun 2014 14:32:38 +0000 (10:32 -0400)]
drm/msm: activate iommu support
This changes activates the iommu support for MDP5, through the
platform config structure.
Signed-off-by: Stephane Viau <sviau@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Rob Clark [Sat, 28 Jun 2014 15:11:34 +0000 (11:11 -0400)]
drm/msm: fix double struct_mutex acquire
Mutex is already grabbed in show_locked().. somehow this slipped
through.
Signed-off-by: Rob Clark <robdclark@gmail.com>
Dave Airlie [Mon, 4 Aug 2014 07:57:34 +0000 (17:57 +1000)]
Merge tag 'drm-intel-next-2014-07-25-merged' of git://anongit.freedesktop.org/drm-intel into drm-next
Final feature pull for 3.17.
drm-intel-next-2014-07-25:
- Ditch UMS support (well just the config option for now)
- Prep work for future platforms (Sonika Jindal, Damien)
- runtime pm/soix fixes (Paulo, Jesse)
- psr tracking improvements, locking fixes, now enabled by default!
- rps fixes for chv (Deepak, Ville)
- drm core patches for rotation support (Ville, Sagar Kamble) - the i915 parts
unfortunately didn't make it yet
- userptr fixes (Chris)
- minimum backlight brightness (Jani), acked long ago by Matthew Garret on irc -
I've forgotten about this patch :(
QA is a bit unhappy about the DP MST stuff since it broke hpd testing a
bit, but otherwise looks sane. I've backmerged drm-next to resolve
conflicts with the mst stuff, which means the new tag itself doesn't
contain the overview as usual.
* tag 'drm-intel-next-2014-07-25-merged' of git://anongit.freedesktop.org/drm-intel: (75 commits)
drm/i915/userptr: Keep spin_lock/unlock in the same block
drm/i915: Allow overlapping userptr objects
drm/i915: Ditch UMS config option
drm/i915: respect the VBT minimum backlight brightness
drm/i915: extract backlight minimum brightness from VBT
drm/i915: Replace HAS_PCH_SPLIT which incorrectly lets some platforms in
drm/i915: Returning from increase/decrease of pllclock when invalid
drm/i915: Setting legacy palette correctly for different platforms
drm/i915: Avoid incorrect returning for some platforms
drm/i915: Writing proper check for reading of pipe status reg
drm/i915: Returning the right VGA control reg for platforms
drm/i915: Allowing changing of wm latencies for valid platforms
drm/i915: Adding HAS_GMCH_DISPLAY macro
drm/i915: Fix possible overflow when recording semaphore states.
drm/i915: Do not unmap object unless no other VMAs reference it
drm/i915: remove plane/cursor/pipe assertions from intel_crtc_disable
drm/i915: Reorder ctx unref on ppgtt cleanup
drm/i915/error: Check the potential ctx obj's vm
drm/i915: Fix printing proper min/min/rpe values in debugfs
drm/i915: BDW can also detect unclaimed registers
...
Dave Airlie [Thu, 24 Jul 2014 01:53:45 +0000 (11:53 +1000)]
drm: close race in connector registration (v2)
Daniel pointed out with hotplug that userspace could be trying to oops us
as root for lols, and that to be correct we shouldn't register the object
with the idr before we have fully set the connector object up.
His proposed solution was a lot more life changing, this seemed like a simpler
proposition to me, get the connector object id from the idr, but don't
register the object until the drm_connector_register callback.
The open question is whether the drm_mode_object_register needs a bigger lock
than just the idr one, but I can't see why it would, but I can be locking
challenged.
v2: fix bool noreg into sane - add comment.
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: David Herrmann <dh.herrmann@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Chris Wilson [Mon, 4 Aug 2014 06:15:09 +0000 (07:15 +0100)]
drm/i915: only hook up hpd pulse for DP outputs
On HSW+, the digital encoders are shared between HDMI and DP outputs,
with one encoder masquerading as both. The VBT should tell us if we need
to have DP or HDMI support on a particular port, but if we don't have DP
support and we enable the DP hpd pulse handler then we cause an oops.
Don't hook up the DP hpd handling if we don't have a DP port.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=81856
Reported-by: Intel QA Team.
Signed-off-by: Dave Airlie <airlied@redhat.com> # v1
[ickle: Fix the error handling after a malloc failure]
Reviewed-by: Dave Airlie <airlied@redhat.com>
Cc: Paulo Zanoni <przanoni@gmail.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Mon, 4 Aug 2014 05:07:21 +0000 (15:07 +1000)]
Merge branch 'exynos-drm-next' of git://git./linux/kernel/git/daeinki/drm-exynos into drm-next
This pull request includes i80 interface support, module auto-loading
ipp consolidation, and trivail fixups and cleanups.
Summary:
- Add i80 interface support. For this, we added some features to
Exynos drm framework, which don't affect any other SoC and common
framework because they are specific to Exynos drm.
- Add module auto-loading support. For this, sub drivers of Exynos drm
exports their of match tables to userspace. This allows modules to be
loaded automatically based on devicetree information
- Consolidate ipp driver. This patch just just includes cleanups and
a littl bit refactoring codes.
If there is any problem, please kindly let me know.
* 'exynos-drm-next' of git://git.kernel.org/pub/scm/linux/kernel/git/daeinki/drm-exynos: (38 commits)
drm/exynos: g2d: let exynos_g2d_get_ver_ioctl fail
drm/exynos: g2d: make ioctls more robust
drm/exynos: hdmi: add null check for hdmiphy_port
drm/exynos: control blending of mixer graphic layer 0
drm/exynos: Add MODULE_DEVICE_TABLE entries for various components
Subject: Revert "drm/exynos: remove MODULE_DEVICE_TABLE definitions"
Subject: Revert "drm/exynos: fix module build error"
drm/exynos/ipp: simplify ipp_find_driver
drm/exynos/ipp: simplify ipp_create_id
drm/exynos/ipp: remove redundant messages
drm/exynos/ipp: simplify ipp_find_obj
drm/exynos/ipp: remove useless registration checks
drm/exynos/ipp: simplify memory check function
drm/exynos/ipp: remove incorrect checks of list_first_entry result
drm/exynos/ipp: remove temporary variable
drm/exynos/ipp: correct address type
drm/exynos/ipp: remove struct exynos_drm_ipp_private
drm/exynos/ipp: remove unused field from exynos_drm_ipp_private
drm/exynos/ipp: remove type casting
drm/exynos: g2d: add exynos4212 as a compatible device.
...
Tobias Jakobi [Wed, 23 Jul 2014 14:57:13 +0000 (16:57 +0200)]
drm/exynos: g2d: let exynos_g2d_get_ver_ioctl fail
Currently the DRM_IOCTL_EXYNOS_G2D_GET_VER ioctl always succeeds, even
if no G2D support is available. Let the ioctl fail when this is the
case, so that userspace can accurately probe for G2D support.
This also fixes the exynos tests in libdrm. There 'g2d_init' doesn't
fail when G2D is absent, leading to a segfault later.
Signed-off-by: Tobias Jakobi <tjakobi@math.uni-bielefeld.de>
Signed-off-by: INki Dae <inki.dae@samsung.com>
Tobias Jakobi [Wed, 23 Jul 2014 14:57:12 +0000 (16:57 +0200)]
drm/exynos: g2d: make ioctls more robust
Both exynos_g2d_set_cmdlist_ioctl and exynos_g2d_exec_ioctl don't check
if the G2D was succesfully probe. If that is not the case, then g2d_priv
is just NULL and extracting 'dev' from it in the next step is going to
produce a kernel oops.
Add proper checks and return ENODEV if the G2D is not available.
Signed-off-by: Tobias Jakobi <tjakobi@math.uni-bielefeld.de>
Signed-off-by: INki Dae <inki.dae@samsung.com>
Seung-Woo Kim [Mon, 28 Jul 2014 08:15:22 +0000 (17:15 +0900)]
drm/exynos: hdmi: add null check for hdmiphy_port
The hdmiphy can be apb and hdmiphy_port can be null. So before
accessing hdmiphy_port, it should be checked.
Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Joonyoung Shim [Fri, 25 Jul 2014 10:59:10 +0000 (19:59 +0900)]
drm/exynos: control blending of mixer graphic layer 0
The mixer graphic layer 0 isn't blended as default by commit
0377f4ed9f1aed30292c4e3c87f24e028ae26f36(drm/exynos: Don't blend mixer
layer 0). But it needs to be blended with graphic layer 0 if video layer
is enabled by vp because video layer is bottom.
Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Sjoerd Simons [Fri, 18 Jul 2014 20:36:41 +0000 (22:36 +0200)]
drm/exynos: Add MODULE_DEVICE_TABLE entries for various components
Add MODULE_DEVICE_TABLE calls for the various OF match tables that
currently don't have one. This allows the module to be
autoloaded based on devicetree information.
Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Sjoerd Simons [Wed, 30 Jul 2014 02:29:41 +0000 (11:29 +0900)]
Subject: Revert "drm/exynos: remove MODULE_DEVICE_TABLE definitions"
This reverts commit
d089621896c3530a9bd309f96e9c9124d07f6c3f was
original to prevent multiple MODULE_DEVICE_TABLE in one module.
Which, as a side-effect broke autoloading of the module.
Since
21bdd17b21b45ea48e06e23918d681afbe0622e9 it is possible to have
multiple calls to MODULE_DEVICE_TABLE, so the patch can be
reverted to restore support for autoloading
Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Sjoerd Simons [Wed, 30 Jul 2014 02:28:31 +0000 (11:28 +0900)]
Subject: Revert "drm/exynos: fix module build error"
Since
21bdd17b21b45ea48e06e23918d681afbe0622e9 it is possible to have
multiple calls to MODULE_DEVICE_TABLE, so the patch can be
reverted to restore support for autoloading
Conflicts:
drivers/gpu/drm/exynos/exynos_drm_fimd.c
drivers/gpu/drm/exynos/exynos_drm_g2d.c
Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Linus Torvalds [Sun, 3 Aug 2014 22:25:02 +0000 (15:25 -0700)]
Linux 3.16
Linus Torvalds [Sun, 3 Aug 2014 16:58:20 +0000 (09:58 -0700)]
Merge branch 'timers-urgent-for-linus' of git://git./linux/kernel/git/tip/tip
Pull timer fixes from Thomas Gleixner:
"Two fixes in the timer area:
- a long-standing lock inversion due to a printk
- suspend-related hrtimer corruption in sched_clock"
* 'timers-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
timer: Fix lock inversion between hrtimer_bases.lock and scheduler locks
sched_clock: Avoid corrupting hrtimer tree during suspend
Andrzej Hajda [Thu, 3 Jul 2014 13:10:37 +0000 (15:10 +0200)]
drm/exynos/ipp: simplify ipp_find_driver
The patch puts repeated code sequence into one function, removes verbose
comments and decreases log verbosity.
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Andrzej Hajda [Thu, 3 Jul 2014 13:10:36 +0000 (15:10 +0200)]
drm/exynos/ipp: simplify ipp_create_id
There is no gain in passing id by pointer to be filled.
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Andrzej Hajda [Thu, 3 Jul 2014 13:10:35 +0000 (15:10 +0200)]
drm/exynos/ipp: remove redundant messages
In case of error callback prints already corresponding message.
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Andrzej Hajda [Thu, 3 Jul 2014 13:10:34 +0000 (15:10 +0200)]
drm/exynos/ipp: simplify ipp_find_obj
The patch simplifies ipp_find_obj and removes debug messages.
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Andrzej Hajda [Thu, 3 Jul 2014 13:10:33 +0000 (15:10 +0200)]
drm/exynos/ipp: remove useless registration checks
Argument checks are redundant, clients always check ippdrv before calling
these functions.
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Andrzej Hajda [Thu, 3 Jul 2014 13:10:32 +0000 (15:10 +0200)]
drm/exynos/ipp: simplify memory check function
The only thing function should check is if there are buffers in respective
queues.
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Andrzej Hajda [Thu, 3 Jul 2014 13:10:31 +0000 (15:10 +0200)]
drm/exynos/ipp: remove incorrect checks of list_first_entry result
list_first_entry does not return NULL on empty list so this check
does not make sense. Moreover there is already code which prevents calling
list_first_entry on empty lists.
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Andrzej Hajda [Thu, 3 Jul 2014 13:10:30 +0000 (15:10 +0200)]
drm/exynos/ipp: remove temporary variable
There is no reason to allocate intermediate variable.
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Andrzej Hajda [Thu, 3 Jul 2014 13:10:29 +0000 (15:10 +0200)]
drm/exynos/ipp: correct address type
exynos_drm_gem_get_dma_addr returns dma_addr_t, type casting to void* and
back is not necessary.
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Andrzej Hajda [Thu, 3 Jul 2014 13:10:28 +0000 (15:10 +0200)]
drm/exynos/ipp: remove struct exynos_drm_ipp_private
struct exynos_drm_ipp_private contains only one pointer so all occurrences
of the struct can be replaced by the pointer itself.
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Andrzej Hajda [Thu, 3 Jul 2014 13:10:27 +0000 (15:10 +0200)]
drm/exynos/ipp: remove unused field from exynos_drm_ipp_private
The patch removes unused event_list field from struct exynos_drm_ipp_private.
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Andrzej Hajda [Thu, 3 Jul 2014 13:10:26 +0000 (15:10 +0200)]
drm/exynos/ipp: remove type casting
The patch replaces type casting with proper pointer.
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Alban Browaeys [Sat, 19 Jul 2014 20:53:03 +0000 (22:53 +0200)]
drm/exynos: g2d: add exynos4212 as a compatible device.
Signed-off-by: Tobias Jakobi <tjakobi@math.uni-bielefeld.de>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
YoungJun Cho [Thu, 17 Jul 2014 09:01:29 +0000 (18:01 +0900)]
ARM: dts: exynos5420: add dsi node
This patch adds common part of dsi node.
Signed-off-by: YoungJun Cho <yj44.cho@samsung.com>
Acked-by: Inki Dae <inki.dae@samsung.com>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
YoungJun Cho [Thu, 17 Jul 2014 09:01:28 +0000 (18:01 +0900)]
ARM: dts: exynos5420: add mipi-phy node
This patch adds mipi-phy node for MIPI DSI device.
Signed-off-by: YoungJun Cho <yj44.cho@samsung.com>
Acked-by: Inki Dae <inki.dae@samsung.com>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
YoungJun Cho [Thu, 17 Jul 2014 09:01:27 +0000 (18:01 +0900)]
ARM: dts: exynos5: add system register property
This patch adds sysreg property to fimd device node
which is required to use I80 interface.
Signed-off-by: YoungJun Cho <yj44.cho@samsung.com>
Acked-by: Inki Dae <inki.dae@samsung.com>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
YoungJun Cho [Thu, 17 Jul 2014 09:01:26 +0000 (18:01 +0900)]
ARM: dts: exynos4: add system register property
This patch adds sysreg property to fimd device node
which is required to use I80 interface.
Signed-off-by: YoungJun Cho <yj44.cho@samsung.com>
Acked-by: Inki Dae <inki.dae@samsung.com>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
YoungJun Cho [Thu, 17 Jul 2014 09:01:23 +0000 (18:01 +0900)]
drm/exynos: dsi: add driver data to support Exynos5410/5420/5440 SoCs
The offset of register DSIM_PLLTMR_REG in Exynos5410 / 5420 / 5440
SoCs is different from the one in Exynos4 SoCs.
In case of Exynos5410 / 5420 / 5440 SoCs, there is no frequency
band bit in DSIM_PLLCTRL_REG, and it uses DSIM_PHYCTRL_REG and
DSIM_PHYTIMING*_REG instead.
So this patch adds driver data to distinguish it.
Signed-off-by: YoungJun Cho <yj44.cho@samsung.com>
Acked-by: Inki Dae <inki.dae@samsung.com>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
YoungJun Cho [Thu, 17 Jul 2014 09:01:22 +0000 (18:01 +0900)]
ARM: dts: exynos_dsim: add exynos5410 compatible to DT bindings
This patch adds relevant to exynos5410 compatible
for exynos5410 / 5420 / 5440 SoCs support.
Signed-off-by: YoungJun Cho <yj44.cho@samsung.com>
Acked-by: Inki Dae <inki.dae@samsung.com>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
YoungJun Cho [Thu, 17 Jul 2014 09:01:21 +0000 (18:01 +0900)]
drm/exynos: fimd: support LCD I80 interface
To support MIPI command mode based I80 interface panel,
FIMD should do followings:
- Sets LCD I80 interface timings configuration.
- Uses "lcd_sys" as an IRQ resource and sets relevant IRQ configuration.
- Sets LCD block configuration for I80 interface.
- Sets ideal(pixel) clock is 2 times faster than the original one
to generate frame done IRQ prior to the next TE signal.
- Implements trigger feature that transfers image data if there is page
flip request, and implements TE handler to call trigger function.
Signed-off-by: YoungJun Cho <yj44.cho@samsung.com>
Acked-by: Inki Dae <inki.dae@samsung.com>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
YoungJun Cho [Tue, 22 Jul 2014 10:49:44 +0000 (19:49 +0900)]
drm/exynos: dsi: add TE interrupt handler to support LCD I80 interface
This is a temporary solution and should be made by more
generic way.
To support LCD I80 interface, the DSI host should register
TE interrupt handler from the TE GPIO of attached panel.
So the panel generates a tearing effect synchronization signal
then the DSI host calls the CRTC device manager to trigger
to transfer video image.
Signed-off-by: YoungJun Cho <yj44.cho@samsung.com>
Acked-by: Inki Dae <inki.dae@samsung.com>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>