OSDN Git Service
Matt Arsenault [Fri, 22 Jul 2016 17:01:25 +0000 (17:01 +0000)]
AMDGPU: Delete more dead code
Remove dead code from r600 intrinsic removal.
Remove unset members, rename StackSize to be less ambiguous.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276436
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Matt Arsenault [Fri, 22 Jul 2016 17:01:21 +0000 (17:01 +0000)]
AMDGPU: Fix i1 fp_to_int
R600's i1 fp_to_uint selected but was incorrect according to
what instcombine constant folds to.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276435
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Matt Arsenault [Fri, 22 Jul 2016 17:01:15 +0000 (17:01 +0000)]
AMDGPU: Don't reinvent transferSuccessorsAndUpdatePHIs
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276434
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Tim Northover [Fri, 22 Jul 2016 16:59:52 +0000 (16:59 +0000)]
GlobalISel: implement alloca instruction
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276433
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Simon Pilgrim [Fri, 22 Jul 2016 16:46:25 +0000 (16:46 +0000)]
[SelectionDAG] Optimization of BITREVERSE legalization for power-of-2 integer scalar/vector types
An extension of D19978, this patch replaces the default BITREVERSE evaluation of individual bit masks+shifts with block mask+shifts when we have integer elements of power-of-2 bits in size.
After calling BSWAP to reverse the order of the constituent bytes (which typically follows a similar approach), every neighbouring 4-bits, 2-bits and finally 1-bit pairs are masked off and swapped over with shifts.
In doing so we can significantly reduce the number of operations required.
Differential Revision: https://reviews.llvm.org/D21578
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276432
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Xinliang David Li [Fri, 22 Jul 2016 16:11:56 +0000 (16:11 +0000)]
[Profile] Cleanup: remove unused interface
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276431
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Lang Hames [Fri, 22 Jul 2016 16:11:25 +0000 (16:11 +0000)]
[Support] Make ErrorAsOutParameter take an Error* rather than an Error&.
This allows ErrorAsOutParameter to work better with "optional" errors. For
example, consider a function where for certain input values it is known that
the function can't fail. This can now be written as:
Result foo(Arg X, Error *Err) {
ErrorAsOutParameter EAO(Err);
if (<Error Condition>) {
if (Err)
*Err = <report error>;
else
llvm_unreachable("Unexpected failure!");
}
}
Rather than having to construct an ErrorAsOutParameter under every conditional
where Err is known to be non-null.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276430
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Krzysztof Parzyszek [Fri, 22 Jul 2016 16:09:47 +0000 (16:09 +0000)]
[RDF] Make the graph construction/use less expensive
- FuncNode::findBlock traverses the function every time. Avoid using it,
and keep a cache of block addresses in DataFlowGraph instead.
- The operator[] in the map of definition stacks was very slow. Replace
the map with unordered_map.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276429
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Zachary Turner [Fri, 22 Jul 2016 15:46:46 +0000 (15:46 +0000)]
[pdb] Move file layout header structs to RawTypes.h
This facilitates code reuse between the builder classes and the
"frozen" read only versions of the classes used for parsing
existing PDB files.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276427
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Zachary Turner [Fri, 22 Jul 2016 15:46:37 +0000 (15:46 +0000)]
[pdb] Round-trip module & file info to/from YAML.
This implements support for writing compiland and compiland source
file info to a binary PDB. This is tested by adding support for
dumping these fields from an existing PDB to yaml, reading them
back in, and dumping them again and verifying the values are as
expected.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276426
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Krzysztof Parzyszek [Fri, 22 Jul 2016 14:22:43 +0000 (14:22 +0000)]
[Hexagon] Use loop data prefetch on Hexagon
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276422
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Reid Kleckner [Fri, 22 Jul 2016 14:11:58 +0000 (14:11 +0000)]
Use INT64_MAX instead of LLONG_MAX
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276419
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Simon Pilgrim [Fri, 22 Jul 2016 13:58:44 +0000 (13:58 +0000)]
[X86][AVX] Added support for lowering to VBROADCASTF128/VBROADCASTI128 (reapplied)
As reported on PR26235, we don't currently make use of the VBROADCASTF128/VBROADCASTI128 instructions (or the AVX512 equivalents) to load+splat a 128-bit vector to both lanes of a 256-bit vector.
This patch enables lowering from subvector insertion/concatenation patterns and auto-upgrades the llvm.x86.avx.vbroadcastf128.pd.256 / llvm.x86.avx.vbroadcastf128.ps.256 intrinsics to match.
We could possibly investigate using VBROADCASTF128/VBROADCASTI128 to load repeated constants as well (similar to how we already do for scalar broadcasts).
Reapplied with fix for PR28657 - removed intrinsic definitions (clang companion patch to be be submitted shortly).
Differential Revision: https://reviews.llvm.org/D22460
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276416
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Ahmed Bougacha [Fri, 22 Jul 2016 12:54:53 +0000 (12:54 +0000)]
[FastISel] Ignore @llvm.assume.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276410
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Ying Yi [Fri, 22 Jul 2016 12:46:13 +0000 (12:46 +0000)]
[llvm-cov] - Add the coverage of lines in the summary report.
The llvm-cov ‘report' command displays a summary of the coverage of a binary file.
The summary report currently only includes covered regions and covered functions.
This patch adds the coverage of lines in the summary report.
Differential Revision: https://reviews.llvm.org/D22569
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276409
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Benjamin Kramer [Fri, 22 Jul 2016 12:39:55 +0000 (12:39 +0000)]
[llvm-profdata] Bring back reading profile data from STDIN.
This feature was lost in r276197.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276407
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Benjamin Kramer [Fri, 22 Jul 2016 11:03:10 +0000 (11:03 +0000)]
Revert "[X86][AVX] Added support for lowering to VBROADCASTF128/VBROADCASTI128"
It caused PR28657.
This reverts commit r276281.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276405
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Ying Yi [Fri, 22 Jul 2016 10:52:21 +0000 (10:52 +0000)]
[llvm-cov] - Improve llvm-cov error message
Summary:
When giving the following command:
% llvm-cov report -instr-profile=default.profraw
llvm-cov will give the following error message:
>llvm-cov report: Not enough positional command line arguments specified!
>Must specify at least 1 positional arguments: See: orbis-llvm-cov report -help
This patch changes the error message from '1 positional arguments'
to '1 positional argument'.
Differential Revision: https://reviews.llvm.org/D22621
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276404
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Ying Yi [Fri, 22 Jul 2016 09:20:21 +0000 (09:20 +0000)]
test commit
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276401
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Sjoerd Meijer [Fri, 22 Jul 2016 08:39:12 +0000 (08:39 +0000)]
This refactoring of ARM machine block size computation creates two utility
functions so that the size computation is available not only in ConstantIslands
but in other passes as well.
Differential Revision: https://reviews.llvm.org/D22640
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276399
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Hrvoje Varga [Fri, 22 Jul 2016 07:18:33 +0000 (07:18 +0000)]
[mips][microMIPS] Implement SLT, SLTI, SLTIU, SLTU microMIPS32r6 instructions
Differential Revision: https://reviews.llvm.org/D19906
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276397
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Craig Topper [Fri, 22 Jul 2016 05:46:44 +0000 (05:46 +0000)]
[AVX512] Add ExeDomain to vector extend and truncate instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276394
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Craig Topper [Fri, 22 Jul 2016 05:00:52 +0000 (05:00 +0000)]
[AVX512] Add initial support for the Execution Domain fixing pass to change some EVEX instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276393
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Craig Topper [Fri, 22 Jul 2016 05:00:42 +0000 (05:00 +0000)]
[AVX512] Fix the ExeDomain for some packed fp instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276392
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Craig Topper [Fri, 22 Jul 2016 05:00:39 +0000 (05:00 +0000)]
[AVX512] Add load folding for some AVX512VL logic and arithmetic instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276391
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Craig Topper [Fri, 22 Jul 2016 05:00:35 +0000 (05:00 +0000)]
[AVX512] Update X86InstrInfo::foldMemoryOperandCustom to handle the EVEX encoded instructions too.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276390
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David Majnemer [Fri, 22 Jul 2016 04:54:44 +0000 (04:54 +0000)]
Don't remove side effecting instructions due to ConstantFoldInstruction
Just because we can constant fold the result of an instruction does not
imply that we can delete the instruction. It may have side effects.
This fixes PR28655.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276389
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Xinliang David Li [Fri, 22 Jul 2016 04:46:56 +0000 (04:46 +0000)]
Sync up InstrProfData.inc with compiler-rt with fixes to references
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276388
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Xinliang David Li [Fri, 22 Jul 2016 04:31:26 +0000 (04:31 +0000)]
Revert 276386
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276387
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Xinliang David Li [Fri, 22 Jul 2016 04:18:17 +0000 (04:18 +0000)]
Sync up InstrProfData.inc with compiler-rt
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276386
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Pete Cooper [Fri, 22 Jul 2016 01:52:58 +0000 (01:52 +0000)]
Fix r276380 for targets without REALPATH.
This was a mistake in the layout of the code from r276380. I moved the appropriate lines out of the #ifdef to fix it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276382
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Pete Cooper [Fri, 22 Jul 2016 01:41:32 +0000 (01:41 +0000)]
Avoid dsymutil calls to getFileNameByIndex.
This change adds a hasFileAtIndex method. getChildDeclContext can first call this method, and if it returns true it knows it can then lookup the resolved path cache for the given file index. If we hit that cache then we don't even have to call getFileNameByIndex.
Running dsymutil against the swift executable built from github gives a 20% performance improvement without any change in the binary.
Differential Revision: https://reviews.llvm.org/D22655
Reviewed by friss.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276380
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Vitaly Buka [Fri, 22 Jul 2016 00:56:17 +0000 (00:56 +0000)]
Fix detection of stack-use-after scope for char arrays.
Summary:
Clang inserts GetElementPtrInst so findAllocaForValue was not
able to find allocas.
PR27453
Reviewers: kcc, eugenis
Differential Revision: https://reviews.llvm.org/D22657
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276374
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Sanjoy Das [Fri, 22 Jul 2016 00:41:02 +0000 (00:41 +0000)]
[IRCE] Don't misuse CHECK-LABEL; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276373
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Sanjoy Das [Fri, 22 Jul 2016 00:40:56 +0000 (00:40 +0000)]
[IRCE] Add an option to skip profitability checks
If `-irce-skip-profitability-checks` is passed in, IRCE will kick in in
all cases where it is legal for it to kick in. This flag is intended to
help diagnose and analyse performance issues.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276372
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Sebastian Pop [Fri, 22 Jul 2016 00:07:01 +0000 (00:07 +0000)]
GVN-hoist: move check before mutating the IR
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276368
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David Majnemer [Thu, 21 Jul 2016 23:46:56 +0000 (23:46 +0000)]
[AArch64] Cleanup sign extend in genAlternativeCodeSequence
Use the machinery in MathExtras instead of rolling it by hand.
This fixes PR28624.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276366
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Sebastian Pop [Thu, 21 Jul 2016 23:32:39 +0000 (23:32 +0000)]
GVN-hoist: add missing check for all GEP operands available
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276364
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Vedant Kumar [Thu, 21 Jul 2016 23:31:26 +0000 (23:31 +0000)]
[llvm-cov] Strengthen a test case
Check that stylesheets work when we're not using -output-dir.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276363
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Douglas Katzman [Thu, 21 Jul 2016 23:28:54 +0000 (23:28 +0000)]
[Sparc]: Fix bug in LowerSTORE due to r275592
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276362
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Sanjay Patel [Thu, 21 Jul 2016 23:27:36 +0000 (23:27 +0000)]
[InstCombine] break up foldICmpEqualityWithConstant(); NFCI
Almost all of these folds require changes to allow vector types.
Splitting up the logic should make that easier to do incrementally.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276360
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Vedant Kumar [Thu, 21 Jul 2016 23:26:15 +0000 (23:26 +0000)]
[llvm-cov] Use relative paths to the stylesheet (for html reports)
This makes it easy to swap out the default stylesheet for a custom one.
It also shaves ~6.62 MB out of the report directory for a full coverage
build of llvm+clang.
While we're at it, prune the CSS and add tests for it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276359
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Sebastian Pop [Thu, 21 Jul 2016 23:22:10 +0000 (23:22 +0000)]
GVH-hoist: only clone GEPs (PR28606)
Do not clone stored values unless they are GEPs that are special cased to avoid
hoisting them without hoisting their associated ld/st.
Differential revision: https://reviews.llvm.org/D22652
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276358
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Daniel Dunbar [Thu, 21 Jul 2016 23:20:41 +0000 (23:20 +0000)]
[lit] Use full config path in diagnostics.
- This allows tools like emacs to automatically find the config file path when
you step through errors.
- Patch by Dave Abrahams.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276357
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Xinliang David Li [Thu, 21 Jul 2016 23:19:10 +0000 (23:19 +0000)]
[Profile] deprecate __llvm_profile_override_default_filename
This eliminates unncessary calls and init functions.
Differential Revision: http://reviews.llvm.org/D22613
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276354
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Daniel Dunbar [Thu, 21 Jul 2016 23:17:44 +0000 (23:17 +0000)]
[lit] Bump version number.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276353
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Wei Mi [Thu, 21 Jul 2016 22:28:52 +0000 (22:28 +0000)]
[PM] Port NaryReassociate to the new PM
Differential Revision: https://reviews.llvm.org/D22648
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276349
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Quentin Colombet [Thu, 21 Jul 2016 22:25:57 +0000 (22:25 +0000)]
[MIRTesting] Abort when failing to parse a function.
When we failed to parse a function in the mir parser, we should abort
the whole compilation instead of continuing in a weird state. Indeed,
this was creating strange machine function passes failures that were
hard to understand, until we notice that the function actually did not
get parsed correctly!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276348
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Michael Kuperstein [Thu, 21 Jul 2016 22:24:08 +0000 (22:24 +0000)]
[X86] Do not use AND8ri8 in AVX512 pattern
This variant is (as documented in the TD) for disassembler use only, and should
not be used in patterns - it is longer, and is broken on 64-bit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276347
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Sanjay Patel [Thu, 21 Jul 2016 21:56:00 +0000 (21:56 +0000)]
[InstSimplify] don't crash handling a pointer or aggregate type
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276345
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Akira Hatanaka [Thu, 21 Jul 2016 21:39:05 +0000 (21:39 +0000)]
[AArch64][Inline-Asm] Return the 32-bit floating point register class
when constraint "w" is used on a 32-bit operand.
This enables compiling the following code, which used to error out in
the backend:
void foo1(int a) {
asm volatile ("sqxtn h0, %s0\n" : : "w"(a):);
}
Fixes PR28633.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276344
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Michael Gottesman [Thu, 21 Jul 2016 21:35:23 +0000 (21:35 +0000)]
[cmake] Move the including of utils/unittests under LLVM_INCLUDE_UTILS instead of LLVM_INCLUDE_TESTS.
This does not change anything by default since LLVM_INCLUDE_UTILS is already set
to TRUE by default. In addition, since LLVM_INCLUDE_TESTS => LLVM_INCLUDE_UTILS,
the only way that this can cause changes is in the case where LLVM_INCLUDE_UTILS
is set to TRUE, but LLVM_INCLUDE_TESTS is FALSE. In that case, building gtest is
not a huge cost.
The reason to do this is that without this change, one can not turn off
LLVM_INCLUDE_TESTS in downstream projects that also use gtest for unittests. It
also just in general makes more sense since LLVM_INCLUDE_UTILS gates FileCheck
and other utilities that are along the lines of gtest.
Additionally from talking with chandlerc, this was not done for any specific
reason, so there is no reason not to do it and lots of benefit to doing it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276342
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Sanjay Patel [Thu, 21 Jul 2016 21:26:45 +0000 (21:26 +0000)]
[InstSimplify] recognize trunc + icmp sgt/slt variants of select simplifications (PR28466)
rL245171 exposed a hole in InstSimplify that manifested in a strange way in PR28466:
https://llvm.org/bugs/show_bug.cgi?id=28466
It's possible to use trunc + icmp sgt/slt in place of an and + icmp eq/ne, so we need to
recognize that pattern to eliminate selects that are choosing between some value and some
bitmasked version of that value.
Note that there is significant room for improvement (refactoring) and enhancement (more
patterns, possibly in InstCombine rather than here).
Differential Revision: https://reviews.llvm.org/D22537
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276341
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Adam Nemet [Thu, 21 Jul 2016 21:21:34 +0000 (21:21 +0000)]
[OptDiag,LDist] Convert remaining opt remarks to use the new API
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276340
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Matthew Simpson [Thu, 21 Jul 2016 21:20:15 +0000 (21:20 +0000)]
[LV] Move vector int induction update to end of latch
This patch moves the update instruction for vectorized integer induction phi
nodes to the end of the latch block. This ensures consistent placement of all
induction updates across all the kinds of int inductions we create (scalar,
splat vector, or vector phi).
Differential Revision: https://reviews.llvm.org/D22416
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276339
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Reid Kleckner [Thu, 21 Jul 2016 21:06:04 +0000 (21:06 +0000)]
Fix the clang-cl self-host with VS 2013 headers
std::numeric_limits<int64_t>::max() is not constexpr in VC 2013 headers,
and Clang complains that it isn't. MSVC 2013 itself is emitting a
dynamic initializer for this thing. Instead, use an enum.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276334
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George Burgess IV [Thu, 21 Jul 2016 20:52:35 +0000 (20:52 +0000)]
Normalize file docs. NFC.
Having the added `\brief` made doxygen interpret it as the summary for
the `llvm` namespace (visible at:
http://llvm.org/doxygen/namespaces.html).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276331
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Rong Xu [Thu, 21 Jul 2016 20:50:02 +0000 (20:50 +0000)]
[PGO] Make needsComdatForCounter() available (NFC)
Move needsComdatForCounter() to lib/ProfileData/InstrProf.cpp from
lib/Transforms/Instrumentation/InstrProfiling.cpp to make is available for
other files.
Differential Revision: https://reviews.llvm.org/D22643
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276330
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Sanjay Patel [Thu, 21 Jul 2016 20:11:08 +0000 (20:11 +0000)]
add vector tests and a simpler version of the negative tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276328
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Renato Golin [Thu, 21 Jul 2016 19:52:27 +0000 (19:52 +0000)]
[docs] Move GitHub to GitHubSubMod
Given that other proposals are making their way through, it's better if we
specify what GitHub proposal this is, in case there are others that also
involve GitHub, but not sub-modules.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276325
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Richard Osborne [Thu, 21 Jul 2016 19:20:57 +0000 (19:20 +0000)]
Transfer ownership of the XCore backend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276321
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Anna Thomas [Thu, 21 Jul 2016 19:06:28 +0000 (19:06 +0000)]
Revert "Invariant start/end intrinsics overloaded for address space"
This reverts commit r276316.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276320
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Sanjoy Das [Thu, 21 Jul 2016 18:58:01 +0000 (18:58 +0000)]
[IndVars] Reflow oddly formatted condition; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276319
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Anna Thomas [Thu, 21 Jul 2016 18:41:44 +0000 (18:41 +0000)]
Invariant start/end intrinsics overloaded for address space
Summary:
The llvm.invariant.start and llvm.invariant.end intrinsics currently
support specifying invariant memory objects only in the default address space.
With this change, these intrinsics are overloaded for any adddress space for memory objects
and we can use these llvm invariant intrinsics in non-default address spaces.
Example: llvm.invariant.start.p1i8(i64 4, i8 addrspace(1)* %ptr)
This overloaded intrinsic is needed for representing final or invariant memory in managed languages.
Reviewers: tstellarAMD, reames, apilipenko
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D22519
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276316
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Sanjay Patel [Thu, 21 Jul 2016 18:07:40 +0000 (18:07 +0000)]
make InstCombine compare helper functions private; NFC
Also, rename some of them for consistency and to follow current conventions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276312
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Vedant Kumar [Thu, 21 Jul 2016 17:50:07 +0000 (17:50 +0000)]
Avoid a string copy, NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276310
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Quentin Colombet [Thu, 21 Jul 2016 17:26:50 +0000 (17:26 +0000)]
[IRTranslator] Add G_SUB opcode.
This commit adds a generic SUB opcode to global-isel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276308
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Quentin Colombet [Thu, 21 Jul 2016 17:26:47 +0000 (17:26 +0000)]
[llvm-config][GlobalISel] Canonicalize LLVM_HAS_GLOBAL_ISEL on ON/OFF.
Previously LLVM_HAS_GLOBAL_ISEL would directly get the value of
LLVM_BUILD_GLOBAL_ISEL. This could be any integer value and not just ON
and OFF. The problem is that lit.cfg was checking for ON to define that
global-isel was supported, thus if we were setting
LLVM_BUILD_GLOBAL_ISEL with an integer value, say 1, this test would
fail whereas we do build global-isel and want to test it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276307
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Quentin Colombet [Thu, 21 Jul 2016 17:26:45 +0000 (17:26 +0000)]
[CMake][GlobalISel] Turn LLVM_BUILD_GLOBAL_ISEL into an option. NFC.
Previously LLVM_BUILD_GLOBAL_ISEL was a boolean variable and although,
this is strictly identical to an option, it did not convey the
information that the user may set it. Options are here for that.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276306
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Quentin Colombet [Thu, 21 Jul 2016 17:26:41 +0000 (17:26 +0000)]
[IRTranslator] Add comments to explain the ordering of the switch. NFC.
Group arithmetic operations, bitwise operations, and branch operations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276305
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Sanjay Patel [Thu, 21 Jul 2016 17:15:49 +0000 (17:15 +0000)]
[InstCombine] break up visitICmpInstWithInstAndIntCst(); NFCI
Making smaller pieces out of some of these ~1000 line functions should make
it easier to incrementally upgrade them to handle vector types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276304
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Renato Golin [Thu, 21 Jul 2016 16:46:44 +0000 (16:46 +0000)]
Adding RELEASE_TESTERS.TXT
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276302
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Konstantin Zhuravlyov [Thu, 21 Jul 2016 15:59:23 +0000 (15:59 +0000)]
[AMDGPU] Emit read-only data to .rodata for hsa
Differential Revision: https://reviews.llvm.org/D22538
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276298
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Quentin Colombet [Thu, 21 Jul 2016 15:50:42 +0000 (15:50 +0000)]
[IRTranslator] Add G_AND opcode.
This commit adds a generic AND opcode to global-isel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276297
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Konstantin Zhuravlyov [Thu, 21 Jul 2016 15:29:19 +0000 (15:29 +0000)]
AMDGPU/SI: Add support for R_AMDGPU_ABS32
Differential Revision: https://reviews.llvm.org/D21646
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276294
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Geoff Berry [Thu, 21 Jul 2016 15:20:25 +0000 (15:20 +0000)]
[AArch64] Load/store opt: Don't count transient instructions towards search limits.
Summary:
This change also changes findMatchingInsn and
findMatchingUpdateInsnForward to take DBG_VALUE opcodes into account
when tracking register defs and uses, which could potentially inhibit
these optimizations in the presence of debug information.
Reviewers: mcrosier
Subscribers: aemerson, rengolin, mcrosier, llvm-commits
Differential Revision: https://reviews.llvm.org/D22582
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276293
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Benjamin Kramer [Thu, 21 Jul 2016 15:06:50 +0000 (15:06 +0000)]
Weaken ThreadSafeRefCountedBase atomics.
Doesn't make a difference on x86, but avoids memory barriers on
weakly-ordered archs like PowerPC and ARM.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276291
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Simon Pilgrim [Thu, 21 Jul 2016 14:54:17 +0000 (14:54 +0000)]
[X86][SSE] Allow folding of store/zext with PEXTRW of 0'th element
Under normal circumstances we prefer the higher performance MOVD to extract the 0'th element of a v8i16 vector instead of PEXTRW.
But as detailed on PR27265, this prevents the SSE41 implementation of PEXTRW from folding the store of the 0'th element. Additionally it prevents us from making use of the fact that the (SSE2) reg-reg version of PEXTRW implicitly zero-extends the i16 element to the i32/i64 destination register.
This patch only preferentially lowers to MOVD if we will not be zero-extending the extracted i16, nor prevent a store from being folded (on SSSE41).
Fix for PR27265.
Differential Revision: https://reviews.llvm.org/D22509
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276289
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Simon Pilgrim [Thu, 21 Jul 2016 14:36:41 +0000 (14:36 +0000)]
Fixed line endings
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276287
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Simon Pilgrim [Thu, 21 Jul 2016 14:30:17 +0000 (14:30 +0000)]
[X86][SSE] Pull out duplicate EXTRW lowering code. NFCI.
As requested on D22509, I've pulled out the v8i16 extraction lowering as the SSE41 and pre-SSE41 implementations are effectively the same.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276285
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Benjamin Kramer [Thu, 21 Jul 2016 14:29:11 +0000 (14:29 +0000)]
[profdata] Remove constructor that MSVC 2013 pretends to not understand.
No functionality change intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276284
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Simon Pilgrim [Thu, 21 Jul 2016 14:10:54 +0000 (14:10 +0000)]
[X86][AVX] Added support for lowering to VBROADCASTF128/VBROADCASTI128
As reported on PR26235, we don't currently make use of the VBROADCASTF128/VBROADCASTI128 instructions (or the AVX512 equivalents) to load+splat a 128-bit vector to both lanes of a 256-bit vector.
This patch enables lowering from subvector insertion/concatenation patterns and auto-upgrades the llvm.x86.avx.vbroadcastf128.pd.256 / llvm.x86.avx.vbroadcastf128.ps.256 intrinsics to match.
We could possibly investigate using VBROADCASTF128/VBROADCASTI128 to load repeated constants as well (similar to how we already do for scalar broadcasts).
Differential Revision: https://reviews.llvm.org/D22460
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276281
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Benjamin Kramer [Thu, 21 Jul 2016 13:37:55 +0000 (13:37 +0000)]
[DemandedBits] Reduce number of duplicated DenseMap lookups.
No functionality change intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276278
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Benjamin Kramer [Thu, 21 Jul 2016 13:37:53 +0000 (13:37 +0000)]
[DenseMap] Add a C++17-style try_emplace method.
This provides an elegant pattern to solve the "construct if not in map
already" problem we have many times in LLVM. Without try_emplace we
either have to rely on a sentinel value (nullptr) or do two lookups.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276277
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Benjamin Kramer [Thu, 21 Jul 2016 13:37:48 +0000 (13:37 +0000)]
Rename StringMap::emplace_second to try_emplace.
Coincidentally this function maps to the C++17 try_emplace. Rename it
for consistentcy with C++17 std::map. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276276
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Sam Kolton [Thu, 21 Jul 2016 13:29:57 +0000 (13:29 +0000)]
[AMDGPU] Some code cleaning in SIRegisterInfo.td
Reviewers: tstellarAMD, vpykhtin
Subscribers: arsenm, kzhuravl
Differential Revision: https://reviews.llvm.org/D22620
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276274
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Marina Yatsina [Thu, 21 Jul 2016 12:37:07 +0000 (12:37 +0000)]
ExecutionDepsFix - Fix bug in clearance calculation
The clearance calculation did not take into account registers defined as outputs or clobbers in inline assembly machine instructions because these register defs are implicit.
Differential Revision: http://reviews.llvm.org/D22580
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276266
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Benjamin Kramer [Thu, 21 Jul 2016 12:06:31 +0000 (12:06 +0000)]
[GCOV] Remove a layer of indirection.
StringMap is designed to hold large values. No functionality change
intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276265
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Renato Golin [Thu, 21 Jul 2016 12:00:50 +0000 (12:00 +0000)]
[docs] Update release docs
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276264
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Matt Arsenault [Thu, 21 Jul 2016 09:40:57 +0000 (09:40 +0000)]
AMDGPU: Fix phis from blocks split due to register indexing
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276257
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David Majnemer [Thu, 21 Jul 2016 07:16:26 +0000 (07:16 +0000)]
[GVNHoist] Preserve optimization hints which agree
If we have optimization hints with agree with each other along different
paths, preserve them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276248
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David Majnemer [Thu, 21 Jul 2016 05:59:53 +0000 (05:59 +0000)]
[GVNHoist] Don't wrongly preserve TBAA
We hoisted loads/stores without taking into account which can cause
miscompiles.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276240
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David Majnemer [Thu, 21 Jul 2016 05:59:51 +0000 (05:59 +0000)]
[MergedLoadStoreMotion] Remove out of date comment
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276239
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Amaury Sechet [Thu, 21 Jul 2016 04:31:38 +0000 (04:31 +0000)]
Add missing import to fix the build
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276237
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Amaury Sechet [Thu, 21 Jul 2016 04:25:06 +0000 (04:25 +0000)]
Expose AttributeSetNode, use it to provide aggregate getter for attribute in the C API.
Summary: See D19181 for context.
Reviewers: whitequark, Wallbraker, jyknight, echristo, bkramer, void
Subscribers: mehdi_amini
Differential Revision: http://reviews.llvm.org/D21265
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276236
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Matthias Braun [Thu, 21 Jul 2016 03:50:39 +0000 (03:50 +0000)]
IPRA: Fix RegMask calculation for alias registers
This patch fixes a very subtle bug in regmask calculation. Thanks to zan
jyu Wong <zyfwong@gmail.com> for bringing this to notice.
For example if CL is only clobbered than CH should not be marked
clobbered but CX, RCX and ECX should be mark clobbered. Previously for
each modified register all of its aliases are marked clobbered by
markRegClobbred() in RegUsageInfoCollector.cpp but that is wrong because
when CL is clobbered then MRI::isPhysRegModified() will return true for
CL, CX, ECX, RCX which is correct behavior but then for CX, EXC, RCX we
mark CH also clobbered as CH is aliased to CX,ECX,RCX so
markRegClobbred() is not required because isPhysRegModified already take
cares of proper aliasing register. A very simple test case has been
added to verify this change.
Please find relevant bug report here :
http://llvm.org/PR28567
Patch by Vivek Pandya <vivekvpandya@gmail.com>
Differential Revision: https://reviews.llvm.org/D22400
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276235
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Adam Nemet [Thu, 21 Jul 2016 01:11:12 +0000 (01:11 +0000)]
[OptDiag] Missed these when making the IR Value a const pointer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276224
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Adam Nemet [Thu, 21 Jul 2016 01:07:13 +0000 (01:07 +0000)]
[OptDiag,LV] Add hotness attribute to applied-optimization remarks
Test coverage is provided by modifying the function in the FP-math
testcase that we are allowed to vectorize.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276223
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Matthias Braun [Thu, 21 Jul 2016 00:33:38 +0000 (00:33 +0000)]
X86InstrInfo: No need for liveness analysis in classifyLEAReg()
classifyLEAReg() deals with switching operands from 32bit to 64bit in
order to use a LEA64_32 instruction (for three address code goodness).
It currently performs a liveness analysis to determine the kill/undef
flag for the newly added operand. This should not be necessary:
- If the previous operand had a kill flag, then the 32bit part of the
register gets killed, this will kill the super register as well.
- If the previous operand had an undef flag then we didn't care what
value we read, just use the same flag on the new operand.
(No matter what an operand with an undef flag won't affect liveness)
This makes the code independent of the presence of kill flags because it
avoids a call to MachineBasicBlock::computeRegisterLiveness().
Differential Revision: http://reviews.llvm.org/D22283
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276222
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Sanjay Patel [Thu, 21 Jul 2016 00:24:18 +0000 (00:24 +0000)]
[InstCombine] LogicOpc (zext X), C --> zext (LogicOpc X, C) (PR28476)
The benefits of this change include:
1. Remove DeMorgan-matching code that was added specifically to work-around
the missing transform in http://reviews.llvm.org/rL248634.
2. Makes the DeMorgan transform work for vectors too.
3. Fix PR28476: https://llvm.org/bugs/show_bug.cgi?id=28476
Extending this transform to other casts and other associative operators may
be useful too. See https://reviews.llvm.org/D22421 for a prerequisite for
doing that though.
Differential Revision: https://reviews.llvm.org/D22271
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@276221
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