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Justin Bogner [Tue, 26 Apr 2016 20:15:52 +0000 (20:15 +0000)]
PM: Port Internalize to the new pass manager
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267596
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Zachary Turner [Tue, 26 Apr 2016 19:48:18 +0000 (19:48 +0000)]
[llvm-pdbdump] Fix version reading on big endian systems.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267595
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Andrew Kaylor [Tue, 26 Apr 2016 19:46:28 +0000 (19:46 +0000)]
Add optimization bisect opt-in calls for Hexagon passes
Differential Revision: http://reviews.llvm.org/D19509
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267593
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Zachary Turner [Tue, 26 Apr 2016 19:24:10 +0000 (19:24 +0000)]
Fix warnings and -Werror build on clang.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267589
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Zachary Turner [Tue, 26 Apr 2016 18:42:34 +0000 (18:42 +0000)]
Parse and dump PDB DBI Stream Header Information
The DBI stream contains a lot of bookkeeping information for other
streams. In particular it contains information about section contributions
and linked modules. This patch is a first attempt at parsing some of the
information out of the DBI stream. It currently only parses and dumps the
headers of the DBI stream, so none of the module data or section
contribution data is pulled out.
This is just a proof of concept that we understand the basic properties of
the DBI stream's metadata, and followup patches will try to extract more
detailed information out.
Differential Revision: http://reviews.llvm.org/D19500
Reviewed By: majnemer, ruiu
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267585
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Krzysztof Parzyszek [Tue, 26 Apr 2016 18:36:34 +0000 (18:36 +0000)]
[Tail duplication] Handle source registers with subregisters
When a block is tail-duplicated, the PHI nodes from that block are
replaced with appropriate COPY instructions. When those PHI nodes
contained use operands with subregisters, the subregisters were
dropped from the COPY instructions, resulting in incorrect code.
Keep track of the subregister information and use this information
when remapping instructions from the duplicated block.
Differential Revision: http://reviews.llvm.org/D19337
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267583
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Tim Northover [Tue, 26 Apr 2016 18:29:16 +0000 (18:29 +0000)]
Reapply: "ARM: put correct symbol index on indirect pointers in __thread_ptr.""
A latent bug in llvm-objdump used the wrong format specifier on 32-bit
targets, causing the test to fail. This fixes the issue.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267582
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Justin Bogner [Tue, 26 Apr 2016 18:25:30 +0000 (18:25 +0000)]
Internalize: More consistent file header and include guards. NFC
Match the style here to the other headers in Transforms/IPO.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267581
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David Majnemer [Tue, 26 Apr 2016 18:16:49 +0000 (18:16 +0000)]
[SimplifyLibCalls] sprintf doesn't copy null bytes
sprintf doesn't read or copy the terminating null byte from it's string
operands. sprintf will append it's own after processing all of the
format specifiers.
This fixes PR27526.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267580
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Manman Ren [Tue, 26 Apr 2016 18:08:06 +0000 (18:08 +0000)]
Swift Calling Convention: use %RAX for sret.
We don't need to copy the sret argument into %rax upon return.
rdar://
25671494
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267579
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Saleem Abdulrasool [Tue, 26 Apr 2016 17:54:21 +0000 (17:54 +0000)]
tests: tweak MIR for ARM tests to correct MI issues
The Machine Instruction Verifier flagged some issues in the serialized MIR.
Adjust the input to correct them.
Fixes the remaining portion of PR27480.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267578
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Saleem Abdulrasool [Tue, 26 Apr 2016 17:54:16 +0000 (17:54 +0000)]
test: remove some bleeding whitespace
Kill bleeding whitespace. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267577
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Konstantin Zhuravlyov [Tue, 26 Apr 2016 17:24:40 +0000 (17:24 +0000)]
[AMDGPU] Move reserved vgpr count for trap handler usage to SIMachineFunctionInfo + minor commenting changes
Differential Revision: http://reviews.llvm.org/D19537
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267573
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Sanjay Patel [Tue, 26 Apr 2016 17:11:17 +0000 (17:11 +0000)]
[CodeGenPrepare] use branch weight metadata to decide if a select should be turned into a branch
This is part of solving PR27344:
https://llvm.org/bugs/show_bug.cgi?id=27344
CGP should undo the SimplifyCFG transform for the same reason that earlier patches have used this
same mechanism: it's possible that passes between SimplifyCFG and CGP may be able to optimize the
IR further with a select in place.
For the TLI hook default, >99% taken or not taken is chosen as the default threshold for a highly
predictable branch. Even the most limited HW branch predictors will be correct on this branch almost
all the time, so even a massive mispredict penalty perf loss would be overcome by the win from all
the times the branch was predicted correctly.
As a follow-up, we could make the default target hook less conservative by using the SchedMachineModel's
MispredictPenalty. Or we could just let targets override the default by implementing the hook with that
and other target-specific options. Note that trying to statically determine mispredict rates for
close-to-balanced profile weight data is generally impossible if the HW is sufficiently advanced. Ie,
50/50 taken/not-taken might still be 100% predictable.
Finally, note that this patch as-is will not solve PR27344 because the current __builtin_unpredictable()
branch weight default values are 4 and 64. A proposal to change that is in D19435.
Differential Revision: http://reviews.llvm.org/D19488
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267572
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Zachary Turner [Tue, 26 Apr 2016 16:57:53 +0000 (16:57 +0000)]
Fix build broken due to order of initialization problem.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267571
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Zachary Turner [Tue, 26 Apr 2016 16:20:00 +0000 (16:20 +0000)]
Refactor some more PDB reading code into DebugInfoPDB.
Differential Revision: http://reviews.llvm.org/D19445
Reviewed By: David Majnemer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267564
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Konstantin Zhuravlyov [Tue, 26 Apr 2016 15:43:14 +0000 (15:43 +0000)]
[AMDGPU] Reserve VGPRs for trap handler usage if instructed
Differential Revision: http://reviews.llvm.org/D19235
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267563
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Nico Weber [Tue, 26 Apr 2016 13:53:56 +0000 (13:53 +0000)]
Use gcc's rules for parsing gcc-style response files
In gcc, \ escapes every character in response files. It is true that this makes
it harder to mention Windows files in rsp files, but not doing this means clang
disagrees with gcc, and also disagrees with the shell (on non-Windows) which
rsp file quoting is supposed to match. clang isn't free to choose what to do
here.
In general, the idea for response files is to take bits of your command line
and write them to a file unchanged, and have things work the same way. Since
the command line would've been interpreted by the shell, things in the rsp file
need to be subject to the same shell quoting rules.
People who want to put Windows-style paths in their response files either need
to do any of:
* escape their backslashes
* or use clang-cl which uses cl.exe/cmd.exe quoting rules
* pass --rsp-quoting=windows to clang to tell it to use
cl.exe/cmd.exe quoting rules for response files.
Fixes PR27464.
http://reviews.llvm.org/D19417
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267556
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Sam Kolton [Tue, 26 Apr 2016 13:33:56 +0000 (13:33 +0000)]
[AMDGPU] Assembler: basic support for SDWA instructions
Support for SDWA instructions for VOP1 and VOP2 encoding.
Not done yet:
- converters for support optional operands and modifiers
- VOPC
- sext() modifier
- intrinsics
- VOP2b (see vop_dpp.s)
- V_MAC_F32 (see vop_dpp.s)
Differential Revision: http://reviews.llvm.org/D19360
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267553
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Andrey Turetskiy [Tue, 26 Apr 2016 12:18:12 +0000 (12:18 +0000)]
[X86] PR27502: Fix the LEA optimization pass.
Handle MachineBasicBlock as a memory displacement operand in the LEA optimization pass.
Differential Revision: http://reviews.llvm.org/D19409
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267551
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Marcin Koscielnicki [Tue, 26 Apr 2016 10:43:47 +0000 (10:43 +0000)]
[Sparc] Fix build error introduced by rL267545.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267549
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Marcin Koscielnicki [Tue, 26 Apr 2016 10:37:22 +0000 (10:37 +0000)]
[PowerPC] Add support for llvm.thread.pointer
Differential Revision: http://reviews.llvm.org/D19304
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267546
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Marcin Koscielnicki [Tue, 26 Apr 2016 10:37:14 +0000 (10:37 +0000)]
[SPARC] [SSP] Add support for LOAD_STACK_GUARD.
This fixes PR22248 on sparc.
Differential Revision: http://reviews.llvm.org/D19386
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267545
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Marcin Koscielnicki [Tue, 26 Apr 2016 10:37:01 +0000 (10:37 +0000)]
[SPARC] Add support for llvm.thread.pointer.
Differential Revision: http://reviews.llvm.org/D19387
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267544
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Mehdi Amini [Tue, 26 Apr 2016 10:35:01 +0000 (10:35 +0000)]
ThinLTOCodeGenerator: preserve linkonce when in "MustPreserved" set
If the linker specifically requested for a linkonce to be preserved,
we need to make sure we won't drop it even if all the uses in the
current module disappear.
From: Mehdi Amini <mehdi.amini@apple.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267543
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Renato Golin [Tue, 26 Apr 2016 10:02:02 +0000 (10:02 +0000)]
Revert "ARM: put correct symbol index on indirect pointers in __thread_ptr."
This reverts commit r267488, as it broke some ARM buildbots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267541
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Chuang-Yu Cheng [Tue, 26 Apr 2016 07:38:24 +0000 (07:38 +0000)]
[ppc64] Reenable sibling call optimization on ppc64 since fixed tsan library tail-call issue
print-stack-trace.cc test failure of compiler-rt has been fixed by
r266869 (http://reviews.llvm.org/D19148), so reenable sibling call
optimization on ppc64
Reviewers: nemanjai kbarton
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267527
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Sanjoy Das [Tue, 26 Apr 2016 05:59:14 +0000 (05:59 +0000)]
Align case statements (whitespace-only cleanup)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267525
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Sanjoy Das [Tue, 26 Apr 2016 05:59:08 +0000 (05:59 +0000)]
Symbolize operand bundle blocks for bcanalyzer
Reviewers: joker.eph
Subscribers: mcrosier, llvm-commits
Differential Revision: http://reviews.llvm.org/D19523
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267524
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Craig Topper [Tue, 26 Apr 2016 05:26:51 +0000 (05:26 +0000)]
[AArch64] Expand v1i64 and v2i64 ctlz.
The default is legal, which results in 'Cannot select' errors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267522
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Craig Topper [Tue, 26 Apr 2016 05:04:37 +0000 (05:04 +0000)]
[ARM] Expand vector ctlz_zero_undef so it becomes ctlz.
The default is Legal, which results in 'Cannot select' errors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267521
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Craig Topper [Tue, 26 Apr 2016 05:04:33 +0000 (05:04 +0000)]
[ARM] Expand v1i64 and v2i64 ctlz.
The default is legal, which results in 'Cannot select' errors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267520
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Dehao Chen [Tue, 26 Apr 2016 04:59:11 +0000 (04:59 +0000)]
Tune basic block annotation algorithm.
Summary:
Instead of using maximum IR weight as the basic block weight, this patch uses the voting algorithm to find the most likely weight for the basic block. This can effectively avoid the cases when some IRs are annotated incorrectly due to code motion of the profiled binary.
This patch also updates propagate.ll unittest to include discriminator in the input file so that it is testing something meaningful.
Reviewers: davidxl, dnovillo
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D19301
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267519
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Bill Seurer [Tue, 26 Apr 2016 03:59:19 +0000 (03:59 +0000)]
[powerpc] mark JIT tests as UNSUPPORTED on powerpc64 big endian
Some of the JIT tests began failing with "[llvm] r266663 - [Orc] Re-commit
r266581 with fixes for MSVC, and format cleanups." on powerpc64 big endian.
To get the buildbots running I am marking these as UNSUPPORTED for now.
If this is fixed remove the UNSUPPORTED flag "powerpc64-unknown-linux-gnu".
In r267516 I marked these as XFAIL but they succeed on some of the bots
on stage1.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267518
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Richard Trieu [Tue, 26 Apr 2016 03:43:49 +0000 (03:43 +0000)]
Pass the test file in through stdin instead of by filename.
When passed in via filename, this test will fail if the path to the test
has the strings "f1" and "f2" in somewhere. Pass the file through stdin
to prevent test failures due to coincidences in path names.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267517
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Bill Seurer [Tue, 26 Apr 2016 02:33:22 +0000 (02:33 +0000)]
[powerpc] mark JIT tests as XFAIL on powerpc64 big endian
Some of the JIT tests began failing with "[llvm] r266663 - [Orc] Re-commit
r266581 with fixes for MSVC, and format cleanups." on powerpc64 big endian.
To get the buildbots running I am marking these as XFAIL for now.
If this is fixed remove the XFAIL flag "powerpc64-unknown-linux-gnu".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267516
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Hal Finkel [Tue, 26 Apr 2016 02:06:06 +0000 (02:06 +0000)]
[SimplifyCFG] Preserve !llvm.mem.parallel_loop_access when merging
When SimplifyCFG merges identical instructions from both sides of a diamond, it
can preserve !llvm.mem.parallel_loop_access (as it does with most of the other
metadata). There's no real data or control dependency change in this case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267515
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Hal Finkel [Tue, 26 Apr 2016 02:00:36 +0000 (02:00 +0000)]
[LoopVectorize] Don't consider conditional-load dereferenceability for marked parallel loops
I really thought we were doing this already, but we were not. Given this input:
void Test(int *res, int *c, int *d, int *p) {
for (int i = 0; i < 16; i++)
res[i] = (p[i] == 0) ? res[i] : res[i] + d[i];
}
we did not vectorize the loop. Even with "assume_safety" the check that we
don't if-convert conditionally-executed loads (to protect against
data-dependent deferenceability) was not elided.
One subtlety: As implemented, it will still prefer to use a masked-load
instrinsic (given target support) over the speculated load. The choice here
seems architecture specific; the best option depends on how expensive the
masked load is compared to a regular load. Ideally, using the masked load still
reduces unnecessary memory traffic, and so should be preferred. If we'd rather
do it the other way, flipping the order of the checks is easy.
The LangRef is updated to make explicit that llvm.mem.parallel_loop_access also
implies that if conversion is okay.
Differential Revision: http://reviews.llvm.org/D19512
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267514
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Lang Hames [Tue, 26 Apr 2016 01:45:25 +0000 (01:45 +0000)]
[lli] Fix a sign-compare warning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267512
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Dan Gohman [Tue, 26 Apr 2016 01:40:56 +0000 (01:40 +0000)]
[WebAssembly] Account for implicit operands when computing operand indices.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267511
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Lang Hames [Tue, 26 Apr 2016 01:27:54 +0000 (01:27 +0000)]
[ORC] Try to work around a GCC 4.7 bug triggered by r267457.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267510
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David Majnemer [Tue, 26 Apr 2016 01:05:00 +0000 (01:05 +0000)]
[SROA] Don't falsely report that changes have occured
We would report that the function changed despite creating no new
allocas or performing any promotion.
This fixes PR27316.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267507
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Andrew Kaylor [Tue, 26 Apr 2016 00:56:36 +0000 (00:56 +0000)]
Reverting Thumb2SizeReduction opt bisect change to fix failing buildbots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267506
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Sanjay Patel [Tue, 26 Apr 2016 00:47:39 +0000 (00:47 +0000)]
[CodeGenPrepare] don't convert an unpredictable select into control flow
Suggested in the review of D19488:
http://reviews.llvm.org/D19488
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267504
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Junmo Park [Tue, 26 Apr 2016 00:37:46 +0000 (00:37 +0000)]
Remove MinLatency in SchedMachineModel. NFC.
Summary:
We don't use MinLatency any more since r184032.
Reviewers: atrick, hfinkel, mcrosier
Differential Revision: http://reviews.llvm.org/D19474
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267502
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Justin Bogner [Tue, 26 Apr 2016 00:28:01 +0000 (00:28 +0000)]
PM: Port GlobalOpt to the new pass manager
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267499
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Justin Bogner [Tue, 26 Apr 2016 00:27:56 +0000 (00:27 +0000)]
PM: Convert the logic for GlobalOpt into static functions. NFC
Pass all of the state we need around as arguments, so that these
functions are easier to reuse. There is one part of this that is
unusual: we pass around a functor to look up a DomTree for a function.
This will be a necessary abstraction when we try to use this code in
both the legacy and the new pass manager.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267498
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Ahmed Bougacha [Tue, 26 Apr 2016 00:00:48 +0000 (00:00 +0000)]
[X86] Use LivePhysRegs in X86FixupBWInsts.
Kill-flags, which computeRegisterLiveness uses, are not reliable.
LivePhysRegs is.
Differential Revision: http://reviews.llvm.org/D19472
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267495
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Justin Bogner [Mon, 25 Apr 2016 23:36:50 +0000 (23:36 +0000)]
GlobalOpt: Convert a bunch of tests from grep to FileCheck
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267493
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Sanjay Patel [Mon, 25 Apr 2016 23:15:16 +0000 (23:15 +0000)]
Add check for "branch_weights" with prof metadata
While we're here, fix the comment and variable names to make it
clear that these are raw weights, not percentages.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267491
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Chris Bieneman [Mon, 25 Apr 2016 23:02:47 +0000 (23:02 +0000)]
[CMake] If set we should pass LLVM_VERSION_INFO into config.h
Autoconf used to support setting LLVM_VERSION_INFO and there is some code filtered around llvm in Support/CommandLine.cpp and LTO/LTOCodeGenerator.cpp that uses it if it is set.
We also shouldn't be explicitly setting it as a define on llvm-shlib. It is pointless there because there is no code using it in llvm-shlib, and it is better to have it as part of the generated config.h so that it is available everywhere.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267490
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James Y Knight [Mon, 25 Apr 2016 22:54:09 +0000 (22:54 +0000)]
[Sparc] Fix double-float fabs and fneg on little endian CPUs.
The SparcV8 fneg and fabs instructions interestingly come only in a
single-float variant. Since the sign bit is always the topmost bit no
matter what size float it is, you simply operate on the high
subregister, as if it were a single float.
However, the layout of double-floats in the float registers is reversed
on little-endian CPUs, so that the high bits are in the second
subregister, rather than the first.
Thus, this expansion must check the endianness to use the correct
subregister.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267489
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Tim Northover [Mon, 25 Apr 2016 22:36:07 +0000 (22:36 +0000)]
ARM: put correct symbol index on indirect pointers in __thread_ptr.
Otherwise the linker has no idea what should be resolved.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267488
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Andrew Kaylor [Mon, 25 Apr 2016 22:27:30 +0000 (22:27 +0000)]
Fix build warning
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267487
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Andrew Kaylor [Mon, 25 Apr 2016 22:23:44 +0000 (22:23 +0000)]
Add optimization bisect opt-in calls for AMDGPU passes
Differential Revision: http://reviews.llvm.org/D19450
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267485
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Amaury Sechet [Mon, 25 Apr 2016 22:23:35 +0000 (22:23 +0000)]
Reformat LLVMConstPointerNull. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267484
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Amaury Sechet [Mon, 25 Apr 2016 22:23:30 +0000 (22:23 +0000)]
Comment formating. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267483
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Arch D. Robison [Mon, 25 Apr 2016 22:22:39 +0000 (22:22 +0000)]
Optimize store of "bitcast" from vector to aggregate.
This patch is what was the "instcombine" portion of D14185, with an additional
test added (see julia_pseudovec in test/Transforms/InstCombine/insert-val-extract-elem.ll).
The patch causes instcombine to replace sequences of extractelement-insertvalue-store
that act essentially like a bitcast followed by a store.
Differential review: http://reviews.llvm.org/D14260
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267482
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Philip Reames [Mon, 25 Apr 2016 22:21:24 +0000 (22:21 +0000)]
[LVI] Make a precondition explicit rather than handling a case which never happens [NFC]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267481
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Andrew Kaylor [Mon, 25 Apr 2016 22:01:04 +0000 (22:01 +0000)]
Add optimization bisect opt-in calls for ARM passes
Differential Revision: http://reviews.llvm.org/D19449
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267480
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Andrew Kaylor [Mon, 25 Apr 2016 21:58:52 +0000 (21:58 +0000)]
Add optimization bisect opt-in calls for AArch64 passes
Differential Revision: http://reviews.llvm.org/D19394
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267479
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Krzysztof Parzyszek [Mon, 25 Apr 2016 21:28:52 +0000 (21:28 +0000)]
Add accidentally deleted "break"
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267476
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Lang Hames [Mon, 25 Apr 2016 21:21:20 +0000 (21:21 +0000)]
[ORC] clang-format code that was touched in r267457. NFC.
Commit r267457 made a lot of type-substitutions threw off code formatting and
alignment. This patch should tidy those changes up.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267475
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Tim Northover [Mon, 25 Apr 2016 21:12:04 +0000 (21:12 +0000)]
ARM: put extern __thread stubs in a special section.
The linker needs to know that the symbols are thread-local to do its job
properly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267473
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Teresa Johnson [Mon, 25 Apr 2016 21:09:51 +0000 (21:09 +0000)]
[ThinLTO] Introduce typedef for commonly-used map type (NFC)
Add a typedef for the std::map<GlobalValue::GUID, GlobalValueSummary *>
map that is passed around to identify summaries for values defined in a
particular module. This shortens up declarations in a variety of places.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267471
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Krzysztof Parzyszek [Mon, 25 Apr 2016 21:05:19 +0000 (21:05 +0000)]
[Hexagon] Few fixes for exception handling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267469
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Quentin Colombet [Mon, 25 Apr 2016 20:54:08 +0000 (20:54 +0000)]
Re-apply r267206 with a fix for the encoding problem: when the immediate of
log2(Mask) is smaller than 32, we must use the 32-bit variant because the 64-bit
variant cannot encode it. Therefore, set the subreg part accordingly.
[AArch64] Fix optimizeCondBranch logic.
The opcode for the optimized branch does not depend on the size
of the activate bits in the AND masks, but the AND opcode itself.
Indeed, we need to use a X or W variant based on the AND variant
not based on whether the mask fits into the related variant.
Otherwise, we may end up using the W variant of the optimized branch
for 64-bit register inputs!
This fixes the last make check verifier issues for AArch64: PR27479.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267465
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Etienne Bergeron [Mon, 25 Apr 2016 20:15:33 +0000 (20:15 +0000)]
Cleanup redundant expression in InstCombineAndOrXor.
Summary:
The expression is redundant on both side of operator |.
detected by : http://reviews.llvm.org/D19451
Reviewers: rnk, majnemer
Subscribers: cfe-commits
Differential Revision: http://reviews.llvm.org/D19459
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267458
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Lang Hames [Mon, 25 Apr 2016 19:56:45 +0000 (19:56 +0000)]
[ORC] Thread Error/Expected through the RPC library.
This replaces use of std::error_code and ErrorOr in the ORC RPC support library
with Error and Expected. This required updating the OrcRemoteTarget API, Client,
and server code, as well as updating the Orc C API.
This patch also fixes several instances where Errors were dropped.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267457
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Matt Arsenault [Mon, 25 Apr 2016 19:53:22 +0000 (19:53 +0000)]
AMDGPU/SI: Optimize adjacent s_nop instructions
Use the operand for how long to wait. This is somewhat
distasteful, since it would be better to just emit s_nop
with the right argument in the first place. This would require
changing TII::insertNoop to emit N operands, which would be easy.
Slightly more problematic is the post-RA scheduler and hazard recognizer
represent nops as a single null node, and would require inventing
another way of representing N nops.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267456
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Kostya Serebryany [Mon, 25 Apr 2016 19:41:45 +0000 (19:41 +0000)]
[libFuzzer] remove dead code
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267455
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Matt Arsenault [Mon, 25 Apr 2016 19:27:24 +0000 (19:27 +0000)]
AMDGPU: Implement addrspacecast
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267452
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Matt Arsenault [Mon, 25 Apr 2016 19:27:18 +0000 (19:27 +0000)]
AMDGPU: Add queue ptr intrinsic
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267451
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Matt Arsenault [Mon, 25 Apr 2016 19:27:13 +0000 (19:27 +0000)]
Add useful helpers to AddrSpaceCastInst
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267450
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Matt Arsenault [Mon, 25 Apr 2016 19:27:09 +0000 (19:27 +0000)]
AMDGPU: Add DAG to debug dump
Also reorder case to match enum order
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267449
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Lang Hames [Mon, 25 Apr 2016 19:21:57 +0000 (19:21 +0000)]
[Support] Fix latent bugs in Expected and ExitOnError that were preventing them
from working with reference types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267448
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Philip Reames [Mon, 25 Apr 2016 18:48:43 +0000 (18:48 +0000)]
[LVI] Clarify comments describing the lattice values
There has been much recent confusion about the partition in the lattice between constant and non-constant values. Hopefully, documenting this will prevent confusion going forward.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267440
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Philip Reames [Mon, 25 Apr 2016 18:30:31 +0000 (18:30 +0000)]
[LVI] Split solveBlockValueConstantRange into two [NFC]
This function handled both unary and binary operators. Cloning and specializing leads to much easier to follow code with minimal duplicatation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267438
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Evgeniy Stepanov [Mon, 25 Apr 2016 18:23:29 +0000 (18:23 +0000)]
[gold] Fix linkInModule and extend common.ll test.
Fix early exit from linkInModule. IRMover::move returns false on
success and true on error.
Add a few more cases of merged common linkage variables with
different sizes and alignments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267437
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Chad Rosier [Mon, 25 Apr 2016 18:20:27 +0000 (18:20 +0000)]
Fix typo from r267432.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267436
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Krzysztof Parzyszek [Mon, 25 Apr 2016 18:09:36 +0000 (18:09 +0000)]
[Hexagon] Use llvm-mc instead of llc in an MC testcase
Remember to svn add the new file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267435
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Krzysztof Parzyszek [Mon, 25 Apr 2016 18:08:33 +0000 (18:08 +0000)]
[Hexagon] Use llvm-mc instead of llc in an MC testcase
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267434
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Krzysztof Parzyszek [Mon, 25 Apr 2016 17:49:44 +0000 (17:49 +0000)]
[Hexagon] Register save/restore functions do not follow regular conventions
Do not mark them as modifying any of the volatile registers by default.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267433
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Chad Rosier [Mon, 25 Apr 2016 17:41:48 +0000 (17:41 +0000)]
[ValueTracking] Add an additional test case for r266767 where one operand is a const.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267432
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Zachary Turner [Mon, 25 Apr 2016 17:38:08 +0000 (17:38 +0000)]
Resubmit "Refactor raw pdb dumper into library"
This fixes a number of endianness issues as well as an ODR
violation that hopefully causes everything to be happy.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267431
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Chad Rosier [Mon, 25 Apr 2016 17:23:36 +0000 (17:23 +0000)]
[ValueTracking] Improve isImpliedCondition when the dominating cond is false.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267430
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Davide Italiano [Mon, 25 Apr 2016 17:18:45 +0000 (17:18 +0000)]
[gold-plugin] Remove dead assignment. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267429
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Davide Italiano [Mon, 25 Apr 2016 17:13:39 +0000 (17:13 +0000)]
[ELFRelocs] Other architectures do not have *_NUM reloc.
It also seems to be unused. Get rid of it.
Thanks to Rafael for pointing out.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267428
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Adrian Prantl [Mon, 25 Apr 2016 17:04:32 +0000 (17:04 +0000)]
dsymutil: Only warn about clang module DWO id mismatches in verbose mode.
Until PR27449 (https://llvm.org/bugs/show_bug.cgi?id=27449) is fixed in
clang this warning is pointless, since ASTFileSignatures will change
randomly when a module is rebuilt.
rdar://problem/
25610919
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267427
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Sanjay Patel [Mon, 25 Apr 2016 16:56:52 +0000 (16:56 +0000)]
add tests for potential CGP transform (PR27344)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267426
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Jacques Pienaar [Mon, 25 Apr 2016 16:41:21 +0000 (16:41 +0000)]
[lanai] Expand findClosestSuitableAluInstr check to consider offset register.
Previously findClosestSuitableAluInstr was only considering the base register when checking the current instruction for suitability. Expand check to consider the offset if the offset is a register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267424
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Marcin Koscielnicki [Mon, 25 Apr 2016 15:43:44 +0000 (15:43 +0000)]
[PR27390] [CodeGen] Reject indexed loads in CombinerDAG.
visitAND, when folding and (load) forgets to check which output of
an indexed load is involved, happily folding the updated address
output on the following testcase:
target datalayout = "e-m:e-i64:64-n32:64"
target triple = "powerpc64le-unknown-linux-gnu"
%typ = type { i32, i32 }
define signext i32 @_Z8access_pP1Tc(%typ* %p, i8 zeroext %type) {
%b = getelementptr inbounds %typ, %typ* %p, i64 0, i32 1
%1 = load i32, i32* %b, align 4
%2 = ptrtoint i32* %b to i64
%3 = and i64 %2, -
35184372088833
%4 = inttoptr i64 %3 to i32*
%_msld = load i32, i32* %4, align 4
%zzz = add i32 %1, %_msld
ret i32 %zzz
}
Fix this by checking ResNo.
I've found a few more places that currently neglect to check for
indexed load, and tightened them up as well, but I don't have test
cases for them. In fact, they might not be triggerable at all,
at least with current targets. Still, better safe than sorry.
Differential Revision: http://reviews.llvm.org/D19202
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267420
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Hrvoje Varga [Mon, 25 Apr 2016 15:40:08 +0000 (15:40 +0000)]
[mips][microMIPS] Revert commit r267137
Commit r267137 was the reason for failing tests in LLVM test suite.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267419
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Zlatko Buljan [Mon, 25 Apr 2016 15:34:57 +0000 (15:34 +0000)]
[mips][microMIPS] Revert commit r266977
Commit r266977 was reason for failing LLVM test suite with error message: fatal error: error in backend: Cannot select: t17: i32 = rotr t2, t11 ...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267418
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Sanjay Patel [Mon, 25 Apr 2016 15:26:57 +0000 (15:26 +0000)]
[x86] auto-generate checks for cmov tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267417
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Etienne Bergeron [Mon, 25 Apr 2016 15:06:33 +0000 (15:06 +0000)]
Fix incorrect redundant expression in target AMDGPU.
Summary:
The expression is detected as a redundant expression.
Turn out, this is probably a bug.
```
/home/etienneb/llvm/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp:306:26: warning: both side of operator are equivalent [misc-redundant-expression]
if (isSMRD(*FirstLdSt) && isSMRD(*FirstLdSt)) {
```
Reviewers: rnk, tstellarAMD
Subscribers: arsenm, cfe-commits
Differential Revision: http://reviews.llvm.org/D19460
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267415
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David Majnemer [Mon, 25 Apr 2016 14:31:32 +0000 (14:31 +0000)]
[WinEH] Update SplitAnalysis::computeLastSplitPoint to cope with multiple EH successors
We didn't have logic to correctly handle CFGs where there was more than
one EH-pad successor (these are novel with WinEH).
There were situations where a register was live in one exceptional
successor but not another but the code as written would only consider
the first exceptional successor it found.
This resulted in split points which were insufficiently early if an
invoke was present.
This fixes PR27501.
N.B. This removes getLandingPadSuccessor.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267412
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Silviu Baranga [Mon, 25 Apr 2016 14:29:18 +0000 (14:29 +0000)]
[ARM] Add support for the X asm constraint
Summary:
This patch adds support for the X asm constraint.
To do this, we lower the constraint to either a "w" or "r" constraint
depending on the operand type (both constraints are supported on ARM).
Fixes PR26493
Reviewers: t.p.northover, echristo, rengolin
Subscribers: joker.eph, jgreenhalgh, aemerson, rengolin, llvm-commits
Differential Revision: http://reviews.llvm.org/D19061
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267411
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Artem Tamazov [Mon, 25 Apr 2016 14:13:51 +0000 (14:13 +0000)]
[AMDGPU][llvm-mc] s_getreg/setreg* - Add hwreg(...) syntax.
Added hwreg(reg[,offset,width]) syntax.
Default offset = 0, default width = 32.
Possibility to specify 16-bit immediate kept.
Added out-of-range checks.
Disassembling is always to hwreg(...) format.
Tests updated/added.
Differential Revision: http://reviews.llvm.org/D19329
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267410
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Anna Thomas [Mon, 25 Apr 2016 13:58:05 +0000 (13:58 +0000)]
Test commit: modified comment. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@267406
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