OSDN Git Service
Xiaojuan Yang [Mon, 6 Jun 2022 12:43:32 +0000 (20:43 +0800)]
tests/tcg/loongarch64: Add hello/memory test in loongarch64 system
- We write a very minimal softmmu harness.
- This is a very simple smoke test with no need to run a full Linux/kernel.
- The Makefile.softmmu-target record the rule to run.
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <
20220606124333.
2060567-43-yangxiaojuan@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Xiaojuan Yang [Mon, 6 Jun 2022 12:43:31 +0000 (20:43 +0800)]
target/loongarch: Add gdb support.
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <
20220606124333.
2060567-42-yangxiaojuan@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Xiaojuan Yang [Mon, 6 Jun 2022 12:43:30 +0000 (20:43 +0800)]
hw/loongarch: Add LoongArch virt power manager support.
This is a placeholder for missing ACPI, and will eventually be replaced.
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
Acked-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <
20220606124333.
2060567-41-yangxiaojuan@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Xiaojuan Yang [Mon, 6 Jun 2022 12:43:29 +0000 (20:43 +0800)]
hw/loongarch: Add LoongArch load elf function.
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <
20220606124333.
2060567-40-yangxiaojuan@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Xiaojuan Yang [Mon, 6 Jun 2022 12:43:28 +0000 (20:43 +0800)]
hw/loongarch: Add LoongArch ls7a rtc device support
This patch add ls7a rtc device support.
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <
20220606124333.
2060567-39-yangxiaojuan@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Xiaojuan Yang [Mon, 6 Jun 2022 12:43:27 +0000 (20:43 +0800)]
hw/loongarch: Add some devices support for 3A5000.
1.Add uart,virtio-net,vga and usb for 3A5000.
2.Add irq set and map for the pci host. Non pci device
use irq 0-16, pci device use 16-64.
3.Add some unimplented device to emulate guest unused
memory space.
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
Acked-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <
20220606124333.
2060567-38-yangxiaojuan@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Xiaojuan Yang [Mon, 6 Jun 2022 12:43:26 +0000 (20:43 +0800)]
Enable common virtio pci support for LoongArch
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <
20220606124333.
2060567-37-yangxiaojuan@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Xiaojuan Yang [Mon, 6 Jun 2022 12:43:25 +0000 (20:43 +0800)]
hw/loongarch: Add irq hierarchy for the system
This patch add the irq hierarchy for the virt board.
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <
20220606124333.
2060567-36-yangxiaojuan@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Xiaojuan Yang [Mon, 6 Jun 2022 12:43:24 +0000 (20:43 +0800)]
hw/intc: Add LoongArch extioi interrupt controller(EIOINTC)
This patch realize the EIOINTC interrupt controller.
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <
20220606124333.
2060567-35-yangxiaojuan@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Xiaojuan Yang [Mon, 6 Jun 2022 12:43:23 +0000 (20:43 +0800)]
hw/intc: Add LoongArch ls7a msi interrupt controller support(PCH-MSI)
This patch realize PCH-MSI interrupt controller.
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <
20220606124333.
2060567-34-yangxiaojuan@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Xiaojuan Yang [Mon, 6 Jun 2022 12:43:22 +0000 (20:43 +0800)]
hw/intc: Add LoongArch ls7a interrupt controller support(PCH-PIC)
This patch realize the PCH-PIC interrupt controller.
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <
20220606124333.
2060567-33-yangxiaojuan@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Xiaojuan Yang [Mon, 6 Jun 2022 12:43:21 +0000 (20:43 +0800)]
hw/loongarch: Add LoongArch ipi interrupt support(IPI)
This patch realize the IPI interrupt controller.
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <
20220606124333.
2060567-32-yangxiaojuan@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Xiaojuan Yang [Mon, 6 Jun 2022 12:43:20 +0000 (20:43 +0800)]
hw/loongarch: Add support loongson3 virt machine type.
Emulate a 3A5000 board use the new loongarch instruction.
3A5000 belongs to the Loongson3 series processors.
The board consists of a 3A5000 cpu model and the virt
bridge. The host 3A5000 board is really complicated and
contains many functions.Now for the tcg softmmu mode
only part functions are emulated.
More detailed info you can see
https://github.com/loongson/LoongArch-Documentation
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <
20220606124333.
2060567-31-yangxiaojuan@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Xiaojuan Yang [Mon, 6 Jun 2022 12:43:19 +0000 (20:43 +0800)]
target/loongarch: Add timer related instructions support.
This includes:
-RDTIME{L/H}.W
-RDTIME.D
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <
20220606124333.
2060567-30-yangxiaojuan@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Xiaojuan Yang [Mon, 6 Jun 2022 12:43:18 +0000 (20:43 +0800)]
target/loongarch: Add other core instructions support
This includes:
-CACOP
-LDDIR
-LDPTE
-ERTN
-DBCL
-IDLE
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <
20220606124333.
2060567-29-yangxiaojuan@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Xiaojuan Yang [Mon, 6 Jun 2022 12:43:17 +0000 (20:43 +0800)]
target/loongarch: Add TLB instruction support
This includes:
- TLBSRCH
- TLBRD
- TLBWR
- TLBFILL
- TLBCLR
- TLBFLUSH
- INVTLB
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <
20220606124333.
2060567-28-yangxiaojuan@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Xiaojuan Yang [Mon, 6 Jun 2022 12:43:16 +0000 (20:43 +0800)]
target/loongarch: Add LoongArch IOCSR instruction
This includes:
- IOCSR{RD/WR}.{B/H/W/D}
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <
20220606124333.
2060567-27-yangxiaojuan@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Xiaojuan Yang [Mon, 6 Jun 2022 12:43:15 +0000 (20:43 +0800)]
target/loongarch: Add LoongArch CSR instruction
This includes:
- CSRRD
- CSRWR
- CSRXCHG
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <
20220606124333.
2060567-26-yangxiaojuan@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Xiaojuan Yang [Mon, 6 Jun 2022 12:43:14 +0000 (20:43 +0800)]
target/loongarch: Add constant timer support
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <
20220606124333.
2060567-25-yangxiaojuan@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Xiaojuan Yang [Mon, 6 Jun 2022 12:43:13 +0000 (20:43 +0800)]
target/loongarch: Add LoongArch interrupt and exception handle
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <
20220606124333.
2060567-24-yangxiaojuan@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Xiaojuan Yang [Mon, 6 Jun 2022 12:43:12 +0000 (20:43 +0800)]
target/loongarch: Add MMU support for LoongArch CPU.
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <
20220606124333.
2060567-23-yangxiaojuan@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Xiaojuan Yang [Mon, 6 Jun 2022 12:43:11 +0000 (20:43 +0800)]
target/loongarch: Implement qmp_query_cpu_definitions()
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <
20220606124333.
2060567-22-yangxiaojuan@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Xiaojuan Yang [Mon, 6 Jun 2022 12:43:10 +0000 (20:43 +0800)]
target/loongarch: Add basic vmstate description of CPU.
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <
20220606124333.
2060567-21-yangxiaojuan@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Xiaojuan Yang [Mon, 6 Jun 2022 12:43:09 +0000 (20:43 +0800)]
target/loongarch: Add CSRs definition
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <
20220606124333.
2060567-20-yangxiaojuan@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Xiaojuan Yang [Mon, 6 Jun 2022 12:43:08 +0000 (20:43 +0800)]
target/loongarch: Add system emulation introduction
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <
20220606124333.
2060567-19-yangxiaojuan@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Song Gao [Mon, 6 Jun 2022 12:43:07 +0000 (20:43 +0800)]
target/loongarch: Add target build suport
Signed-off-by: Song Gao <gaosong@loongson.cn>
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <
20220606124333.
2060567-18-yangxiaojuan@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Song Gao [Mon, 6 Jun 2022 12:43:06 +0000 (20:43 +0800)]
target/loongarch: Add disassembler
This patch adds support for disassembling via option '-d in_asm'.
Signed-off-by: Song Gao <gaosong@loongson.cn>
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <
20220606124333.
2060567-17-yangxiaojuan@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Song Gao [Mon, 6 Jun 2022 12:43:05 +0000 (20:43 +0800)]
target/loongarch: Add branch instruction translation
This includes:
- BEQ, BNE, BLT[U], BGE[U]
- BEQZ, BNEZ
- B
- BL
- JIRL
- BCEQZ, BCNEZ
Signed-off-by: Song Gao <gaosong@loongson.cn>
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <
20220606124333.
2060567-16-yangxiaojuan@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Song Gao [Mon, 6 Jun 2022 12:43:04 +0000 (20:43 +0800)]
target/loongarch: Add floating point load/store instruction translation
This includes:
- FLD.{S/D}, FST.{S/D}
- FLDX.{S/D}, FSTX.{S/D}
- FLD{GT/LE}.{S/D}, FST{GT/LE}.{S/D}
Signed-off-by: Song Gao <gaosong@loongson.cn>
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <
20220606124333.
2060567-15-yangxiaojuan@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Song Gao [Mon, 6 Jun 2022 12:43:03 +0000 (20:43 +0800)]
target/loongarch: Add floating point move instruction translation
This includes:
- FMOV.{S/D}
- FSEL
- MOVGR2FR.{W/D}, MOVGR2FRH.W
- MOVFR2GR.{S/D}, MOVFRH2GR.S
- MOVGR2FCSR, MOVFCSR2GR
- MOVFR2CF, MOVCF2FR
- MOVGR2CF, MOVCF2GR
Signed-off-by: Song Gao <gaosong@loongson.cn>
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <
20220606124333.
2060567-14-yangxiaojuan@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Song Gao [Mon, 6 Jun 2022 12:43:02 +0000 (20:43 +0800)]
target/loongarch: Add floating point conversion instruction translation
This includes:
- FCVT.S.D, FCVT.D.S
- FFINT.{S/D}.{W/L}, FTINT.{W/L}.{S/D}
- FTINT{RM/RP/RZ/RNE}.{W/L}.{S/D}
- FRINT.{S/D}
Signed-off-by: Song Gao <gaosong@loongson.cn>
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <
20220606124333.
2060567-13-yangxiaojuan@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Song Gao [Mon, 6 Jun 2022 12:43:01 +0000 (20:43 +0800)]
target/loongarch: Add floating point comparison instruction translation
This includes:
- FCMP.cond.{S/D}
Signed-off-by: Song Gao <gaosong@loongson.cn>
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <
20220606124333.
2060567-12-yangxiaojuan@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Song Gao [Mon, 6 Jun 2022 12:43:00 +0000 (20:43 +0800)]
target/loongarch: Add floating point arithmetic instruction translation
This includes:
- F{ADD/SUB/MUL/DIV}.{S/D}
- F{MADD/MSUB/NMADD/NMSUB}.{S/D}
- F{MAX/MIN}.{S/D}
- F{MAXA/MINA}.{S/D}
- F{ABS/NEG}.{S/D}
- F{SQRT/RECIP/RSQRT}.{S/D}
- F{SCALEB/LOGB/COPYSIGN}.{S/D}
- FCLASS.{S/D}
Signed-off-by: Song Gao <gaosong@loongson.cn>
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <
20220606124333.
2060567-11-yangxiaojuan@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Song Gao [Mon, 6 Jun 2022 12:42:59 +0000 (20:42 +0800)]
target/loongarch: Add fixed point extra instruction translation
This includes:
- CRC[C].W.{B/H/W/D}.W
- SYSCALL
- BREAK
- ASRT{LE/GT}.D
- RDTIME{L/H}.W, RDTIME.D
- CPUCFG
Signed-off-by: Song Gao <gaosong@loongson.cn>
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <
20220606124333.
2060567-10-yangxiaojuan@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Song Gao [Mon, 6 Jun 2022 12:42:58 +0000 (20:42 +0800)]
target/loongarch: Add fixed point atomic instruction translation
This includes:
- LL.{W/D}, SC.{W/D}
- AM{SWAP/ADD/AND/OR/XOR/MAX/MIN}[_DB].{W/D}
- AM{MAX/MIN}[_DB].{WU/DU}
Signed-off-by: Song Gao <gaosong@loongson.cn>
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <
20220606124333.
2060567-9-yangxiaojuan@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Song Gao [Mon, 6 Jun 2022 12:42:57 +0000 (20:42 +0800)]
target/loongarch: Add fixed point load/store instruction translation
This includes:
- LD.{B[U]/H[U]/W[U]/D}, ST.{B/H/W/D}
- LDX.{B[U]/H[U]/W[U]/D}, STX.{B/H/W/D}
- LDPTR.{W/D}, STPTR.{W/D}
- PRELD
- LD{GT/LE}.{B/H/W/D}, ST{GT/LE}.{B/H/W/D}
- DBAR, IBAR
Signed-off-by: Song Gao <gaosong@loongson.cn>
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <
20220606124333.
2060567-8-yangxiaojuan@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Song Gao [Mon, 6 Jun 2022 12:42:56 +0000 (20:42 +0800)]
target/loongarch: Add fixed point bit instruction translation
This includes:
- EXT.W.{B/H}
- CL{O/Z}.{W/D}, CT{O/Z}.{W/D}
- BYTEPICK.{W/D}
- REVB.{2H/4H/2W/D}
- REVH.{2W/D}
- BITREV.{4B/8B}, BITREV.{W/D}
- BSTRINS.{W/D}, BSTRPICK.{W/D}
- MASKEQZ, MASKNEZ
Signed-off-by: Song Gao <gaosong@loongson.cn>
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <
20220606124333.
2060567-7-yangxiaojuan@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Song Gao [Mon, 6 Jun 2022 12:42:55 +0000 (20:42 +0800)]
target/loongarch: Add fixed point shift instruction translation
This includes:
- SLL.W, SRL.W, SRA.W, ROTR.W
- SLLI.W, SRLI.W, SRAI.W, ROTRI.W
- SLL.D, SRL.D, SRA.D, ROTR.D
- SLLI.D, SRLI.D, SRAI.D, ROTRI.D
Signed-off-by: Song Gao <gaosong@loongson.cn>
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <
20220606124333.
2060567-6-yangxiaojuan@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Song Gao [Mon, 6 Jun 2022 12:42:54 +0000 (20:42 +0800)]
target/loongarch: Add fixed point arithmetic instruction translation
This includes:
- ADD.{W/D}, SUB.{W/D}
- ADDI.{W/D}, ADDU16ID
- ALSL.{W[U]/D}
- LU12I.W, LU32I.D LU52I.D
- SLT[U], SLT[U]I
- PCADDI, PCADDU12I, PCADDU18I, PCALAU12I
- AND, OR, NOR, XOR, ANDN, ORN
- MUL.{W/D}, MULH.{W[U]/D[U]}
- MULW.D.W[U]
- DIV.{W[U]/D[U]}, MOD.{W[U]/D[U]}
- ANDI, ORI, XORI
Signed-off-by: Song Gao <gaosong@loongson.cn>
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <
20220606124333.
2060567-5-yangxiaojuan@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Song Gao [Mon, 6 Jun 2022 12:42:53 +0000 (20:42 +0800)]
target/loongarch: Add main translation routines
This patch adds main translation routines and
basic functions for translation.
Signed-off-by: Song Gao <gaosong@loongson.cn>
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <
20220606124333.
2060567-4-yangxiaojuan@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Song Gao [Mon, 6 Jun 2022 12:42:52 +0000 (20:42 +0800)]
target/loongarch: Add core definition
This patch adds target state header, target definitions
and initialization routines.
Signed-off-by: Song Gao <gaosong@loongson.cn>
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <
20220606124333.
2060567-3-yangxiaojuan@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Song Gao [Mon, 6 Jun 2022 12:42:51 +0000 (20:42 +0800)]
target/loongarch: Add README
This patch gives an introduction to the LoongArch target.
Signed-off-by: Song Gao <gaosong@loongson.cn>
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <
20220606124333.
2060567-2-yangxiaojuan@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Richard Henderson [Mon, 6 Jun 2022 14:57:14 +0000 (07:57 -0700)]
Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging
* prepare to expand usage of test venv
* fix CPUID when passing through host cache information
* a20 fix
* SGX fix
* generate per-target modinfo
* replay cleanups and simplifications
* "make modules" target
# -----BEGIN PGP SIGNATURE-----
#
# iQFIBAABCAAyFiEE8TM4V0tmI4mGbHaCv/vSX3jHroMFAmKeCV0UHHBib256aW5p
# QHJlZGhhdC5jb20ACgkQv/vSX3jHroNVWQgArVaF9Q/RWd1jJ2EUoWhy/GKsrdBs
# CHmSzrYzF/0cqD4OtrjTRyUP72Kywf4/aP4GYtLsjSYRUyriqS4nm5yEkDsME+pH
# 0adATIumtGHBPjVJyPUux3H1cbPUmsxbE03ZIWUK65M/IM2m46hmPDTWVx6ZSXMN
# VnSQdTUeZdxY26D8zfLp+oufqmfgaPT19zURcMZlvWFJ830t+1spfZwH0RGjDlfZ
# ffNVMPcco1qreNFggNIV9sKtoLb8A9PxpFJPV9OtBONA5UGxZ7xhjjZY9jCI4Bxa
# xAd60nXeoAwiOP7LE2bEwXbPku3xgy2e0LNXhqblMGNGOjdlRlwfL/FhFw==
# =C9N3
# -----END PGP SIGNATURE-----
# gpg: Signature made Mon 06 Jun 2022 07:04:13 AM PDT
# gpg: using RSA key
F13338574B662389866C7682BFFBD25F78C7AE83
# gpg: issuer "pbonzini@redhat.com"
# gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [undefined]
# gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" [undefined]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1
# Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83
* tag 'for-upstream' of https://gitlab.com/bonzini/qemu: (29 commits)
meson: qga: do not use deprecated meson.build_root()
configure: remove reference to removed option
regenerate meson-buildoptions.sh
tests: run 'device-crash-test' from tests/venv
tests: add python3-venv to debian10.docker
tests: use tests/venv to run basevm.py-based scripts
tests: install "qemu" namespace package into venv
tests: add quiet-venv-pip macro
tests: silence pip upgrade warnings during venv creation
tests: use python3 as the python executable name
tests: add "TESTS_PYTHON" variable to Makefile
python: update for mypy 0.950
x86: cpu: fixup number of addressable IDs for logical processors sharing cache
x86: cpu: make sure number of addressable IDs for processor cores meets the spec
tests/Makefile.include: Fix 'make check-help' output
tests/avocado: add replay Linux test for Aarch64 machines
tests/avocado: add replay Linux tests for virtio machine
tests/avocado: update replay_linux test
docs: move replay docs to docs/system/replay.rst
docs: convert docs/devel/replay page to rst
...
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Paolo Bonzini [Mon, 6 Jun 2022 14:03:38 +0000 (16:03 +0200)]
meson: qga: do not use deprecated meson.build_root()
The function will return the build root of the parent project if called from a
subproject; that is irrelevant for QEMU's usage but rarely desirable, and
therefore the function was deprecated and replaced by two functions
project_build_root() and global_build_root(). Replace it with the former.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Paolo Bonzini [Mon, 6 Jun 2022 10:44:57 +0000 (12:44 +0200)]
configure: remove reference to removed option
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Paolo Bonzini [Mon, 6 Jun 2022 10:44:45 +0000 (12:44 +0200)]
regenerate meson-buildoptions.sh
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
John Snow [Thu, 26 May 2022 00:09:21 +0000 (20:09 -0400)]
tests: run 'device-crash-test' from tests/venv
Remove the sys.path hacking from device-crash-test, and add in a little
user-friendly message for anyone who was used to running this script
directly from the source tree.
Modify the GitLab job recipes to create the tests/venv first, then run
device-crash-test from that venv.
Signed-off-by: John Snow <jsnow@redhat.com>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Message-Id: <
20220526000921.
1581503-10-jsnow@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
John Snow [Thu, 26 May 2022 00:09:20 +0000 (20:09 -0400)]
tests: add python3-venv to debian10.docker
This is needed to be able to add a venv-building step to 'make check';
the clang-user job in particular needs this to be able to run
check-unit.
Signed-off-by: John Snow <jsnow@redhat.com>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Message-Id: <
20220526000921.
1581503-9-jsnow@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
John Snow [Thu, 26 May 2022 00:09:19 +0000 (20:09 -0400)]
tests: use tests/venv to run basevm.py-based scripts
This patch co-opts the virtual environment being used by avocado tests
to also run the basevm.py tests. This is being done in preparation for
for the qemu.qmp package being removed from qemu.git.
As part of the change, remove any sys.path() hacks and treat "qemu" as a
normal third-party import.
Signed-off-by: John Snow <jsnow@redhat.com>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Message-Id: <
20220526000921.
1581503-8-jsnow@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
John Snow [Thu, 26 May 2022 00:09:18 +0000 (20:09 -0400)]
tests: install "qemu" namespace package into venv
This patch adds the "qemu" namespace package to the $build/tests/venv
directory. It does so in "editable" mode, which means that changes to
the source python directory will actively be reflected by the venv.
This patch also then removes any sys.path hacking from the avocado test
scripts directly. By doing this, the environment of where to find these
packages is managed entirely by the virtual environment and not by the
scripts themselves.
Signed-off-by: John Snow <jsnow@redhat.com>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Message-Id: <
20220526000921.
1581503-7-jsnow@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
John Snow [Thu, 26 May 2022 00:09:17 +0000 (20:09 -0400)]
tests: add quiet-venv-pip macro
Factor out the "test venv pip" macro; rewrite the "check-venv" rule to
be a little more compact. Replace the "PIP" pseudo-command output with
"VENVPIP" to make it 1% more clear that we are talking about using pip
to install something into a venv.
Signed-off-by: John Snow <jsnow@redhat.com>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Message-Id: <
20220526000921.
1581503-6-jsnow@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
John Snow [Thu, 26 May 2022 00:09:16 +0000 (20:09 -0400)]
tests: silence pip upgrade warnings during venv creation
Turn off the nag warning coaxing us to upgrade pip. It's not really that
interesting to see in CI logs, and as long as nothing is broken --
nothing is broken.
Signed-off-by: John Snow <jsnow@redhat.com>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Message-Id: <
20220526000921.
1581503-5-jsnow@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
John Snow [Thu, 26 May 2022 00:09:15 +0000 (20:09 -0400)]
tests: use python3 as the python executable name
Use "python3" instead of "python" as per PEP0394:
https://peps.python.org/pep-0394/
This should always be defined (in a venv, at least!), matching the
preferred python shebang of "#!/usr/bin/env python3".
Signed-off-by: John Snow <jsnow@redhat.com>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Message-Id: <
20220526000921.
1581503-4-jsnow@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
John Snow [Thu, 26 May 2022 00:09:14 +0000 (20:09 -0400)]
tests: add "TESTS_PYTHON" variable to Makefile
This is a convenience feature: $(PYTHON) points to the Python executable
we were instructed to use by the configure script. We use that Python to
create a virtual environment with the "check-venv" target in
tests/Makefile.include.
$(TESTS_PYTHON) points to the Python executable belonging to the virtual
environment tied to the build. This Python executable is a symlink to
the binary used to create the venv, which will be the version provided
at configure time.
Using $(TESTS_PYTHON) therefore uses the $(PYTHON) executable, but with
paths modified to use packages installed to the venv.
Signed-off-by: John Snow <jsnow@redhat.com>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Message-Id: <
20220526000921.
1581503-3-jsnow@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
John Snow [Thu, 26 May 2022 00:09:13 +0000 (20:09 -0400)]
python: update for mypy 0.950
typeshed (included in mypy) recently updated to improve the typing for
WriteTransport objects. I was working around this, but now there's a
version where I shouldn't work around it.
Unfortunately this creates some minor ugliness if I want to support both
pre- and post-0.950 versions. For now, for my sanity, just disable the
unused-ignores warning.
Signed-off-by: John Snow <jsnow@redhat.com>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Message-Id: <
20220526000921.
1581503-2-jsnow@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Igor Mammedov [Tue, 24 May 2022 15:10:20 +0000 (11:10 -0400)]
x86: cpu: fixup number of addressable IDs for logical processors sharing cache
When QEMU is started with '-cpu host,host-cache-info=on', it will
passthrough host's number of logical processors sharing cache and
number of processor cores in the physical package. QEMU already
fixes up the later to correctly reflect number of configured cores
for VM, however number of logical processors sharing cache is still
comes from host CPU, which confuses guest started with:
-machine q35,accel=kvm \
-cpu host,host-cache-info=on,l3-cache=off \
-smp 20,sockets=2,dies=1,cores=10,threads=1 \
-numa node,nodeid=0,memdev=ram-node0 \
-numa node,nodeid=1,memdev=ram-node1 \
-numa cpu,socket-id=0,node-id=0 \
-numa cpu,socket-id=1,node-id=1
on 2 socket Xeon 4210R host with 10 cores per socket
with CPUID[04H]:
...
--- cache 3 ---
cache type = unified cache (3)
cache level = 0x3 (3)
self-initializing cache level = true
fully associative cache = false
maximum IDs for CPUs sharing cache = 0x1f (31)
maximum IDs for cores in pkg = 0xf (15)
...
that doesn't match number of logical processors VM was
configured with and as result RHEL 9.0 guest complains:
sched: CPU #10's llc-sibling CPU #0 is not on the same node! [node: 1 != 0]. Ignoring dependency.
WARNING: CPU: 10 PID: 0 at arch/x86/kernel/smpboot.c:421 topology_sane.isra.0+0x67/0x80
...
Call Trace:
set_cpu_sibling_map+0x176/0x590
start_secondary+0x5b/0x150
secondary_startup_64_no_verify+0xc2/0xcb
Fix it by capping max number of logical processors to vcpus/socket
as it was configured, which fixes the issue.
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Fixes: https://bugzilla.redhat.com/show_bug.cgi?id=
2088311
Message-Id: <
20220524151020.
2541698-3-imammedo@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Igor Mammedov [Tue, 24 May 2022 15:10:19 +0000 (11:10 -0400)]
x86: cpu: make sure number of addressable IDs for processor cores meets the spec
Accourding Intel's CPUID[EAX=04H] resulting bits 31 - 26 in EAX
should be:
"
**** The nearest power-of-2 integer that is not smaller than (1 + EAX[31:26]) is the number of unique
Core_IDs reserved for addressing different processor cores in a physical package. Core ID is a subset of
bits of the initial APIC ID.
"
ensure that values stored in EAX[31-26] always meets this condition.
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Message-Id: <
20220524151020.
2541698-2-imammedo@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Dario Faggioli [Fri, 27 May 2022 15:30:54 +0000 (17:30 +0200)]
tests/Makefile.include: Fix 'make check-help' output
Since commit
3d2f73ef75e ("build: use "meson test" as the test harness"),
check-report.tap is no more, and we have check-report.junit.xml.
Update the output of 'make check-help', which was still listing
'check-report.tap', accordingly.
Fixes:
3d2f73ef75e
Signed-off-by: Dario Faggioli <dfaggioli@suse.com>
Message-Id: <
165366545439.6869.
11633009118019728798.stgit@work>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Pavel Dovgalyuk [Fri, 27 May 2022 10:46:53 +0000 (13:46 +0300)]
tests/avocado: add replay Linux test for Aarch64 machines
This patch adds two tests for replaying Linux boot process
on Aarch64 platform.
Signed-off-by: Pavel Dovgalyuk <Pavel.Dovgalyuk@ispras.ru>
Message-Id: <
165364841373.688121.
8868079200312201658.stgit@pasha-ThinkPad-X280>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Pavel Dovgalyuk [Fri, 27 May 2022 10:46:48 +0000 (13:46 +0300)]
tests/avocado: add replay Linux tests for virtio machine
This patch adds two tests for replaying Linux boot process
on x86_64 virtio platform.
Signed-off-by: Pavel Dovgalyuk <Pavel.Dovgalyuk@ispras.ru>
Message-Id: <
165364840811.688121.
11931681195199516354.stgit@pasha-ThinkPad-X280>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Pavel Dovgalyuk [Fri, 27 May 2022 10:46:42 +0000 (13:46 +0300)]
tests/avocado: update replay_linux test
This patch updates replay_linux test to make it compatible with
new LinuxTest class.
Signed-off-by: Pavel Dovgalyuk <Pavel.Dovgalyuk@ispras.ru>
Message-Id: <
165364840253.688121.
10404266209986316381.stgit@pasha-ThinkPad-X280>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Pavel Dovgalyuk [Fri, 27 May 2022 10:46:36 +0000 (13:46 +0300)]
docs: move replay docs to docs/system/replay.rst
This patch adds replay description page, converting prior
text from docs/replay.txt.
The text was also updated and some sections were moved
to devel part of the docs.
Signed-off-by: Pavel Dovgalyuk <Pavel.Dovgalyuk@ispras.ru>
Acked-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <
165364839601.688121.
5131456980322853233.stgit@pasha-ThinkPad-X280>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Pavel Dovgalyuk [Fri, 27 May 2022 10:46:30 +0000 (13:46 +0300)]
docs: convert docs/devel/replay page to rst
This patch converts prior .txt replay devel documentation to .rst.
Signed-off-by: Pavel Dovgalyuk <Pavel.Dovgalyuk@ispras.ru>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <
165364839013.688121.
11935249420738873044.stgit@pasha-ThinkPad-X280>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Pavel Dovgalyuk [Fri, 27 May 2022 10:46:23 +0000 (13:46 +0300)]
replay: simplify async event processing
This patch joins replay event id and async event id into single byte in the log.
It makes processing a bit faster and log a bit smaller.
Signed-off-by: Pavel Dovgalyuk <Pavel.Dovgalyuk@ispras.ru>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
--
v2: minor enum fixes (suggested by Richard Henderson)
Message-Id: <
165364838393.688121.
8191379555130516329.stgit@pasha-ThinkPad-X280>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Pavel Dovgalyuk [Fri, 27 May 2022 10:46:18 +0000 (13:46 +0300)]
replay: rewrite async event handling
This patch decouples checkpoints and async events.
It was a tricky part of replay implementation. Now it becomes
much simpler and easier to maintain.
Signed-off-by: Pavel Dovgalyuk <Pavel.Dovgalyuk@ispras.ru>
Acked-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <
165364837856.688121.
8785039478408995979.stgit@pasha-ThinkPad-X280>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Pavel Dovgalyuk [Fri, 27 May 2022 10:46:13 +0000 (13:46 +0300)]
replay: notify vCPU when BH is scheduled
vCPU execution should be suspended when new BH is scheduled.
This is needed to avoid guest timeouts caused by the long cycles
of the execution. In replay mode execution may hang when
vCPU sleeps and block event comes to the queue.
This patch adds notification which wakes up vCPU or interrupts
execution of guest code.
Signed-off-by: Pavel Dovgalyuk <Pavel.Dovgalyuk@ispras.ru>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
--
v2: changed first_cpu to current_cpu (suggested by Richard Henderson)
v4: moved vCPU notification to aio_bh_enqueue (suggested by Paolo Bonzini)
Message-Id: <
165364837317.688121.
17680519919871405281.stgit@pasha-ThinkPad-X280>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Pavel Dovgalyuk [Fri, 27 May 2022 10:46:07 +0000 (13:46 +0300)]
replay: fix event queue flush for qemu shutdown
This patch fixes event queue flush in the case of emulator
shutdown. replay_finish_events should be called when replay_mode
is not cleared.
Signed-off-by: Pavel Dovgalyuk <Pavel.Dovgalyuk@ispras.ru>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <
165364836758.688121.
7959245442743676491.stgit@pasha-ThinkPad-X280>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Jose R. Ziviani [Fri, 27 May 2022 22:20:35 +0000 (00:20 +0200)]
modules: generates per-target modinfo
This patch changes the way modinfo is generated and built. Instead of
one modinfo.c it generates one modinfo-<target>-softmmu.c per target. It
aims a fine-tune control of modules by configuring Kconfig.
Signed-off-by: Jose R. Ziviani <jziviani@suse.de>
Signed-off-by: Dario Faggioli <dfaggioli@suse.com>
Message-Id: <
165369003038.5857.
13084289285185196779.stgit@work>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Jose R. Ziviani [Fri, 27 May 2022 22:20:23 +0000 (00:20 +0200)]
modules: introduces module_kconfig directive
module_kconfig is a new directive that should be used with module_obj
whenever that module depends on the Kconfig to be enabled.
When the module is enabled in Kconfig we are sure that its dependencies
will be enabled as well, thus the module will be loaded without any
problem.
The correct way to use module_kconfig is by passing the Kconfig option
to module_kconfig (or the *config-devices.mak without CONFIG_).
Signed-off-by: Jose R. Ziviani <jziviani@suse.de>
Signed-off-by: Dario Faggioli <dfaggioli@suse.com>
Message-Id: <
165369002370.5857.
12150544416563557322.stgit@work>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Yang Zhong [Mon, 30 May 2022 13:18:34 +0000 (09:18 -0400)]
target/i386: Fix wrong count setting
The previous patch used wrong count setting with index value, which got wrong
value from CPUID(EAX=12,ECX=0):EAX. So the SGX1 instruction can't be exposed
to VM and the SGX decice can't work in VM.
Fixes:
d19d6ffa0710 ("target/i386: introduce helper to access supported CPUID")
Signed-off-by: Yang Zhong <yang.zhong@intel.com>
Message-Id: <
20220530131834.
1222801-1-yang.zhong@intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Paolo Bonzini [Mon, 30 May 2022 12:24:34 +0000 (14:24 +0200)]
build: add a "make modules" target
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Stephen Michael Jothen [Wed, 25 May 2022 15:33:36 +0000 (17:33 +0200)]
target/i386/tcg: Fix masking of real-mode addresses with A20 bit
The correct A20 masking is done if paging is enabled (protected mode) but it
seems to have been forgotten in real mode. For example from the AMD64 APM Vol. 2
section 1.2.4:
> If the sum of the segment base and effective address carries over into bit 20,
> that bit can be optionally truncated to mimic the 20-bit address wrapping of the
> 8086 processor by using the A20M# input signal to mask the A20 address bit.
Most BIOSes will enable the A20 line on boot, but I found by disabling the A20 line
afterwards, the correct wrapping wasn't taking place.
`handle_mmu_fault' in target/i386/tcg/sysemu/excp_helper.c seems to be the culprit.
In real mode, it fills the TLB with the raw unmasked address. However, for the
protected mode, the `mmu_translate' function does the correct A20 masking.
The fix then should be to just apply the A20 mask in the first branch of the if
statement.
Signed-off-by: Stephen Michael Jothen <sjothen@gmail.com>
Message-Id: <Yo5MUMSz80jXtvt9@air-old.local>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Richard Henderson [Fri, 3 Jun 2022 21:14:24 +0000 (14:14 -0700)]
Merge tag 'nvme-next-pull-request' of git://git.infradead.org/qemu-nvme into staging
hw/nvme updates
# -----BEGIN PGP SIGNATURE-----
#
# iQEzBAABCAAdFiEEUigzqnXi3OaiR2bATeGvMW1PDekFAmKaZmgACgkQTeGvMW1P
# DenI7wgAxY4QtRlUnufzaZqcoi+affFTKlKm0JYKZm/Ldxt2RtHoWxRZDLLIUp8B
# 4XAlIGJw7VwrafEtSkx4K6cSyKluMJ9Ax8pNd03sEweXBBfdhNizspPprp+Jm9P9
# hRcH8kSiBp5B451cORBlgmoHguWeWawe1r66uFLTCbEMtfQQNaxNVsTsgAsOvtwv
# XsjLVFVKGNDWXGRta+lzu4seNNuzfucsAmKWUjg5HN38rstY7XxfLVMzt8ORcwjk
# oNmQuy3JiKujdPVhE5PVgNRZkigwoDt3hDA1QTncGTBUoA/CtaB5SK9EhcJ5xJVI
# EHv99S9LQ8ng5BJC2pUSU32yRkaNOQ==
# =XTXH
# -----END PGP SIGNATURE-----
# gpg: Signature made Fri 03 Jun 2022 12:52:08 PM PDT
# gpg: using RSA key
522833AA75E2DCE6A24766C04DE1AF316D4F0DE9
# gpg: Good signature from "Klaus Jensen <its@irrelevant.dk>" [unknown]
# gpg: aka "Klaus Jensen <k.jensen@samsung.com>" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: DDCA 4D9C 9EF9 31CC 3468 4272 63D5 6FC5 E55D A838
# Subkey fingerprint: 5228 33AA 75E2 DCE6 A247 66C0 4DE1 AF31 6D4F 0DE9
* tag 'nvme-next-pull-request' of git://git.infradead.org/qemu-nvme:
hw/nvme: add new command abort case
hw/nvme: deprecate the use-intel-id compatibility parameter
hw/nvme: bump firmware revision
hw/nvme: do not report null uuid
hw/nvme: do not auto-generate uuid
hw/nvme: do not auto-generate eui64
hw/nvme: enforce common serial per subsystem
hw/nvme: fix smart aen
hw/nvme: fix copy cmd for pi enabled namespaces
hw/nvme: add missing return statement
hw/nvme: fix narrowing conversion
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Dmitry Tikhov [Wed, 20 Apr 2022 08:20:44 +0000 (11:20 +0300)]
hw/nvme: add new command abort case
NVMe command set specification for end-to-end data protection formatted
namespace states:
o If the Reference Tag Check bit of the PRCHK field is set to ‘1’ and
the namespace is formatted for Type 3 protection, then the
controller:
▪ should not compare the protection Information Reference Tag
field to the computed reference tag; and
▪ may ignore the ILBRT and EILBRT fields. If a command is
aborted as a result of the Reference Tag Check bit of the
PRCHK field being set to ‘1’, then that command should be
aborted with a status code of Invalid Protection Information,
but may be aborted with a status code of Invalid Field in
Command.
Currently qemu compares reftag in the nvme_dif_prchk function whenever
Reference Tag Check bit is set in the command. For type 3 namespaces
however, caller of nvme_dif_prchk - nvme_dif_check does not increment
reftag for each subsequent logical block. That way commands incorporating
more than one logical block for type 3 formatted namespaces with reftag
check bit set, always fail with End-to-end Reference Tag Check Error.
Comply with spec by handling case of set Reference Tag Check
bit in the type 3 formatted namespace.
Fixes:
146f720c5563 ("hw/block/nvme: end-to-end data protection")
Signed-off-by: Dmitry Tikhov <d.tihov@yadro.com>
Signed-off-by: Klaus Jensen <k.jensen@samsung.com>
Klaus Jensen [Tue, 19 Apr 2022 11:24:23 +0000 (13:24 +0200)]
hw/nvme: deprecate the use-intel-id compatibility parameter
Since version 5.2 commit
6eb7a071292a ("hw/block/nvme: change controller
pci id"), the emulated NVMe controller has defaulted to a non-Intel PCI
identifier.
Deprecate the compatibility parameter so we can get rid of it once and
for all.
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Klaus Jensen <k.jensen@samsung.com>
Klaus Jensen [Fri, 29 Apr 2022 08:33:36 +0000 (10:33 +0200)]
hw/nvme: bump firmware revision
The Linux kernel quirks the QEMU NVMe controller pretty heavily because
of the namespace identifier mess. Since this is now fixed, bump the
firmware revision number to allow the quirk to be disabled for this
revision.
As of now, bump the firmware revision number to be equal to the QEMU
release version number.
Reviewed-by: Keith Busch <kbusch@kernel.org>
Signed-off-by: Klaus Jensen <k.jensen@samsung.com>
Klaus Jensen [Fri, 29 Apr 2022 08:33:35 +0000 (10:33 +0200)]
hw/nvme: do not report null uuid
Do not report the "null uuid" (all zeros) in the namespace
identification descriptors.
Reported-by: Luis Chamberlain <mcgrof@kernel.org>
Reported-by: Christoph Hellwig <hch@lst.de>
Reviewed-by: Christoph Hellwig <hch@lst.de>
Reviewed-by: Keith Busch <kbusch@kernel.org>
Signed-off-by: Klaus Jensen <k.jensen@samsung.com>
Klaus Jensen [Fri, 29 Apr 2022 08:33:34 +0000 (10:33 +0200)]
hw/nvme: do not auto-generate uuid
Do not default to generate an UUID for namespaces if it is not
explicitly specified.
This is a technically a breaking change in behavior. However, since the
UUID changes on every VM launch, it is not spec compliant and is of
little use since the UUID cannot be used reliably anyway and the
behavior prior to this patch must be considered buggy.
Reviewed-by: Keith Busch <kbusch@kernel.org>
Reviewed-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Klaus Jensen <k.jensen@samsung.com>
Klaus Jensen [Fri, 29 Apr 2022 08:33:33 +0000 (10:33 +0200)]
hw/nvme: do not auto-generate eui64
We cannot provide auto-generated unique or persistent namespace
identifiers (EUI64, NGUID, UUID) easily. Since 6.1, namespaces have been
assigned a generated EUI64 of the form "52:54:00:<namespace counter>".
This is will be unique within a QEMU instance, but not globally.
Revert that this is assigned automatically and immediately deprecate the
compatibility parameter. Users can opt-in to this with the
`eui64-default=on` device parameter or set it explicitly with
`eui64=UINT64`.
Cc: libvir-list@redhat.com
Reviewed-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Klaus Jensen <k.jensen@samsung.com>
Klaus Jensen [Fri, 29 Apr 2022 08:33:32 +0000 (10:33 +0200)]
hw/nvme: enforce common serial per subsystem
The Identify Controller Serial Number (SN) is the serial number for the
NVM subsystem and must be the same across all controller in the NVM
subsystem.
Enforce this.
Reviewed-by: Christoph Hellwig <hch@lst.de>
Reviewed-by: Keith Busch <kbusch@kernel.org>
Signed-off-by: Klaus Jensen <k.jensen@samsung.com>
Klaus Jensen [Thu, 5 May 2022 22:21:47 +0000 (00:21 +0200)]
hw/nvme: fix smart aen
Pass the right constant to nvme_smart_event(). The NVME_AER* values hold
the bit position in the SMART byte, not the shifted value that we expect
it to be in nvme_smart_event().
Fixes:
c62720f137df ("hw/block/nvme: trigger async event during injecting smart warning")
Acked-by: zhenwei pi <pizhenwei@bytedance.com>
Signed-off-by: Klaus Jensen <k.jensen@samsung.com>
Dmitry Tikhov [Thu, 21 Apr 2022 10:51:58 +0000 (13:51 +0300)]
hw/nvme: fix copy cmd for pi enabled namespaces
Current implementation have problem in the read part of copy command.
Because there is no metadata mangling before nvme_dif_check invocation,
reftag error could be thrown for blocks of namespace that have not been
previously written to.
Signed-off-by: Dmitry Tikhov <d.tihov@yadro.com>
Reviewed-by: Klaus Jensen <k.jensen@samsung.com>
Signed-off-by: Klaus Jensen <k.jensen@samsung.com>
Dmitry Tikhov [Fri, 15 Apr 2022 20:48:32 +0000 (23:48 +0300)]
hw/nvme: add missing return statement
Since there is no return after nvme_dsm_cb invocation, metadata
associated with non-zero block range is currently zeroed. Also this
behaviour leads to segfault since we schedule iocb->bh two times.
First when entering nvme_dsm_cb with iocb->idx == iocb->nr and
second because of missing return on call stack unwinding by calling
blk_aio_pwrite_zeroes and subsequent nvme_dsm_cb callback.
Fixes:
d7d1474fd85d ("hw/nvme: reimplement dsm to allow cancellation")
Signed-off-by: Dmitry Tikhov <d.tihov@yadro.com>
Reviewed-by: Klaus Jensen <k.jensen@samsung.com>
Signed-off-by: Klaus Jensen <k.jensen@samsung.com>
Dmitry Tikhov [Tue, 12 Apr 2022 08:59:09 +0000 (11:59 +0300)]
hw/nvme: fix narrowing conversion
Since nlbas is of type int, it does not work with large namespace size
values, e.g., 9 TB size of file backing namespace and 8 byte metadata
with 4096 bytes lbasz gives negative nlbas value, which is later
promoted to negative int64_t type value and results in negative
ns->moff which breaks namespace
Signed-off-by: Dmitry Tikhov <ddtikhov@gmail.com>
Reviewed-by: Klaus Jensen <k.jensen@samsung.com>
Signed-off-by: Klaus Jensen <k.jensen@samsung.com>
Richard Henderson [Fri, 3 Jun 2022 13:43:38 +0000 (06:43 -0700)]
Merge tag 'pull-request-2022-06-03' of https://gitlab.com/thuth/qemu into staging
* s390x storage key improvements for KVM
* Some cosmetics for s390x
* Update MAINTAINERS entries
* Improve some spots wrt memory handling in the qtests
* Clean up the "-display sdl" parameter parsing
# -----BEGIN PGP SIGNATURE-----
#
# iQJFBAABCAAvFiEEJ7iIR+7gJQEY8+q5LtnXdP5wLbUFAmKZpQURHHRodXRoQHJl
# ZGhhdC5jb20ACgkQLtnXdP5wLbXQ1Q//TVyCnWe+kAwwMljS9tebnVwZ1C3wrH68
# KJxeeWNxIdCLMJetZa3V8lYkLuLKojELi24+qAFH+//RWoEIBFvhVlZffWL/7NHw
# KAYy8ZWHeGui29hYgAxlKFC8GSCdsGD+PJU6E0C7wN7R6UVCvPfxPk+MQXjbt/Tn
# UGgb0Ysp4MxEKk3i2t3DR49n7KniUD3ZGZimGhAWfPwe+tPP52Ijczheenv2/R4J
# ip0bc+xo2zUwa6VPBdncnZtOhyXTCNeTxsJcnxnjFVmo9scP2aFOFrV43PvLs0E7
# l2yhQKwXbqIMyaJ+/aFULuOOLL3w2fdOu6TzsMlWiRFF5UmbJjj/8V7Vq1GELupZ
# 2QU0wSJMlNPteRlHUMD0Tz8nG/r/ffYtOAoK3eZAG0tIWV/3xcTIGt0TZuV1VgzY
# M8nNhQTdweCtx5y4sbncEO6qmF5F8u8hbZ7DZCFRCKYkLkC3sv+QDiF1Ys9Iu1MM
# wy7uLcrQZ9rPZ96x1aPKgYMHtrV98yN5om6/CnFVXKvAYX+pAp2of9iTSEAWhRKi
# sDktJ39uCdkdgxnNKBQe6g0cug6mlnpoCM9PSR0zuXuTjFTVZxJBgw7p6Uyofccv
# jL8T6/uR3xQMJ/VDuo0UZLYa4bYnzCc/gJmarLiwBxhykzHAthobBwaXSsLTZ+9J
# 1DpfGpSKDDQ=
# =3Rhl
# -----END PGP SIGNATURE-----
# gpg: Signature made Thu 02 Jun 2022 11:07:01 PM PDT
# gpg: using RSA key
27B88847EEE0250118F3EAB92ED9D774FE702DB5
# gpg: issuer "thuth@redhat.com"
# gpg: Good signature from "Thomas Huth <th.huth@gmx.de>" [undefined]
# gpg: aka "Thomas Huth <thuth@redhat.com>" [undefined]
# gpg: aka "Thomas Huth <th.huth@posteo.de>" [unknown]
# gpg: aka "Thomas Huth <huth@tuxfamily.org>" [undefined]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 27B8 8847 EEE0 2501 18F3 EAB9 2ED9 D774 FE70 2DB5
* tag 'pull-request-2022-06-03' of https://gitlab.com/thuth/qemu:
ui: Remove deprecated options "-sdl" and "-curses"
ui: Switch "-display sdl" to use the QAPI parser
ui: Remove deprecated parameters of the "-display sdl" option
tests/qtest: use g_autofree for test_server_create_chr
qtest/npcm7xx_pwm-test: Fix memory leak in mft_qom_set
MAINTAINERS: Update maintainers for Guest x86 HAXM CPUs
MAINTAINERS: Change my email address
tests/tcg: Test overflow conditions
MAINTAINERS: Update s390 vhost entries
target/s390x: kvm: Honor storage keys during emulation
hw/s390x/s390-virtio-ccw: Improve the machine description string
s390: Typo fix FLOATING_POINT_SUPPPORT_ENH
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Thomas Huth [Thu, 19 May 2022 15:56:25 +0000 (17:56 +0200)]
ui: Remove deprecated options "-sdl" and "-curses"
We have "-sdl" and "-curses", but no "-gtk" and no "-cocoa" ...
these old-style options are rather confusing than helpful nowadays.
Now that the deprecation period is over, let's remove them, so we
get a cleaner interface (where "-display" is the only way to select
the user interface).
Message-Id: <
20220519155625.
1414365-4-thuth@redhat.com>
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
Thomas Huth [Thu, 19 May 2022 15:56:24 +0000 (17:56 +0200)]
ui: Switch "-display sdl" to use the QAPI parser
The "-display sdl" option still uses a hand-crafted parser for its
parameters since we didn't want to drag an interface we considered
somewhat flawed into the QAPI schema. Since the flaws are gone now,
it's time to QAPIfy.
This introduces the new "DisplaySDL" QAPI struct that is used to hold
the parameters that are unique to the SDL display. The only specific
parameter is currently "grab-mod" that is used to specify the required
modifier keys to escape from the mouse grabbing mode.
Message-Id: <
20220519155625.
1414365-3-thuth@redhat.com>
Reviewed-by: Markus Armbruster <armbru@redhat.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
Thomas Huth [Thu, 19 May 2022 15:56:23 +0000 (17:56 +0200)]
ui: Remove deprecated parameters of the "-display sdl" option
Dropping these deprecated parameters simplifies further refactoring
(e.g. QAPIfication is easier without underscores in the name).
Message-Id: <
20220519155625.
1414365-2-thuth@redhat.com>
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Reviewed-by: Markus Armbruster <armbru@redhat.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
Alex Bennée [Tue, 24 May 2022 15:40:52 +0000 (16:40 +0100)]
tests/qtest: use g_autofree for test_server_create_chr
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <
20220524154056.
2896913-12-alex.bennee@linaro.org>
Signed-off-by: Thomas Huth <thuth@redhat.com>
Miaoqian Lin [Tue, 31 May 2022 08:09:21 +0000 (12:09 +0400)]
qtest/npcm7xx_pwm-test: Fix memory leak in mft_qom_set
g_strdup_printf() allocated memory for path, we should free it with
g_free() when no longer needed.
Signed-off-by: Miaoqian Lin <linmq006@gmail.com>
Reviewed-by: Hao Wu <wuhaotsh@google.com>
Message-Id: <
20220531080921.4704-1-linmq006@gmail.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
Wenchao Wang [Tue, 15 Mar 2022 12:51:22 +0000 (20:51 +0800)]
MAINTAINERS: Update maintainers for Guest x86 HAXM CPUs
Clean up the maintainer list.
Reviewed-by: Hang Yuan <hang.yuan@intel.com>
Signed-off-by: Wenchao Wang <wenchao.wang@intel.com>
Message-Id: <DM6PR11MB4090A58ACCA4AD8C752AEEA587199@DM6PR11MB4090.namprd11.prod.outlook.com>
[thuth: Note: Colin Xu's address bounces]
Signed-off-by: Thomas Huth <thuth@redhat.com>
Hailiang Zhang [Tue, 14 Dec 2021 07:54:24 +0000 (15:54 +0800)]
MAINTAINERS: Change my email address
The zhang.zhanghailiang@huawei.com email address has been
stopped. Change it to my new email address.
Signed-off-by: Hailiang Zhang <zhanghailiang@xfusion.com>
Message-Id: <
20211214075424.6920-1-zhanghailiang@xfusion.com>
Acked-by: Gonglei <arei.gonglei@huawei.com>
Acked-by: Zhang Chen <chen.zhang@intel.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
Gautam Agrawal [Tue, 31 May 2022 18:35:24 +0000 (00:05 +0530)]
tests/tcg: Test overflow conditions
Add a test to check for overflow conditions in s390x.
This patch is based on the following patches :
* https://git.qemu.org/?p=qemu.git;a=commitdiff;h=
5a2e67a691501
* https://git.qemu.org/?p=qemu.git;a=commitdiff;h=
fc6e0d0f2db51
Signed-off-by: Gautam Agrawal <gautamnagrawal@gmail.com>
Message-Id: <
20220531183524.40948-1-gautamnagrawal@gmail.com>
[thuth: Move overflow.c to tests/tcg/multiarch/ to make it generic]
Signed-off-by: Thomas Huth <thuth@redhat.com>
Eric Farman [Wed, 25 May 2022 14:58:14 +0000 (16:58 +0200)]
MAINTAINERS: Update s390 vhost entries
Commit
7a523d96a0 ("virtio-ccw: move vhost_ccw_scsi to a separate file")
introduced a new file hw/s390x/vhost-scsi-ccw.c, which received a
couple comments [1][2] to update MAINTAINERS that were missed.
Fix that by making the vhost CCW entries a wildcard.
[1] https://lore.kernel.org/r/
d8d2bbd5021076bdba444d31a6da74f507baede3.camel@linux.ibm.com/
[2] https://lore.kernel.org/r/87k0c4gb9f.fsf@redhat.com/
Signed-off-by: Eric Farman <farman@linux.ibm.com>
Reviewed-by: Cornelia Huck <cohuck@redhat.com>
Message-Id: <
20220525145814.
2750501-1-farman@linux.ibm.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
Janis Schoetterl-Glausch [Fri, 6 May 2022 15:39:56 +0000 (17:39 +0200)]
target/s390x: kvm: Honor storage keys during emulation
Storage key controlled protection is currently not honored when
emulating instructions.
If available, enable key protection for the MEM_OP ioctl, thereby
enabling it for the s390_cpu_virt_mem_* functions, when using kvm.
As a result, the emulation of the following instructions honors storage
keys:
* CLP
The Synch I/O CLP command would need special handling in order
to support storage keys, but is currently not supported.
* CHSC
Performing commands asynchronously would require special
handling, but commands are currently always synchronous.
* STSI
* TSCH
Must (and does) not change channel if terminated due to
protection.
* MSCH
Suppressed on protection, works because fetching instruction.
* SSCH
Suppressed on protection, works because fetching instruction.
* STSCH
* STCRW
Suppressed on protection, this works because no partial store is
possible, because the operand cannot span multiple pages.
* PCISTB
* MPCIFC
* STPCIFC
Signed-off-by: Janis Schoetterl-Glausch <scgl@linux.ibm.com>
Message-Id: <
20220506153956.
2217601-3-scgl@linux.ibm.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
Thomas Huth [Fri, 6 May 2022 06:50:26 +0000 (08:50 +0200)]
hw/s390x/s390-virtio-ccw: Improve the machine description string
The machine name already contains the words "ccw" and "virtio", so
using "VirtIO-ccw" in the description likely does not really help
the average user to get an idea what this machine type is about.
Thus let's switch to "Virtual s390x machine" now, since "virtual
machine" should be a familiar term, and "s390x" signals that this
is about 64-bit guests (unlike S390 which could mean that it is
31-bit only).
Also expand "v" to "version", since this makes it easier to use
this macro also with non-numeric machine names in downstream.
Message-Id: <
20220506065026.513590-1-thuth@redhat.com>
Acked-by: Cornelia Huck <cohuck@redhat.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
Dr. David Alan Gilbert [Mon, 23 May 2022 11:51:23 +0000 (12:51 +0100)]
s390: Typo fix FLOATING_POINT_SUPPPORT_ENH
One less P needed.
Signed-off-by: Dr. David Alan Gilbert <dgilbert@redhat.com>
Message-Id: <
20220523115123.150340-1-dgilbert@redhat.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
Richard Henderson [Thu, 2 Jun 2022 15:13:36 +0000 (08:13 -0700)]
Merge tag 'pull-tcg-
20220602' of https://gitlab.com/rth7680/qemu into staging
Add tcg_gen_mov_ptr.
Fix tcg/i386 encoding of avx512 vpsraq.
Fix tcg/aarch64 handling of out-of-range shli.
# -----BEGIN PGP SIGNATURE-----
#
# iQFRBAABCgA7FiEEekgeeIaLTbaoWgXAZN846K9+IV8FAmKY0xodHHJpY2hhcmQu
# aGVuZGVyc29uQGxpbmFyby5vcmcACgkQZN846K9+IV8nhwf+LTq5foaCunKI9yeQ
# o78A1BbSFzSUd9hlzHt4MDWlDKsF+0WUKJ2kkgUTXNFUdTgpvQUKCaTuqHpt+LfQ
# o8Gfbbd2eYixz/utkJ+PE3xUqNR5Wnh6XfuSFlk1ib4x2Wztr7+Mm+szoRcbIXR4
# 5pqZxGVQ9XVFPaIQ6cnb6IQe68ky/p9ejoG1SPiphlLt5/zY7Fqsicfn7NFePK5t
# IxfcLjapCokLKP3AeioSf3l96sT1OWT6lQLeammEipMH0MuR/jTd3Ayx0nV0RwVz
# FoSV+JP+CCyRu+C1yQ+ImkxMQhgBfu+T19CBIzimIEx8sn+8Nby+oi2CvNx8mBWj
# Z3dQlg==
# =sVH7
# -----END PGP SIGNATURE-----
# gpg: Signature made Thu 02 Jun 2022 08:11:22 AM PDT
# gpg: using RSA key
7A481E78868B4DB6A85A05C064DF38E8AF7E215F
# gpg: issuer "richard.henderson@linaro.org"
# gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [ultimate]
* tag 'pull-tcg-
20220602' of https://gitlab.com/rth7680/qemu:
tcg/aarch64: Fix illegal insn from out-of-range shli
tcg/i386: Fix encoding of OPC_VPSRAQ for INDEX_op_sars_vec
tcg: Add tcg_gen_mov_ptr
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Richard Henderson [Thu, 2 Jun 2022 01:04:30 +0000 (01:04 +0000)]
tcg/aarch64: Fix illegal insn from out-of-range shli
The masking in tcg_out_shl was incorrect, producing an
illegal instruction, rather than merely unspecified results
for the out-of-range shift.
Tested-by: Joel Stanley <joel@jms.id.au>
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1051
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Richard Henderson [Wed, 1 Jun 2022 23:22:19 +0000 (16:22 -0700)]
tcg/i386: Fix encoding of OPC_VPSRAQ for INDEX_op_sars_vec
We wanted the VPSRAQ variant with the scalar vector shift operand,
not the variant with an immediate operand.
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1022
Fixes:
47b331b2a8da ("tcg/i386: Implement avx512 scalar shift")
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>