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Andreas Gampe [Tue, 20 Oct 2015 17:32:12 +0000 (17:32 +0000)]
Merge "MIPS64: Disassembler support for rotate instructions."
am:
4bc7168780
* commit '
4bc716878095a25b180d813724215e6e3aabb149':
MIPS64: Disassembler support for rotate instructions.
Andreas Gampe [Tue, 20 Oct 2015 17:23:45 +0000 (17:23 +0000)]
Merge "MIPS64: Disassembler support for rotate instructions."
Nicolas Geoffray [Tue, 20 Oct 2015 12:40:16 +0000 (12:40 +0000)]
Merge "New attempt at fixing mac build."
am:
620021e643
* commit '
620021e643518dc93dc618d3e9df1c33ff8a491c':
New attempt at fixing mac build.
Nicolas Geoffray [Tue, 20 Oct 2015 12:36:24 +0000 (12:36 +0000)]
Merge "New attempt at fixing mac build."
Nicolas Geoffray [Tue, 20 Oct 2015 12:35:38 +0000 (13:35 +0100)]
New attempt at fixing mac build.
Change-Id: I00e3df55e65eb5edb4e8dd244bb7f8918dd942d4
Nicolas Geoffray [Tue, 20 Oct 2015 11:59:35 +0000 (11:59 +0000)]
Merge "Fix mac build."
am:
4206af2185
* commit '
4206af2185bd1d3d0356a8fbc7c5e151fdd261d5':
Fix mac build.
Nicolas Geoffray [Tue, 20 Oct 2015 11:56:02 +0000 (11:56 +0000)]
Merge "Fix mac build."
Nicolas Geoffray [Tue, 20 Oct 2015 11:55:20 +0000 (12:55 +0100)]
Fix mac build.
Change-Id: I7229a628a619164eea22735bcaed507428ab054a
Nicolas Geoffray [Tue, 20 Oct 2015 11:52:27 +0000 (11:52 +0000)]
Merge "Remove ArtCode."
am:
94e24ac0e9
* commit '
94e24ac0e9e2bad74e9beecbd068f2b87798b815':
Remove ArtCode.
Nicolas Geoffray [Tue, 20 Oct 2015 11:41:49 +0000 (11:41 +0000)]
Merge "Remove ArtCode."
Nicolas Geoffray [Fri, 16 Oct 2015 16:13:34 +0000 (17:13 +0100)]
Remove ArtCode.
- Instead use OatQuickMethodHeader.
- Various cleanups now that we don't have all those
ArtMethod -> ArtCode -> OatQuickMethodHeader indirections.
As a consequence of this cleanup, exception handling got a bit
faster.
ParserCombinators benchmark (exception intensive) on x64: (lower is better)
Before:
ParserCombinators(RunTime):
1062500.0 us.
After:
ParserCombinators(RunTime): 833000.0 us.
Change-Id: Idac917b6f1b0dc254ad68fb3781cd61bccadb0f3
Calin Juravle [Tue, 20 Oct 2015 10:36:48 +0000 (10:36 +0000)]
Merge "Fix induction_var_range_test."
am:
b697c447eb
* commit '
b697c447eb61c2e14315166ec3b0d16375ae403c':
Fix induction_var_range_test.
Calin Juravle [Tue, 20 Oct 2015 10:32:22 +0000 (10:32 +0000)]
Merge "Fix induction_var_range_test."
Calin Juravle [Tue, 20 Oct 2015 10:29:36 +0000 (11:29 +0100)]
Fix induction_var_range_test.
Change-Id: I43101c5e35f4c516ea4ba3137631508f12703412
Calin Juravle [Tue, 20 Oct 2015 09:42:55 +0000 (09:42 +0000)]
Merge "Revert "Revert "optimizing: propagate type information of arguments"""
am:
7cf979b02f
* commit '
7cf979b02fa0f2546f3f1b648487ac8df359acf7':
Revert "Revert "optimizing: propagate type information of arguments""
Calin Juravle [Tue, 20 Oct 2015 09:38:07 +0000 (09:38 +0000)]
Merge "Revert "Revert "optimizing: propagate type information of arguments"""
Chris Larsen [Mon, 19 Oct 2015 22:17:16 +0000 (15:17 -0700)]
MIPS64: Disassembler support for rotate instructions.
Also, tighten the tests for recognizing the various shift commands. The
tests, previously, would be unable to distinguish between "shift right
logical" and "rotate right" commands. In particular:
- SRLV vs. ROTRV
- DSRLV vs. DROTRV,
- DSRL vs. DROTR, and
- DSRL32 vs. DROTR32
Change-Id: I7a6df8ab0d76fd3d34b1207da9915369ad84fa97
Andreas Gampe [Mon, 19 Oct 2015 22:10:55 +0000 (15:10 -0700)]
am
e033ea69: Merge "MIPS64: Add intrinsic support for bit rotation"
* commit '
e033ea69bcd1f343c3cf944d78beec726faf348f':
MIPS64: Add intrinsic support for bit rotation
Andreas Gampe [Mon, 19 Oct 2015 22:06:00 +0000 (22:06 +0000)]
Merge "MIPS64: Add intrinsic support for bit rotation"
Chris Larsen [Sat, 3 Oct 2015 00:25:58 +0000 (17:25 -0700)]
MIPS64: Add intrinsic support for bit rotation
- int java.lang.Integer.rotateLeft(int i, int distance)
- int java.lang.Long.rotateLeft(long i, int distance)
Change-Id: I048ebf310265c6b20a80108673a7931cbeee0513
Aart Bik [Mon, 19 Oct 2015 21:09:19 +0000 (14:09 -0700)]
am
25cf8c41: Merge "Added ability to generate induction range code."
* commit '
25cf8c412f966563a3f1a6ab629be74faf61e915':
Added ability to generate induction range code.
Mathieu Chartier [Mon, 19 Oct 2015 21:09:14 +0000 (14:09 -0700)]
am
28a15a92: Merge "Keep dex files live in class table"
* commit '
28a15a922e172f96018ab2a1e94ea1cfeb9b7b95':
Keep dex files live in class table
Aart Bik [Mon, 19 Oct 2015 20:52:50 +0000 (20:52 +0000)]
Merge "Added ability to generate induction range code."
Mathieu Chartier [Mon, 19 Oct 2015 19:54:44 +0000 (19:54 +0000)]
Merge "Keep dex files live in class table"
Aart Bik [Thu, 15 Oct 2015 00:44:55 +0000 (17:44 -0700)]
Added ability to generate induction range code.
Rationale: used by dynamic BCE (done in another CL).
Change-Id: Ia6ce75da57b5298fba74622822ae0bae69c74188
Mathieu Chartier [Sat, 17 Oct 2015 19:46:42 +0000 (12:46 -0700)]
Keep dex files live in class table
The DexFile.loadClass API allows callers to load classes using a
dex file without having that dex file owned by the specified class
loader. We now add the dex file to the class table to make sure it
stays live until the class loader is unreachable.
Fixes interpreter gcstress test 087 with 64 bit.
Bug:
22720414
Change-Id: Ia4341149f45b6293312f8b275c7a68cea179f718
Aart Bik [Mon, 19 Oct 2015 19:03:01 +0000 (12:03 -0700)]
am
f69f56e7: Merge "Generalize codegen and simplification of deopt."
* commit '
f69f56e7d4a1e31dfce2a77558c9b7047f82092b':
Generalize codegen and simplification of deopt.
Aart Bik [Mon, 19 Oct 2015 18:42:59 +0000 (18:42 +0000)]
Merge "Generalize codegen and simplification of deopt."
Aart Bik [Mon, 19 Oct 2015 18:05:03 +0000 (11:05 -0700)]
Generalize codegen and simplification of deopt.
Rationale: the de-opt instruction is very similar to an if,
so the existing assumption that it always has a
conditional "under the hood" is very unsafe, since
optimizations may have replaced conditionals with
actual values; this CL generalizes handling of deopt.
Change-Id: I1c6cb71fdad2af869fa4714b38417dceed676459
Vladimir Marko [Mon, 19 Oct 2015 17:26:52 +0000 (10:26 -0700)]
am
a31e53f8: Merge "ART: Replace an "ALWAYS_INLINE" with "inline" to fix build."
* commit '
a31e53f83cf7c773bd506bb4b7d28f73e92a391a':
ART: Replace an "ALWAYS_INLINE" with "inline" to fix build.
Vladimir Marko [Mon, 19 Oct 2015 17:20:53 +0000 (17:20 +0000)]
Merge "ART: Replace an "ALWAYS_INLINE" with "inline" to fix build."
Vladimir Marko [Mon, 19 Oct 2015 17:18:27 +0000 (18:18 +0100)]
ART: Replace an "ALWAYS_INLINE" with "inline" to fix build.
Change-Id: I61e6806737589266b36ab7a33561da7e1f8c02ca
Vladimir Marko [Mon, 19 Oct 2015 17:00:25 +0000 (10:00 -0700)]
am
2261d465: Merge "Clean up OatFile."
* commit '
2261d465990dd7d46496c074fde7349e9bacb79e':
Clean up OatFile.
Vladimir Marko [Mon, 19 Oct 2015 16:57:22 +0000 (16:57 +0000)]
Merge "Clean up OatFile."
Andreas Gampe [Mon, 19 Oct 2015 15:49:42 +0000 (08:49 -0700)]
am
aeae32f8: Merge "MIPS64: Add intrinsic support for bit rotation"
* commit '
aeae32f846a04c9472fd3bdbbee92c0e1ace9b6c':
MIPS64: Add intrinsic support for bit rotation
Andreas Gampe [Mon, 19 Oct 2015 15:45:55 +0000 (15:45 +0000)]
Merge "MIPS64: Add intrinsic support for bit rotation"
Vladimir Marko [Fri, 16 Oct 2015 10:23:41 +0000 (11:23 +0100)]
Clean up OatFile.
In Setup(), avoid reading beyond the end and use the %zu
format specifier instead of %zd for size_t output.
Make the .bss section pointers non-const.
Change-Id: Ic8f066effe8037b552d8e911c6a5d17370d79ff4
Andreas Gampe [Mon, 19 Oct 2015 15:17:26 +0000 (08:17 -0700)]
am
a5903e62: Merge "MIPS64: Add intrinsics support for trailing zeros"
* commit '
a5903e622c0c11c1513a62e128a26d3cefd16c6f':
MIPS64: Add intrinsics support for trailing zeros
Chris Larsen [Wed, 23 Sep 2015 00:54:15 +0000 (17:54 -0700)]
MIPS64: Add intrinsic support for bit rotation
- int java.lang.Integer.rotateRight(int i, int distance)
- int java.lang.Long.rotateRight(long i, int distance)
Assembler tests for new MIPS instructions will be provided in a
separate patch.
Change-Id: I6dd4786e2d5f674bf56ff3d5afd321bb1bef589e
Andreas Gampe [Mon, 19 Oct 2015 15:12:57 +0000 (15:12 +0000)]
Merge "MIPS64: Add intrinsics support for trailing zeros"
Chris Larsen [Tue, 22 Sep 2015 23:02:40 +0000 (16:02 -0700)]
MIPS64: Add intrinsics support for trailing zeros
- int java.lang.Integer.numberOfTrailingZeros(int i)
- int java.lang.Long.numberOfTrailingZeros(long i)
Change-Id: I0fc1c2629738de9047313b6511b490639eef68f3
Andreas Gampe [Sat, 17 Oct 2015 00:20:34 +0000 (17:20 -0700)]
am
45513eb6: Merge "MIPS64: Implement intrinsics from sun.misc.Unsafe:"
* commit '
45513eb694fe55cf02ca6e8f0884621a6c3f6268':
MIPS64: Implement intrinsics from sun.misc.Unsafe:
Andreas Gampe [Sat, 17 Oct 2015 00:17:20 +0000 (00:17 +0000)]
Merge "MIPS64: Implement intrinsics from sun.misc.Unsafe:"
Chris Larsen [Sat, 5 Sep 2015 06:38:16 +0000 (23:38 -0700)]
MIPS64: Implement intrinsics from sun.misc.Unsafe:
- int getInt(Object, long)
- int getIntVolatile(Object, long)
- long getLong(Object, long)
- long getLongVolatile(Object, long)
- Object getObject(Object, long)
- Object getObjectVolatile(Object, long)
- void putInt(Object, long, int)
- void putOrderedInt(Object, long, int)
- void putIntVolatile(Object, long, int)
- void putObject(Object, long, Object)
- void putOrderedObject(Object, long, Object)
- void putObjectVolatile(Object, long, Object)
- void putLong(Object, long, long)
- void putOrderedLong(Object, long, long)
- void putLongVolatile(Object, long, long)
The compareAndSwap*() functions will be delivered in a separate patch.
Change-Id: I94238254b2f9df017d58fa9a4bb38632f6479472
Alex Light [Sat, 17 Oct 2015 00:04:36 +0000 (17:04 -0700)]
am
522b3089: Merge "Allow changing the optimization level of a build with env variable."
* commit '
522b3089e8d50d3a7bfe8b7f3b8b04c4ac71d8ba':
Allow changing the optimization level of a build with env variable.
Alex Light [Sat, 17 Oct 2015 00:00:30 +0000 (00:00 +0000)]
Merge "Allow changing the optimization level of a build with env variable."
Andreas Gampe [Fri, 16 Oct 2015 22:25:03 +0000 (15:25 -0700)]
am
c4daa0a0: Merge "MIPS64: Additional assember tests:"
* commit '
c4daa0a06cf0b7c1e7b0440fb7e9a06b018b52ff':
MIPS64: Additional assember tests:
Andreas Gampe [Fri, 16 Oct 2015 22:17:56 +0000 (22:17 +0000)]
Merge "MIPS64: Additional assember tests:"
Andreas Gampe [Fri, 16 Oct 2015 21:45:24 +0000 (14:45 -0700)]
am
4b0ef9c9: Merge "MIPS64: Implement intrinsics from java.lang.String:"
* commit '
4b0ef9c9246435da48203e9f273717d81a1ffe2a':
MIPS64: Implement intrinsics from java.lang.String:
Andreas Gampe [Fri, 16 Oct 2015 21:42:10 +0000 (21:42 +0000)]
Merge "MIPS64: Implement intrinsics from java.lang.String:"
Hiroshi Yamauchi [Fri, 16 Oct 2015 17:26:00 +0000 (17:26 +0000)]
am
7cabeca7: Merge "Revert "Revert "Implement rosalloc fast path in assembly for 32 bit arm."""
* commit '
7cabeca7b86b1d5b6c1cafb6d4bfbb877ddd26b2':
Revert "Revert "Implement rosalloc fast path in assembly for 32 bit arm.""
Hiroshi Yamauchi [Fri, 16 Oct 2015 17:18:53 +0000 (17:18 +0000)]
Merge "Revert "Revert "Implement rosalloc fast path in assembly for 32 bit arm."""
Mathieu Chartier [Fri, 16 Oct 2015 16:41:04 +0000 (16:41 +0000)]
am
bf606b63: Merge "Fix mips64 cfi test"
* commit '
bf606b634691de78e19104b164c439b008f33810':
Fix mips64 cfi test
Mathieu Chartier [Fri, 16 Oct 2015 16:34:26 +0000 (16:34 +0000)]
Merge "Fix mips64 cfi test"
Calin Juravle [Fri, 16 Oct 2015 16:33:51 +0000 (16:33 +0000)]
am
1362c076: Merge "Fix in reference type propagation"
* commit '
1362c07607d4336d26b49b5451039e16526acfeb':
Fix in reference type propagation
Mathieu Chartier [Fri, 16 Oct 2015 16:29:31 +0000 (09:29 -0700)]
Fix mips64 cfi test
Change-Id: I93224f29b23473fb9f2f6631a62949fdf2e8f888
Calin Juravle [Fri, 16 Oct 2015 16:29:23 +0000 (16:29 +0000)]
Merge "Fix in reference type propagation"
Calin Juravle [Fri, 16 Oct 2015 15:28:46 +0000 (16:28 +0100)]
Fix in reference type propagation
We miss updating the type of objects if their nullability gets updated
first.
Bug:
25008765
Change-Id: Id1a753d7d5b7b0d5ed708c325bd00a36240925fb
Vladimir Marko [Fri, 16 Oct 2015 16:19:11 +0000 (16:19 +0000)]
am
977f12b9: Merge "ART: Fix Mips64 JNI Calling Convention"
* commit '
977f12b9fdedc6aad2da04d25ca18fd39340003a':
ART: Fix Mips64 JNI Calling Convention
Vladimir Marko [Fri, 16 Oct 2015 16:13:34 +0000 (16:13 +0000)]
Merge "ART: Fix Mips64 JNI Calling Convention"
Mathieu Chartier [Fri, 16 Oct 2015 15:53:53 +0000 (15:53 +0000)]
am
3ae313d9: Merge "Change hash table load factors"
* commit '
3ae313d9bc64eaa0c791452dd972654eae979496':
Change hash table load factors
Mathieu Chartier [Fri, 16 Oct 2015 15:47:08 +0000 (15:47 +0000)]
Merge "Change hash table load factors"
Mathieu Chartier [Thu, 15 Oct 2015 16:19:15 +0000 (09:19 -0700)]
Change hash table load factors
Changed class table and intern table load factors to query the
runtime. The runtime returns load factors based on whether or not we
are a low ram device.
DescriptorEquals time for class linking goes from 10% -> 1.2% for
compiling GmsCore with interpret only.
Added test.
Bug:
24917584
Change-Id: Iaaf5d2eab1b0c2d188d299e4bc1852cdb3801173
Vladimir Marko [Wed, 2 Sep 2015 20:23:32 +0000 (21:23 +0100)]
ART: Fix Mips64 JNI Calling Convention
The frame size did not include RA. RA is part of the core spill
mask, and implicitly spilled in BuildFrame. Count this.
Change-Id: Iab7565c2496ee99660c7faa39a07a2c87be53756
Nicolas Geoffray [Fri, 16 Oct 2015 09:02:20 +0000 (09:02 +0000)]
am
e8939d20: Merge "ARM64: Better recognition of constants encodable as immediates."
* commit '
e8939d20602ec88c314d50e201215a264666828a':
ARM64: Better recognition of constants encodable as immediates.
Nicolas Geoffray [Fri, 16 Oct 2015 08:36:15 +0000 (08:36 +0000)]
Merge "ARM64: Better recognition of constants encodable as immediates."
Alexandre Rames [Fri, 16 Oct 2015 08:08:46 +0000 (09:08 +0100)]
ARM64: Better recognition of constants encodable as immediates.
When the right-hand side input is a constant, VIXL will automatically
switch between add and sub (or between similar pairs of instructions).
Change-Id: Icf05237b8653c409618f44e45049df87baf0f4c6
Andreas Gampe [Fri, 16 Oct 2015 03:01:32 +0000 (03:01 +0000)]
am
28c34f88: Merge "Parse runtime compiler options for JIT"
* commit '
28c34f886521f422424768fe245b98b7b83c6bd7':
Parse runtime compiler options for JIT
Andreas Gampe [Fri, 16 Oct 2015 02:56:15 +0000 (02:56 +0000)]
Merge "Parse runtime compiler options for JIT"
Mathieu Chartier [Fri, 16 Oct 2015 01:19:01 +0000 (18:19 -0700)]
Parse runtime compiler options for JIT
For the case where the CppDefines do not match the device the JIT is
running on.
Sample logcat output to prove it works:
JIT instruction set variant krait
JIT instruction set features default
Bug:
24982714
Change-Id: I1f4991a5d7cdc6101d1b0ecbcb39fb26dd20180a
Andreas Gampe [Fri, 16 Oct 2015 01:12:01 +0000 (01:12 +0000)]
am
3c50e230: Merge "Use ATTRIBUTE_UNUSED more."
* commit '
3c50e2302c98cfb5c49969ba1b82af2e8bba08fa':
Use ATTRIBUTE_UNUSED more.
Andreas Gampe [Fri, 16 Oct 2015 01:07:57 +0000 (01:07 +0000)]
Merge "Use ATTRIBUTE_UNUSED more."
Mathieu Chartier [Thu, 15 Oct 2015 23:51:20 +0000 (23:51 +0000)]
am
ceb0124c: Merge "Fix race in ART 079-phantom"
* commit '
ceb0124c687e20e63c753fc8abb8b623f2206966':
Fix race in ART 079-phantom
Mathieu Chartier [Thu, 15 Oct 2015 23:47:03 +0000 (23:47 +0000)]
Merge "Fix race in ART 079-phantom"
Hiroshi Yamauchi [Thu, 15 Oct 2015 19:26:57 +0000 (12:26 -0700)]
Revert "Revert "Implement rosalloc fast path in assembly for 32 bit arm.""
With a heap poisoning fix.
This reverts commit
cf91c7d973f3b2f491abc61d47c141782c96d46e.
Bug:
9986565
Change-Id: Ia72edbde65ef6119e1931a77cc4c595a0b80ce31
Roland Levillain [Wed, 26 Aug 2015 17:34:03 +0000 (18:34 +0100)]
Use ATTRIBUTE_UNUSED more.
Use it in lieu of UNUSED(), which had some incorrect uses.
Change-Id: If247dce58b72056f6eea84968e7196f0b5bef4da
Andreas Gampe [Thu, 15 Oct 2015 17:36:43 +0000 (17:36 +0000)]
am
11487310: Merge "ART: Add simple null alias tracking for lock counting"
* commit '
114873103db3d4d6e0da42ca02bad1ea8826443b':
ART: Add simple null alias tracking for lock counting
Andreas Gampe [Thu, 15 Oct 2015 17:32:36 +0000 (17:32 +0000)]
Merge "ART: Add simple null alias tracking for lock counting"
Andreas Gampe [Wed, 14 Oct 2015 19:55:48 +0000 (12:55 -0700)]
ART: Add simple null alias tracking for lock counting
Null is the only literal for objects, and one may lock and unlock
on different registers containing null, which is still balanced.
Bug:
23502994
Change-Id: Ibfbf1b8c2aa7d1409e3e426988d2d15efe1f2d0d
Aart Bik [Thu, 15 Oct 2015 16:24:42 +0000 (16:24 +0000)]
am
d5a69fc4: Merge "Added support for unsigned comparisons"
* commit '
d5a69fc429f57bf528aa061618d3ae94ee8deb24':
Added support for unsigned comparisons
Aart Bik [Thu, 15 Oct 2015 16:18:05 +0000 (16:18 +0000)]
Merge "Added support for unsigned comparisons"
Vladimir Marko [Thu, 15 Oct 2015 16:07:46 +0000 (16:07 +0000)]
am
bdbce4e3: Merge "ART: Use .bss section for dex cache arrays."
* commit '
bdbce4e321b16a14425659fabaa5648f52853d51':
ART: Use .bss section for dex cache arrays.
Brian Carlstrom [Thu, 15 Oct 2015 16:02:48 +0000 (16:02 +0000)]
am
b8b3702f: Merge "Fix monitor contention logging to support negative line numbers"
* commit '
b8b3702f6818443cd5535419d97ad106b8623c89':
Fix monitor contention logging to support negative line numbers
Vladimir Marko [Thu, 15 Oct 2015 16:01:16 +0000 (16:01 +0000)]
Merge "ART: Use .bss section for dex cache arrays."
Vladimir Marko [Thu, 15 Oct 2015 15:56:27 +0000 (15:56 +0000)]
am
7dae1918: Merge "Fix a sign-extension bug in JValue."
* commit '
7dae1918d25ea2ad6b5ba166f44472d82c53fa5e':
Fix a sign-extension bug in JValue.
Mathieu Chartier [Thu, 15 Oct 2015 15:56:24 +0000 (15:56 +0000)]
am
4f55fd25: Merge "Allocate dex cache arrays in their class loader\'s linear alloc"
* commit '
4f55fd25111217e37001958b7069fe03292ff1a4':
Allocate dex cache arrays in their class loader's linear alloc
Brian Carlstrom [Thu, 15 Oct 2015 15:55:56 +0000 (15:55 +0000)]
Merge "Fix monitor contention logging to support negative line numbers"
Vladimir Marko [Thu, 15 Oct 2015 15:53:39 +0000 (15:53 +0000)]
Merge "Fix a sign-extension bug in JValue."
Mathieu Chartier [Thu, 15 Oct 2015 15:52:53 +0000 (15:52 +0000)]
Merge "Allocate dex cache arrays in their class loader's linear alloc"
Vladimir Marko [Tue, 8 Sep 2015 12:47:48 +0000 (13:47 +0100)]
ART: Use .bss section for dex cache arrays.
Change-Id: I5fd507973b56f6a662a02a8c1dd9ac4493fb7b36
Mathieu Chartier [Wed, 14 Oct 2015 17:55:30 +0000 (10:55 -0700)]
Allocate dex cache arrays in their class loader's linear alloc
Fixes memory leak for class unloading where the dex cache arrays
used to be in the runtime linear alloc which never got freed.
TODO: Some of the callers like the compiler just use the runtime
linear alloc. We could clean this up if we want to have class
unloading during compilation for some reason.
Added regression test.
Bug:
22720414
Change-Id: Ia50333a06a339efbdaedb5ad94b7a1ae841124ec
Calin Juravle [Thu, 15 Oct 2015 12:39:32 +0000 (12:39 +0000)]
am
bc6cb93b: Merge "Move x86 constant area code to its own file"
* commit '
bc6cb93b2607e584fccdfe4e05ae74aa94e9e463':
Move x86 constant area code to its own file
Calin Juravle [Thu, 15 Oct 2015 12:35:37 +0000 (12:35 +0000)]
Merge "Move x86 constant area code to its own file"
Nicolas Geoffray [Thu, 15 Oct 2015 10:37:42 +0000 (10:37 +0000)]
am
d09d013c: Merge "Revert "load store elimination.""
* commit '
d09d013c0266a0ab270075bb8a16e820e31f7429':
Revert "load store elimination."
Nicolas Geoffray [Thu, 15 Oct 2015 10:33:25 +0000 (10:33 +0000)]
Merge "Revert "load store elimination.""
Nicolas Geoffray [Thu, 15 Oct 2015 10:30:18 +0000 (10:30 +0000)]
Revert "load store elimination."
Breaks libcore tests:
libcore.java.lang.ref.FinalizeTest#testWatchdogDoesNotFailForObjectsThatAreNearTheDeadline
libcore.java.util.ResourceLeakageDetectorTest#testDetectsUnclosedCloseGuard
org.apache.harmony.tests.java.lang.ref.ReferenceTest#test_finalizeReferenceInteraction
This reverts commit
589dac7f0ce078d19aad7e35bb0195c47ddf01d2.
Change-Id: I55115765c10762d5bc152d3425e4622560d8b9f4
Mingyao Yang [Thu, 15 Oct 2015 09:08:01 +0000 (09:08 +0000)]
am
742448b1: Merge "load store elimination."
* commit '
742448b1cabc628af4e9064b5e46ad69f5cdfdbe':
load store elimination.
Mingyao Yang [Thu, 15 Oct 2015 08:47:48 +0000 (08:47 +0000)]
Merge "load store elimination."
Mingyao Yang [Mon, 24 Aug 2015 18:21:42 +0000 (11:21 -0700)]
load store elimination.
This adds a pass to eliminate some unnecessary heap loads/stores. It
first collects heap locations and then tracks values stored to those heap
locations. Alias analysis is done based on offset, type, singleton,
pre-existence, etc.
Change-Id: I11a9d8ef20d1b2f245607eb25118e9aff9be472a
Nicolas Geoffray [Thu, 15 Oct 2015 07:33:25 +0000 (07:33 +0000)]
am
a2b2e736: Merge "Revert "Implement rosalloc fast path in assembly for 32 bit arm.""
* commit '
a2b2e7365d66553164247bafae214f157d480277':
Revert "Implement rosalloc fast path in assembly for 32 bit arm."