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5 years agoRevert "[MIR] Add simple PRE pass to MachineCSE"
Anton Afanasyev [Fri, 3 May 2019 12:36:22 +0000 (12:36 +0000)]
Revert "[MIR] Add simple PRE pass to MachineCSE"

This reverts commit 9c20156de39b377190d7a91783d61877b303fe35.
It breaks stage 2 of clang-ppc64be-linux-multistage.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359875 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[SelectionDAG] Use INT_MIN as (1 << 31) is UB for signed integers. NFCI.
Simon Pilgrim [Fri, 3 May 2019 11:32:00 +0000 (11:32 +0000)]
[SelectionDAG] Use INT_MIN as (1 << 31) is UB for signed integers. NFCI.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359873 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[SelectionDAG] computeKnownBits - remove some duplicate/shadow variables. NFCI.
Simon Pilgrim [Fri, 3 May 2019 11:11:03 +0000 (11:11 +0000)]
[SelectionDAG] computeKnownBits - remove some duplicate/shadow variables. NFCI.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359872 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[X86] LowerMULH - remove unused Lo/Hi vector indices. NFCI.
Simon Pilgrim [Fri, 3 May 2019 10:32:07 +0000 (10:32 +0000)]
[X86] LowerMULH - remove unused Lo/Hi vector indices. NFCI.

Leftover from before we had the extract128BitVector helpers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359871 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[MIR] Add simple PRE pass to MachineCSE
Anton Afanasyev [Fri, 3 May 2019 10:30:59 +0000 (10:30 +0000)]
[MIR] Add simple PRE pass to MachineCSE

This is the second part of the commit fixing PR38917 (hoisting
partitially redundant machine instruction). Most of PRE (partitial
redundancy elimination) and CSE work is done on LLVM IR, but some of
redundancy arises during DAG legalization. Machine CSE is not enough
to deal with it. This simple PRE implementation works a little bit
intricately: it passes before CSE, looking for partitial redundancy
and transforming it to fully redundancy, anticipating that the next
CSE step will eliminate this created redundancy. If CSE doesn't
eliminate this, than created instruction will remain dead and eliminated
later by Remove Dead Machine Instructions pass.

The third part of the commit is supposed to refactor MachineCSE,
to make it more clear and to merge MachinePRE with MachineCSE,
so one need no rely on further Remove Dead pass to clear instrs
not eliminated by CSE.

First step: https://reviews.llvm.org/D54839

Fixes llvm.org/PR38917

Reviewers: RKSimon

Subscribers: hfinkel, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D56772

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359870 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoReduce variable scope to just the if() block its actually used in. NFCI.
Simon Pilgrim [Fri, 3 May 2019 10:13:41 +0000 (10:13 +0000)]
Reduce variable scope to just the if() block its actually used in. NFCI.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359869 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[X86] Add more one checks to masked compare patterns that were missed in r358358.
Craig Topper [Fri, 3 May 2019 07:14:05 +0000 (07:14 +0000)]
[X86] Add more one checks to masked compare patterns that were missed in r358358.

This covers the patterns we use for widening 128/256 comparisons to 512-bit when
AVX512VL isn't supported.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359863 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[docs] Add support for Markdown documentation when creating man pages
Igor Kudrin [Fri, 3 May 2019 05:11:48 +0000 (05:11 +0000)]
[docs] Add support for Markdown documentation when creating man pages

rL358749 added a documentation page in the Markdown format. Currently,
such pages are ignored in the configuration script for manual pages.
This patch fixes that.

Differential Revision: https://reviews.llvm.org/D60964

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359860 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[IRTranslator] Use the alloc size instead of the store size when translating allocas
Quentin Colombet [Fri, 3 May 2019 01:23:56 +0000 (01:23 +0000)]
[IRTranslator] Use the alloc size instead of the store size when translating allocas

We use to incorrectly use the store size instead of the alloc size when
creating the stack slot for allocas.
On aarch64 this can be demonstrated by allocating weirdly sized types.

For instance, in the added test case, we use an alloca for i19. We used
to allocate a slot of size 24-bit (19 rounded up to the next byte),
whereas we really want to use a full 32-bit slot for this type.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359856 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[AArch64][MC] Reject "add x0, x1, w2, lsl #1" etc.
Eli Friedman [Fri, 3 May 2019 00:59:52 +0000 (00:59 +0000)]
[AArch64][MC] Reject "add x0, x1, w2, lsl #1" etc.

Looks like just a minor oversight in the parsing code.

Fixes https://bugs.llvm.org/show_bug.cgi?id=41504.

Differential Revision: https://reviews.llvm.org/D60840

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359855 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoTidy up a comment, fix a typo, remove a comment that's obsolete.
Eric Christopher [Fri, 3 May 2019 00:15:23 +0000 (00:15 +0000)]
Tidy up a comment, fix a typo, remove a comment that's obsolete.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359852 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[AArch64][Windows] Compute function length correctly in unwind tables.
Eli Friedman [Fri, 3 May 2019 00:10:45 +0000 (00:10 +0000)]
[AArch64][Windows] Compute function length correctly in unwind tables.

The primary fix here is to WinException.cpp: we need to exclude jump
tables when computing the length of a function, or else we fail to
correctly compute the length. (We can only compute the number of bytes
consumed by certain assembler directives after the entire file is
parsed. ".p2align" is one of those directives, and is used by jump table
generation.)

The secondary fix, to MCWin64EH, is to make sure we don't silently
miscompile if we hit a similar situation in the future.

It's possible we could extend ARM64EmitUnwindInfo so it allows function
bodies that contain assembler directives, but that's a lot more
complicated; see the FIXME in MCWin64EH.cpp.

Fixes https://bugs.llvm.org/show_bug.cgi?id=41581 .

Differential Revision: https://reviews.llvm.org/D61095

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359849 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[MemorySSA] Check that block is reachable when adding phis.
Alina Sbirlea [Thu, 2 May 2019 23:41:58 +0000 (23:41 +0000)]
[MemorySSA] Check that block is reachable when adding phis.

Summary:
Originally the insertDef method was only used when building MemorySSA, and was limiting the number of Phi nodes that it created.
Now it's used for updates as well, and it can create additional Phis needed for correctness.
Make sure no Phis are created in unreachable blocks (condition met during MSSA build), otherwise the renamePass will find a null DTNode.

Resolves PR41640.

Reviewers: george.burgess.iv

Subscribers: jlebar, Prazek, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D61410

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359845 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[MemorySSA] Refactor removing multiple trivial phis [NFC].
Alina Sbirlea [Thu, 2 May 2019 23:12:49 +0000 (23:12 +0000)]
[MemorySSA] Refactor removing multiple trivial phis [NFC].

Summary: Create a method to clean up multiple potentially trivial phis, since we will need this often.

Reviewers: george.burgess.iv

Subscribers: jlebar, Prazek, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D61471

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359842 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[X86] Remove LEA16r references from X86FixupLEAs. NFCI
Craig Topper [Thu, 2 May 2019 22:46:23 +0000 (22:46 +0000)]
[X86] Remove LEA16r references from X86FixupLEAs. NFCI

As far as I know, we never emit LEA16r

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359840 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[X86] Correct the register class for specific mask register constraints in getRegForI...
Craig Topper [Thu, 2 May 2019 22:26:40 +0000 (22:26 +0000)]
[X86] Correct the register class for specific mask register constraints in getRegForInlineAsmConstraint when the VT is a scalar type

The default impementation in the base class for TargetLowering::getRegForInlineAsmConstraint doesn't work for mask registers when the VT is a scalar type integer types since the only legal mask types are vXi1. So we end up just getting whatever the first register class that contains the register. Currently this appears to be VK1, but its really dependent on the order tablegen outputs the register classes.

Some code in the caller ends up looking up the type for this register class and find v1i1 then generates a copyfromreg from the physical k-register with the v1i1 type. Then it generates an any_extend from v1i1 to the scalar VT which isn't legal. This bad any_extend sticks around until isel where it selects a MOVZX32rr8 with a v1i1 input or maybe a i8 input. Not sure but eventually we pick up a copy from VK1 to GR8 in MachineIR which isn't supported. This leads to a failure in physical register copying.

This patch uses the scalar type to find a VK class of the right size. In the attached test case this will be VK16. This causes a bitcast from vk16 to i16 to be generated instead of an any_extend. This will be properly iseled to a VK16 to GR32 copy and a GR32->GR16 extract_subreg.

Fixes PR41678

Differential Revision: https://reviews.llvm.org/D61453

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359837 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[SelectionDAG] Add asserts to verify the vectorness of input and output types of...
Craig Topper [Thu, 2 May 2019 22:26:26 +0000 (22:26 +0000)]
[SelectionDAG] Add asserts to verify the vectorness of input and output types of TRUNCATE/ZERO_EXTEND/ANY_EXTEND/SIGN_EXTEND agree

As a result of the underlying cause of PR41678 we created an ANY_EXTEND node with a scalar result type and v1i1 input type. Ideally we would have asserted for this instead of letting it go through to instruction selection and generate bad machine IR

Differential Revision: https://reviews.llvm.org/D61463

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359836 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[AArch64] Update for Exynos
Evandro Menezes [Thu, 2 May 2019 22:01:39 +0000 (22:01 +0000)]
[AArch64] Update for Exynos

Fix the forwarding of multiplication results for Exynos M4.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359834 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[X86] Remove string literal from an if. NFC
Craig Topper [Thu, 2 May 2019 21:57:18 +0000 (21:57 +0000)]
[X86] Remove string literal from an if. NFC

This if used to be an assert that got refactored into an if, but left the string literal behind.

Fixes PR41718

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359833 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoRevert [ThinLTO] Fix X86/strong_non_prevailing.ll after llvm-nm 'r' change
Jordan Rupprecht [Thu, 2 May 2019 21:48:04 +0000 (21:48 +0000)]
Revert [ThinLTO] Fix X86/strong_non_prevailing.ll after llvm-nm 'r' change

This reverts r359314 (git commit 5015aa854dc043b2ae5d95e04e00d98518207ce5)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359831 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoRevert [llvm-nm] Fix handling of symbol types + [llvm-nm] Generalize symbol types
Jordan Rupprecht [Thu, 2 May 2019 21:42:46 +0000 (21:42 +0000)]
Revert [llvm-nm] Fix handling of symbol types + [llvm-nm] Generalize symbol types

This reverts r359311 and r359312 (git commit 0bf06a8f59b0074a60871865e828d92db8930c59 and 5f184f17800ea2ac27be5e4ab540cb94a46e80c7)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359830 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agolld-link: Add /force:multipleres extension to make dupe resource diag non-fatal
Nico Weber [Thu, 2 May 2019 21:21:55 +0000 (21:21 +0000)]
lld-link: Add /force:multipleres extension to make dupe resource diag non-fatal

As a side benefit, lld-link now reports more than one duplicate resource
entry before exiting with an error even if the new flag is not passed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359829 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[gn] Include the missing BUILD.gn file for libcxxabi includes
Petr Hosek [Thu, 2 May 2019 21:20:08 +0000 (21:20 +0000)]
[gn] Include the missing BUILD.gn file for libcxxabi includes

This was omitted in r359805.

Differential Revision: https://reviews.llvm.org/D61462

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359828 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[gn] Update the clangd test lit site configuration
Petr Hosek [Thu, 2 May 2019 20:34:54 +0000 (20:34 +0000)]
[gn] Update the clangd test lit site configuration

This reflects changes made in r359763.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359825 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoTypo Functino->Function.
Eric Christopher [Thu, 2 May 2019 19:49:35 +0000 (19:49 +0000)]
Typo Functino->Function.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359821 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agobuild: add option to disable unwind tables
Saleem Abdulrasool [Thu, 2 May 2019 19:37:26 +0000 (19:37 +0000)]
build: add option to disable unwind tables

The unwind tables (`.eh_frame`, `.arm.extab`) add a significant chunk of data to
the final binaries.  These should not be needed normally, particularly when
exceptions are disabled.  This enables shrinking `lldb-server` by ~18% (3 MiB)
when built with gold.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359819 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[yaml2obj] - Make interface of `NameToIdxMap` class be human friendly and fix users.
George Rimar [Thu, 2 May 2019 19:28:04 +0000 (19:28 +0000)]
[yaml2obj] - Make interface of `NameToIdxMap` class be human friendly and fix users.

This patch inverses the values returned by `addName` and
`lookup` methods of the class mentioned so that they
now return true on success and false on failure.
Also, it does minor code cleanup.

Differential revision: https://reviews.llvm.org/D61190

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359818 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[gn] Include libcxx configuration file
Petr Hosek [Thu, 2 May 2019 19:07:23 +0000 (19:07 +0000)]
[gn] Include libcxx configuration file

This was omitted in r359806 but is already referenced in the GN build.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359815 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[gn] Support for building libc++
Petr Hosek [Thu, 2 May 2019 17:29:41 +0000 (17:29 +0000)]
[gn] Support for building libc++

This change introduces support for building libc++. The library
build should be complete, but not all CMake options have been
replicated in GN. We also don't support tests yet.

We only support two stage build at the moment.

Differential Revision: https://reviews.llvm.org/D61143

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359806 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[gn] Support for building libcxxabi
Petr Hosek [Thu, 2 May 2019 17:29:39 +0000 (17:29 +0000)]
[gn] Support for building libcxxabi

This change introduces support for building libcxxabi. The library
build should be complete, but not all CMake options have been
replicated in GN. We also don't support tests yet.

We only support two stage build at the moment.

Differential Revision: https://reviews.llvm.org/D60372

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359805 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[gn] Support for building libunwind
Petr Hosek [Thu, 2 May 2019 17:29:37 +0000 (17:29 +0000)]
[gn] Support for building libunwind

This change introduces support for building libuwind. The library
build should be complete, but not all CMake options have been
replicated in GN. We also don't support tests yet.

We only support two stage build at the moment.

Differential Revision: https://reviews.llvm.org/D60370

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359804 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[DAGCombiner] try repeated fdiv divisor transform before building estimate (2nd try)
Sanjay Patel [Thu, 2 May 2019 15:02:08 +0000 (15:02 +0000)]
[DAGCombiner] try repeated fdiv divisor transform before building estimate (2nd try)

The original patch was committed at rL359398 and reverted at rL359695 because of
infinite looping.

This includes a fix to check for a vector splat of "1.0" to avoid the infinite loop.

Original commit message:

This was originally part of D61028, but it's an independent diff.

If we try the repeated divisor reciprocal transform before producing an estimate sequence,
then we have an opportunity to use scalar fdiv. On x86, the trade-off is 1 divss vs. 5
vector FP ops in the default estimate sequence. On recent chips (Skylake, Ryzen), the
full-precision division is only 3 cycle throughput, so that's probably the better perf
default option and avoids problems from x86's inaccurate estimates.

The last 2 tests show that users still have the option to override the defaults by using
the function attributes for reciprocal estimates, but those patterns are potentially made
faster by converting the vector ops (including ymm ops) to scalar math.

Differential Revision: https://reviews.llvm.org/D61149

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359793 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[SelectionDAG] remove constant folding limitations based on FP exceptions
Sanjay Patel [Thu, 2 May 2019 14:47:59 +0000 (14:47 +0000)]
[SelectionDAG] remove constant folding limitations based on FP exceptions

We don't have FP exception limits in the IR constant folder for the binops (apart from strict ops),
so it does not make sense to have them here in the DAG either. Nothing else in the backend tries
to preserve exceptions (again outside of strict ops), so I don't see how this could have ever
worked for real code that cares about FP exceptions.

There are still cases (examples: unary opcodes in SDAG, FMA in IR) where we are trying (at least
partially) to preserve exceptions without even asking if the target supports FP exceptions. Those
should be corrected in subsequent patches.

Real support for FP exceptions requires several changes to handle the constrained/strict FP ops.

Differential Revision: https://reviews.llvm.org/D61331

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359791 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[X86][SSE] lowerAddSubToHorizontalOp - enable ymm extraction+fold
Simon Pilgrim [Thu, 2 May 2019 14:00:55 +0000 (14:00 +0000)]
[X86][SSE] lowerAddSubToHorizontalOp - enable ymm extraction+fold

Limiting scalar hadd/hsub generation to the lowest xmm looks to be unnecessary - we will be extracting one upper xmm whatever, and we can remove a shuffle by using the hop which is inline with what shouldUseHorizontalOp expects to happen anyway.

Testing on btver2 (the main target for fast-hops) shows this is beneficial even for float ops where we have a 'shuffle' to extract the float result:
https://godbolt.org/z/0R-U-K

Differential Revision: https://reviews.llvm.org/D61426

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359786 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[X86][SSE] Move shouldUseHorizontalOp inside isHorizontalBinOp. NFCI.
Simon Pilgrim [Thu, 2 May 2019 12:18:24 +0000 (12:18 +0000)]
[X86][SSE] Move shouldUseHorizontalOp inside isHorizontalBinOp. NFCI.

Matches what we do for lowerAddSubToHorizontalOp and will make it easier to peek through subvectors to help fix PR39921

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359782 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[llvm-strip]Add --no-strip-all to disable --strip-all behaviour (including default...
James Henderson [Thu, 2 May 2019 11:53:02 +0000 (11:53 +0000)]
[llvm-strip]Add --no-strip-all to disable --strip-all behaviour (including default stripping)

If certain switches are not specified, llvm-strip behaves as if
--strip-all were specified. This means that for testing, when we don't
want the stripping behaviour, we have to specify one of these switches,
which can be confusing. This change adds --no-strip-all to allow an
alternative way of suppressing the default stripping, in a less
confusing manner.

Reviewed by: jakehehrlich, MaskRay

Differential Revision: https://reviews.llvm.org/D61377

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359781 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[LTO] Migrate typedef to using
Fangrui Song [Thu, 2 May 2019 10:52:34 +0000 (10:52 +0000)]
[LTO] Migrate typedef to using

using has been used in several places in the file. Migrate the rest for consistency.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359776 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[llvm-readobj] Delete and inline relocAddressLess
Fangrui Song [Thu, 2 May 2019 10:49:27 +0000 (10:49 +0000)]
[llvm-readobj] Delete and inline relocAddressLess

It is used only once in COFFDumper.cpp. Deleting it from the public
interface seems better.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359775 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[Object] Change getSectionName() to return Expected<StringRef>
Fangrui Song [Thu, 2 May 2019 10:32:03 +0000 (10:32 +0000)]
[Object] Change getSectionName() to return Expected<StringRef>

Summary:
It currently receives an output parameter and returns
std::error_code. Expected<StringRef> fits for this purpose perfectly.

Differential Revision: https://reviews.llvm.org/D61421

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359774 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[ARM GlobalISel] Fixup r359768
Diana Picus [Thu, 2 May 2019 10:08:29 +0000 (10:08 +0000)]
[ARM GlobalISel] Fixup r359768

Get rid of local variable used only in assertion.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359772 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[ARM GlobalISel] Select extensions to < 32 bits
Diana Picus [Thu, 2 May 2019 09:28:00 +0000 (09:28 +0000)]
[ARM GlobalISel] Select extensions to < 32 bits

Select G_SEXT and G_ZEXT with destination types smaller than 32 bits in
the exact same way as 32 bits. This overwrites the higher bits, but that
should be ok since all legal users of types smaller than 32 bits ignore
those bits anyway.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359768 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[ARM GlobalISel] Rename some inst selector tests. NFC
Diana Picus [Thu, 2 May 2019 09:24:47 +0000 (09:24 +0000)]
[ARM GlobalISel] Rename some inst selector tests. NFC

Prepare to add support for extensions to types smaller than 32 bits.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359767 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[ARM GlobalISel] Legalize extensions to < 32 bits
Diana Picus [Thu, 2 May 2019 09:21:46 +0000 (09:21 +0000)]
[ARM GlobalISel] Legalize extensions to < 32 bits

Make it legal to extend from e.g. s1 to s8 or s16.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359766 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[NFC][PowerPC] Return early if the element type is not byte-sized in combineBVOfConse...
Kang Zhang [Thu, 2 May 2019 08:15:13 +0000 (08:15 +0000)]
[NFC][PowerPC] Return early if the element type is not byte-sized in combineBVOfConsecutiveLoads

Summary:
Based on the Eli Friedman's comments in https://reviews.llvm.org/D60811 , we'd better return early if the element type is not byte-sized in `combineBVOfConsecutiveLoads`.

Reviewed By: efriedma
Differential Revision: https://reviews.llvm.org/D61076

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359764 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoObject/Minidump: Add support for the ThreadList stream
Pavel Labath [Thu, 2 May 2019 07:45:42 +0000 (07:45 +0000)]
Object/Minidump: Add support for the ThreadList stream

Summary:
The stream contains the list of threads belonging to the process
described by the minidump. Its structure is the same as the ModuleList
stream, and in fact, I have generalized the ModuleList reading code to
handle this stream too.

Reviewers: amccarth, jhenderson, clayborg

Subscribers: llvm-commits, lldb-commits, markmentovai, zturner

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D61064

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359762 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[Support] Don't check MAP_ANONYMOUS, just use MAP_ANON
Fangrui Song [Thu, 2 May 2019 05:58:09 +0000 (05:58 +0000)]
[Support] Don't check MAP_ANONYMOUS, just use MAP_ANON

Though being marked "deprecated" by the Linux man-pages project
(MAP_ANON is a synonym of MAP_ANONYMOUS), it is the mostly widely
available macro - many systems that don't provide MAP_ANONYMOUS have
MAP_ANON. MAP_ANON is also used here and there in compiler-rt.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359758 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[AMDGPU] gfx1010 lost VOP2 forms of some add/sub
Stanislav Mekhanoshin [Thu, 2 May 2019 04:26:35 +0000 (04:26 +0000)]
[AMDGPU] gfx1010 lost VOP2 forms of some add/sub

Add legalization of V_ADD_I32, V_SUB_I32, V_SUBREV_I32.

Differential Revision:

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359757 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[AMDGPU] gfx1010 allows VOP3 to have a literal
Stanislav Mekhanoshin [Thu, 2 May 2019 04:01:39 +0000 (04:01 +0000)]
[AMDGPU] gfx1010 allows VOP3 to have a literal

Differential Revision: https://reviews.llvm.org/D61413

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359756 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[AMDGPU] gfx1010 constant bus limit
Stanislav Mekhanoshin [Thu, 2 May 2019 03:47:23 +0000 (03:47 +0000)]
[AMDGPU] gfx1010 constant bus limit

Constant bus limit has increased to 2 with GFX10.

Differential Revision: https://reviews.llvm.org/D61404

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359754 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[X86] Remove the redundant suffix in vfpclassp[d,s]'s broadcasting variant
Craig Topper [Thu, 2 May 2019 03:25:50 +0000 (03:25 +0000)]
[X86] Remove the redundant suffix in vfpclassp[d,s]'s broadcasting variant

The broadcasting variant for instruction vfpclassp[d,s] shouldn't use suffix q/l. So remove them from the template.

Patch by Pengfei Wang

Differential Revision: https://reviews.llvm.org/D61295

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359753 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agolld-link: Make "duplicate resource" error message a bit more concise
Nico Weber [Thu, 2 May 2019 01:52:24 +0000 (01:52 +0000)]
lld-link: Make "duplicate resource" error message a bit more concise

Reduces the error message from:
    lld-link: error: failed to parse .res file: duplicate resource: type STRINGTABLE (ID 6)/name ID 3/language 1033, in test1.res and in test2.res

To:
    lld-link: error: duplicate resource: type STRINGTABLE (ID 6)/name ID 3/language 1033, in test1.res and in test2.res

Make sure every error message emitted by cvtres contains the name of at
least one ".res" file, so that removing the "failed to parse .res file"
string doesn't lose information.

Differential Revision: https://reviews.llvm.org/D61388

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359749 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoremove inalloca parameters in globalopt and simplify argpromotion
Bob Haarman [Thu, 2 May 2019 00:37:36 +0000 (00:37 +0000)]
remove inalloca parameters in globalopt and simplify argpromotion

Summary:
Inalloca parameters require special handling in some optimizations.
This change causes globalopt to strip the inalloca attribute from
function parameters when it is safe to do so, removes the special
handling for inallocas from argpromotion, and replaces it with a
simple check that causes argpromotion to skip functions that receive
inallocas (for when the pass is invoked on code that didn't run
through globalopt first). This also avoids a case where argpromotion
would incorrectly try to pass an inalloca in a register.

Fixes PR41658.

Reviewers: rnk, efriedma

Reviewed By: rnk

Subscribers: llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D61286

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359743 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[FileCheck] Fix line-count.txt test
Thomas Preud'homme [Thu, 2 May 2019 00:04:44 +0000 (00:04 +0000)]
[FileCheck] Fix line-count.txt test

Summary: Enable currently skipped diagnostic test and fix column number

Reviewers: jhenderson, chandlerc, jdenny, probinson, grimar, arichardson, rnk

Subscribers: JonChesterfield, rogfer01, hfinkel, kristina, rnk, tra, arichardson, grimar, dblaikie, probinson, llvm-commits, hiraditya

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D61320

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359742 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoFileCheck [4/12]: Introduce @LINE numeric expressions
Thomas Preud'homme [Thu, 2 May 2019 00:04:38 +0000 (00:04 +0000)]
FileCheck [4/12]: Introduce @LINE numeric expressions

Summary:
This patch is part of a patch series to add support for FileCheck
numeric expressions. This specific patch introduces the @LINE numeric
expressions.

This commit introduces a new syntax to express a relation a numeric
value in the input text must have with the line number of a given CHECK
pattern: [[#<@LINE numeric expression>]]. Further commits build on that
to express relations between several numeric values in the input text.
To help with naming, regular variables are renamed into pattern
variables and old @LINE expression syntax is referred to as legacy
numeric expression.

Compared to existing @LINE expressions, this new syntax allow arbitrary
spacing between the component of the expression. It offers otherwise the
same functionality but the commit serves to introduce some of the data
structure needed to support more general numeric expressions.

Copyright:
    - Linaro (changes up to diff 183612 of revision D55940)
    - GraphCore (changes in later versions of revision D55940 and
                 in new revision created off D55940)

Reviewers: jhenderson, chandlerc, jdenny, probinson, grimar, arichardson, rnk

Subscribers: hiraditya, llvm-commits, probinson, dblaikie, grimar, arichardson, tra, rnk, kristina, hfinkel, rogfer01, JonChesterfield

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D60384

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359741 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoRevert r359717, "Make check-clang depend on the clang-check binary always"
Nico Weber [Wed, 1 May 2019 23:32:38 +0000 (23:32 +0000)]
Revert r359717, "Make check-clang depend on the clang-check binary always"

The Tooling tests do have a lit.local.cfg with

    if not config.root.clang_staticanalyzer:
        config.unsupported = True

so what's wrong isn't the missing dep, but that lit prints a warning for
the binary missing. This will need a different kind of fix.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359739 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoFix erroneous flag in GISel line for arm64-fast-isel-materialize.ll
Jessica Paquette [Wed, 1 May 2019 22:50:11 +0000 (22:50 +0000)]
Fix erroneous flag in GISel line for arm64-fast-isel-materialize.ll

Accidentally put a fast-isel-abort=2 instead of the GISel abort line.

This test doesn't actually fall back at all for GISel though, so remove the
fallback checks entirely.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359737 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[PGO][CHR] A bug fix.
Hiroshi Yamauchi [Wed, 1 May 2019 22:49:52 +0000 (22:49 +0000)]
[PGO][CHR] A bug fix.

Summary: Fix a transformation bug where two scopes share a common instrution to hoist.

Reviewers: davidxl

Reviewed By: davidxl

Subscribers: llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D61405

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359736 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[ORC] Pass object buffer ownership back in NotifyEmitted.
Lang Hames [Wed, 1 May 2019 22:40:23 +0000 (22:40 +0000)]
[ORC] Pass object buffer ownership back in NotifyEmitted.

Clients who want to regain ownership of object buffers after they have been
linked may now use the NotifyEmitted callback for this purpose.

Note: Currently NotifyEmitted is only called if linking succeeds. If linking
fails the buffer is always discarded.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359735 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[GlobalISel][AArch64] Use fmov for G_FCONSTANT when possible
Jessica Paquette [Wed, 1 May 2019 22:39:43 +0000 (22:39 +0000)]
[GlobalISel][AArch64] Use fmov for G_FCONSTANT when possible

This adds support for using fmov rather than a standard mov to materialize
G_FCONSTANT when it's safe to do so.

Update arm64-fast-isel-materialize.ll and select-constant.mir to show that the
selection is correct.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359734 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[AArch64] Add tests for bool vector reductions; NFC
Nikita Popov [Wed, 1 May 2019 20:18:36 +0000 (20:18 +0000)]
[AArch64] Add tests for bool vector reductions; NFC

Baseline tests for PR41635.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359723 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoTry to unbreak sphinx bot after r359714
Nico Weber [Wed, 1 May 2019 20:00:45 +0000 (20:00 +0000)]
Try to unbreak sphinx bot after r359714

The now-correctly-referenced label dbi_type_server_map_substream didn't
exist. Rewrite things a bit after looking at NewDBIHdr in dbi.h and its
use in dbi.cpp in the reference implementation.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359721 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoMake check-clang depend on the clang-check binary always
Nico Weber [Wed, 1 May 2019 19:34:00 +0000 (19:34 +0000)]
Make check-clang depend on the clang-check binary always

check-clang (the target that runs all clang tests) used to
only depend on clang-check (a binary like clang-tidy,
clang-refactor, etc) if the static analyzer is enabled.
However, several lit tests call clang-check unconditionally,
so always depend on it.

Fixes a "could not find clang-check" lit warning in clean builds with
the static analyzer disabled.

Also sort the deps in the CMake file and put just one dep on each line.

Differential Revision: https://reviews.llvm.org/D61324

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359717 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoMinor tweaks to PDB docs
Nico Weber [Wed, 1 May 2019 19:29:30 +0000 (19:29 +0000)]
Minor tweaks to PDB docs

- Fix a broken link
- Some spelling fixes
- Remove an unnecessary "amortized"
- Don't say "log(n) random access"; "random access" means O(1)
- Make MSF overview a bit more concise

Differential Revision: https://reviews.llvm.org/D61196

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359714 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoConvert PDB docs to unix line endings. No other changes.
Nico Weber [Wed, 1 May 2019 19:15:05 +0000 (19:15 +0000)]
Convert PDB docs to unix line endings. No other changes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359712 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[PowerPC] add test that could infinite loop with reordered transforms; NFC
Sanjay Patel [Wed, 1 May 2019 17:34:30 +0000 (17:34 +0000)]
[PowerPC] add test that could infinite loop with reordered transforms; NFC

This is a slightly reduced version of the test from D61384.
Adding this as a preliminary step, so I can update D61149 with
the proposed fix.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359709 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[X86][SSE] Fold scalar horizontal add/sub for non-0/1 element extractions
Simon Pilgrim [Wed, 1 May 2019 17:13:35 +0000 (17:13 +0000)]
[X86][SSE] Fold scalar horizontal add/sub for non-0/1 element extractions

We already perform horizontal add/sub if we extract from elements 0 and 1, this patch extends it to non-0/1 element extraction indices (as long as they are from the lowest 128-bit vector).

Differential Revision: https://reviews.llvm.org/D61263

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359707 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[globalisel] Update the legalizer documentation
Daniel Sanders [Wed, 1 May 2019 16:52:29 +0000 (16:52 +0000)]
[globalisel] Update the legalizer documentation

Summary:
* The getActionDefinitionsBuilder() is now documented.
  * Includes descriptions of the various actions (legal*, widenScalar*, lower*,
    etc).
  * Includes descriptions of the various predicates (*If, *For,
    *ForCartesianProduct, etc.)
  * Includes the rule-order details
* Removed the out-of-date prohibition on non-power-of-2 types.
* Removed the Vector types section since it was incorrect and vectors follow the
  same ruleset as scalars. They're only special in the sense that more of the
  actions and predicates are meaningful for them (e.g. moreElements).
* Clarified the position on context sensitive legality (which is not permitted)
  and contrasted this with context sensitive legalization (which is permitted).

Reviewers: bogner, aditya_nandakumar, volkan, aemerson, paquette, arsenm

Reviewed By: paquette

Subscribers: wdng, rovka, kristof.beyls, jfb, Petar.Avramovic, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D61273

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359705 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[AMDGPU] gfx1010 GCNRegBankReassign pass
Stanislav Mekhanoshin [Wed, 1 May 2019 16:49:31 +0000 (16:49 +0000)]
[AMDGPU] gfx1010 GCNRegBankReassign pass

Reassign registers to reduce register bank conflicts.

Differential Revision: https://reviews.llvm.org/D61344

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359704 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoOption spell checking: Penalize delimiter flags if input has no argument
Nico Weber [Wed, 1 May 2019 16:45:15 +0000 (16:45 +0000)]
Option spell checking: Penalize delimiter flags if input has no argument

If the user passes a flag like `-version` to a program, it's more likely
they mean `--version` than `-version:`, since there's no parameter
passed. Hence, give delimited arguments a penalty of 1 if the user input
doesn't contain the delimiter or no data after it.

The motivation is that with this, lld-link can suggest "--version"
instead of "-version:" for "-version" and "-nodefaultlib" instead of
"-nodefaultlib:" for "-nodefaultlibs".

Differential Revision: https://reviews.llvm.org/D61382

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359701 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[AMDGPU] gfx1010 GCNNSAReassign pass
Stanislav Mekhanoshin [Wed, 1 May 2019 16:40:49 +0000 (16:40 +0000)]
[AMDGPU] gfx1010 GCNNSAReassign pass

Convert NSA into non-NSA images.

Differential Revision: https://reviews.llvm.org/D61341

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359700 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[AMDGPU] gfx1010 MIMG implementation
Stanislav Mekhanoshin [Wed, 1 May 2019 16:32:58 +0000 (16:32 +0000)]
[AMDGPU] gfx1010 MIMG implementation

Differential Revision: https://reviews.llvm.org/D61339

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359698 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[ThinLTO] Fix unreachable code when parsing summary entries.
Teresa Johnson [Wed, 1 May 2019 16:26:59 +0000 (16:26 +0000)]
[ThinLTO] Fix unreachable code when parsing summary entries.

Summary:
Early returns were causing some code to be skipped. This was missed
since the summary entries are typically at the end of the llvm assembly
file.

Fixes PR41663.

Reviewers: RKSimon, wristow

Subscribers: mehdi_amini, inglorion, eraman, steven_wu, dexonsmith, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D61355

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359697 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[AMDGPU] gfx1010 DS implementation
Stanislav Mekhanoshin [Wed, 1 May 2019 16:11:11 +0000 (16:11 +0000)]
[AMDGPU] gfx1010 DS implementation

Differential Revision: https://reviews.llvm.org/D61332

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359696 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoRevert "[DAGCombiner] try repeated fdiv divisor transform before building estimate"
Sanjay Patel [Wed, 1 May 2019 16:06:21 +0000 (16:06 +0000)]
Revert "[DAGCombiner] try repeated fdiv divisor transform before building estimate"

This reverts commit fb9a5307a94e6f1f850e4d89f79103b123f16279 (rL359398)
because it can cause an infinite loop due to opposing combines.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359695 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoFix 80 column violation. NFCI.
Simon Pilgrim [Wed, 1 May 2019 16:01:49 +0000 (16:01 +0000)]
Fix 80 column violation. NFCI.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359694 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[SCEV] Use isKnownViaNonRecursiveReasoning for smax simplification
Keno Fischer [Wed, 1 May 2019 15:58:24 +0000 (15:58 +0000)]
[SCEV] Use isKnownViaNonRecursiveReasoning for smax simplification

Summary:
Commit
rL331949: SCEV] Do not use induction in isKnownPredicate for simplification umax

changed the codepath for umax from isKnownPredicate to
isKnownViaNonRecursiveReasoning to avoid compile time blow up (and as
I found out also stack overflows). However, there is an exact copy of
the code for umax that was lacking this change. In D50167 I want to unify
these codepaths, but to avoid that being a behavior change for the smax
case, pull this independent bit out of it.

Reviewed By: sanjoy
Differential Revision: https://reviews.llvm.org/D61166

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359693 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[lit][tests][AIX] Update expected form of diagnostic messages; use `not` to normalize...
Hubert Tong [Wed, 1 May 2019 15:47:16 +0000 (15:47 +0000)]
[lit][tests][AIX] Update expected form of diagnostic messages; use `not` to normalize non-zero exit values

Summary:
Various tests in the `lit` testing suite expect specific return codes
and forms of diagnostic message from utility programs. As per
POSIX.1-2017 XCU Section 1.4, Utility Description Defaults, "[the]
format of diagnostic messages for most utilities is unspecified".
The STDERR subsections of the `cat` and `wc` utilities merely indicate
that "[the] standard error shall be used only for diagnostic messages".
The corresponding EXIT STATUS subsections merely indicate, with regard
to errors, an exit value of >0.

The affected tests are updated to accept the applicable diagnostic
message as produced by the utilities on AIX. The exit value is
normalized using `not` as necessary.

Reviewers: xingxue, sfertile, jasonliu

Reviewed By: xingxue

Subscribers: delcypher, jsji, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D60553

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359690 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[tests] Add host-byteorder-*-endian; update XFAILs of big-endian triples
Hubert Tong [Wed, 1 May 2019 15:36:18 +0000 (15:36 +0000)]
[tests] Add host-byteorder-*-endian; update XFAILs of big-endian triples

Summary:
Triple components in `XFAIL` lines are tested against the target triple.
Various tests that are expected to fail on big-endian hosts are marked
as being `XFAIL` for big-endian targets. This patch corrects these tests
by having them test against a new `host-byteorder-big-endian` feature.

Reviewers: xingxue, sfertile, jasonliu

Reviewed By: xingxue

Subscribers: jvesely, nhaehnle, fedor.sergeev, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D60551

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359689 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[llvm-ar][llvm-nm][llvm-size] Change -long-option to --long-option in tests. NFC
Fangrui Song [Wed, 1 May 2019 15:31:15 +0000 (15:31 +0000)]
[llvm-ar][llvm-nm][llvm-size] Change -long-option to --long-option in tests. NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359688 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[X86][SSE] Add demanded elts support X86ISD::PMULDQ\PMULUDQ
Simon Pilgrim [Wed, 1 May 2019 14:50:50 +0000 (14:50 +0000)]
[X86][SSE] Add demanded elts support X86ISD::PMULDQ\PMULUDQ

Add to SimplifyDemandedVectorEltsForTargetNode and SimplifyDemandedBitsForTargetNode

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359686 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoFix OptTable::findNearest() adding delimiter for free
Nico Weber [Wed, 1 May 2019 14:46:17 +0000 (14:46 +0000)]
Fix OptTable::findNearest() adding delimiter for free

Prior to this, OptTable::findNearest() thought that the input `--foo`
had an editing distance of 0 from an existing flag `--foo=`, which made
it suggest flags with delimiters more often than flags without one.
After this, it correctly assigns this case an editing distance of 1.

Differential Revision: https://reviews.llvm.org/D61373

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359685 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[LoopInfo] Faster implementation of setLoopID. NFC.
Keno Fischer [Wed, 1 May 2019 14:39:11 +0000 (14:39 +0000)]
[LoopInfo] Faster implementation of setLoopID. NFC.

Summary:
This change was part of D46460. However, in the meantime rL341926 fixed the
correctness issue here. What remained was the performance issue in setLoopID
where it would iterate through all blocks in the loop and their successors,
rather than just the predecessor of the header (the later presumably being
much faster). We already have the `getLoopLatches` to compute precisely these
basic blocks in an efficient manner, so just use it (as the original commit
did for `getLoopID`).

Reviewed By: jdoerfert
Differential Revision: https://reviews.llvm.org/D61215

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359684 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[X86][SSE] Add SSE vector shift support to SimplifyDemandedVectorEltsForTargetNode...
Simon Pilgrim [Wed, 1 May 2019 13:51:09 +0000 (13:51 +0000)]
[X86][SSE] Add SSE vector shift support to SimplifyDemandedVectorEltsForTargetNode vector splitting

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359680 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoWrap to 80 columns, no behavior change
Nico Weber [Wed, 1 May 2019 13:04:44 +0000 (13:04 +0000)]
Wrap to 80 columns, no behavior change

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359679 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[X86][SSE] Split 512-bit -> 128-bit vector directly in SimplifyDemandedVectorEltsForT...
Simon Pilgrim [Wed, 1 May 2019 12:48:42 +0000 (12:48 +0000)]
[X86][SSE] Split 512-bit -> 128-bit vector directly in SimplifyDemandedVectorEltsForTargetNode

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359678 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[X86][SSE] Add 512-bit vector support to SimplifyDemandedVectorEltsForTargetNode...
Simon Pilgrim [Wed, 1 May 2019 12:37:41 +0000 (12:37 +0000)]
[X86][SSE] Add 512-bit vector support to SimplifyDemandedVectorEltsForTargetNode vector splitting

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359677 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoDAG: allow DAG pointer size different from memory representation.
Tim Northover [Wed, 1 May 2019 12:37:30 +0000 (12:37 +0000)]
DAG: allow DAG pointer size different from memory representation.

In preparation for supporting ILP32 on AArch64, this modifies the SelectionDAG
builder code so that pointers are allowed to have a larger type when "live" in
the DAG compared to memory.

Pointers get zero-extended whenever they are loaded, and truncated prior to
stores.  In addition, a few not quite so obvious locations need updating:

  * A GEP that has not been marked inbounds needs to enforce the IR-documented
    2s-complement wrapping at the memory pointer size. Inbounds GEPs are
    undefined if they overflow the address space, so no additional operations
    are needed.
  * Signed comparisons would give incorrect results if performed on the
    zero-extended values.

This shouldn't affect CodeGen for now, but will become active when the AArch64
ILP32 support is committed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359676 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[X86][SSE] Add X86ISD::PACKSS\PACKUS to SimplifyDemandedVectorEltsForTargetNode vecto...
Simon Pilgrim [Wed, 1 May 2019 11:29:36 +0000 (11:29 +0000)]
[X86][SSE] Add X86ISD::PACKSS\PACKUS to SimplifyDemandedVectorEltsForTargetNode vector splitting

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359673 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[X86][SSE] Add scalar horizontal add/sub tests for element extractions from upper...
Simon Pilgrim [Wed, 1 May 2019 11:17:11 +0000 (11:17 +0000)]
[X86][SSE] Add scalar horizontal add/sub tests for element extractions from upper lanes

As suggested on D61263

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359671 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[X86][SSE] Add X86ISD::UNPCKL\UNPCK to SimplifyDemandedVectorEltsForTargetNode vector...
Simon Pilgrim [Wed, 1 May 2019 11:08:03 +0000 (11:08 +0000)]
[X86][SSE] Add X86ISD::UNPCKL\UNPCK to SimplifyDemandedVectorEltsForTargetNode vector splitting

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359670 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[X86][SSE] Move extract_subvector(pshufb) fold to SimplifyDemandedVectorEltsForTargetNode
Simon Pilgrim [Wed, 1 May 2019 10:58:38 +0000 (10:58 +0000)]
[X86][SSE] Move extract_subvector(pshufb) fold to SimplifyDemandedVectorEltsForTargetNode

This lets us hit more cases than combineExtractSubvector and allows us reuse more code.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359669 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[llvm-objdump] Print newlines before and after "Disassembly of section ...:"
Fangrui Song [Wed, 1 May 2019 10:40:48 +0000 (10:40 +0000)]
[llvm-objdump] Print newlines before and after "Disassembly of section ...:"

This improves readability and the behavior is consistent with GNU objdump.

The new test test/tools/llvm-objdump/X86/disassemble-section-name.s
checks we print newlines before and after "Disassembly of section ...:"

Differential Revision: https://reviews.llvm.org/D61127

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359668 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[X86] SimplifyDemandedVectorEltsForTargetNode - pull out vector halving code. NFCI.
Simon Pilgrim [Wed, 1 May 2019 10:38:10 +0000 (10:38 +0000)]
[X86] SimplifyDemandedVectorEltsForTargetNode - pull out vector halving code. NFCI.

Pull out the HADD/HSUB code to halve vector widths if the upper half isn't used - prep work to adding support for other opcodes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359667 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[X86][SSE] Extract i1 elements from vXi1 bool vectors
Simon Pilgrim [Wed, 1 May 2019 10:02:22 +0000 (10:02 +0000)]
[X86][SSE] Extract i1 elements from vXi1 bool vectors

This is an alternative to D59669 which more aggressively extracts i1 elements from vXi1 bool vectors using a MOVMSK.

Differential Revision: https://reviews.llvm.org/D61189

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359666 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[yaml2obj] - Report when unknown section is referenced from program header declaratio...
George Rimar [Wed, 1 May 2019 09:45:55 +0000 (09:45 +0000)]
[yaml2obj] - Report when unknown section is referenced from program header declaration block.

Previously we did not report this.
Also this removes multiple lookups in the map
what cleanups the code.

Differential revision: https://reviews.llvm.org/D61322

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359663 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[llvm-readobj] Change -t to --symbols in tests. NFC
Fangrui Song [Wed, 1 May 2019 09:28:24 +0000 (09:28 +0000)]
[llvm-readobj] Change -t to --symbols in tests. NFC

-t is --symbols in llvm-readobj but --section-details (unimplemented) in readelf.
The confusing option should not be used since we aim for improving
compatibility.

Keep just one llvm-readobj -t use case in test/tools/llvm-readobj/symbols.test

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359661 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[gold] Fix two readelf tests after rL359649
Fangrui Song [Wed, 1 May 2019 09:01:10 +0000 (09:01 +0000)]
[gold] Fix two readelf tests after rL359649

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359660 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[X86FixupLEAs] Hoist the calls to isLEA out of the 3 separate functions and put it...
Craig Topper [Wed, 1 May 2019 06:53:03 +0000 (06:53 +0000)]
[X86FixupLEAs] Hoist the calls to isLEA out of the 3 separate functions and put it in the basic block instruction loop. NFC

Now need to check it 3 different times. Just do it once at the top of the loop.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359658 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoFix test/tools/llvm-readobj/mips-plt.test
Fangrui Song [Wed, 1 May 2019 06:46:34 +0000 (06:46 +0000)]
Fix test/tools/llvm-readobj/mips-plt.test

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359657 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[llvm-readobj] llvm-readobj --elf-output-style=GNU => llvm-readelf. NFC
Fangrui Song [Wed, 1 May 2019 05:55:22 +0000 (05:55 +0000)]
[llvm-readobj] llvm-readobj --elf-output-style=GNU => llvm-readelf. NFC

The latter is much more common.

A dedicated --elf-output-style=GNU test demonstrating it is the same as
llvm-readelf is sufficient.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359652 91177308-0d34-0410-b5e6-96231b3b80d8