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Steffen Görtz [Mon, 7 Jan 2019 15:23:47 +0000 (15:23 +0000)]
hw/timer/nrf51_timer: Add nRF51 Timer peripheral
This patch adds the model for the nRF51 timer peripheral.
Currently, only the TIMER mode is implemented.
Signed-off-by: Steffen Görtz <contrib@steffen-goertz.de>
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Message-id:
20190103091119.9367-9-stefanha@redhat.com
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Steffen Görtz [Mon, 7 Jan 2019 15:23:47 +0000 (15:23 +0000)]
tests/microbit-test: Add Tests for nRF51 GPIO
The test suite for the nRF51 GPIO peripheral for now
only tests initial state. Additionally a set of
tests testing an implementation detail of the model
are included.
Signed-off-by: Steffen Görtz <contrib@steffen-goertz.de>
Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Message-id:
20190103091119.9367-8-stefanha@redhat.com
[PMM: fixed stray space at start of file]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Steffen Görtz [Mon, 7 Jan 2019 15:23:47 +0000 (15:23 +0000)]
arm: Instantiate NRF51 general purpose I/O
Instantiates GPIO peripheral model
Signed-off-by: Steffen Görtz <contrib@steffen-goertz.de>
Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Message-id:
20190103091119.9367-7-stefanha@redhat.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Steffen Görtz [Mon, 7 Jan 2019 15:23:47 +0000 (15:23 +0000)]
hw/gpio/nrf51_gpio: Add nRF51 GPIO peripheral
This adds a model of the nRF51 GPIO peripheral.
Reference Manual: http://infocenter.nordicsemi.com/pdf/nRF51_RM_v3.0.pdf
The nRF51 series microcontrollers support up to 32 GPIO pins in various configurations.
The pins can be used as input pins with pull-ups or pull-down.
Furthermore, three different output driver modes per level are
available (disconnected, standard, high-current).
The GPIO-Peripheral has a mechanism for detecting level changes which is
not featured in this model.
Signed-off-by: Steffen Görtz <contrib@steffen-goertz.de>
Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Message-id:
20190103091119.9367-6-stefanha@redhat.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Steffen Görtz [Mon, 7 Jan 2019 15:23:47 +0000 (15:23 +0000)]
arm: Instantiate NRF51 random number generator
Use RNG in SOC.
Signed-off-by: Steffen Görtz <contrib@steffen-goertz.de>
Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Message-id:
20190103091119.9367-5-stefanha@redhat.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Steffen Görtz [Mon, 7 Jan 2019 15:23:47 +0000 (15:23 +0000)]
hw/misc/nrf51_rng: Add NRF51 random number generator peripheral
Add a model of the NRF51 random number generator peripheral.
This is a simple random generator that continuously generates
new random values after startup.
Reference Manual: http://infocenter.nordicsemi.com/pdf/nRF51_RM_v3.0.pdf
Signed-off-by: Steffen Görtz <contrib@steffen-goertz.de>
Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Message-id:
20190103091119.9367-4-stefanha@redhat.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Steffen Görtz [Mon, 7 Jan 2019 15:23:47 +0000 (15:23 +0000)]
arm: Add header to host common definition for nRF51 SOC peripherals
Adds a header that provides definitions that are used
across nRF51 peripherals
Signed-off-by: Steffen Görtz <contrib@steffen-goertz.de>
Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Message-id:
20190103091119.9367-3-stefanha@redhat.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Steffen Görtz [Mon, 7 Jan 2019 15:23:47 +0000 (15:23 +0000)]
qtest: Add set_irq_in command to set IRQ/GPIO level
Adds a new qtest command "set_irq_in" which allows
to set qemu gpio lines to a given level.
Based on https://lists.gnu.org/archive/html/qemu-devel/2012-12/msg02363.html
which never got merged.
Signed-off-by: Steffen Görtz <contrib@steffen-goertz.de>
Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Laurent Vivier <lvivier@redhat.com>
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Message-id:
20190103091119.9367-2-stefanha@redhat.com
Originally-by: Matthew Ogilvie <mmogilvi_qemu@miniinfo.net>
Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Laurent Vivier <lvivier@redhat.com>
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Philippe Mathieu-Daudé [Mon, 7 Jan 2019 15:23:47 +0000 (15:23 +0000)]
hw/arm/allwinner-a10: Add the 'A' SRAM and the SRAM controller
From the "A10 User Manual V1.20" p.29: "3.2. Memory Mapping" and:
7. System Control
7.1. Overview
A10 embeds a high-speed SRAM which has been split into five segments.
See detailed memory mapping in following table:
Area Address Size (Bytes)
A1 0x00000000-0x00003FFF 16K
A2 0x00004000-0x00007FFF 16K
A3 0x00008000-0x0000B3FF 13K
A4 0x0000B400-0x0000BFFF 3K
Since for emulation purpose we don't need the segmentations, we simply define
the 'A' area as a single 48KB SRAM.
We don't implement the following others areas:
- 'B': 'Secure RAM' (64K),
- 'C': Debug/ISP SRAM
- 'D': USB SRAM
(qemu) info mtree
address-space: memory
0000000000000000-
ffffffffffffffff (prio 0, i/o): system
0000000000000000-
000000000000bfff (prio 0, ram): sram A
0000000001c00000-
0000000001c00fff (prio -1000, i/o): a10-sram-ctrl
0000000001c0b000-
0000000001c0bfff (prio 0, i/o): aw_emac
0000000001c18000-
0000000001c18fff (prio 0, i/o): ahci
0000000001c18080-
0000000001c180ff (prio 0, i/o): allwinner-ahci
0000000001c20400-
0000000001c207ff (prio 0, i/o): allwinner-a10-pic
0000000001c20c00-
0000000001c20fff (prio 0, i/o): allwinner-A10-timer
0000000001c28000-
0000000001c2801f (prio 0, i/o): serial
0000000040000000-
0000000047ffffff (prio 0, ram): cubieboard.ram
Reported-by: Charlie Smurthwaite <charlie@atech.media>
Tested-by: Charlie Smurthwaite <charlie@atech.media>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-id:
20190104142921.878-1-f4bug@amsat.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Peter Maydell [Mon, 7 Jan 2019 15:23:47 +0000 (15:23 +0000)]
cpus.c: Fix race condition in cpu_stop_current()
We use cpu_stop_current() to ensure the current CPU has stopped
from places like qemu_system_reset_request(). Unfortunately its
current implementation has a race. It calls qemu_cpu_stop(),
which sets cpu->stopped to true even though the CPU hasn't
actually stopped yet. The main thread will look at the flags
set by qemu_system_reset_request() and call pause_all_vcpus().
pause_all_vcpus() waits for every cpu to have cpu->stopped true,
so it can continue (and we will start the system reset operation)
before the vcpu thread has got back to its top level loop.
Instead, just set cpu->stop and call cpu_exit(). This will
cause the vcpu to exit back to the top level loop, and there
(as part of the wait_io_event code) it will call qemu_cpu_stop().
This fixes bugs where the reset request appeared to be ignored
or the CPU misbehaved because the reset operation started
to change vcpu state while the vcpu thread was still using it.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Emilio G. Cota <cota@braap.org>
Tested-by: Jaap Crezee <jaap@jcz.nl>
Message-id:
20181207155911.12710-1-peter.maydell@linaro.org
Thomas Huth [Mon, 7 Jan 2019 15:23:47 +0000 (15:23 +0000)]
MAINTAINERS: Add ARM-related files for hw/[misc|input|timer]/
Some of the files in hw/input/, hw/misc/ and hw/timer/ are only
used by one of the ARM machines, so we can assign these files to
the corresponding boards.
Signed-off-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-id:
1546433583-18397-1-git-send-email-thuth@redhat.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Edgar E. Iglesias [Mon, 7 Jan 2019 15:23:46 +0000 (15:23 +0000)]
hw/arm: versal: Plug memory leaks
Plug a couple of "board creation time" memory leaks.
Fixes:
6f16da53ffe4567 ("hw/arm: versal: Add a virtual Xilinx Versal board")
Reported-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-id:
20190104104749.5314-2-edgar.iglesias@gmail.com
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Stefan Hajnoczi [Mon, 7 Jan 2019 15:23:46 +0000 (15:23 +0000)]
Revert "armv7m: Guard against no -kernel argument"
This reverts commit
01fd41ab3fb69971c24a69ed49cde96086d81278.
The generic loader device (-device loader,file=kernel.bin) can be used
to load a kernel instead of the -kernel option. Some boards have flash
memory (pflash) that is set via the -pflash or -drive options.
Allow starting QEMU without the -kernel option to accommodate these
scenarios.
Suggested-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Message-id:
20190103144124.18917-1-stefanha@redhat.com
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Luc Michel [Mon, 7 Jan 2019 15:23:46 +0000 (15:23 +0000)]
arm/xlnx-zynqmp: put APUs and RPUs in separate CPU clusters
Create two separate CPU clusters for APUs and RPUs.
Signed-off-by: Luc Michel <luc.michel@greensocs.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-id:
20181207090135.7651-17-luc.michel@greensocs.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Luc Michel [Mon, 7 Jan 2019 15:23:46 +0000 (15:23 +0000)]
gdbstub: add multiprocess extension support
Add multiprocess extension support by enabling multiprocess mode when
the peer requests it, and by replying that we actually support it in the
qSupported reply packet.
Signed-off-by: Luc Michel <luc.michel@greensocs.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Message-id:
20181207090135.7651-16-luc.michel@greensocs.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Luc Michel [Mon, 7 Jan 2019 15:23:46 +0000 (15:23 +0000)]
gdbstub: gdb_set_stop_cpu: ignore request when process is not attached
When gdb_set_stop_cpu() is called with a CPU associated to a process
currently not attached by the GDB client, return without modifying the
stop CPU. Otherwise, GDB gets confused if it receives packets with a
thread-id it does not know about.
Signed-off-by: Luc Michel <luc.michel@greensocs.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Message-id:
20181207090135.7651-15-luc.michel@greensocs.com
[PMM: fix checkpatch comment style nit]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Luc Michel [Mon, 7 Jan 2019 15:23:46 +0000 (15:23 +0000)]
gdbstub: processes initialization on new peer connection
When a new connection is established, we set the first process to be
attached, and the others detached. The first CPU of the first process
is selected as the current CPU.
Signed-off-by: Luc Michel <luc.michel@greensocs.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-id:
20181207090135.7651-14-luc.michel@greensocs.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Luc Michel [Mon, 7 Jan 2019 15:23:46 +0000 (15:23 +0000)]
gdbstub: add support for vAttach packets
Add support for the vAttach packets. In multiprocess mode, GDB sends
them to attach to additional processes.
Signed-off-by: Luc Michel <luc.michel@greensocs.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-id:
20181207090135.7651-13-luc.michel@greensocs.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Luc Michel [Mon, 7 Jan 2019 15:23:46 +0000 (15:23 +0000)]
gdbstub: add support for extended mode packet
Add support for the '!' extended mode packet. This is required for the
multiprocess extension.
Signed-off-by: Luc Michel <luc.michel@greensocs.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Message-id:
20181207090135.7651-12-luc.michel@greensocs.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Luc Michel [Mon, 7 Jan 2019 15:23:46 +0000 (15:23 +0000)]
gdbstub: add multiprocess support to 'D' packets
'D' packets are used by GDB to detach from a process. In multiprocess
mode, the PID to detach from is sent in the request.
Signed-off-by: Luc Michel <luc.michel@greensocs.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Message-id:
20181207090135.7651-11-luc.michel@greensocs.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Luc Michel [Mon, 7 Jan 2019 15:23:46 +0000 (15:23 +0000)]
gdbstub: add multiprocess support to gdb_vm_state_change()
Add support for multiprocess extension in gdb_vm_state_change()
function.
Signed-off-by: Luc Michel <luc.michel@greensocs.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Message-id:
20181207090135.7651-10-luc.michel@greensocs.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Luc Michel [Mon, 7 Jan 2019 15:23:46 +0000 (15:23 +0000)]
gdbstub: add multiprocess support to Xfer:features:read:
Change the Xfer:features:read: packet handling to support the
multiprocess extension. This packet is used to request the XML
description of the CPU. In multiprocess mode, different descriptions can
be sent for different processes.
This function now takes the process to send the description for as a
parameter, and use a buffer in the process structure to store the
generated description.
It takes the first CPU of the process to generate the description.
Signed-off-by: Luc Michel <luc.michel@greensocs.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-id:
20181207090135.7651-9-luc.michel@greensocs.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Luc Michel [Mon, 7 Jan 2019 15:23:46 +0000 (15:23 +0000)]
gdbstub: add multiprocess support to (f|s)ThreadInfo and ThreadExtraInfo
Change the thread info related packets handling to support multiprocess
extension.
Add the CPUs class name in the extra info to help differentiate
them in multiprocess mode.
Signed-off-by: Luc Michel <luc.michel@greensocs.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-id:
20181207090135.7651-8-luc.michel@greensocs.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Luc Michel [Mon, 7 Jan 2019 15:23:46 +0000 (15:23 +0000)]
gdbstub: add multiprocess support to 'sC' packets
Change the sC packet handling to support the multiprocess extension.
Instead of returning the first thread, we return the first thread of the
current process.
Signed-off-by: Luc Michel <luc.michel@greensocs.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Message-id:
20181207090135.7651-7-luc.michel@greensocs.com
[PMM: corrected checkpatch comment style nit]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Luc Michel [Mon, 7 Jan 2019 15:23:46 +0000 (15:23 +0000)]
gdbstub: add multiprocess support to vCont packets
Add the gdb_first_attached_cpu() and gdb_next_attached_cpu() to iterate
over all the CPUs in currently attached processes.
Add the gdb_first_cpu_in_process() and gdb_next_cpu_in_process() to
iterate over CPUs of a given process.
Use them to add multiprocess extension support to vCont packets.
Signed-off-by: Luc Michel <luc.michel@greensocs.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Message-id:
20181207090135.7651-6-luc.michel@greensocs.com
[PMM: corrected checkpatch comment style nit]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Luc Michel [Mon, 7 Jan 2019 15:23:45 +0000 (15:23 +0000)]
gdbstub: add multiprocess support to 'H' and 'T' packets
Add a couple of helper functions to cope with GDB threads and processes.
The gdb_get_process() function looks for a process given a pid.
The gdb_get_cpu() function returns the CPU corresponding to the (pid,
tid) pair given as parameters.
The read_thread_id() function parses the thread-id sent by the peer.
This function supports the multiprocess extension thread-id syntax. The
return value specifies if the parsing failed, or if a special case was
encountered (all processes or all threads).
Use them in 'H' and 'T' packets handling to support the multiprocess
extension.
Signed-off-by: Luc Michel <luc.michel@greensocs.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Message-id:
20181207090135.7651-5-luc.michel@greensocs.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Luc Michel [Mon, 7 Jan 2019 15:23:45 +0000 (15:23 +0000)]
gdbstub: add multiprocess support to '?' packets
The gdb_get_cpu_pid() function does the PID lookup for the given CPU. It
checks if the CPU is a direct child of a CPU cluster. If it is, the
returned PID is the cluster ID plus one (cluster IDs start at 0, GDB
PIDs at 1). When the CPU is not a child of such a container, the PID of
the default process is returned.
The gdb_fmt_thread_id() function generates the string to be used to identify
a given thread, in a response packet for the peer. This function
supports generating thread IDs when multiprocess mode is enabled (in the
form `p<pid>.<tid>').
Use them in the reply to a '?' request.
Signed-off-by: Luc Michel <luc.michel@greensocs.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Message-id:
20181207090135.7651-4-luc.michel@greensocs.com
[PMM: fixed checkpatch blockquote style nit]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Luc Michel [Mon, 7 Jan 2019 15:23:45 +0000 (15:23 +0000)]
gdbstub: introduce GDB processes
Add a structure GDBProcess that represents processes from the GDB
semantic point of view.
CPUs can be split into different processes, by grouping them under
different cpu-cluster objects. Each occurrence of a cpu-cluster object
implies the existence of the corresponding process in the GDB stub. The
GDB process ID is derived from the corresponding cluster ID as follows:
GDB PID = cluster ID + 1
This is because PIDs -1 and 0 are reserved in GDB and cannot be used by
processes.
A default process is created to handle CPUs that are not in a cluster.
This process gets the PID of the last process PID + 1.
Signed-off-by: Luc Michel <luc.michel@greensocs.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-id:
20181207090135.7651-3-luc.michel@greensocs.com
[PMM: fixed checkpatch nit about block comment style]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Luc Michel [Mon, 7 Jan 2019 15:23:45 +0000 (15:23 +0000)]
hw/cpu: introduce CPU clusters
This commit adds the cpu-cluster type. It aims at gathering CPUs from
the same cluster in a machine.
For now it only has a `cluster-id` property.
Documentation in cluster.h written with the help of Peter Maydell.
Signed-off-by: Luc Michel <luc.michel@greensocs.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Message-id:
20181207090135.7651-2-luc.michel@greensocs.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Richard Henderson [Mon, 7 Jan 2019 15:23:45 +0000 (15:23 +0000)]
target/arm: SVE brk[ab] merging does not have s bit
While brk[ab] zeroing has a flags setting option, the merging variant
does not. Retain the same argument structure, to share expansion but
force the flag zero and do not decode bit 22.
Reported-by: Laurent Desnogues <laurent.desnogues@gmail.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id:
20181226215003.31438-1-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Richard Henderson [Mon, 7 Jan 2019 15:23:45 +0000 (15:23 +0000)]
target/arm: Convert ARM_TBFLAG_* to FIELDs
Use "register" TBFLAG_ANY to indicate shared state between
A32 and A64, and "registers" TBFLAG_A32 & TBFLAG_A64 for
fields that are specific to the given cpu state.
Move ARM_TBFLAG_BE_DATA to shared state, instead of its current
placement within "Bit usage when in AArch32 state".
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-id:
20181218164348.7127-1-richard.henderson@linaro.org
[PMM: removed the renaming of BE_DATA flag to BE]
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Peter Maydell [Mon, 7 Jan 2019 11:55:52 +0000 (11:55 +0000)]
Merge remote-tracking branch 'remotes/ericb/tags/pull-nbd-2019-01-05' into staging
nbd patches for 2019-01-05
Error and trace improvements in NBD code, such as less noise for
common disconnect scenarios.
- Vladimir Sementsov-Ogievskiy: 0/3 nbd-client: drop extra error noise
- Eric Blake: portions of 0/22 nbd: add qemu-nbd --list
# gpg: Signature made Sat 05 Jan 2019 13:58:54 GMT
# gpg: using RSA key
A7A16B4A2527436A
# gpg: Good signature from "Eric Blake <eblake@redhat.com>"
# gpg: aka "Eric Blake (Free Software Programmer) <ebb9@byu.net>"
# gpg: aka "[jpeg image of size 6874]"
# Primary key fingerprint: 71C2 CC22 B1C4 6029 27D2 F3AA A7A1 6B4A 2527 436A
* remotes/ericb/tags/pull-nbd-2019-01-05:
nbd/client: Drop pointless buf variable
qemu-nbd: Fail earlier for -c/-d on non-linux
nbd/client: More consistent error messages
nbd: Document timeline of various features
qemu-nbd: Use program name in error messages
block/nbd-client: use traces instead of noisy error_report_err
nbd/client: Trace all server option error messages
nbd: publish _lookup functions
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Eric Blake [Sat, 15 Dec 2018 13:53:10 +0000 (07:53 -0600)]
nbd/client: Drop pointless buf variable
There's no need to read into a temporary buffer (oversized
since commit
7d3123e1) followed by a byteswap into a uint64_t
to check for a magic number via memcmp(), when the code
immediately below demonstrates reading into the uint64_t then
byteswapping in place and checking for a magic number via
integer math. What's more, having a different error message
when the server's first reply byte is 0 is unusual - it's no
different from any other wrong magic number, and we already
detected short reads. That whole strlen() issue has been
present and useless since commit
1d45f8b5 in 2010; perhaps it
was leftover debugging (since the correct magic number happens
to be ASCII)? Make the error messages more consistent and
detailed while touching things.
Signed-off-by: Eric Blake <eblake@redhat.com>
Reviewed-by: Richard W.M. Jones <rjones@redhat.com>
Reviewed-by: Vladimir Sementsov-Ogievskiy <vsementsov@virtuozzo.com>
Message-Id: <
20181215135324.152629-9-eblake@redhat.com>
Eric Blake [Sat, 15 Dec 2018 13:53:08 +0000 (07:53 -0600)]
qemu-nbd: Fail earlier for -c/-d on non-linux
Connecting to a /dev/nbdN device is a Linux-specific action.
We were already masking -c and -d from 'qemu-nbd --help' on
non-linux. However, while -d fails with a sensible error
message, it took hunting through a couple of files to prove
that. What's more, the code for -c doesn't fail until after
it has created a pthread and tried to open a device - possibly
even printing an error message with %m on a non-Linux platform
in spite of the comment that %m is glibc-specific. Make the
failure happen sooner, then get rid of stubs that are no
longer needed because of the early exits.
While at it: tweak the blank newlines in --help output to be
consistent, whether or not built on Linux.
Signed-off-by: Eric Blake <eblake@redhat.com>
Message-Id: <
20181215135324.152629-7-eblake@redhat.com>
Reviewed-by: Richard W.M. Jones <rjones@redhat.com>
Reviewed-by: Vladimir Sementsov-Ogievskiy <vsementsov@virtuozzo.com>
Eric Blake [Sat, 15 Dec 2018 13:53:07 +0000 (07:53 -0600)]
nbd/client: More consistent error messages
Consolidate on using decimal (not hex), on outputting the
option reply name (not just value), and a consistent comma between
clauses, when the client reports protocol discrepancies from the
server. While it won't affect normal operation, it makes
debugging additions easier.
Signed-off-by: Eric Blake <eblake@redhat.com>
Reviewed-by: Richard W.M. Jones <rjones@redhat.com>
Reviewed-by: Vladimir Sementsov-Ogievskiy <vsementsov@virtuozzo.com>
Message-Id: <
20181215135324.152629-6-eblake@redhat.com>
Eric Blake [Sat, 15 Dec 2018 13:53:04 +0000 (07:53 -0600)]
nbd: Document timeline of various features
It can be useful to figure out which NBD protocol features are
exposed by a server, as well as what features a client will
take advantage of if available, for a given qemu release. It's
not always precise to base features on version numbers (thanks
to downstream backports), but any documentation is better than
making users search through git logs themselves.
This patch originally stemmed from a request to document that
pristine 3.0 has a known bug where NBD_OPT_LIST_META_CONTEXT
with 0 queries forgot to advertise an available
"qemu:dirty-bitmap" context, but documenting bugs like this (or
the fact that 3.0 also botched NBD_CMD_CACHE) gets to be too
much details, especially since buggy releases will be less
likely connection targets over time. Instead, I chose to just
remind users to check stable release branches.
Suggested-by: Vladimir Sementsov-Ogievskiy <vsementsov@virtuozzo.com>
Signed-off-by: Eric Blake <eblake@redhat.com>
Message-Id: <
20181215135324.152629-3-eblake@redhat.com>
Reviewed-by: Richard W.M. Jones <rjones@redhat.com>
Reviewed-by: Vladimir Sementsov-Ogievskiy <vsementsov@virtuozzo.com>
Eric Blake [Sat, 15 Dec 2018 13:53:03 +0000 (07:53 -0600)]
qemu-nbd: Use program name in error messages
This changes output from:
$ qemu-nbd nosuch
Failed to blk_new_open 'nosuch': Could not open 'nosuch': No such file or directory
to something more consistent with qemu-img and qemu:
$ qemu-nbd nosuch
qemu-nbd: Failed to blk_new_open 'nosuch': Could not open 'nosuch': No such file or directory
Update the lone affected test to match. (Hmm - is it sad that we don't
do much testing of expected failures?)
Signed-off-by: Eric Blake <eblake@redhat.com>
Reviewed-by: Richard W.M. Jones <rjones@redhat.com>
Reviewed-by: Vladimir Sementsov-Ogievskiy <vsementsov@virtuozzo.com>
Message-Id: <
20181215135324.152629-2-eblake@redhat.com>
Vladimir Sementsov-Ogievskiy [Fri, 2 Nov 2018 15:11:52 +0000 (18:11 +0300)]
block/nbd-client: use traces instead of noisy error_report_err
Reduce extra noise of nbd-client, change 083 correspondingly.
In various commits (
be41c100 in 2.10,
f140e300 in 2.11,
78a33ab
in 2.12), we added spots where qemu as an NBD client would report
problems communicating with the server to stderr, because there
was no where else to send the error to. However, this is racy,
particularly since the most common source of these errors is when
either the client or the server abruptly hangs up, leaving one
coroutine to report the error only if it wins (or loses) the
race in attempting the read from the server before another
thread completes its cleanup of a protocol error that caused the
disconnect in the first place. The race is also apparent in the
fact that differences in the flush behavior of the server can
alter the frequency of encountering the race in the client (see
commit
6d39db96).
Rather than polluting stderr, it's better to just trace these
situations, for use by developers debugging a flaky connection,
particularly since the real error that either triggers the abrupt
disconnection in the first place, or that results from the EIO
when a request can't receive a reply, DOES make it back to the
user in the normal Error propagation channels.
Signed-off-by: Vladimir Sementsov-Ogievskiy <vsementsov@virtuozzo.com>
Message-Id: <
20181102151152.288399-4-vsementsov@virtuozzo.com>
[eblake: drop depedence on error hint, enhance commit message]
Signed-off-by: Eric Blake <eblake@redhat.com>
Eric Blake [Tue, 18 Dec 2018 22:57:13 +0000 (16:57 -0600)]
nbd/client: Trace all server option error messages
Not all servers send free-form text alongside option error replies, but
for servers that do (such as qemu), we pass the server's message as a
hint alongside our own error reporting. However, it would also be
useful to trace such server messages, since we can't guarantee how the
hint may be consumed.
Signed-off-by: Eric Blake <eblake@redhat.com>
Message-Id: <
20181218225714.284495-3-eblake@redhat.com>
Reviewed-by: Vladimir Sementsov-Ogievskiy <vsementsov@virtuozzo.com>
Vladimir Sementsov-Ogievskiy [Fri, 2 Nov 2018 15:11:51 +0000 (18:11 +0300)]
nbd: publish _lookup functions
These functions are used for formatting pretty trace points. We are
going to add some in block/nbd-client, so, let's publish all these
functions at once. Note, that nbd_reply_type_lookup is already
published, and constants, "named" by these functions live in
include/block/nbd.h too.
Signed-off-by: Vladimir Sementsov-Ogievskiy <vsementsov@virtuozzo.com>
Message-Id: <
20181102151152.288399-3-vsementsov@virtuozzo.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
Signed-off-by: Eric Blake <eblake@redhat.com>
Peter Maydell [Fri, 4 Jan 2019 18:23:13 +0000 (18:23 +0000)]
Merge remote-tracking branch 'remotes/philmd/tags/fw_cfg-
20190104-pull-request' into staging
fw_cfg patches for 2019-01-04
Two fixes from Li Qiang:
- Improve error message when can't load splash file
- Fix boot bootsplash and reboot-timeout error checking
# gpg: Signature made Fri 04 Jan 2019 16:22:24 GMT
# gpg: using RSA key
E3E32C2CDEADC0DE
# gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>"
# Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD C0DE
* remotes/philmd/tags/fw_cfg-
20190104-pull-request:
fw_cfg: Make qemu_extra_params_fw locally
fw_cfg: Fix -boot reboot-timeout error checking
fw_cfg: Fix -boot bootsplash error checking
fw_cfg: Improve error message when can't load splash file
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Li Qiang [Wed, 21 Nov 2018 05:10:26 +0000 (21:10 -0800)]
fw_cfg: Make qemu_extra_params_fw locally
qemu_extra_params_fw[] has external linkage, but is used
only in fw_cfg_bootsplash(), it makes sense to make it
locally.
Signed-off-by: Li Qiang <liq3ea@gmail.com>
Reviewed-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-Id: <
1542777026-2788-4-git-send-email-liq3ea@gmail.com>
[PMD: Removed qemu_extra_params_fw declaration in vl.c]
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Li Qiang [Wed, 21 Nov 2018 05:10:25 +0000 (21:10 -0800)]
fw_cfg: Fix -boot reboot-timeout error checking
fw_cfg_reboot() gets option parameter "reboot-timeout" with
qemu_opt_get(), then converts it to an integer by hand. It neglects to
check that conversion for errors, and fails to reject negative values.
Positive values above the limit get reported and replaced by the limit.
This patch checks for conversion errors properly, and reject all values
outside 0...0xffff.
Signed-off-by: Li Qiang <liq3ea@gmail.com>
Reviewed-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-Id: <
1542777026-2788-3-git-send-email-liq3ea@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Li Qiang [Wed, 21 Nov 2018 05:10:24 +0000 (21:10 -0800)]
fw_cfg: Fix -boot bootsplash error checking
fw_cfg_bootsplash() gets option parameter "splash-time"
with qemu_opt_get(), then converts it to an integer by hand.
It neglects to check that conversion for errors. This is
needlessly complicated and error-prone. But as "splash-time
not specified" is not the same as "splash-time=T" for any T,
we need use qemu_opt_get() to check if splash time exists.
This patch also make the qemu exit when finding or loading
splash file failed.
Signed-off-by: Li Qiang <liq3ea@gmail.com>
Reviewed-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-Id: <
1542777026-2788-2-git-send-email-liq3ea@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Li Qiang [Thu, 1 Nov 2018 06:02:28 +0000 (23:02 -0700)]
fw_cfg: Improve error message when can't load splash file
read_splashfile() reports "failed to read splash file" without
further details. Get the details from g_file_get_contents(), and
include them in the error message. Also remove unnecessary 'res'
variable.
Signed-off-by: Li Qiang <liq3ea@gmail.com>
Reviewed-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-Id: <
1541052148-28752-1-git-send-email-liq3ea@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Peter Maydell [Fri, 4 Jan 2019 13:22:51 +0000 (13:22 +0000)]
Merge remote-tracking branch 'remotes/stefanha/tags/block-pull-request' into staging
Pull request
Bug fixes for the .dmg image file format.
# gpg: Signature made Fri 04 Jan 2019 11:21:18 GMT
# gpg: using RSA key
9CA4ABB381AB73C8
# gpg: Good signature from "Stefan Hajnoczi <stefanha@redhat.com>"
# gpg: aka "Stefan Hajnoczi <stefanha@gmail.com>"
# Primary key fingerprint: 8695 A8BF D3F9 7CDA AC35 775A 9CA4 ABB3 81AB 73C8
* remotes/stefanha/tags/block-pull-request:
dmg: don't skip zero chunk
dmg: use enumeration type instead of hard coding number
dmg: fix binary search
dmg: Fixing wrong dmg block type value for block terminator.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
yuchenlin [Thu, 3 Jan 2019 11:47:00 +0000 (19:47 +0800)]
dmg: don't skip zero chunk
The dmg file has many tables which describe: "start from sector XXX to
sector XXX, the compression method is XXX and where the compressed data
resides on".
Each sector in the expanded file should be covered by a table. The table
will describe the offset of compressed data (or raw depends on the type)
in the dmg.
For example:
[-----------The expanded file------------]
[---bzip table ---]/* zeros */[---zlib---]
^
| if we want to read this sector.
we will find bzip table which contains this sector, and get the
compressed data offset, read it from dmg, uncompress it, finally write to
expanded file.
If we skip zero chunk (table), some sector cannot find the table which
will cause search_chunk() return s->n_chunks, dmg_read_chunk() return -1
and finally causing dmg_co_preadv() return EIO.
See:
[-----------The expanded file------------]
[---bzip table ---]/* zeros */[---zlib---]
^
| if we want to read this sector.
Oops, we cannot find the table contains it...
In the original implementation, we don't have zero table. When we try to
read sector inside the zero chunk. We will get EIO, and skip reading.
After this patch, we treat zero chunk the same as ignore chunk, it will
directly write zero and avoid some sector may not find the table.
After this patch:
[-----------The expanded file------------]
[---bzip table ---][--zeros--][---zlib---]
Signed-off-by: yuchenlin <npes87184@gmail.com>
Reviewed-by: Julio Faracco <jcfaracco@gmail.com>
Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
Message-id:
20190103114700.9686-4-npes87184@gmail.com
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
yuchenlin [Thu, 3 Jan 2019 11:46:59 +0000 (19:46 +0800)]
dmg: use enumeration type instead of hard coding number
Signed-off-by: yuchenlin <npes87184@gmail.com>
Reviewed-by: Julio Faracco <jcfaracco@gmail.com>
Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
Message-id:
20190103114700.9686-3-npes87184@gmail.com
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
yuchenlin [Thu, 3 Jan 2019 11:46:58 +0000 (19:46 +0800)]
dmg: fix binary search
There is a possible hang in original binary search implementation. That is
if chunk1 = 4, chunk2 = 5, chunk3 = 4, and we go else case.
The chunk1 will be still 4, and so on.
Signed-off-by: yuchenlin <npes87184@gmail.com>
Message-id:
20190103114700.9686-2-npes87184@gmail.com
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Julio Faracco [Fri, 28 Dec 2018 14:50:55 +0000 (12:50 -0200)]
dmg: Fixing wrong dmg block type value for block terminator.
This is a trivial patch to fix a wrong value for block terminator.
The old value was 0x7fffffff which is wrong. It was not affecting the
code because QEMU dmg block is not handling block terminator right now.
Neverthless, it should be fixed.
Signed-off-by: Julio Faracco <jcfaracco@gmail.com>
Reviewed-by: yuchenlin <yuchenlin@synology.com>
Message-id:
20181228145055.18039-1-jcfaracco@gmail.com
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Peter Maydell [Fri, 4 Jan 2019 10:11:18 +0000 (10:11 +0000)]
Merge remote-tracking branch 'remotes/amarkovic/tags/mips-queue-december-2018-v3' into staging
MIPS queue for December 2018 - v3
# gpg: Signature made Thu 03 Jan 2019 16:53:47 GMT
# gpg: using RSA key
D4972A8967F75A65
# gpg: Good signature from "Aleksandar Markovic <amarkovic@wavecomp.com>"
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 8526 FBF1 5DA3 811F 4A01 DD75 D497 2A89 67F7 5A65
* remotes/amarkovic/tags/mips-queue-december-2018-v3: (44 commits)
tests/tcg: mips: Test R5900 three-operand MADDU1
tests/tcg: mips: Test R5900 three-operand MADDU
tests/tcg: mips: Test R5900 three-operand MADD1
tests/tcg: mips: Test R5900 three-operand MADD
disas: nanoMIPS: Add a note on documentation
disas: nanoMIPS: Reorder declarations and definitions of gpr decoders
disas: nanoMIPS: Comment the decoder of 'gpr1' gpr encoding type
disas: nanoMIPS: Rename the decoder of 'gpr1' gpr encoding type
disas: nanoMIPS: Comment the decoder of 'gpr2.reg2' gpr encoding type
disas: nanoMIPS: Rename the decoder of 'gpr2.reg2' gpr encoding type
disas: nanoMIPS: Comment the decoder of 'gpr2.reg1' gpr encoding type
disas: nanoMIPS: Rename the decoder of 'gpr2.reg1' gpr encoding type
disas: nanoMIPS: Comment the decoder of 'gpr4.zero' gpr encoding type
disas: nanoMIPS: Rename the decoder of 'gpr4.zero' gpr encoding type
disas: nanoMIPS: Comment the decoder of 'gpr4' gpr encoding type
disas: nanoMIPS: Rename the decoder of 'gpr4' gpr encoding type
disas: nanoMIPS: Comment the decoder of 'gpr3.src.store' gpr encoding type
disas: nanoMIPS: Rename the decoder of 'gpr3.src.store' gpr encoding type
disas: nanoMIPS: Comment the decoder of 'gpr3' gpr encoding type
disas: nanoMIPS: Rename the decoder of 'gpr3' gpr encoding type
...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Fredrik Noring [Thu, 27 Dec 2018 20:25:41 +0000 (21:25 +0100)]
tests/tcg: mips: Test R5900 three-operand MADDU1
Test R5900 three-operand MADDU1.
Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Signed-off-by: Fredrik Noring <noring@nocrew.org>
Fredrik Noring [Thu, 27 Dec 2018 20:25:18 +0000 (21:25 +0100)]
tests/tcg: mips: Test R5900 three-operand MADDU
Test R5900 three-operand MADDU.
Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Signed-off-by: Fredrik Noring <noring@nocrew.org>
Fredrik Noring [Thu, 27 Dec 2018 20:24:22 +0000 (21:24 +0100)]
tests/tcg: mips: Test R5900 three-operand MADD1
Test R5900 three-operand MADD1.
Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Signed-off-by: Fredrik Noring <noring@nocrew.org>
Fredrik Noring [Thu, 27 Dec 2018 20:23:52 +0000 (21:23 +0100)]
tests/tcg: mips: Test R5900 three-operand MADD
Test R5900 three-operand MADD.
Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Signed-off-by: Fredrik Noring <noring@nocrew.org>
Aleksandar Markovic [Wed, 26 Dec 2018 18:06:47 +0000 (19:06 +0100)]
disas: nanoMIPS: Add a note on documentation
Add "nanoMIPS32 Instruction Set Technical Reference Manual" as
a reference.
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Aleksandar Markovic [Wed, 26 Dec 2018 17:46:28 +0000 (18:46 +0100)]
disas: nanoMIPS: Reorder declarations and definitions of gpr decoders
Reorder declarations and definitions of gpr decoders by number of
input bits of corresponding encoding type.
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Aleksandar Markovic [Wed, 26 Dec 2018 17:41:23 +0000 (18:41 +0100)]
disas: nanoMIPS: Comment the decoder of 'gpr1' gpr encoding type
Comment the decoder of 'gpr1' gpr encoding type in nanoMIPS
disassembler.
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Aleksandar Markovic [Wed, 26 Dec 2018 17:35:52 +0000 (18:35 +0100)]
disas: nanoMIPS: Rename the decoder of 'gpr1' gpr encoding type
Rename the decoder of 'gpr1' gpr encoding type in nanoMIPS
disassembler.
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Aleksandar Markovic [Wed, 26 Dec 2018 13:42:13 +0000 (14:42 +0100)]
disas: nanoMIPS: Comment the decoder of 'gpr2.reg2' gpr encoding type
Comment the decoder of 'gpr2.reg2' gpr encoding type in nanoMIPS
disassembler.
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Aleksandar Markovic [Wed, 26 Dec 2018 13:40:17 +0000 (14:40 +0100)]
disas: nanoMIPS: Rename the decoder of 'gpr2.reg2' gpr encoding type
Rename the decoder of 'gpr2.reg2' gpr encoding type in nanoMIPS
disassembler.
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Aleksandar Markovic [Wed, 26 Dec 2018 13:38:15 +0000 (14:38 +0100)]
disas: nanoMIPS: Comment the decoder of 'gpr2.reg1' gpr encoding type
Comment the decoder of 'gpr2.reg1' gpr encoding type in nanoMIPS
disassembler.
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Aleksandar Markovic [Wed, 26 Dec 2018 13:30:39 +0000 (14:30 +0100)]
disas: nanoMIPS: Rename the decoder of 'gpr2.reg1' gpr encoding type
Rename the decoder of 'gpr2.reg1' gpr encoding type in nanoMIPS
disassembler.
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Aleksandar Markovic [Tue, 25 Dec 2018 14:55:09 +0000 (15:55 +0100)]
disas: nanoMIPS: Comment the decoder of 'gpr4.zero' gpr encoding type
Comment the decoder of 'gpr4.zero' gpr encoding type in nanoMIPS
disassembler.
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Aleksandar Markovic [Tue, 25 Dec 2018 14:46:00 +0000 (15:46 +0100)]
disas: nanoMIPS: Rename the decoder of 'gpr4.zero' gpr encoding type
Rename the decoder of 'gpr4.zero' gpr encoding type in nanoMIPS
disassembler.
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Aleksandar Markovic [Tue, 25 Dec 2018 14:42:58 +0000 (15:42 +0100)]
disas: nanoMIPS: Comment the decoder of 'gpr4' gpr encoding type
Comment the decoder of 'gpr4' gpr encoding type in nanoMIPS
disassembler.
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Aleksandar Markovic [Tue, 25 Dec 2018 14:30:07 +0000 (15:30 +0100)]
disas: nanoMIPS: Rename the decoder of 'gpr4' gpr encoding type
Rename the decoder of 'gpr4' gpr encoding type in nanoMIPS
disassembler.
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Aleksandar Markovic [Tue, 25 Dec 2018 14:18:18 +0000 (15:18 +0100)]
disas: nanoMIPS: Comment the decoder of 'gpr3.src.store' gpr encoding type
Comment the decoder of 'gpr3.src.store' gpr encoding type in nanoMIPS
disassembler.
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Aleksandar Markovic [Tue, 25 Dec 2018 14:09:49 +0000 (15:09 +0100)]
disas: nanoMIPS: Rename the decoder of 'gpr3.src.store' gpr encoding type
Rename the decoder of 'gpr3.src.store' gpr encoding type in nanoMIPS
disassembler.
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Aleksandar Markovic [Tue, 25 Dec 2018 14:06:15 +0000 (15:06 +0100)]
disas: nanoMIPS: Comment the decoder of 'gpr3' gpr encoding type
Comment the decoder of 'gpr3' gpr encoding type in nanoMIPS
disassembler.
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Aleksandar Markovic [Tue, 25 Dec 2018 13:19:12 +0000 (14:19 +0100)]
disas: nanoMIPS: Rename the decoder of 'gpr3' gpr encoding type
Rename the decoder of 'gpr3' gpr encoding type in nanoMIPS
disassembler.
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Aleksandar Markovic [Mon, 24 Dec 2018 15:18:53 +0000 (16:18 +0100)]
disas: nanoMIPS: Fix order of more invocations
Fix order of extraction function invocations so that extraction
goes from MSB side to LSB side of the given instruction coding
content. This is desireable because of consistency and easier
visual spotting of errors.
After this patch, all such invocations should be in the desired
order.
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Aleksandar Markovic [Mon, 24 Dec 2018 14:36:04 +0000 (15:36 +0100)]
disas: nanoMIPS: Name more functions in a more descriptive way
Rename more functions that have names that are hard to understand.
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Aleksandar Markovic [Tue, 18 Dec 2018 03:19:28 +0000 (04:19 +0100)]
disas: nanoMIPS: Fix an FP-related misnomer 3
Rename NMD::extract_ft_20_19_18_17_16(uint64 instruction) to
NMD::extract_ft_25_24_23_22_21(uint64 instruction).
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Aleksandar Markovic [Tue, 18 Dec 2018 03:16:15 +0000 (04:16 +0100)]
disas: nanoMIPS: Fix an FP-related misnomer 2
Rename NMD::extract_fs_15_14_13_12_11(uint64 instruction) to
NMD::extract_fs_20_19_18_17_16(uint64 instruction).
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Aleksandar Markovic [Tue, 18 Dec 2018 03:12:53 +0000 (04:12 +0100)]
disas: nanoMIPS: Fix an FP-related misnomer 1
Rename NMD::extract_fd_10_9_8_7_6(uint64 instruction) to
NMD::extract_fd_15_14_13_12_11(uint64 instruction).
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Aleksandar Markovic [Mon, 17 Dec 2018 14:23:35 +0000 (15:23 +0100)]
disas: nanoMIPS: Name some functions in a more descriptive way
Rename some functions that have names that are hard to understand.
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com>
Reviewed-by: Stefan Markovic <smarkovic@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Aleksandar Markovic [Mon, 17 Dec 2018 02:01:16 +0000 (03:01 +0100)]
disas: nanoMIPS: Fix order of some invocations
Fix order of extraction function invocations so that extraction
goes from MSB side to LSB side of the given instruction coding
content. This is desireable because of consistency and easier
visual spotting of errors.
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com>
Reviewed-by: Stefan Markovic <smarkovic@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Aleksandar Markovic [Mon, 17 Dec 2018 00:44:04 +0000 (01:44 +0100)]
disas: nanoMIPS: Fix a function misnomer
Fix wrong function name. The convention in these files is that names of
extraction functions should reflect bit patterns they are extracting.
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com>
Reviewed-by: Stefan Markovic <smarkovic@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Aleksandar Markovic [Mon, 17 Dec 2018 00:38:33 +0000 (01:38 +0100)]
disas: nanoMIPS: Remove functions that are not used
Some functions were not used at all. Compiler doesn't complain
since they are class memebers. Remove them - no future usage is
planned.
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com>
Reviewed-by: Stefan Markovic <smarkovic@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Aleksandar Markovic [Mon, 17 Dec 2018 00:28:44 +0000 (01:28 +0100)]
disas: nanoMIPS: Fix preamble text in nanomips.* files
Fix several mistakes in preambles of nanomips disassembler source
files.
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com>
Reviewed-by: Stefan Markovic <smarkovic@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Stefan Weil [Thu, 27 Dec 2018 16:56:04 +0000 (17:56 +0100)]
disas: nanoMIPS: Fix types and format strings
Use POSIX types and format strings.
Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Signed-off-by: Stefan Weil <sw@weilnetz.de>
Fredrik Noring [Thu, 27 Dec 2018 19:29:14 +0000 (20:29 +0100)]
target/mips: Support R5900 three-operand MADD1 and MADDU1 instructions
The three-operand MADD and MADDU are specific to R5900 cores.
Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Signed-off-by: Fredrik Noring <noring@nocrew.org>
Philippe Mathieu-Daudé [Thu, 27 Dec 2018 18:00:44 +0000 (19:00 +0100)]
target/mips: Support R5900 three-operand MADD and MADDU instructions
The three-operand MADD and MADDU are specific to Sony R5900 core,
and Toshiba TX19/TX39/TX79 cores as well.
The "32-Bit TX System RISC TX39 Family Architecture manual"
is available at https://wiki.qemu.org/File:DSAE0022432.pdf
Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Signed-off-by: Philippe Mathieu-Daudé<f4bug@amsat.org>
Signed-off-by: Fredrik Noring <noring@nocrew.org>
Tested-by: Fredrik Noring <noring@nocrew.org>
Aleksandar Markovic [Mon, 31 Dec 2018 12:14:56 +0000 (13:14 +0100)]
target/mips: MXU: Add handler for an align instruction
Add translation handler for S32ALNI MXU instruction.
Reviewed-by: Stefan Markovic <smarkovic@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Aleksandar Markovic [Mon, 31 Dec 2018 12:14:34 +0000 (13:14 +0100)]
target/mips: MXU: Add handlers for max/min instructions
Add translation handlers for six max/min MXU instructions.
Reviewed-by: Stefan Markovic <smarkovic@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Aleksandar Markovic [Mon, 31 Dec 2018 12:14:13 +0000 (13:14 +0100)]
target/mips: MXU: Add handlers for logic instructions
Add translation handlers for four logic MXU instructions.
It should be noted that there is an error in MXU documentation (dated
June 2017) regarding opcodes for this group of instructions. This was
confirmed by running tests on hardware, and also by looking up other
related public source trees (binutils, Android NDK). In initial MXU
patches to QEMU, opcodes for MXU logic instructions were created to
be in accordance with the MXU documentation, therefore the error from
was propagated. This patch corrects that, changing the involved code.
Besides that, as MXU was designed and implemented only for 32-bit
CPUs, corresponding preprosessor conditions were added around MXU
code, which allows more flexible implementation of MXU handlers.
Reviewed-by: Stefan Markovic <smarkovic@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Aleksandar Markovic [Thu, 27 Dec 2018 16:25:00 +0000 (17:25 +0100)]
target/mips: MXU: Improve the comment containing MXU overview
Improve textual description of MXU extension. These are mostly
comment formatting changes.
Reviewed-by: Stefan Markovic <smarkovic@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Aleksandar Markovic [Thu, 27 Dec 2018 16:20:38 +0000 (17:20 +0100)]
target/mips: MXU: Add generic naming for optn2 constants
Add generic naming involving generig suffixes OPTN0, OPTN1, OPTN2,
OPTN3 for four optn2 constants. Existing suffixes WW, LW, HW, XW
are not quite appropriate for some instructions using optn2.
Reviewed-by: Stefan Markovic <smarkovic@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Aleksandar Markovic [Thu, 27 Dec 2018 16:17:35 +0000 (17:17 +0100)]
target/mips: MXU: Add missing opcodes/decoding for LX* instructions
Add missing opcodes and decoding engine for LXB, LXH, LXW, LXBU,
and LXHU instructions. They were for some reason forgotten in
previous commits. The MXU opcode list and decoding engine should
be now complete.
Reviewed-by: Stefan Markovic <smarkovic@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Paul Burton [Thu, 27 Dec 2018 15:32:11 +0000 (16:32 +0100)]
atomics: Set ATOMIC_REG_SIZE=8 for MIPS n32
ATOMIC_REG_SIZE is currently defined as the default sizeof(void *) for
all MIPS host builds, including those using the n32 ABI. n32 is the
MIPS64 ILP32 ABI and as such tcg/mips/tcg-target.h defines
TCG_TARGET_REG_BITS as 64 for n32 builds. If we attempt to build QEMU
for an n32 host with support for a 64b target architecture then
TCG_OVERSIZED_GUEST is 0 and accel/tcg/cputlb.c attempts to use
atomic_* functions. This fails because ATOMIC_REG_SIZE is 4, causing
the calls to QEMU_BUILD_BUG_ON(sizeof(*ptr) > ATOMIC_REG_SIZE) in the
various atomic_* functions to generate errors.
Fix this by defining ATOMIC_REG_SIZE as 8 for all MIPS64 builds, which
will cover both n32 (ILP32) & n64 (LP64) ABIs in much the same was as
we already do for x86_64/x32.
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Signed-off-by: Paul Burton <pburton@wavecomp.com>
Aleksandar Markovic [Wed, 26 Dec 2018 16:46:56 +0000 (17:46 +0100)]
MAINTAINERS: Add Aleksandar Rikalo as a reviewer for MIPS content
Add Aleksandar Rikalo as a reviewer for MIPS content. Aleksandar
brings to us more than six years of experience in working on a variety
of development tools for MIPS architectures, and will greatly help
QEMU community understand and support intricacies of MIPS better.
Acked-by: Aleksandar Rikalo <arikalo@wavecomp.com>
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Aleksandar Markovic [Mon, 17 Dec 2018 16:50:09 +0000 (17:50 +0100)]
MAINTAINERS: target/mips: Reorder items alphabetically
Reorder items alphabetically for better visibility.
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Aleksandar Markovic [Mon, 17 Dec 2018 16:43:11 +0000 (17:43 +0100)]
MAINTAINERS: target/mips: Add filter for mips in email subjects
Add ability to redirect mails (sent to qemu-devel) containing
"mips" in the subject line to MIPS maintainers and reviewers.
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Aleksandar Markovic [Mon, 17 Dec 2018 16:30:51 +0000 (17:30 +0100)]
MAINTAINERS: target/mips: Add MIPS files under default-configs directory
Add following files as maintained within the main MIPS target
section in MAINTAINERS:
default-configs/mips64el-linux-user.mak
default-configs/mips64-linux-user.mak
default-configs/mipsn32el-linux-user.mak
default-configs/mipsn32-linux-user.mak
default-configs/mipsel-linux-user.mak
default-configs/mips-linux-user.mak
default-configs/mips64el-softmmu.mak
default-configs/mips64-softmmu.mak
default-configs/mipsel-softmmu.mak
default-configs/mips-softmmu.mak
default-configs/mips-softmmu-common.mak
Future nanoMIPS user mode will also have its .mak file, and
because of that "*mips*" was used instead of "mips*" as a
shorthand in the new item in MAINTAINERS.
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Peter Maydell [Thu, 3 Jan 2019 13:26:30 +0000 (13:26 +0000)]
Merge remote-tracking branch 'remotes/palmer/tags/riscv-for-master-3.2-part1' into staging
RISC-V Changes for 3.2, Part 1
This pull request contains the first set of RISC-V patches I'd like to
target for the 3.2 development cycle. It's really just a collection of
bug fixes with one major new feature: PCIe can now be attached to RISC-V
guests.
This has passed my usual test of booting the latest Linux RC into a
Fedora disk image on the virt machine.
# gpg: Signature made Fri 21 Dec 2018 16:01:29 GMT
# gpg: using RSA key
EF4CA1502CCBAB41
# gpg: Good signature from "Palmer Dabbelt <palmer@dabbelt.com>"
# gpg: aka "Palmer Dabbelt <palmer@sifive.com>"
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 00CE 76D1 8349 60DF CE88 6DF8 EF4C A150 2CCB AB41
* remotes/palmer/tags/riscv-for-master-3.2-part1:
MAINTAINERS: Mark RISC-V as Supported
riscv/cpu: use device_class_set_parent_realize
target/riscv/pmp.c: Fix pmp_decode_napot()
sifive_uart: Implement interrupt pending register
RISC-V: Enable second UART on sifive_e and sifive_u
RISC-V: Fix PLIC pending bitfield reads
RISC-V: Fix CLINT timecmp low 32-bit writes
RISC-V: Add hartid and \n to interrupt logging
sifive_u: Set 'clock-frequency' DT property for SiFive UART
sifive_u: Add clock DT node for GEM ethernet
riscv: Enable VGA and PCIE_VGA
hw/riscv/virt: Connect the gpex PCIe
hw/riscv/virt: Adjust memory layout spacing
hw/riscv/virt: Increase the number of interrupts
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Peter Maydell [Thu, 3 Jan 2019 10:42:21 +0000 (10:42 +0000)]
Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-
20181226' into staging
Host support for riscv64.
Dead code elimination pass.
Register allocation improvements.
# gpg: Signature made Tue 25 Dec 2018 20:52:34 GMT
# gpg: using RSA key
64DF38E8AF7E215F
# gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>"
# Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F
* remotes/rth/tags/pull-tcg-
20181226: (42 commits)
tcg: Improve call argument loading
tcg: Record register preferences during liveness
tcg: Add TCG_OPF_BB_EXIT
tcg: Split out more subroutines from liveness_pass_1
tcg: Rename and adjust liveness_pass_1 helpers
tcg: Reindent parts of liveness_pass_1
tcg: Dump register preference info with liveness
tcg: Improve register allocation for matching constraints
tcg: Add output_pref to TCGOp
tcg: Add preferred_reg argument to tcg_reg_alloc_do_movi
tcg: Add preferred_reg argument to temp_sync
tcg: Add preferred_reg argument to temp_load
tcg: Add preferred_reg argument to tcg_reg_alloc
tcg: Add reachable_code_pass
tcg: Reference count labels
tcg: Add TCG_CALL_NO_RETURN
tcg: Renumber TCG_CALL_* flags
linux-user: Add safe_syscall for riscv64 host
disas/microblaze: Remove unused REG_SP macro
configure: Add support for building RISC-V host
...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Richard Henderson [Tue, 11 Dec 2018 16:25:02 +0000 (10:25 -0600)]
tcg: Improve call argument loading
Free the argument register only after we have verified that the
temporary is not already in that register. This case is likely
now that we are back propagating the preferred register.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Richard Henderson [Tue, 27 Nov 2018 20:45:26 +0000 (12:45 -0800)]
tcg: Record register preferences during liveness
With these preferences, we can arrange for function call arguments to
be computed into the proper registers instead of requiring extra moves.
Reviewed-by: Emilio G. Cota <cota@braap.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Richard Henderson [Tue, 27 Nov 2018 21:45:08 +0000 (13:45 -0800)]
tcg: Add TCG_OPF_BB_EXIT
Use this to notice the opcodes that exit the TB, which implies
that local temps are really dead and need not be synced.
Previously we so marked the true end of the TB, but that was
immediately overwritten by the la_bb_end invoked by any
TCG_OPF_BB_END opcode, like exit_tb.
Reviewed-by: Emilio G. Cota <cota@braap.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>