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Jinsong Ji [Tue, 18 Sep 2018 15:38:56 +0000 (15:38 +0000)]
[NFC] Update comments regarding BufferSize for ProcResources
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342491
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Simon Pilgrim [Tue, 18 Sep 2018 15:38:16 +0000 (15:38 +0000)]
Revert rL342465: Added function to set a register to a particular value + tests.
rL342465 is breaking the MSVC buildbots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342490
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Simon Pilgrim [Tue, 18 Sep 2018 15:35:49 +0000 (15:35 +0000)]
Revert rL342466: [llvm-exegesis] Improve Register Setup.
rL342465 is breaking the MSVC buildbots, but I need to revert this dependent revision as well.
Summary:
Added function to set a register to a particular value + tests.
Add EFLAGS test, use new setRegTo instead of setRegToConstant.
Reviewers: courbet, javed.absar
Subscribers: mgorny, tschuett, llvm-commits
Differential Revision: https://reviews.llvm.org/D51856
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342489
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Alex Bradbury [Tue, 18 Sep 2018 15:18:16 +0000 (15:18 +0000)]
[RISCV][MC] Use a custom ParserMethod for the bare_symbol operand type
This allows the hard-coded shouldForceImmediate logic to be removed because
the generated MatchOperandParserImpl makes use of the current context (i.e.
the current mnemonic) to determine parsing behaviour, and so won't first try
to parse a register before parsing a symbol name.
No functional change is intended. gas accepts immediate arguments for call,
tail and lla. This patch doesn't address this discrepancy.
Differential Revision: https://reviews.llvm.org/D51733
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342488
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Alex Bradbury [Tue, 18 Sep 2018 15:13:29 +0000 (15:13 +0000)]
[RISCV][MC] Reject bare symbols for the simm12 operand type
addi a0, a0, foo and lw a0, foo(a0) and similar are now rejected. An explicit
%lo and %pcrel_lo modifier is required. This matches gas behaviour.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342487
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Alex Bradbury [Tue, 18 Sep 2018 15:08:35 +0000 (15:08 +0000)]
[RISCV][MC] Tighten up checking of sybol operands to lui and auipc
Reject bare symbols and accept only %pcrel_hi(sym) for auipc and %hi(sym) for
lui. Also test valid operand modifiers in rv32i-valid.s.
Note this is slightly stricter than gas, which will accept either %pcrel_hi or
%hi for both lui and auipc.
Differential Revision: https://reviews.llvm.org/D51731
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342486
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Nico Weber [Tue, 18 Sep 2018 15:06:16 +0000 (15:06 +0000)]
Remove dead function user_cache_directory()
It's been unused since it was added almost 3 years ago in
https://reviews.llvm.org/D13801
Motivated by https://reviews.llvm.org/rL342002 since it removes one of the
functions keeping a ref to SHGetKnownFolderPath.
Differential Revision: https://reviews.llvm.org/D52184
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342485
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Andrea Di Biagio [Tue, 18 Sep 2018 15:00:06 +0000 (15:00 +0000)]
[llvm-mca] Add the ability to mark register reads/writes associated with dep-breaking instructions. NFCI
This patch adds two new boolean fields:
- Field `ReadState::IndependentFromDef`.
- Field `WriteState::WritesZero`.
Field `IndependentFromDef` is set for ReadState objects associated with
dependency-breaking instructions. It is used by the simulator when updating data
dependencies between registers.
Field `WritesZero` is set by WriteState objects associated with dependency
breaking zero-idiom instructions. It helps the PRF identify which writes don't
consume any physical registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342483
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Hans Wennborg [Tue, 18 Sep 2018 14:12:54 +0000 (14:12 +0000)]
Revert r342457 "Fixes removal of dead elements from PressureDiff (PR37252)."
This broke the lit tests on a bunch of buildbots, e.g.
http://lab.llvm.org:8011/builders/llvm-clang-lld-x86_64-scei-ps4-ubuntu-fast/builds/36679
> Reviewed By: MatzeB
>
> Differential Revision: https://reviews.llvm.org/D51495
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342482
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Simon Pilgrim [Tue, 18 Sep 2018 14:05:07 +0000 (14:05 +0000)]
Use pass-by-reference for-range loop. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342481
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Andrea Di Biagio [Tue, 18 Sep 2018 14:03:46 +0000 (14:03 +0000)]
[llvm-mca] Slightly refactor class InstRef. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342480
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Teresa Johnson [Tue, 18 Sep 2018 13:44:13 +0000 (13:44 +0000)]
[ThinLTO] Update LangRef doc for summary parsing
Summary:
Remove note about summary being ignored. Update to reflect the
fact that summary is now parsed by llvm-as.
While here, fix one summary format that changed since the initial
implementation.
Reviewers: dexonsmith
Subscribers: inglorion, llvm-commits
Differential Revision: https://reviews.llvm.org/D51540
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342479
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Nemanja Ivanovic [Tue, 18 Sep 2018 13:43:16 +0000 (13:43 +0000)]
[PowerPC] Do not emit record-form rotates when record-form andi/andis suffices
This is a follow-up to the previous patch that eliminated some of the rotates.
With this addition, we will also emit the record-form andis.
This patch increases the number of record-form rotates we eliminate by
more than 70%.
Differential revision: https://reviews.llvm.org/D44897
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342478
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Teresa Johnson [Tue, 18 Sep 2018 13:42:24 +0000 (13:42 +0000)]
[LTO] Make detection of WPD remark enablement more robust
Summary:
Currently only the first function in the module is checked to
see if it has remarks enabled. If that first function is a declaration,
remarks will be incorrectly skipped. Change to look for the first
non-empty function.
Reviewers: pcc
Subscribers: mehdi_amini, inglorion, eraman, steven_wu, dexonsmith, llvm-commits
Differential Revision: https://reviews.llvm.org/D51556
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342477
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whitequark [Tue, 18 Sep 2018 13:36:03 +0000 (13:36 +0000)]
[LLVM-C][OCaml] Add UnifyFunctionExitNodes pass to C and OCaml APIs
Summary:
Adds LLVMAddUnifyFunctionExitNodesPass to expose
createUnifyFunctionExitNodesPass to the C and OCaml APIs.
Reviewers: whitequark, deadalnix
Reviewed By: whitequark
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D52212
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342476
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whitequark [Tue, 18 Sep 2018 13:35:50 +0000 (13:35 +0000)]
[LLVM-C][OCaml] Add LowerAtomic pass to C and OCaml APIs
Summary:
Adds LLVMAddLowerAtomicPass to expose createLowerAtomicPass in the C
and OCaml APIs.
Reviewers: whitequark, deadalnix
Reviewed By: whitequark
Subscribers: jfb, llvm-commits
Differential Revision: https://reviews.llvm.org/D52211
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342475
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whitequark [Tue, 18 Sep 2018 13:35:39 +0000 (13:35 +0000)]
[OCaml] Add OCaml API for LLVMGetIndices
Summary:
This patch adds a thin wrapper around LLVMGetNumIndices and
LLVMGetIndices to return the indices of ExtractValue or InsertValue
instructions as an OCaml array. It has not seemed to be necessary to
expose LLVMGetNumIndices separately.
Reviewers: whitequark
Reviewed By: whitequark
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D52207
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342474
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Nemanja Ivanovic [Tue, 18 Sep 2018 13:21:58 +0000 (13:21 +0000)]
[PowerPC] Optimize compares fed by ANDISo
Both ANDIo and ANDISo (and the 64-bit versions) are record-form instructions.
When optimizing compares, we handle the former in order to eliminate the compare
instruction but not the latter. This patch just adds the latter to the set of
instructions we optimize.
The reason these instructions need to be handled separately is that they are not
part of the RecFormRel map (since they don't have a non-record-form). The
missing "and-immediate-shifted" is just an oversight in the initial
implementation.
Differential revision: https://reviews.llvm.org/D51353
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342472
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John Brawn [Tue, 18 Sep 2018 13:18:21 +0000 (13:18 +0000)]
[TargetLowering] Android has sincos functions
Since Android API version 9 the Android libm has had the sincos functions, so
they should be recognised as libcalls and sincos optimisation should be applied.
Differential Revision: https://reviews.llvm.org/D52025
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342471
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Simon Pilgrim [Tue, 18 Sep 2018 12:01:25 +0000 (12:01 +0000)]
Fix signed/unsigned comparison warning. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342469
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Simon Pilgrim [Tue, 18 Sep 2018 11:30:30 +0000 (11:30 +0000)]
[TableGen] CodeGenDAGPatterns::GenerateVariants - full caching of matching predicates
Further extension to D51035, this patch avoids all repeated predicates[] matching by caching as it collects the patterns that have multiple variants.
Saves around 25secs in debug builds of x86 -gen-dag-isel.
Differential Revision: https://reviews.llvm.org/D51839
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342467
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Guillaume Chatelet [Tue, 18 Sep 2018 11:26:48 +0000 (11:26 +0000)]
[llvm-exegesis] Improve Register Setup.
Summary:
Added function to set a register to a particular value + tests.
Add EFLAGS test, use new setRegTo instead of setRegToConstant.
Reviewers: courbet, javed.absar
Subscribers: mgorny, tschuett, llvm-commits
Differential Revision: https://reviews.llvm.org/D51856
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342466
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Guillaume Chatelet [Tue, 18 Sep 2018 11:26:35 +0000 (11:26 +0000)]
Added function to set a register to a particular value + tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342465
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Guillaume Chatelet [Tue, 18 Sep 2018 11:26:27 +0000 (11:26 +0000)]
Improve Register Setup
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342464
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Alexander Kornienko [Tue, 18 Sep 2018 10:53:13 +0000 (10:53 +0000)]
Remove trailing whitespace introduced in r342440.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342463
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Simon Pilgrim [Tue, 18 Sep 2018 10:44:44 +0000 (10:44 +0000)]
[X86][SSE] LowerShift - pull out repeated getTargetVShiftUniformOpcode calls. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342462
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David Carlier [Tue, 18 Sep 2018 10:31:10 +0000 (10:31 +0000)]
[Xray] llvm-xray fix possible segfault
top argument when superior to the instrumentated code list capacity can lead to a segfault.
Reviewers: dberris
Reviewed By: dberris
Differential Revision: https://reviews.llvm.org/D52224
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342461
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Yury Gribov [Tue, 18 Sep 2018 09:53:42 +0000 (09:53 +0000)]
Fixes removal of dead elements from PressureDiff (PR37252).
Reviewed By: MatzeB
Differential Revision: https://reviews.llvm.org/D51495
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342457
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David Green [Tue, 18 Sep 2018 09:44:53 +0000 (09:44 +0000)]
[AArch64] Attempt to parse more operands as expressions
This tries to make use of evaluateAsRelocatable in AArch64AsmParser::classifySymbolRef
to parse more complex expressions as relocatable operands. It is hopefully better than
the existing code which only handles Symbol +- Constant.
This allows us to parse more complex adr/adrp, mov, ldr/str and add operands. It also
loosens the requirements on parsing addends in ld/st and mov's and adds a number of
tests.
Differential Revision: https://reviews.llvm.org/D51792
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342455
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Martin Storsjo [Tue, 18 Sep 2018 08:44:57 +0000 (08:44 +0000)]
[benchmark] Lowercase windows specific includes
The windows SDK headers don't have self-consistent casing anyway,
so we consistently use lowercase for these in other places, in order
to fix crosscompilation with mingw headers.
This applies an upstream commit:
https://github.com/google/benchmark/commit/
52613079824ac58d06c070aa9fbbb186a5859e2c
Differential Revision: https://reviews.llvm.org/D52181
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342450
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Max Kazantsev [Tue, 18 Sep 2018 04:57:18 +0000 (04:57 +0000)]
[IndVars] Remove unreasonable checks in rewriteLoopExitValues
A piece of logic in rewriteLoopExitValues has a weird check on number of
users which allowed an unprofitable transform in case if an instruction has
more than 6 users.
Differential Revision: https://reviews.llvm.org/D51404
Reviewed By: etherzhhb
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342444
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Matt Arsenault [Tue, 18 Sep 2018 02:34:54 +0000 (02:34 +0000)]
AMDGPU: Don't form fmed3 if it will require materialization
If there is a single use constant, it can be folded into the
min/max, but not into med3.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342443
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Matt Arsenault [Tue, 18 Sep 2018 02:05:44 +0000 (02:05 +0000)]
LSV: Fix adjust alloca alignment trick for AMDGPU
This was checking the hardcoded address space 0 for the stack.
Additionally, this should be checking for legality with
the adjusted alignment, so defer the alignment check.
Also try to split if the unaligned access isn't allowed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342442
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QingShan Zhang [Tue, 18 Sep 2018 02:05:18 +0000 (02:05 +0000)]
[PowerPC] Add Itineraries of IIC_IntMulHD for P7/P8
When doing some instruction scheduling work, we noticed some missing itineraries.
Before we switch to machine scheduler, those missing itineraries might not have impact to actually scheduling,
because we can still get same latency due to default values.
With machine scheduler, however, itineraries will have impact to scheduling.
eg: NumMicroOps will default to be 0 if there is NO itineraries for specific instruction class.
And most of the instruction class with itineraries will have NumMicroOps default to 1.
This will has impact on the count of RetiredMOps, affects the Pending/Available Queue,
then causing different scheduling or suboptimal scheduling further.
Patch By: jsji (Jinsong Ji)
Differential Revision: https://reviews.llvm.org/D52040
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342441
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QingShan Zhang [Tue, 18 Sep 2018 01:59:22 +0000 (01:59 +0000)]
[PowerPC][NFC] Add a mulld testcase for scheduling check.
This patch add a mulld testcase for scheduling check.
Patch By: jsji (Jinsong Ji)
Differential Revision: https://reviews.llvm.org/D52039
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342440
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Matt Arsenault [Tue, 18 Sep 2018 01:51:33 +0000 (01:51 +0000)]
AMDGPU: Expand vector canonicalizes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342439
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whitequark [Tue, 18 Sep 2018 01:48:01 +0000 (01:48 +0000)]
[OCaml] Add OCaml API for LLVMIsCleanup
Summary: Expose test for whether or not a landingpad is a cleanup.
Reviewers: whitequark
Reviewed By: whitequark
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D52205
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342438
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whitequark [Tue, 18 Sep 2018 01:47:53 +0000 (01:47 +0000)]
[NFC][OCaml] Fix copy paste error in file header
Summary: Just copypasta resulting in the wrong file name in the header.
Reviewers: whitequark
Reviewed By: whitequark
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D52215
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342437
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whitequark [Tue, 18 Sep 2018 01:47:44 +0000 (01:47 +0000)]
[NFC][OCaml] Fix implicit declaration compilation warnings
Summary:
2dd4f35c7fc75639920ebc473a4a57ea91864c10 moved LLVMAddLowerSwitchPass
and LLVMAddPromoteMemoryToRegisterPass declarations from
llvm-c/Transforms/Scalar.h to llvm-c/Transforms/Utils.h
Reviewers: whitequark
Reviewed By: whitequark
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D52214
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342436
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whitequark [Tue, 18 Sep 2018 01:47:37 +0000 (01:47 +0000)]
[LLVM-C][OCaml] Add C and OCaml APIs for llvm::StructType::isLiteral
Summary:
This patch adds LLVMIsLiteralStruct to the C API to expose
StructType::isLiteral. This is then used to implement the analogous
addition to the OCaml API.
Reviewers: whitequark, deadalnix
Reviewed By: whitequark
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D52209
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342435
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whitequark [Tue, 18 Sep 2018 01:47:25 +0000 (01:47 +0000)]
[LLVM-C] Add support for ConstantExpr in LLVMGetNumIndices and LLVMGetIndices
Summary:
ConstantExpr supports getIndices, but prior to this patch
LLVMGetNumIndices and LLVMGetIndices would error on them.
Reviewers: whitequark
Reviewed By: whitequark
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D52206
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342434
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whitequark [Tue, 18 Sep 2018 01:47:18 +0000 (01:47 +0000)]
[OCaml] Add OCaml APIs for Invoke arguments and destinations
Summary:
This patch adds OCaml APIs for LLVMGetNormalDest and LLVMGetUnwindDest
on InvokeInsts, as well as LLVMGetNumArgOperands on CallInsts and
InvokeInsts.
Reviewers: whitequark
Reviewed By: whitequark
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D52204
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342433
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Volodymyr Sapsai [Tue, 18 Sep 2018 00:11:55 +0000 (00:11 +0000)]
Revert "[ARM] Cleanup ARM CGP isSupportedValue"
This reverts r342395 as it caused error
> Argument value type does not match pointer operand type!
> %0 = atomicrmw volatile xchg i8* %_Value1, i32 1 monotonic, !dbg !25
> i8in function atomic_flag_test_and_set
> fatal error: error in backend: Broken function found, compilation aborted!
on bot http://green.lab.llvm.org/green/job/clang-stage1-configure-RA/
More details are available at https://reviews.llvm.org/D52080
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342431
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Reid Kleckner [Tue, 18 Sep 2018 00:04:29 +0000 (00:04 +0000)]
Work around grep vs. CRLF issue in Thumb2 test by matching excess whitespace
There seems to be a separate command line tokenization issue that
prevents just ':\s*$' from working, since then the pattern argument
isn't quoted, and grep.exe misinterprets the backslash somehow.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342430
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whitequark [Tue, 18 Sep 2018 00:01:12 +0000 (00:01 +0000)]
[OCaml] Add GlobalIFunc value kind to OCaml API
Summary:
The GlobalIFunc value kind has not yet been added to the OCaml
API. This patch only extends the enum, so that e.g. classify_value
will not crash. No support for manipulating or building GlobalIFuncs
is added at this point.
Reviewers: whitequark, deadalnix
Reviewed By: whitequark
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D52198
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342429
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whitequark [Tue, 18 Sep 2018 00:01:01 +0000 (00:01 +0000)]
[OCaml] Add Token type to kind enum in OCaml API
Summary:
The token type has not yet been added to the OCaml API. This
patch only extends the enum, so that e.g. classify_type will not
crash. No support for manipulating or building tokens is added at this
point.
Reviewers: whitequark
Reviewed By: whitequark
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D52197
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342428
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whitequark [Tue, 18 Sep 2018 00:00:53 +0000 (00:00 +0000)]
[OCaml] Add missing instruction opcodes to OCaml API
Summary:
The OCaml bindings have become out of date and several opcodes have
been added to the C API without corresponding additions to the OCaml
API.
Reviewers: whitequark, mgorny
Reviewed By: whitequark
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D52196
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342427
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Alina Sbirlea [Mon, 17 Sep 2018 22:35:21 +0000 (22:35 +0000)]
[EarlyCSEwMemorySSA] Add MSSA verification and tests to make EarlyCSE failures easier to track.
Summary:
EarlyCSE can make IR changes that will leave MemorySSA with accesses claiming to be optimized, but for which a subsequent MemorySSA run will yield a different optimized result.
Due to relying on AA queries, we can't fix this in general, unless we recompute MemorySSA.
Adding some tests to track this and a basic verify for future potential failures.
Reviewers: george.burgess.iv, gberry
Subscribers: sanjoy, jlebar, Prazek, llvm-commits
Differential Revision: https://reviews.llvm.org/D51960
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342422
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Zachary Turner [Mon, 17 Sep 2018 22:04:56 +0000 (22:04 +0000)]
Add #include <cassert>
This should fix the broken builds on some bots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342420
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Simon Atanasyan [Mon, 17 Sep 2018 21:21:57 +0000 (21:21 +0000)]
[mips] Fix MIPS N32 ABI triples support
Add support mips64(el)-linux-gnuabin32 triples, and set them to N32.
Debian architecture name mipsn32/mipsn32el are also added. Set
UseIntegratedAssembler for N32 if we can detect it.
Patch by YunQiang Su.
Differential revision: https://reviews.llvm.org/D51408
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342416
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Zachary Turner [Mon, 17 Sep 2018 21:08:11 +0000 (21:08 +0000)]
[PDB] Make the native reader support enumerators.
Previously we would dump the names of enum types, but not their
enumerator values. This adds support for enumerator values. In
doing so, we have to introduce a general purpose mechanism for
caching symbol indices of field list members. Unlike global
types, FieldList members do not have a TypeIndex. So instead,
we identify them by the pair {TypeIndexOfFieldList, IndexInFieldList}.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342415
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Zachary Turner [Mon, 17 Sep 2018 21:07:48 +0000 (21:07 +0000)]
[PDB] Make the native reader support modified types.
Previously for cv-qualified types, we would just ignore them
and they would never get printed. Now we can enumerate them
and cache them like any other symbol type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342414
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Nirav Dave [Mon, 17 Sep 2018 20:34:26 +0000 (20:34 +0000)]
[MC] Avoid inlining constant symbols with variants.
Summary:
Defer unnecessary early inlining of constants to symbol
variants. Fixes PR38945.
Reviewers: nickdesaulniers, rnk
Subscribers: nemanjai, hiraditya, llvm-commits
Differential Revision: https://reviews.llvm.org/D52188
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342412
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Michael Kruse [Mon, 17 Sep 2018 18:40:29 +0000 (18:40 +0000)]
[Loopinfo] Remove one latch-case in getLoopID. NFC.
getLoopID has different control flow for two cases: If there is a
single loop latch and for any other number of loop latches (0 and more
than one). The latter case should return the same result if there is
only a single latch. We can save the preceding redundant search for a
latch by handling both cases with the same code.
Differential Revision: https://reviews.llvm.org/D52118
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342406
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Jessica Paquette [Mon, 17 Sep 2018 18:40:21 +0000 (18:40 +0000)]
[MachineOutliner][NFC] Don't map more illegal instrs than you have to
We were mapping an instruction every time we saw something we couldn't map
before this. Since each illegal mapping is unique, we only have to do this once.
This makes it so that we don't map illegal instructions when the previous
mapped instruction was illegal.
In CTMark (AArch64), this results in 240 fewer instruction mappings on
average over 619 files in total. The largest improvement is 12576 fewer
mappings in one file, and the smallest is 0. The median improvement is 101
fewer mappings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342405
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Keno Fischer [Mon, 17 Sep 2018 17:37:14 +0000 (17:37 +0000)]
[X86ISel] Implement byval lowering for Win64 calling convention
Summary:
The IR reference for the `byval` attribute states:
```
This indicates that the pointer parameter should really be passed by value
to the function. The attribute implies that a hidden copy of the pointee is
made between the caller and the callee, so the callee is unable to modify
the value in the caller. This attribute is only valid on LLVM pointer arguments.
```
However, on Win64, this attribute is unimplemented and the raw pointer is
passed to the callee instead. This is problematic, because frontend authors
relying on the implicit hidden copy (as happens for every other calling
convention) will see the passed value silently (if mutable memory) or
loudly (by means of a crash) modified because the callee treats the
location as scratch memory space it is allowed to mutate.
At this point, it's worth taking a step back to understand the context.
In most calling conventions, aggregates that are too large to be passed
in registers, instead get *copied* to the stack at a fixed (computable
from the signature) offset of the stack pointer. At the LLVM, we hide
this hidden copy behind the byval attribute. The caller passes a pointer
to the desired data and the callee receives a pointer, but these pointers
are not the same. In particular, the pointer that the callee receives
points to temporary stack memory allocated as part of the call lowering.
In most calling conventions, this pointer is never realized in registers
or memory. The temporary memory is simply defined by an implicit
offset from the stack pointer at function entry.
Win64, uniquely, works differently. The structure is still passed in
memory, but instead of being stored at an implicit memory offset, the
caller computes a pointer to the temporary memory and passes it to
the callee as a regular pointer (taking up a register, or if all
registers are taken up, an additional stack slot). Presumably, this
was done to allow eliding the copy when passing aggregates through
several functions on the stack.
This explains why ignoring the `byval` attribute mostly works on Win64.
The argument simply gets passed as a pointer and as long as we're ok
with the callee trampling all over that memory, there are no ill effects.
However, it does contradict the documentation of the `byval` attribute
which specifies that there is to be an implicit copy.
Frontends can of course work around this by never emitting the `byval`
attribute for Win64 and creating `alloca`s for the requisite temporary
stack slots (and that does appear to be what frontends are doing).
However, the presence of the `byval` attribute is not a trap for
frontend authors, since it seems to work, but silently modifies the
passed memory contrary to documentation.
I see two solutions:
- Disallow the `byval` attribute in the verifier if using the Win64
calling convention.
- Make it work by simply emitting a temporary stack copy as we would
with any other calling convention (frontends can of course always
not use the attribute if they want to elide the copy).
This patch implements the second option (make it work), though I would
be fine with the first also.
Ref: https://github.com/JuliaLang/julia/issues/28338
Reviewers: rnk
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D51842
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342402
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Stanislav Mekhanoshin [Mon, 17 Sep 2018 16:04:32 +0000 (16:04 +0000)]
[AMDGPU] Initialize instruction itinerary from GCNSubtarget
I need to use it in the GCN codegen.
Differential Revision: https://reviews.llvm.org/D52123
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342400
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Alexander Kornienko [Mon, 17 Sep 2018 15:40:01 +0000 (15:40 +0000)]
Revert "[DWARF] reposting r342048, which was reverted in r342056 due to buildbot errors. Adjusted 2 test cases for ARM and darwin and fixed a bug with the original change in dsymutil."
This reverts commit r342218. Due to a number of failures under TSAN. An isolated
test case is being worked on.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342399
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Xin Tong [Mon, 17 Sep 2018 15:28:01 +0000 (15:28 +0000)]
[CVP] Handle instructions with no user. No need to create CVPLattice state. This handles terminator instructions and more.
Summary:
I tested this patch by compiling sqlite3.ll (clang -O3 -mllvm -disable-llvm-optzns sqlite3.c.)
opt -called-value-propagation sqlite3.ll -time-passes -f -o out.ll
I get 10+% speedup for the pass. I expect some of the gain come from skipping terminator instructions.
=== BEFORE THE PATCH ===
===-------------------------------------------------------------------------===
... Pass execution timing report ...
===-------------------------------------------------------------------------===
Total Execution Time: 0.5562 seconds (0.5582 wall clock)
---User Time--- --System Time-- --User+System-- ---Wall Time--- --- Name ---
0.2485 ( 46.4%) 0.0120 ( 57.7%) 0.2605 ( 46.8%) 0.2615 ( 46.8%) Bitcode Writer
0.1607 ( 30.0%) 0.0079 ( 37.7%) 0.1685 ( 30.3%) 0.1693 ( 30.3%) Called Value Propagation
0.1262 ( 23.6%) 0.0009 ( 4.5%) 0.1271 ( 22.9%) 0.1275 ( 22.8%) Module Verifier
0.5353 (100.0%) 0.0209 (100.0%) 0.5562 (100.0%) 0.5582 (100.0%) Total
=== AFTER THE PATCH ===
===-------------------------------------------------------------------------===
... Pass execution timing report ...
===-------------------------------------------------------------------------===
Total Execution Time: 0.5338 seconds (0.5355 wall clock)
---User Time--- --System Time-- --User+System-- ---Wall Time--- --- Name ---
0.2498 ( 48.6%) 0.0118 ( 59.3%) 0.2615 ( 49.0%) 0.2629 ( 49.1%) Bitcode Writer
0.1377 ( 26.8%) 0.0075 ( 37.8%) 0.1452 ( 27.2%) 0.1455 ( 27.2%) Called Value Propagation
0.1264 ( 24.6%) 0.0006 ( 3.0%) 0.1270 ( 23.8%) 0.1271 ( 23.7%) Module Verifier
0.5139 (100.0%) 0.0199 (100.0%) 0.5338 (100.0%) 0.5355 (100.0%) Total
Reviewers: davide, mssimpso
Reviewed By: davide
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D49108
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342398
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Amara Emerson [Mon, 17 Sep 2018 14:40:13 +0000 (14:40 +0000)]
Revert "Revert r342183 "[DAGCombine] Fix crash when store merging created an extract_subvector with invalid index.""
Fixed the assertion failure.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342397
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Jonas Devlieghere [Mon, 17 Sep 2018 14:23:47 +0000 (14:23 +0000)]
[DebugInfo] Remove redundant argument. [NFC]
Removes the redundant UnitType parameter from verifyUnitContents. I also
fixed some formatting issues as I was touching the file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342396
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Sam Parker [Mon, 17 Sep 2018 13:57:39 +0000 (13:57 +0000)]
[ARM] Cleanup ARM CGP isSupportedValue
isSupportedValue explicitly checked and accepted many types of value,
primarily for debugging reasons. Remove most of these checks and do a
bit of refactoring now that the pass is more stable. This also enables
ZExts to be sources, but this has very little practical benefit at the
moment extend instructions will still be introduced.
Differential Revision: https://reviews.llvm.org/D52080
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342395
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Simon Pilgrim [Mon, 17 Sep 2018 13:56:42 +0000 (13:56 +0000)]
Fix "not all control paths return a value" MSVC warning. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342394
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Sam Parker [Mon, 17 Sep 2018 13:48:25 +0000 (13:48 +0000)]
[ARM] Disallow icmp with negative imm and overflow
We allow overflowing instructions if they're decreasing and only used
by an unsigned compare. Add the extra condition that the icmp cannot
be using a negative immediate.
Differential Revision: https://reviews.llvm.org/D52102
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342392
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Matt Arsenault [Mon, 17 Sep 2018 13:24:30 +0000 (13:24 +0000)]
Fix vectorization of canonicalize
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342390
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Alexandros Lamprineas [Mon, 17 Sep 2018 12:24:55 +0000 (12:24 +0000)]
[GVNHoist] Re-enable GVNHoist by default
Rebase rL341954 since https://bugs.llvm.org/show_bug.cgi?id=38912
has been fixed by rL342055.
Precommit testing performed:
* Overnight runs of csmith comparing the output between programs
compiled with gvn-hoist enabled/disabled.
* Bootstrap builds of clang with UbSan/ASan configurations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342387
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Alexander Kornienko [Mon, 17 Sep 2018 12:11:01 +0000 (12:11 +0000)]
Use createTemporaryFile in SampleProfTest
Create a temporary file in the system temporary directory instead of creating a
file in the current directory, which may be not writable. (Fix for an issue
introduced in r342283.)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342386
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Guillaume Chatelet [Mon, 17 Sep 2018 11:09:32 +0000 (11:09 +0000)]
[llvm-exegesis] Add predefined floating point values so we can test impact of special values on latency.
Summary: This will be useful to generate many configurations and test instruction regimes (NaN, Inf, subnormal, normal).
Reviewers: courbet
Subscribers: mgorny, tschuett, llvm-commits
Differential Revision: https://reviews.llvm.org/D51858
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342369
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Strahinja Petrovic [Mon, 17 Sep 2018 11:03:40 +0000 (11:03 +0000)]
[PowerPC] Fix label address calculation for ppc64
This patch fixes calculating address of label for non-pic ppc64.
Differential Revision: https://reviews.llvm.org/D50965
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342368
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James Henderson [Mon, 17 Sep 2018 10:21:26 +0000 (10:21 +0000)]
Reland r342233: [ThinLTO] Allow setting of maximum cache size with 64-bit number
The original was reverted due to an apparent build-bot test failure,
but it looks like this is just a flaky test.
Also added a C-interface function for large values, and updated
llvm-lto's --thinlto-cache-max-size-bytes switch to take a type larger
than int.
The maximum cache size in terms of bytes is a 64-bit number. However,
the methods to set it only took unsigned previously, which meant that
the maximum cache size could not be specified above 4GB. That's quite
small compared to the output of some projects, so it makes sense to
provide the ability to set larger values in that field.
We also needed a C-interface function that provides a greater range
than the existing thinlto_codegen_set_cache_size_bytes, which also only
takes an unsigned, so this change also adds
hinlto_codegen_set_cache_size_megabytes.
Reviewed by: mehdi_amini, tejohnson, steven_wu
Differential Revision: https://reviews.llvm.org/D52023
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342366
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Alexander Shaposhnikov [Mon, 17 Sep 2018 09:45:12 +0000 (09:45 +0000)]
[llvm-objcopy] Add missing alias for --strip-all-gnu
This diff adds -S as an alias for --strip-all-gnu
(for compatibility with binutils' objcopy).
Patch by Dmitry Golovin!
Test plan: make check-all
Differential revision: https://reviews.llvm.org/D52163
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342364
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Max Kazantsev [Mon, 17 Sep 2018 06:33:29 +0000 (06:33 +0000)]
[NFC] Turn unsigned counters into boolean flags
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342360
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Kristina Brooks [Sun, 16 Sep 2018 22:21:59 +0000 (22:21 +0000)]
[DebugInfo] Fix build when std::vector::iterator is a pointer
std::vector::iterator type may be a pointer, then
iterator::value_type fails to compile since iterator is not a class,
namespace, or enumeration.
Patch by orivej (Orivej Desh)
Differential Revision: https://reviews.llvm.org/D52142
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342354
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Simon Pilgrim [Sun, 16 Sep 2018 20:28:38 +0000 (20:28 +0000)]
[X86][SSE] Always enable ISD::SRL -> ISD::MULHU for v8i16
For constant non-uniform cases we'll never introduce more and/andn/or selects than already occur in generic pre-SSE41 ISD::SRL lowering.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342352
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Simon Pilgrim [Sun, 16 Sep 2018 19:20:47 +0000 (19:20 +0000)]
[X86][AVX] Enable ISD::SRL -> ISD::MULHU for v16i16
Now that rL340913 has landed with improved v16i16 selects as shuffles.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342349
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Sanjay Patel [Sun, 16 Sep 2018 16:50:26 +0000 (16:50 +0000)]
[DAGCombiner] try to convert pow(x, 1/3) to cbrt(x)
This is a follow-up suggested in D51630 and originally proposed as an IR transform in D49040.
Copying the motivational statement by @evandro from that patch:
"This transformation helps some benchmarks in SPEC CPU2000 and CPU2006, such as 188.ammp,
447.dealII, 453.povray, and especially 300.twolf, as well as some proprietary benchmarks.
Otherwise, no regressions on x86-64 or A64."
I'm proposing to add only the minimum support for a DAG node here. Since we don't have an
LLVM IR intrinsic for cbrt, and there are no other DAG ways to create a FCBRT node yet, I
don't think we need to worry about DAG builder, legalization, a strict variant, etc. We
should be able to expand as needed when adding more functionality/transforms. For reference,
these are transform suggestions currently listed in SimplifyLibCalls.cpp:
// * cbrt(expN(X)) -> expN(x/3)
// * cbrt(sqrt(x)) -> pow(x,1/6)
// * cbrt(cbrt(x)) -> pow(x,1/9)
Also, given that we bail out on long double for now, there should not be any logical
differences between platforms (unless there's some platform out there that has pow()
but not cbrt()).
Differential Revision: https://reviews.llvm.org/D51753
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342348
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Sanjay Patel [Sun, 16 Sep 2018 15:41:56 +0000 (15:41 +0000)]
[x86] fix uses check in broadcast transform (PR38949)
https://bugs.llvm.org/show_bug.cgi?id=38949
It's not clear to me that we even need a one-use check in this fold.
Ie, 2 independent loads might be better than a load+dependent shuffle.
Note that the existing re-use tests are not affected. We actually do form a
broadcast node in those tests now because there's no extra use of the
insert_subvector node in those cases. But something later in isel pattern
matching decides that it is not worth using a broadcast for the full load in
those tests:
Legalized selection DAG: %bb.0 'test_broadcast_2f64_4f64_reuse:'
t7: v2f64,ch = load<(load 16 from %ir.p0)> t0, t2, undef:i64
t4: i64,ch = CopyFromReg t0, Register:i64 %1
t10: ch = store<(store 16 into %ir.p1)> t7:1, t7, t4, undef:i64
t18: v4f64 = insert_subvector undef:v4f64, t7, Constant:i64<0>
t20: v4f64 = insert_subvector t18, t7, Constant:i64<2>
Becomes:
t7: v2f64,ch = load<(load 16 from %ir.p0)> t0, t2, undef:i64
t4: i64,ch = CopyFromReg t0, Register:i64 %1
t10: ch = store<(store 16 into %ir.p1)> t7:1, t7, t4, undef:i64
t21: v4f64 = X86ISD::SUBV_BROADCAST t7
ISEL: Starting selection on root node: t21: v4f64 = X86ISD::SUBV_BROADCAST t7
...
Created node: t27: v4f64 = INSERT_SUBREG IMPLICIT_DEF:v4f64, t7, TargetConstant:i32<7>
Morphed node: t21: v4f64 = VINSERTF128rr t27, t7, TargetConstant:i8<1>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342347
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Sanjay Patel [Sun, 16 Sep 2018 14:59:04 +0000 (14:59 +0000)]
[x86] add failure to splat test (PR38949); NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342346
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Roman Lebedev [Sun, 16 Sep 2018 12:51:09 +0000 (12:51 +0000)]
[NFC][InstCombine] One more test pattern for comparisons with low-bit-mask.
https://rise4fun.com/Alive/UGzE <- non-canonical, but has extra uses.
https://bugs.llvm.org/show_bug.cgi?id=38123
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342345
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Simon Pilgrim [Sun, 16 Sep 2018 12:30:41 +0000 (12:30 +0000)]
Fix -Wdangling-else gcc warning. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342344
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Roman Lebedev [Sun, 16 Sep 2018 08:05:06 +0000 (08:05 +0000)]
[NFC][InstCombine] Some more tests for comparisons with low-bit-mask.
https://bugs.llvm.org/show_bug.cgi?id=38123
https://bugs.llvm.org/show_bug.cgi?id=38708
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342343
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Fangrui Song [Sat, 15 Sep 2018 21:27:46 +0000 (21:27 +0000)]
[llvm-readobj] Make some commonly used short options visibile in -help
For people who use llvm-readelf as a replacement of GNU readelf, they would like to see -d -r ... listed in llvm-readelf -help. It also helps understanding the confusing -s (which is unfortunately different in semantics).
Reviewers: phosek, ruiu, echristo
Reviewed By: ruiu, echristo
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D52129
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342339
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Nico Weber [Sat, 15 Sep 2018 19:04:27 +0000 (19:04 +0000)]
Revert r342148 (and follow-on fix attempts r342154, r342180, r342182, r342193)
Many bots buildling with make have been broken for several days, e.g.
http://lab.llvm.org:8011/builders/lld-x86_64-darwin13
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342336
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Craig Topper [Sat, 15 Sep 2018 18:54:10 +0000 (18:54 +0000)]
[InstCombine] Support (sub (sext x), (sext y)) --> (sext (sub x, y)) and (sub (zext x), (zext y)) --> (zext (sub x, y))
Summary:
If the sub doesn't overflow in the original type we can move it above the sext/zext.
This is similar to what we do for add. The overflow checking for sub is currently weaker than add, so the test cases are constructed for what is supported.
Reviewers: spatel
Reviewed By: spatel
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D52075
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342335
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Nico Weber [Sat, 15 Sep 2018 18:35:51 +0000 (18:35 +0000)]
Give InfoStreamBuilder an opt-in method to write a hash of the PDB as GUID.
Naively computing the hash after the PDB data has been generated is in practice
as fast as other approaches I tried. I also tried online-computing the hash as
parts of the PDB were written out (https://reviews.llvm.org/D51887; that's also
where all the measuring data is) and computing the hash in parallel
(https://reviews.llvm.org/D51957). This approach here is simplest, without
being slower.
Differential Revision: https://reviews.llvm.org/D51956
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342333
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Nico Weber [Sat, 15 Sep 2018 18:24:20 +0000 (18:24 +0000)]
Update microsoftDemangle() to work more like itaniumDemangle().
* Use same method of initializing the output stream and its buffer
* Allow a nullptr Status pointer
* Don't print the mangled name on demangling error
* Write to N (if it is non-nullptr)
Differential Revision: https://reviews.llvm.org/D52104
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342330
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Simon Pilgrim [Sat, 15 Sep 2018 16:57:04 +0000 (16:57 +0000)]
[X86][SSE] Fix insertps load combine test name
The existing test was called extract_lane_insertps_5123 but it was in fact doing a <6,1,2,3> shuffle. I've fixed the name and added the <5,1,2,3> test case as well.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342328
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Craig Topper [Sat, 15 Sep 2018 16:23:35 +0000 (16:23 +0000)]
[X86] Remove an fp->int->fp domain crossing in LowerUINT_TO_FP_i64.
Summary: This unfortunately adds a move, but isn't that better than going to the int domain and back?
Reviewers: RKSimon
Reviewed By: RKSimon
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D52134
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342327
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Craig Topper [Sat, 15 Sep 2018 16:23:33 +0000 (16:23 +0000)]
[X86] Fold (movmsk (setne (and X, (1 << C)), 0)) -> (movmsk (X << C))
Summary:
MOVMSK only care about the sign bit so we don't need the setcc to fill the whole element with 0s/1s. We can just shift the bit we're looking for into the sign bit. This saves a constant pool load.
Inspired by PR38840.
Reviewers: RKSimon, spatel
Reviewed By: RKSimon
Subscribers: lebedev.ri, llvm-commits
Differential Revision: https://reviews.llvm.org/D52121
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342326
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Fedor Sergeev [Sat, 15 Sep 2018 14:56:12 +0000 (14:56 +0000)]
[NFC] minor cleanup in PassManagerInternal.h
A few changes found necessary for upcoming PassInstrumentation patch:
- name() methods made const
- properly forward arguments in AnalysisPassModel::run
Separated out of the main D47858 patch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342325
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Sanjay Patel [Sat, 15 Sep 2018 14:25:44 +0000 (14:25 +0000)]
[InstCombine][x86] try harder to convert blendv intrinsic to generic IR (PR38814)
Missing optimizations with blendv are shown in:
https://bugs.llvm.org/show_bug.cgi?id=38814
If this works, it's an easier and more powerful solution than adding pattern matching
for a few special cases in the backend. The potential danger with this transform in IR
is that the condition value can get separated from the select, and the backend might
not be able to make a blendv out of it again. I don't think that's too likely, but
I've kept this patch minimal with a 'TODO', so we can test that theory in the wild
before expanding the transform.
Differential Revision: https://reviews.llvm.org/D52059
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342324
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Simon Pilgrim [Sat, 15 Sep 2018 14:20:53 +0000 (14:20 +0000)]
Fix line endings. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342323
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Roman Lebedev [Sat, 15 Sep 2018 12:04:13 +0000 (12:04 +0000)]
[InstCombine] Inefficient pattern for high-bits checking 3 (PR38708)
Summary:
It is sometimes important to check that some newly-computed value
is non-negative and only n bits wide (where n is a variable.)
There are many ways to check that:
https://godbolt.org/z/o4RB8D
The last variant seems best?
(I'm sure there are some other variations i haven't thought of..)
The last (as far i know?) pattern, non-canonical due to the extra use.
https://godbolt.org/z/aCMsPk
https://rise4fun.com/Alive/I6f
https://bugs.llvm.org/show_bug.cgi?id=38708
Reviewers: spatel, craig.topper, RKSimon
Reviewed By: spatel
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D52062
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342321
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Vedant Kumar [Sat, 15 Sep 2018 04:08:52 +0000 (04:08 +0000)]
[CodeGenPrepare] Preserve debug locs in OptimizeExtractBits
CodeGenPrepare has a transform that sinks {lshr, trunc} pairs to make it
easier for the backend to emit fancy extract-bits instructions (e.g UBFX).
Teach it to preserve debug locations and salvage debug values.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342319
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Thomas Lively [Sat, 15 Sep 2018 01:12:48 +0000 (01:12 +0000)]
[WebAssembly][NFC] Generalize operand numbers in SIMD tests
Reviewers: aheejin, dschuff
Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits
Differential Revision: https://reviews.llvm.org/D52130
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342303
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Thomas Lively [Sat, 15 Sep 2018 00:45:31 +0000 (00:45 +0000)]
[WebAssembly] SIMD shifts
Summary:
Implement shifts of vectors by i32. Since LLVM defines shifts as
binary operations between two vectors, this involves pattern matching
on splatted shift operands. For v2i64 shifts any i32 shift operands
have to be zero extended in the input and any i64 shift operands have
to be wrapped in the output. Depends on D52007.
Reviewers: aheejin, dschuff
Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits
Differential Revision: https://reviews.llvm.org/D51906
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342302
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Wei Mi [Sat, 15 Sep 2018 00:04:15 +0000 (00:04 +0000)]
Fix filesystem race issue in SampleProfTest introduced in rL342283.
Before this fix, multiple invocations of testRoundTrip will create multiple
writers which share the same file as output destination. That could introduce
filesystem race issue when multiple subtests are executed concurrently. This
patch assign writers with different files as their output destinations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342301
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Thomas Lively [Fri, 14 Sep 2018 22:35:12 +0000 (22:35 +0000)]
[WebAssembly] SIMD neg
Summary: Depends on D52007.
Reviewers: aheejin, dschuff
Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits
Differential Revision: https://reviews.llvm.org/D52009
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342296
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Zachary Turner [Fri, 14 Sep 2018 22:29:19 +0000 (22:29 +0000)]
[PDB] Make the pretty dumper output modified types.
Currently if we got something like `const Foo` we'd ignore it and
just rely on printing the unmodified `Foo` later on. However,
for testing the native reading code we really would like to be able
to see these so that we can verify that the native reader can
actually handle them. Instead of printing out the full type though,
just print out the header.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342295
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Craig Topper [Fri, 14 Sep 2018 22:26:09 +0000 (22:26 +0000)]
[BreakFalseDeps] Fix bad formatting. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342293
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