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Vladimir Marko [Tue, 23 Aug 2016 12:46:39 +0000 (12:46 +0000)]
Merge "x86/x86-64: Avoid temporary for read barrier field load."
am:
076ffd686c
Change-Id: I375a8c9e125f634c2bf16a081f6965a85077d2bb
Treehugger Robot [Tue, 23 Aug 2016 12:36:53 +0000 (12:36 +0000)]
Merge "x86/x86-64: Avoid temporary for read barrier field load."
Vladimir Marko [Fri, 12 Aug 2016 12:37:55 +0000 (13:37 +0100)]
x86/x86-64: Avoid temporary for read barrier field load.
Add TEST instructions for memory and immediate. Use the byte
version to avoid a temporary in read barrier field load.
Test: Tested with ART_USE_READ_BARRIER=true on host.
Test: Tested with ART_USE_READ_BARRIER=true ART_HEAP_POISONING=true on host.
Bug:
29966877
Bug:
12687968
Change-Id: Ia415d3c2e1ae1ff6dff11d72bbb7d96d5deed6ee
Wojciech Staszkiewicz [Tue, 23 Aug 2016 03:05:36 +0000 (03:05 +0000)]
Merge "Use full pass name when building optimizations"
am:
cf834d00de
Change-Id: I0c06484030c0900851c950360447b251efc9bc47
Chris Larsen [Tue, 23 Aug 2016 02:57:33 +0000 (02:57 +0000)]
Merge "MIPS32: Optimize R6 round(float) intrinsic."
am:
5f81cd0413
Change-Id: I4931bada1206b9be2344a8af9d61b3403c5f1171
Treehugger Robot [Tue, 23 Aug 2016 02:57:21 +0000 (02:57 +0000)]
Merge "Use full pass name when building optimizations"
Treehugger Robot [Tue, 23 Aug 2016 02:49:26 +0000 (02:49 +0000)]
Merge "MIPS32: Optimize R6 round(float) intrinsic."
Mathieu Chartier [Tue, 23 Aug 2016 01:56:10 +0000 (01:56 +0000)]
Merge "Improve art_quick_resolve_string for arm64 CC"
am:
38d4d54903
Change-Id: I469b2f930876de78cf2e176bd21a3a33fe309f29
Mathieu Chartier [Tue, 23 Aug 2016 01:46:28 +0000 (01:46 +0000)]
Merge "Improve art_quick_resolve_string for arm64 CC"
Colin Cross [Tue, 23 Aug 2016 01:30:26 +0000 (01:30 +0000)]
Merge "Fix build"
am:
48d2b14feb
Change-Id: I545501b86800329f2540b25a35cf1473f36e9076
Treehugger Robot [Tue, 23 Aug 2016 01:18:58 +0000 (01:18 +0000)]
Merge "Fix build"
Wojciech Staszkiewicz [Tue, 16 Aug 2016 23:33:00 +0000 (16:33 -0700)]
Use full pass name when building optimizations
If possible, use full pass name provided in --run-passes rather
than its base version.
Test: m test-art-host -j32
1. Prepare a run-passes file with content:
dead_code_elimination$initial
instruction_simplifier
x86_memory_operand_generation
2. Run art for a dex file like:
art -Xcompiler-option --run-passes=run-passes -Xcompiler-option
--dump-passes -classpath classes.dex Test
3. Verify that dead_code_elimination$initial string is present in
dump-passes output.
Change-Id: I92d9ed0c8b919ea03f625f549123f546dffe546b
Mathieu Chartier [Tue, 23 Aug 2016 00:44:19 +0000 (00:44 +0000)]
Merge "ART: Fix x86_64 entrypoint breakage with SYMBOL()."
am:
0585afa3ba
Change-Id: Icb7d7d3a74165f2802d2f2feeaa4f84aad239e38
Mathieu Chartier [Tue, 23 Aug 2016 00:36:19 +0000 (00:36 +0000)]
Merge "ART: Fix x86_64 entrypoint breakage with SYMBOL()."
Mathieu Chartier [Mon, 22 Aug 2016 22:38:08 +0000 (15:38 -0700)]
Improve art_quick_resolve_string for arm64 CC
Check gc_is_marking instead of the mark bit first, this makes it
that we don't go slow path if the GC is not running.
Also reduced the code by a few instructions.
EAAC CC: ~2000 -> 1256
Test: test-art-target-run-test -j4
Bug:
20323084
Change-Id: I57a1f7a52f1909e2e5dd1b2cfd2612b4a642fe37
Colin Cross [Mon, 22 Aug 2016 23:00:07 +0000 (16:00 -0700)]
Fix build
Move instruction_simplifier_arm.cc to the arm source list to fix
full-eng builds.
Change-Id: Ic7fc884f5cc2acec5579dc417acece21b7e674aa
Andreas Gampe [Mon, 22 Aug 2016 23:03:42 +0000 (23:03 +0000)]
Merge "ART: Test arena allocator alignment"
am:
38daddf297
Change-Id: Idd624bfe391ea4bc9744b755d6250c8b0b9fec9b
Treehugger Robot [Mon, 22 Aug 2016 22:58:38 +0000 (22:58 +0000)]
Merge "ART: Test arena allocator alignment"
Christina Wadsworth [Mon, 22 Aug 2016 22:55:31 +0000 (15:55 -0700)]
ART: Fix x86_64 entrypoint breakage with SYMBOL().
Change-Id: Id42b6e9a7e5444536f6fb672ec40e9f37c77a649
Mathieu Chartier [Mon, 22 Aug 2016 22:55:20 +0000 (22:55 +0000)]
Merge "ART: String DexCache asm fast path for ARM64"
am:
28715406f2
Change-Id: I8d924832747d8af4818f5cee693069c41241882e
Christina Wadsworth [Mon, 22 Aug 2016 22:55:18 +0000 (22:55 +0000)]
Merge "ART: String DexCache asm fast path for ARM"
am:
fcd81d9dbc
Change-Id: Iee42c72bc6718f97bf2024104b7d1f772970f681
Mathieu Chartier [Mon, 22 Aug 2016 22:50:04 +0000 (22:50 +0000)]
Merge "ART: String DexCache asm fast path for ARM64"
Treehugger Robot [Mon, 22 Aug 2016 22:33:42 +0000 (22:33 +0000)]
Merge "ART: String DexCache asm fast path for ARM"
Christina Wadsworth [Mon, 22 Aug 2016 22:11:53 +0000 (22:11 +0000)]
Merge "ART: String DexCache asm fast path for x86"
am:
899d60b36a
Change-Id: Ia9f0cbb5cb429bdf577dee500dc1214928ae6761
Colin Cross [Mon, 22 Aug 2016 22:11:51 +0000 (22:11 +0000)]
Merge "Only compile device codegen for device architectures"
am:
07b74307c4
Change-Id: Ib8f6e355ea8413954408d4b41ed22accd41881bd
Treehugger Robot [Mon, 22 Aug 2016 22:07:29 +0000 (22:07 +0000)]
Merge "ART: String DexCache asm fast path for x86"
Colin Cross [Mon, 22 Aug 2016 21:55:31 +0000 (21:55 +0000)]
Merge "Only compile device codegen for device architectures"
Christina Wadsworth [Mon, 22 Aug 2016 21:46:08 +0000 (21:46 +0000)]
Merge "ART: String DexCache asm fast path for x86_64"
am:
a8ed36609a
Change-Id: I8121bc2eac91bc930c199477bdadd2112413ee35
Treehugger Robot [Mon, 22 Aug 2016 21:38:58 +0000 (21:38 +0000)]
Merge "ART: String DexCache asm fast path for x86_64"
Hiroshi Yamauchi [Mon, 22 Aug 2016 21:13:36 +0000 (21:13 +0000)]
Merge "Revert "Revert "Improve the thread flip."""
am:
0b10387ced
Change-Id: I4695d621868558df12e072bf7055a9f78e752b58
Treehugger Robot [Mon, 22 Aug 2016 21:07:31 +0000 (21:07 +0000)]
Merge "Revert "Revert "Improve the thread flip."""
Andreas Gampe [Mon, 22 Aug 2016 21:03:10 +0000 (14:03 -0700)]
ART: Test arena allocator alignment
Add tests for Alloc and Realloc alignment.
Change-Id: If17b1d898200752a6a1ae25f436c73e5b7eb23f7
Test: m test-art-host-gtest-arena_allocator_test
Christina Wadsworth [Mon, 8 Aug 2016 20:08:05 +0000 (13:08 -0700)]
ART: String DexCache asm fast path for ARM64
In the entrypoints, before a string is looked up in the slow path (in
the intern table), I added assembly to check the dex cache and return a
string pointer if the string is already in the dex cache.
Test: test-art-host
Change-Id: Ic9a724848c61e4fa66e82334e2c7b20b13bf8e6c
Christina Wadsworth [Fri, 19 Aug 2016 18:24:48 +0000 (11:24 -0700)]
ART: String DexCache asm fast path for ARM
In the entrypoints, before a string is looked up in the slow path (in
the intern table), I added assembly to check the dex cache and return a
string pointer if the string is already in the dex cache.
Test: test-art-host
Change-Id: I245946b3efa9c2e4fa56f761effb90963ac22ec4
Jeff Hao [Mon, 22 Aug 2016 20:27:10 +0000 (20:27 +0000)]
Merge "Fix debugger missing handle between adding and tagging object."
am:
dffbbb6baa
Change-Id: Id894f1d2f72d00f3af4295bccae6f9050f609e1c
Colin Cross [Mon, 22 Aug 2016 20:27:02 +0000 (20:27 +0000)]
Merge "Add define needed by new vixl"
am:
621a27ed21
Change-Id: If7d59f6d9bc859b88e333b5316ffbd275bc2a49a
Jeff Hao [Mon, 22 Aug 2016 20:26:20 +0000 (20:26 +0000)]
Merge "Fix debugger missing handle between adding and tagging object."
Christina Wadsworth [Mon, 22 Aug 2016 20:22:36 +0000 (13:22 -0700)]
ART: String DexCache asm fast path for x86
In the entrypoints, before a string is looked up in the slow path (in
the intern table), I added assembly to check the dex cache and return a
string pointer if the string is already in the dex cache.
Test: test-art-host
Change-Id: Id0c337b380adc0b2bde5325745c928290d9da1b0
Treehugger Robot [Mon, 22 Aug 2016 20:19:06 +0000 (20:19 +0000)]
Merge "Add define needed by new vixl"
Jeff Hao [Mon, 22 Aug 2016 18:34:41 +0000 (11:34 -0700)]
Fix debugger missing handle between adding and tagging object.
Bug:
30951794
Change-Id: Ic9c5f296efe839a8961ab00d08afc54c5443bc17
Hiroshi Yamauchi [Sat, 20 Aug 2016 00:03:27 +0000 (17:03 -0700)]
Revert "Revert "Improve the thread flip.""
This reverts commit
db3204f87c3f7c4de89762ce9e8502a9dc25c2d8.
Improve the thread flip.
- In addition to the threads that are suspended in FullSuspendCheck(),
prioritize the resume of threads that are blocking for the thread
flip at the JNI critical section entry and threads are about to
transition to runnable (eg. blocking at the SOA entry from JNI).
- Shorten the length of the thread flip critical
section (ThreadFlipBegin/End).
- Add some systrace scopes.
- Add a read barrier for the locked objects during the thread dump in
case the thread is in the middle of flipping.
Bug:
30980189
Bug:
29517059
Bug:
12687968
Test: test-art-host, Ritz EAAC, N9 libartd boot
Change-Id: I3a903c47c0fcc746664ec376cc31dee8af3c3ecb
Christina Wadsworth [Mon, 22 Aug 2016 18:12:50 +0000 (18:12 +0000)]
Merge "ART: Adding asm support for string dex cache"
am:
82a4c22ef4
Change-Id: Ic81762140ae52b21cf52df69c39fba903346293f
Treehugger Robot [Mon, 22 Aug 2016 18:09:06 +0000 (18:09 +0000)]
Merge "ART: Adding asm support for string dex cache"
Christina Wadsworth [Mon, 22 Aug 2016 17:46:55 +0000 (10:46 -0700)]
ART: String DexCache asm fast path for x86_64
In the entrypoints, before a string is looked up in the slow
path (in the intern table), I added assembly to check the dex cache and return a
string pointer if the string is already in the dex cache.
Test: test-art-host
Change-Id: Id1b0314d597c2abff3f7d332f4ab66271f026dc1
Christina Wadsworth [Fri, 19 Aug 2016 18:23:48 +0000 (11:23 -0700)]
ART: Adding asm support for string dex cache
Added constants and offsets for the string dex cache fast paths that
will be introduced into entrypoints in subsequent commits.
Test: test-art-host
Change-Id: I19f97526e06cbedc782d5ef11359796731cdad82
Colin Cross [Sat, 20 Aug 2016 05:35:58 +0000 (22:35 -0700)]
Add define needed by new vixl
vixl now requires -DVIXL_INCLUDE_SIMULATOR_AARCH64 when including
simulator-aarch64.h.
Tests: mmma -j art, m -j build-art-tests
Change-Id: I9b9bb7ca618ccbb505de943825f5e9517542fa1b
Jeff Hao [Mon, 22 Aug 2016 16:53:32 +0000 (16:53 +0000)]
Merge "Fix debugger calling new String()."
am:
786bce8aec
Change-Id: I16f869c85b1db84ca6aaa6a77437a23445203a56
Vladimir Marko [Mon, 22 Aug 2016 16:49:17 +0000 (16:49 +0000)]
Merge "ARM/ARM64: Improve comments for kSaveEverything assembly."
am:
c97bfd4512
Change-Id: If51fb9cf83ff6a3a5f51d88d7bc20880649f67dd
Jeff Hao [Mon, 22 Aug 2016 16:47:43 +0000 (16:47 +0000)]
Merge "Fix debugger calling new String()."
Treehugger Robot [Mon, 22 Aug 2016 16:39:20 +0000 (16:39 +0000)]
Merge "ARM/ARM64: Improve comments for kSaveEverything assembly."
Vladimir Marko [Mon, 22 Aug 2016 15:02:12 +0000 (16:02 +0100)]
ARM/ARM64: Improve comments for kSaveEverything assembly.
Addresses post-submit comments for
https://android-review.googlesource.com/255290
Test: Rely on TreeHugger (just adds comments).
Bug:
30212852
Change-Id: I6ccc004774e18bbd83e3940e908cfc6c521142db
Andreas Gampe [Mon, 22 Aug 2016 15:06:40 +0000 (15:06 +0000)]
Merge "ART: Add thread offset printing hook to disassembler"
am:
792c98bb77
Change-Id: Icb25b5da5df28bef2324bcc0542abbf30abf3ea2
Roland Levillain [Mon, 22 Aug 2016 15:06:38 +0000 (15:06 +0000)]
Merge "Do not run 537-checker-arraycopy on non-Baker read barrier configs."
am:
449fe8790c
Change-Id: I1279844e28564d9e70771e9d366f683d7af9e5ea
Treehugger Robot [Mon, 22 Aug 2016 15:01:24 +0000 (15:01 +0000)]
Merge "ART: Add thread offset printing hook to disassembler"
Roland Levillain [Mon, 22 Aug 2016 14:58:05 +0000 (14:58 +0000)]
Merge "Do not run 537-checker-arraycopy on non-Baker read barrier configs."
Roland Levillain [Mon, 22 Aug 2016 12:59:21 +0000 (13:59 +0100)]
Do not run 537-checker-arraycopy on non-Baker read barrier configs.
Test: ART_USE_READ_BARRIER=true ART_READ_BARRIER_TYPE=TABLELOOKUP make test-art-host-run-test-537-checker-arraycopy
Bug:
29516905
Bug:
12687968
Change-Id: Ie77f3a7ce19f3ff78d2132ca70fb10b595eb54d5
Andreas Gampe [Sat, 20 Aug 2016 05:31:27 +0000 (05:31 +0000)]
Merge "ART: Enforce arena alignment in Realloc"
am:
ce999e7c8a
Change-Id: I5203de97e4b74bc854f13d83c4fee35a69df49bf
Treehugger Robot [Sat, 20 Aug 2016 05:19:15 +0000 (05:19 +0000)]
Merge "ART: Enforce arena alignment in Realloc"
Andreas Gampe [Sat, 20 Aug 2016 03:22:19 +0000 (20:22 -0700)]
ART: Enforce arena alignment in Realloc
Enforce the expected alignment in Realloc when the given buffer
can be expanded.
Add debug checks to prove alignment guarantees.
Change-Id: I7dbaf3ca0896f714cff07ff08f067a7c088a6c8d
Test: m test-art-host
Jeff Hao [Sat, 20 Aug 2016 01:31:39 +0000 (18:31 -0700)]
Fix debugger calling new String().
Used to return an empty string instead of the newly created String.
Requires accompanying jdwp test fix to test String contents.
Bug:
30951794
Change-Id: I27a8e0afcbe7e32a14dd3c394e44b6cd4d3c58f6
Test: mm -j24 run-jdwp-tests-host
Christina Wadsworth [Sat, 20 Aug 2016 00:35:45 +0000 (00:35 +0000)]
Merge "ART: Added DCHECKS to find alignment breakage."
am:
da0f5e72cc
Change-Id: I53087c9339afe916c86a1af8efc430069c4a0104
Treehugger Robot [Sat, 20 Aug 2016 00:26:36 +0000 (00:26 +0000)]
Merge "ART: Added DCHECKS to find alignment breakage."
Andreas Gampe [Fri, 19 Aug 2016 17:49:06 +0000 (10:49 -0700)]
ART: Add thread offset printing hook to disassembler
To prepare separation of disassembler from libart, add a function
hook to the disassembler options for thread offset name printing.
Bug:
15436106
Change-Id: I9e9b7e565ae923952c64026f675ac527b560f51b
Christina Wadsworth [Fri, 19 Aug 2016 22:58:05 +0000 (15:58 -0700)]
ART: Added DCHECKS to find alignment breakage.
Change-Id: I47aed866ec3c3858dc3ee27cb84cfaddf44009d1
Hiroshi Yamauchi [Fri, 19 Aug 2016 22:18:36 +0000 (22:18 +0000)]
Merge "Revert "Improve the thread flip.""
am:
bf042503dc
Change-Id: I12000152e9c2752b64d75297328f9521bb26b56a
Treehugger Robot [Fri, 19 Aug 2016 22:12:40 +0000 (22:12 +0000)]
Merge "Revert "Improve the thread flip.""
Mathieu Chartier [Fri, 19 Aug 2016 22:00:43 +0000 (22:00 +0000)]
Merge "ART: Fixing build breakage (sharpening DCHECK)."
am:
7a687680e2
Change-Id: I8ffbe21a473ea575e27c5f3ec8cb1688d5444426
Mathieu Chartier [Fri, 19 Aug 2016 22:00:41 +0000 (22:00 +0000)]
Merge "ART: Fixing build breakage."
am:
679e38bad5
Change-Id: I306da202445fc3d6755f764f0de202b5b0101da4
Mathieu Chartier [Fri, 19 Aug 2016 21:53:57 +0000 (21:53 +0000)]
Merge "ART: Fixing build breakage (sharpening DCHECK)."
Mathieu Chartier [Fri, 19 Aug 2016 21:53:20 +0000 (21:53 +0000)]
Merge "ART: Fixing build breakage."
Christina Wadsworth [Fri, 19 Aug 2016 21:38:01 +0000 (14:38 -0700)]
ART: Fixing build breakage (sharpening DCHECK).
Change-Id: I7ba19808dde0712739a278075da57f724166a233
Christina Wadsworth [Fri, 19 Aug 2016 20:28:19 +0000 (13:28 -0700)]
ART: Fixing build breakage.
Caused by Ic654a1fb9c1ae127dde59290bf36a23edb55ca8e.
Change-Id: Ia0c0fbcb6c8b141c5ee30a89ab6bc1c653916698
Colin Cross [Fri, 19 Aug 2016 20:19:26 +0000 (20:19 +0000)]
Merge "Fix building tests with partial arch codegen support"
am:
7521483357
Change-Id: Ifff7cd9a7fb13411423eba703b45361890158be0
Aart Bik [Fri, 19 Aug 2016 20:19:23 +0000 (20:19 +0000)]
Merge "Implemented first version of java fuzz testing script."
am:
ca1d99f530
Change-Id: I2b364a160ff1536060bb0c1b161219a052e0769a
Colin Cross [Fri, 19 Aug 2016 20:16:29 +0000 (20:16 +0000)]
Merge "Fix building tests with partial arch codegen support"
Treehugger Robot [Fri, 19 Aug 2016 20:15:03 +0000 (20:15 +0000)]
Merge "Implemented first version of java fuzz testing script."
Aart Bik [Wed, 17 Aug 2016 23:51:12 +0000 (16:51 -0700)]
Implemented first version of java fuzz testing script.
Test: run_java_fuzz_test.py
BUG=
30610121
Change-Id: I2a802476bcb0986e2891748ad85f8feac21656a8
Hiroshi Yamauchi [Fri, 19 Aug 2016 17:56:11 +0000 (17:56 +0000)]
Revert "Improve the thread flip."
This reverts commit
e61e6fdd404b8f04bd33fc3ea49e38e92e31ad69.
ThreadStress failing.
Bug:
29517059
Bug:
12687968
Change-Id: I0ee8ef04f77c5f9378e4bd21c5dedb4e435a2dc6
Colin Cross [Thu, 18 Aug 2016 20:49:53 +0000 (13:49 -0700)]
Only compile device codegen for device architectures
Change the default for ART_TARGET_CODEGEN_ARCHS to svelte, so that only
the architectures used on the device are included in the device
libraries.
Tests: m -j test-art-target
Bug:
30928847
Change-Id: I95c8a77a5520a1030abcd45e8bb6f56bc8fc7814
Colin Cross [Thu, 18 Aug 2016 20:45:24 +0000 (13:45 -0700)]
Fix building tests with partial arch codegen support
Add conditionals around more code that is only used for codegen for
specific architectures, and move a few more files into the
architecture-specific codegen lists.
Tests: ART_HOST_CODEGEN_ARCHS="x86_64 mips" m -j ART_TARGET_CODEGEN_ARCHS=svelte test-art-host
Bug:
30928847
Change-Id: I0444d15e1cafe4c9b13ff78718c3b13b544270e7
Mathieu Chartier [Fri, 19 Aug 2016 17:47:10 +0000 (17:47 +0000)]
Merge "ART: Implement a fixed size string dex cache"
am:
9c07ab332b
Change-Id: I4911322c2d0294a78f0e86abf07ecc4dfb734c9f
Mathieu Chartier [Fri, 19 Aug 2016 17:33:03 +0000 (17:33 +0000)]
Merge "ART: Implement a fixed size string dex cache"
Roland Levillain [Fri, 19 Aug 2016 15:14:29 +0000 (15:14 +0000)]
Merge "Add support for Baker read barriers in SystemArrayCopy intrinsics."
am:
6670bd2098
Change-Id: Ic796cba890a32feeb9ad7d7fbb661b9880252cb4
Roland Levillain [Fri, 19 Aug 2016 15:07:31 +0000 (15:07 +0000)]
Merge "Add support for Baker read barriers in SystemArrayCopy intrinsics."
Roland Levillain [Fri, 19 Aug 2016 11:02:34 +0000 (12:02 +0100)]
Add support for Baker read barriers in SystemArrayCopy intrinsics.
Benchmarks (ARM64) score variations on Nexus 5X with CPU
cores clamped at 960000 Hz (aosp_bullhead-userdebug build):
- Ritzperf - average (lower is better): -3.03% (slightly better)
- CaffeineMark - average (higher is better): +1.26% (slightly better)
- DeltaBlue (lower is better): -10.50% (better)
- Richards - average (lower is better): -3.36% (slightly better)
- SciMark2 - average (higher is better): +0.26% (virtually unchanged)
Details about Ritzperf benchmarks with meaningful variations
(lower is better):
- FormulaEvaluationActions.EvaluateAndApplyChanges: -13.26% (better)
- FormulaEvaluationActions.EvaluateCascadingSums: -10.94% (better)
- FormulaEvaluationActions.EvaluateComplexFormulas: -15.50% (better)
- FormulaEvaluationActions.EvaluateFibonacci: -10.41% (better)
- FormulaEvaluationActions.EvaluateLargeSums: +6.02% (worse)
Boot image code size variation on Nexus 5X
(aosp_bullhead-userdebug build):
- total ARM64 framework Oat files size change:
107047632 bytes ->
107154128 bytes (+0.10%)
- total ARM framework Oat files size change:
90932028 bytes ->
91009852 bytes (+0.09%)
Test: ART host and target (ARM, ARM64) tests + Nexus 5X boot.
Bug:
29516905
Bug:
29506760
Bug:
12687968
Change-Id: I85431368d09965687a0301ae2eb3c991f276ce5d
Hiroshi Yamauchi [Fri, 19 Aug 2016 01:36:35 +0000 (01:36 +0000)]
Merge "Improve the thread flip."
am:
f606c3a687
Change-Id: I93770b75a2d9e3ae3f3d53f37985d031425efe98
Treehugger Robot [Fri, 19 Aug 2016 01:29:50 +0000 (01:29 +0000)]
Merge "Improve the thread flip."
Matthew Gharrity [Fri, 19 Aug 2016 00:34:31 +0000 (00:34 +0000)]
Merge "Color spill slots in gc regalloc"
am:
96954301ee
Change-Id: Ibeafcda9441236cddcc2c1ce239ee5c260848a13
Treehugger Robot [Fri, 19 Aug 2016 00:30:44 +0000 (00:30 +0000)]
Merge "Color spill slots in gc regalloc"
Aart Bik [Thu, 18 Aug 2016 23:41:57 +0000 (23:41 +0000)]
Merge "Log optimization passes in verbose mode"
am:
35938f90ef
Change-Id: I71332e121fe7a2deca1932b76281ca8a79427141
Aart Bik [Thu, 18 Aug 2016 23:35:09 +0000 (23:35 +0000)]
Merge "Log optimization passes in verbose mode"
Christina Wadsworth [Thu, 18 Aug 2016 17:37:42 +0000 (10:37 -0700)]
ART: Implement a fixed size string dex cache
Previously, the string dex cache was dex_file->NumStringIds() size, and
@ruhler found that only ~1% of that cache was ever getting filled. Since
many of these string dex caches were previously 100,000+ indices in
length, we're wasting a few hundred KB per app by storing null pointers.
The intent of this project was to reduce the space the string dex cache
is using, while not regressing on time that much. This is the first of a
few CLs, which implements the new fixed size array and disables the
compiled code so it always goes slow path. In four other CLs, I
implemented a "medium path" that regresses from the previous "fast path"
only a bit in assembly in the entrypoints. @vmarko will introduce new
compiled code in the future so that we ultimately won't be regressing on
time at all. Overall, space savings have been confirmed as on the order
of 100 KB per application.
A 4-5% slow down in art-opt on Golem, and no noticeable slow down in the
interpreter. The opt slow down should be diminished once the new
compiled code is introduced.
Test: m test-art-host
Bug:
20323084
Change-Id: Ic654a1fb9c1ae127dde59290bf36a23edb55ca8e
Narayan Kamath [Thu, 18 Aug 2016 10:59:36 +0000 (10:59 +0000)]
Merge "dex_instruction: k45cc HasVarArgs"
am:
3049b2a54b
Change-Id: I46dd32227166260b1832f974256d654269ac18bb
Treehugger Robot [Thu, 18 Aug 2016 10:56:54 +0000 (10:56 +0000)]
Merge "dex_instruction: k45cc HasVarArgs"
Narayan Kamath [Mon, 15 Aug 2016 15:08:18 +0000 (16:08 +0100)]
dex_instruction: k45cc HasVarArgs
Change-Id: I3be92269bb78c96ec41ab533c5792bd369c02178
Test: make test-art-host
bug:
30550796
Wojciech Staszkiewicz [Thu, 18 Aug 2016 06:12:19 +0000 (06:12 +0000)]
Merge "Fix optimizing compiler not building for svelte"
am:
1a3fd4a646
Change-Id: Ib90de25574f62cad2aa967a5a287ac91e21325c5
Treehugger Robot [Thu, 18 Aug 2016 06:07:42 +0000 (06:07 +0000)]
Merge "Fix optimizing compiler not building for svelte"
Hiroshi Yamauchi [Tue, 2 Aug 2016 23:03:06 +0000 (16:03 -0700)]
Improve the thread flip.
- In addition to the threads that are suspended in FullSuspendCheck(),
prioritize the resume of threads that are blocking for the thread
flip at the JNI critical section entry and threads are about to
transition to runnable (eg. blocking at the SOA entry from JNI).
- Shorten the length of the thread flip critical
section (ThreadFlipBegin/End).
- Add some systrace scopes.
Bug:
29517059
Bug:
12687968
Test: test-art-host, Ritz EAAC, N9 libartd boot.
Change-Id: Idecec9936ae432c23d5f83321ba13339852018df
Dmitriy Filchenko [Thu, 18 Aug 2016 03:21:08 +0000 (03:21 +0000)]
Merge "Remove unused include."
am:
16f7008195
Change-Id: Ibf7fdc4a8adda45daa41b93c44b2c86716285f52
Treehugger Robot [Thu, 18 Aug 2016 03:17:20 +0000 (03:17 +0000)]
Merge "Remove unused include."