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Michael Gottesman [Tue, 2 Jul 2013 15:50:05 +0000 (15:50 +0000)]
[APFloat] Swap an early out check so we do not dereference str.end().
Originally if D.firstSigDigit == str.end(), we will have already dereferenced
D.firstSigDigit in the first predicate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185437
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Rafael Espindola [Tue, 2 Jul 2013 15:49:13 +0000 (15:49 +0000)]
Remove address spaces from MC.
This is dead code since PIC16 was removed in 2010. The result was an odd mix,
where some parts would carefully pass it along and others would assert it was
zero (most of the object streamer for example).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185436
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Richard Sandiford [Tue, 2 Jul 2013 15:40:22 +0000 (15:40 +0000)]
[SystemZ] Use DSGFR over DSGR in more cases
Fixes some cases where we were using full 64-bit division for (sdiv i32, i32)
and (sdiv i64, i32).
The "32" in "SDIVREM32" just refers to the second operand. The first operand
of all *DIVREM*s is a GR128.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185435
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Richard Sandiford [Tue, 2 Jul 2013 15:28:56 +0000 (15:28 +0000)]
[SystemZ] Use MVC to spill loads and stores
Try to use MVC when spilling the destination of a simple load or the source
of a simple store. As explained in the comment, this doesn't yet handle
the case where the load or store location is also a frame index, since
that could lead to two simultaneous scavenger spills, something the
backend can't handle yet. spill-02.py tests that this restriction kicks in,
but unfortunately I've not yet found a case that would fail without it.
The volatile trick I used for other scavenger tests doesn't work here
because we can't use MVC for volatile accesses anyway.
I'm planning on relaxing the restriction later, hopefully with a test
that does trigger the problem...
Tests @f8 and @f9 also showed that L(G)RL and ST(G)RL were wrongly
classified as SimpleBDX{Load,Store}. It wouldn't be easy to test for
that bug separately, which is why I didn't split out the fix as a
separate patch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185434
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Richard Sandiford [Tue, 2 Jul 2013 14:56:45 +0000 (14:56 +0000)]
[SystemZ] Add the MVC instruction
This is the first use of D(L,B) addressing, which required a fair bit
of surgery. For that reason, the patch just adds the instruction
definition and the associated assembler and disassembler support.
A later patch will actually make use of it for codegen.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185433
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Richard Osborne [Tue, 2 Jul 2013 14:46:34 +0000 (14:46 +0000)]
[XCore] Fix instruction selection for zext, mkmsk instructions.
r182680 replaced CountLeadingZeros_32 with a template function
countLeadingZeros that relies on using the correct argument type to give
the right result. The type passed in the XCore backend after this
revision was incorrect in a couple of places.
Patch by Robert Lytton.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185430
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Logan Chien [Tue, 2 Jul 2013 12:43:27 +0000 (12:43 +0000)]
Fix ARM EHABI compact model 1 and 2 without handlerdata.
According to ARM EHABI section 9.2, if the
__aeabi_unwind_cpp_pr1() or __aeabi_unwind_cpp_pr2() is
used, then the handler data must be emitted after the unwind
opcodes. The handler data consists of several words, and
should be terminated by zero.
In case that the .handlerdata directive is not specified by
the programmer, we should emit zero to terminate the handler
data.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185422
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Elena Demikhovsky [Tue, 2 Jul 2013 12:24:22 +0000 (12:24 +0000)]
Fixed alignment of code sections in the JIT mode. Added a test to the JITMemoryManager.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185421
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Tim Northover [Tue, 2 Jul 2013 09:58:53 +0000 (09:58 +0000)]
DAGCombiner: fix use-counting issue when forming zextload
DAGCombiner was counting all uses of a load node when considering whether it's
worth combining into a zextload. Really, it wants to ignore the chain and just
count real uses.
rdar://problem/
13896307
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185419
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Hal Finkel [Tue, 2 Jul 2013 05:21:11 +0000 (05:21 +0000)]
Revert r185257 (InstCombine: Be more agressive optimizing 'udiv' instrs with 'select' denoms)
I'm reverting this commit because:
1. As discussed during review, it needs to be rewritten (to avoid creating and
then deleting instructions).
2. This is causing optimizer crashes. Specifically, I'm seeing things like
this:
While deleting: i1 %
Use still stuck around after Def is destroyed: <badref> = select i1 <badref>, i32 0, i32 1
opt: /src/llvm-trunk/lib/IR/Value.cpp:79: virtual llvm::Value::~Value(): Assertion `use_empty() && "Uses remain when a value is destroyed!"' failed.
I'd guess that these will go away once we're no longer creating/deleting
instructions here, but just in case, I'm adding a regression test.
Because the code is bring rewritten, I've just XFAIL'd the original regression test. Original commit message:
InstCombine: Be more agressive optimizing 'udiv' instrs with 'select' denoms
Real world code sometimes has the denominator of a 'udiv' be a
'select'. LLVM can handle such cases but only when the 'select'
operands are symmetric in structure (both select operands are a constant
power of two or a left shift, etc.). This falls apart if we are dealt a
'udiv' where the code is not symetric or if the select operands lead us
to more select instructions.
Instead, we should treat the LHS and each select operand as a distinct
divide operation and try to optimize them independently. If we can
to simplify each operation, then we can replace the 'udiv' with, say, a
'lshr' that has a new select with a bunch of new operands for the
select.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185415
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Nick Lewycky [Tue, 2 Jul 2013 05:02:56 +0000 (05:02 +0000)]
Add missing break statements. Noticed by inspection.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185414
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Tobias Grosser [Tue, 2 Jul 2013 04:15:28 +0000 (04:15 +0000)]
Fix typo in comment
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185413
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Hal Finkel [Tue, 2 Jul 2013 03:39:34 +0000 (03:39 +0000)]
Cleanup PPC Altivec registers in CSR lists and improve VRSAVE handling
There are a couple of (small) related changes here:
1. The printed name of the VRSAVE register has been changed from VRsave to
vrsave in order to match the name accepted by GNU binutils.
2. Support for parsing vrsave has been added to the asm parser (it seems that
there was no test case specifically covering this code, so I've added one).
3. The list of Altivec registers, which was common to all calling conventions,
has been separated out. This allows us to define the base CSR lists, and then
lists for each ABI with Altivec included. This allows SjLj, for example, to
work correctly on non-Altivec targets without using unnatural definitions of
the NoRegs CSR list.
4. VRSAVE is now always reserved on non-Darwin targets and all Altivec
registers are reserved when Altivec is disabled.
With these changes, it is now possible to compile a function containing
__builtin_unwind_init() on Linux/PPC64 with debugging information. This did not
work previously because GNU binutils assumes that all .cfi_offset offsets will
be 8-byte aligned on PPC64 (and errors out if you provide a non-8-byte-aligned
offset). This is not true for the vrsave register, however, because this
register is used only on Darwin, GCC does not bother printing a .cfi_offset
entry for it (even though there is a slot in the stack frame for it as
specified by the ABI). This change allows us to do the same: we will also not
print .cfi_offset directives for vrsave.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185409
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Tobias Grosser [Tue, 2 Jul 2013 03:28:10 +0000 (03:28 +0000)]
IRVerifier: Correctly check attribute types
Add missing parenthesis such that all and not only the very first attribute
is checked.
Testing this piece of code is not possible with an LLVM-IR test file, as the
LLVM-IR parser has a similar check such that the wrong IR does not even arrive
at the verifier.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185408
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Akira Hatanaka [Tue, 2 Jul 2013 00:00:02 +0000 (00:00 +0000)]
[mips] Add new InstrItinClasses for move from/to coprocessor instructions and
floating point loads and stores.
No changes in functionality.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185399
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David Blaikie [Mon, 1 Jul 2013 23:55:52 +0000 (23:55 +0000)]
PR14728: DebugInfo: TLS variables with -gsplit-dwarf
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185398
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Michael Gottesman [Mon, 1 Jul 2013 23:54:08 +0000 (23:54 +0000)]
[APFloat] Ensure that we can properly parse strings that do not have null terminators.
rdar://
14323230
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185397
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Richard Trieu [Mon, 1 Jul 2013 23:42:53 +0000 (23:42 +0000)]
Fix up some asserts that are within an if statement. This removes the need
for assert(0 && "text").
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185396
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Jakob Stoklund Olesen [Mon, 1 Jul 2013 23:36:37 +0000 (23:36 +0000)]
Tweak some comments that referred to the old bias computations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185395
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Ulrich Weigand [Mon, 1 Jul 2013 23:33:29 +0000 (23:33 +0000)]
[PowerPC] Add support for TLS data relocations
This adds support for TLS data relocations and modifiers:
.quad target@dtpmod
.quad target@tprel
.quad target@dtprel
Currently exploited by the asm parser only.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185394
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Jakob Stoklund Olesen [Mon, 1 Jul 2013 23:19:39 +0000 (23:19 +0000)]
Remove floating point computations form SpillPlacement.cpp.
Patch by Benjamin Kramer!
Use the BlockFrequency class instead of floats in the Hopfield network
computations. This rescales the node Bias field from a [-2;2] float
range to two block frequencies BiasN and BiasP pulling in opposite
directions. This construct has a more predictable behavior when block
frequencies saturate.
The per-node scaling factors are no longer necessary, assuming the block
frequencies around a bundle are consistent.
This patch can cause the register allocator to make different spilling
decisions. The differences should be small.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185393
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Richard Trieu [Mon, 1 Jul 2013 23:06:23 +0000 (23:06 +0000)]
Change if (cond) ... else llvm_unreachable("text") to assert(cond && "text") ...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185392
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Ulrich Weigand [Mon, 1 Jul 2013 22:27:57 +0000 (22:27 +0000)]
[PowerPC] Fix 32-bit PowerPC TLS relocs
Some TLS relocs were copied incorrectly from ppc64 to ppc32,
and some were missing completely.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185390
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David Blaikie [Mon, 1 Jul 2013 21:45:25 +0000 (21:45 +0000)]
PR16493: DebugInfo with TLS on PPC crashing due to invalid relocation
Restrict the current TLS support to X86 ELF for now. Test that we don't
produce it on PPC & we can flesh that test case out with the right thing
once someone implements it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185389
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Ulrich Weigand [Mon, 1 Jul 2013 21:40:54 +0000 (21:40 +0000)]
[PowerPC] Support all condition register logical instructions
This adds support for all missing condition register logical
instructions and extended mnemonics to the asm parser.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185387
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Chad Rosier [Mon, 1 Jul 2013 21:31:10 +0000 (21:31 +0000)]
Add a newline.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185385
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Manman Ren [Mon, 1 Jul 2013 21:02:01 +0000 (21:02 +0000)]
Debug Info: clean up usage of Verify.
No functionality change. It should suffice to check the type of a debug info
metadata, instead of calling Verify.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185383
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Bill Schmidt [Mon, 1 Jul 2013 20:52:27 +0000 (20:52 +0000)]
Index: test/CodeGen/PowerPC/reloc-align.ll
===================================================================
--- test/CodeGen/PowerPC/reloc-align.ll (revision 0)
+++ test/CodeGen/PowerPC/reloc-align.ll (revision 0)
@@ -0,0 +1,34 @@
+; RUN: llc -mcpu=pwr7 -O1 < %s | FileCheck %s
+
+; This test verifies that the peephole optimization of address accesses
+; does not produce a load or store with a relocation that can't be
+; satisfied for a given instruction encoding. Reduced from a test supplied
+; by Hal Finkel.
+
+target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64"
+target triple = "powerpc64-unknown-linux-gnu"
+
+%struct.S1 = type { [8 x i8] }
+
+@main.l_1554 = internal global { i8, i8, i8, i8, i8, i8, i8, i8 } { i8 -1, i8 -6, i8 57, i8 62, i8 -48, i8 0, i8 58, i8 80 }, align 1
+
+; Function Attrs: nounwind readonly
+define signext i32 @main() #0 {
+entry:
+ %call = tail call fastcc signext i32 @func_90(%struct.S1* byval bitcast ({ i8, i8, i8, i8, i8, i8, i8, i8 }* @main.l_1554 to %struct.S1*))
+; CHECK-NOT: ld {{[0-9]+}}, main.l_1554@toc@l
+ ret i32 %call
+}
+
+; Function Attrs: nounwind readonly
+define internal fastcc signext i32 @func_90(%struct.S1* byval nocapture %p_91) #0 {
+entry:
+ %0 = bitcast %struct.S1* %p_91 to i64*
+ %bf.load = load i64* %0, align 1
+ %bf.shl = shl i64 %bf.load, 26
+ %bf.ashr = ashr i64 %bf.shl, 54
+ %bf.cast = trunc i64 %bf.ashr to i32
+ ret i32 %bf.cast
+}
+
+attributes #0 = { nounwind readonly "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf"="true" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" }
Index: lib/Target/PowerPC/PPCAsmPrinter.cpp
===================================================================
--- lib/Target/PowerPC/PPCAsmPrinter.cpp (revision 185327)
+++ lib/Target/PowerPC/PPCAsmPrinter.cpp (working copy)
@@ -679,7 +679,26 @@ void PPCAsmPrinter::EmitInstruction(const MachineI
OutStreamer.EmitRawText(StringRef("\tmsync"));
return;
}
+ break;
+ case PPC::LD:
+ case PPC::STD:
+ case PPC::LWA: {
+ // Verify alignment is legal, so we don't create relocations
+ // that can't be supported.
+ // FIXME: This test is currently disabled for Darwin. The test
+ // suite shows a handful of test cases that fail this check for
+ // Darwin. Those need to be investigated before this sanity test
+ // can be enabled for those subtargets.
+ if (!Subtarget.isDarwin()) {
+ unsigned OpNum = (MI->getOpcode() == PPC::STD) ? 2 : 1;
+ const MachineOperand &MO = MI->getOperand(OpNum);
+ if (MO.isGlobal() && MO.getGlobal()->getAlignment() < 4)
+ llvm_unreachable("Global must be word-aligned for LD, STD, LWA!");
+ }
+ // Now process the instruction normally.
+ break;
}
+ }
LowerPPCMachineInstrToMCInst(MI, TmpInst, *this);
OutStreamer.EmitInstruction(TmpInst);
Index: lib/Target/PowerPC/PPCISelDAGToDAG.cpp
===================================================================
--- lib/Target/PowerPC/PPCISelDAGToDAG.cpp (revision 185327)
+++ lib/Target/PowerPC/PPCISelDAGToDAG.cpp (working copy)
@@ -1530,6 +1530,14 @@ void PPCDAGToDAGISel::PostprocessISelDAG() {
if (GlobalAddressSDNode *GA = dyn_cast<GlobalAddressSDNode>(ImmOpnd)) {
SDLoc dl(GA);
const GlobalValue *GV = GA->getGlobal();
+ // We can't perform this optimization for data whose alignment
+ // is insufficient for the instruction encoding.
+ if (GV->getAlignment() < 4 &&
+ (StorageOpcode == PPC::LD || StorageOpcode == PPC::STD ||
+ StorageOpcode == PPC::LWA)) {
+ DEBUG(dbgs() << "Rejected this candidate for alignment.\n\n");
+ continue;
+ }
ImmOpnd = CurDAG->getTargetGlobalAddress(GV, dl, MVT::i64, 0, Flags);
} else if (ConstantPoolSDNode *CP =
dyn_cast<ConstantPoolSDNode>(ImmOpnd)) {
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185380
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Chad Rosier [Mon, 1 Jul 2013 20:49:23 +0000 (20:49 +0000)]
[ARMAsmParser] Sort the ARM register lists based on the encoding value, not the
tablegen enum values. This should be the last fix due to fallout from r185094.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185379
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Lang Hames [Mon, 1 Jul 2013 20:47:47 +0000 (20:47 +0000)]
Make PBQP require/preserve MachineLoopInfo - the spiller requires it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185378
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Sean Silva [Mon, 1 Jul 2013 20:45:12 +0000 (20:45 +0000)]
[docs] Amend confusing title
"Writing an LLVM Compiler Backend" can be misinterpreted as meaning
"backend" in the sense of "using LLVM as a backend for your compiler for
your new language". This new name is less ambiguous.
As a bonus, this brings the title in line with the file name.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185377
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Akira Hatanaka [Mon, 1 Jul 2013 20:39:53 +0000 (20:39 +0000)]
[mips] Reverse the order of source operands of shift and rotate instructions that
have three register operands.
No intended functionality changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185376
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Ulrich Weigand [Mon, 1 Jul 2013 20:39:50 +0000 (20:39 +0000)]
[PowerPC] Also add "msync" alias
This adds an alias for "msync" (which is used on Book E
systems instead of "sync").
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185375
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Akira Hatanaka [Mon, 1 Jul 2013 20:31:44 +0000 (20:31 +0000)]
[mips] Increase the number of floating point control registers available to 32.
Create a dedicated register class for floating point condition code registers and
move FCC0 from register class CCR to the new register class.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185373
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Akira Hatanaka [Mon, 1 Jul 2013 20:18:58 +0000 (20:18 +0000)]
[mips] Fix test case to check that mips64 instructions are generated.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185371
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Anton Korobeynikov [Mon, 1 Jul 2013 19:51:36 +0000 (19:51 +0000)]
Really fix the test. Sorry for the breakage...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185369
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Anton Korobeynikov [Mon, 1 Jul 2013 19:50:31 +0000 (19:50 +0000)]
Fix the test which relies on uncommitted change
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185368
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Cameron Zwarich [Mon, 1 Jul 2013 19:49:48 +0000 (19:49 +0000)]
Fix the build after r185363. Use llvm::next instead of raw next.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185367
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Anton Korobeynikov [Mon, 1 Jul 2013 19:44:44 +0000 (19:44 +0000)]
Add jump tables handling for MSP430.
Patch by Job Noorman!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185364
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Cameron Zwarich [Mon, 1 Jul 2013 19:42:46 +0000 (19:42 +0000)]
Fix PR16508.
When phis get lowered, destination copies are inserted using an iterator that is
determined once for all phis in the block, which BuildMI interprets as a request
to insert an instruction directly before the iterator. In the case of a cyclic
phi, source copies may also be inserted directly before this iterator, which can
cause source copies to be inserted before destination copies. The fix is to keep
an iterator to the last phi and then advance it while lowering each phi in order
to insert destination copies directly after the phis.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185363
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Hal Finkel [Mon, 1 Jul 2013 19:34:59 +0000 (19:34 +0000)]
Don't form PPC CTR loops for over-sized exit counts
Although you can't generate this from C on PPC64, if you have a loop using a
64-bit counter on PPC32 then you can't form a CTR-based loop for it. This had
been cauing the PPCCTRLoops pass to assert.
Thanks to Joerg Sonnenberger for providing a test case!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185361
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Tim Northover [Mon, 1 Jul 2013 19:23:10 +0000 (19:23 +0000)]
AArch64: correct CodeGen of MOVZ/MOVK combinations.
According to the AArch64 ELF specification (4.6.8), it's the
assembler's responsibility to make sure the shift amount is correct in
relocated MOVZ/MOVK instructions.
This wasn't being obeyed by either the MCJIT CodeGen or RuntimeDyldELF
(which happened to work out well for JIT tests). This commit should
make us compliant in this area.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185360
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Matt Beaumont-Gay [Mon, 1 Jul 2013 18:58:53 +0000 (18:58 +0000)]
(1) Add ".test" to test/Other/lit.local.cfg, so llvm-cov.test is actually run.
(2) Rename llvm-cov test inputs so the string "llvm-cov" doesn't get
substituted by lit within the input filenames on the RUN line.
(3) XFAIL llvm-cov.test because it asserts:
include/llvm/ADT/SmallVector.h:140: reference llvm::SmallVectorTemplateCommon<llvm::GCOVBlock *, void>::operator[](unsigned int) [T = llvm::GCOVBlock *]: Assertion `begin() + idx < end()' failed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185358
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Tim Northover [Mon, 1 Jul 2013 18:37:33 +0000 (18:37 +0000)]
Revert r185339 (ARM: relax the atomic release barrier to "dmb ishst")
Turns out I'd misread the architecture reference manual and thought
that was a load/store-store barrier, when it's not.
Thanks for pointing it out Eli!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185356
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Manman Ren [Mon, 1 Jul 2013 18:20:30 +0000 (18:20 +0000)]
Debug Info: Scope of a DebugLoc should not be null.
No functionality change. Remove handling for the null case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185354
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Ulrich Weigand [Mon, 1 Jul 2013 18:19:56 +0000 (18:19 +0000)]
[PowerPC] Fix @got references to local symbols
A @got reference must always result in a relocation, so that
the linker has a chance to set up the GOT entry, even if the
symbol happens to be local.
Add a PPCELFObjectWriter::ExplicitRelSym routine that enforces
a relocation to be emitted for GOT references.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185353
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Ulrich Weigand [Mon, 1 Jul 2013 17:21:23 +0000 (17:21 +0000)]
[PowerPC] Add "wait" instruction
This adds the "wait" instruction and its extended mnemonics.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185350
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Ulrich Weigand [Mon, 1 Jul 2013 17:06:26 +0000 (17:06 +0000)]
[PowerPC] Support "eieio" instruction
This adds support for the "eieio" instruction to
the asm parser.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185349
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Michael Gottesman [Mon, 1 Jul 2013 16:53:41 +0000 (16:53 +0000)]
Added c++ mode selector to head of SelectionDAGBuilder.h so editors open it in c++ mode instead of c mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185348
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Ulrich Weigand [Mon, 1 Jul 2013 16:52:55 +0000 (16:52 +0000)]
[PowerPC] Add some existing instructions to ppc64-encoding-bookII.s
The test case had a couple of FIXMEs where the instruction is in
fact already supported by the back-end. In some other case, while
the generic form of the instruction is not yet supported, a
specialized form is. This adds tests for those already supported
instructions / instruction forms.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185347
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Ulrich Weigand [Mon, 1 Jul 2013 16:37:52 +0000 (16:37 +0000)]
[PowerPC] Add variants of "sync" instruction
This adds support for the "sync $L" instruction with operand,
and provides aliases for "lwsync" and "ptesync".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185344
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Tim Northover [Mon, 1 Jul 2013 14:48:48 +0000 (14:48 +0000)]
ARM: relax the atomic release barrier to "dmb ishst"
I believe the full "dmb ish" barrier is not required to guarantee release
semantics for atomic operations. The weaker "dmb ishst" prevents previous
operations being reordered with a store executed afterwards, which is enough.
A key point to note (fortunately already correct) is that this barrier alone is
*insufficient* for sequential consistency, no matter how liberally placed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185339
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Justin Holewinski [Mon, 1 Jul 2013 13:00:14 +0000 (13:00 +0000)]
[NVPTX] Add support for module-scope inline asm
Since we were explicitly not calling AsmPrinter::doInitialization,
any module-scope inline asm was not being printed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185336
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Justin Holewinski [Mon, 1 Jul 2013 12:59:08 +0000 (12:59 +0000)]
[NVPTX] We dont use NVBuiltin anymore
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185335
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Justin Holewinski [Mon, 1 Jul 2013 12:59:06 +0000 (12:59 +0000)]
[NVPTX] Cut down on physical register defs
We are using virtual registers throughout now, but we still need
to keep a few physical registers per class around to keep the
infrastructure happy.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185334
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Justin Holewinski [Mon, 1 Jul 2013 12:59:04 +0000 (12:59 +0000)]
[NVPTX] 64-bit ADDC/ADDE are not legal
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185333
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Justin Holewinski [Mon, 1 Jul 2013 12:59:01 +0000 (12:59 +0000)]
[NVPTX] Fix vector loads from parameters that span multiple loads, and fix some typos
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185332
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Justin Holewinski [Mon, 1 Jul 2013 12:58:58 +0000 (12:58 +0000)]
[NVPTX] Handle signext/zeroext attributes properly
Fix a case where we were incorrectly sign-extending a value when we should have been zero-extending the value.
Also change some SIGN_EXTEND to ANY_EXTEND because we really dont care and may have more opportunity to fold subexpressions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185331
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Justin Holewinski [Mon, 1 Jul 2013 12:58:56 +0000 (12:58 +0000)]
[NVPTX] Add support for native SIGN_EXTEND_INREG where available
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185330
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Justin Holewinski [Mon, 1 Jul 2013 12:58:52 +0000 (12:58 +0000)]
[NVPTX] Add isel patterns for [reg+offset] form of ldg/ldu.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185329
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Justin Holewinski [Mon, 1 Jul 2013 12:58:48 +0000 (12:58 +0000)]
[NVPTX] Make sure we zero out high-order 24 bits for 8-bit load into 32-bit value
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185328
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NAKAMURA Takumi [Mon, 1 Jul 2013 09:51:42 +0000 (09:51 +0000)]
llvm-symbolizer: Recognize a drive letter on win32. Then "REQUIRES: shell" can be removed.
FIXME: Could we use llvm::sys::Path here?
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185322
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Serge Pavlov [Mon, 1 Jul 2013 09:02:33 +0000 (09:02 +0000)]
Added the test missed from r185080.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185316
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Sylvestre Ledru [Mon, 1 Jul 2013 08:07:52 +0000 (08:07 +0000)]
The build system is currently miss-identifying GNU/kFreeBSD as FreeBSD.
This kind of simplification is sometimes useful, but in general it's not correct.
As GNU/kFreeBSD is an hybrid system, for kernel-related issues we want to match the
build definitions used for FreeBSD, whereas for userland-related issues we want to
match the definitions used for other systems with Glibc.
The current modification adjusts the build system so that they can be distinguished,
and explicitly adds GNU/kFreeBSD to the build checks in which it belongs.
Fixes bug #16444.
Patch by Robert Millan in the context of Debian.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185311
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Arnold Schwaighofer [Mon, 1 Jul 2013 00:54:44 +0000 (00:54 +0000)]
LoopVectorize: Math functions only read rounding mode
Math functions are mark as readonly because they read the floating point
rounding mode. Because we don't vectorize loops that would contain function
calls that set the rounding mode it is safe to ignore this memory read.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185299
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Vincent Lejeune [Sun, 30 Jun 2013 21:44:06 +0000 (21:44 +0000)]
R600: Fix an unitialized variable in R600InstrInfo.cpp
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185294
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Ahmed Bougacha [Sun, 30 Jun 2013 20:44:50 +0000 (20:44 +0000)]
X86: POP*rmm: move address operand to (ins) from (outs).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185292
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Stephen Lin [Sun, 30 Jun 2013 20:26:21 +0000 (20:26 +0000)]
DeadArgumentElimination: keep return value on functions that have a live argument with the 'returned' attribute (rather than generate invalid IR); however, if both can be eliminated, both will be
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185290
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Benjamin Kramer [Sun, 30 Jun 2013 13:47:43 +0000 (13:47 +0000)]
ConstantFold: Check that truncating the other side is safe under a sext when trying to remove a sext from a compare.
Fixes PR16462.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185284
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David Majnemer [Sat, 29 Jun 2013 23:44:53 +0000 (23:44 +0000)]
ValueTracking: Teach isKnownToBeAPowerOfTwo about (ADD X, (XOR X, Y)) where X is a power of two
This allows us to simplify urem instructions involving the add+xor to
turn into simpler math.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185272
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Benjamin Kramer [Sat, 29 Jun 2013 22:51:12 +0000 (22:51 +0000)]
NVPTX: Fold otherwise unused variable into assert.
Avoids unused variable warnings in release builds.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185271
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Benjamin Kramer [Sat, 29 Jun 2013 21:17:04 +0000 (21:17 +0000)]
InstCombine: Also turn selects fed by an and into arithmetic when the types don't match.
Inserting a zext or trunc is sufficient. This pattern is somewhat common in
LLVM's pointer mangling code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185270
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Benjamin Kramer [Sat, 29 Jun 2013 20:04:19 +0000 (20:04 +0000)]
R600: Unbreak GCC build.
operator++ on an enum is not legal. clang happens to accept it anyways, I think
that's a known bug.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185269
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Vincent Lejeune [Sat, 29 Jun 2013 19:32:43 +0000 (19:32 +0000)]
R600: Support schedule and packetization of trans-only inst
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185268
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Vincent Lejeune [Sat, 29 Jun 2013 19:32:29 +0000 (19:32 +0000)]
R600: Bank Swizzle now display SCL equivalent
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185267
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Benjamin Kramer [Sat, 29 Jun 2013 18:41:17 +0000 (18:41 +0000)]
misched: Compress pairs returned by getUnderlyingObjectsForInstr.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185266
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Benjamin Kramer [Sat, 29 Jun 2013 17:52:08 +0000 (17:52 +0000)]
LoopVectorizer: Pack MemAccessInfo pairs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185263
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Benjamin Kramer [Sat, 29 Jun 2013 17:02:06 +0000 (17:02 +0000)]
Move helper classes into anonymous namespaces.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185262
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David Majnemer [Sat, 29 Jun 2013 10:28:04 +0000 (10:28 +0000)]
InstCombine: FoldGEPICmp shouldn't change sign of base pointer comparison
Changing the sign when comparing the base pointer would introduce all
sorts of unexpected things like:
%gep.i = getelementptr inbounds [1 x i8]* %a, i32 0, i32 0
%gep2.i = getelementptr inbounds [1 x i8]* %b, i32 0, i32 0
%cmp.i = icmp ult i8* %gep.i, %gep2.i
%cmp.i1 = icmp ult [1 x i8]* %a, %b
%cmp = icmp ne i1 %cmp.i, %cmp.i1
ret i1 %cmp
into:
%cmp.i = icmp slt [1 x i8]* %a, %b
%cmp.i1 = icmp ult [1 x i8]* %a, %b
%cmp = xor i1 %cmp.i, %cmp.i1
ret i1 %cmp
By preserving the original sign, we now get:
ret i1 false
This fixes PR16483.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185259
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David Majnemer [Sat, 29 Jun 2013 09:45:35 +0000 (09:45 +0000)]
InstCombine: Small whitespace cleanup in FoldGEPICmp
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185258
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David Majnemer [Sat, 29 Jun 2013 08:40:07 +0000 (08:40 +0000)]
InstCombine: Be more agressive optimizing 'udiv' instrs with 'select' denoms
Real world code sometimes has the denominator of a 'udiv' be a
'select'. LLVM can handle such cases but only when the 'select'
operands are symmetric in structure (both select operands are a constant
power of two or a left shift, etc.). This falls apart if we are dealt a
'udiv' where the code is not symetric or if the select operands lead us
to more select instructions.
Instead, we should treat the LHS and each select operand as a distinct
divide operation and try to optimize them independently. If we can
to simplify each operation, then we can replace the 'udiv' with, say, a
'lshr' that has a new select with a bunch of new operands for the
select.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185257
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Nadav Rotem [Sat, 29 Jun 2013 05:38:15 +0000 (05:38 +0000)]
We preserve the CFG and some of the analysis passes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185251
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Nadav Rotem [Sat, 29 Jun 2013 05:37:19 +0000 (05:37 +0000)]
Update docs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185250
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Manman Ren [Sat, 29 Jun 2013 05:01:19 +0000 (05:01 +0000)]
Debug Info: clean up usage of Verify.
No functionality change.
It should suffice to check the type of a debug info metadata, instead of
calling Verify. For cases where we know the type of a DI metadata, use
assert.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185249
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Richard Trieu [Fri, 28 Jun 2013 23:46:19 +0000 (23:46 +0000)]
Change assert(0 && "text") to llvm_unreachable(0 && "text")
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185243
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David Majnemer [Fri, 28 Jun 2013 23:42:03 +0000 (23:42 +0000)]
InstCombine: Optimize (1 << X) Pred CstP2 to X Pred Log2(CstP2)
We may, after other optimizations, find ourselves with IR that looks
like:
%shl = shl i32 1, %y
%cmp = icmp ult i32 %shl, 32
Instead, we should just compare the shift count:
%cmp = icmp ult i32 %y, 5
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185242
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Preston Briggs [Fri, 28 Jun 2013 23:34:23 +0000 (23:34 +0000)]
extending the interface of Dependence slightly to support future work
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185241
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Matt Arsenault [Fri, 28 Jun 2013 23:24:10 +0000 (23:24 +0000)]
Fix copypaste error in test.
Thename says it's an i32*, but it was actually creating another i8*
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185239
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Matt Arsenault [Fri, 28 Jun 2013 23:24:05 +0000 (23:24 +0000)]
Fix extra whitespace / formatting
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185238
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Jakob Stoklund Olesen [Fri, 28 Jun 2013 22:54:16 +0000 (22:54 +0000)]
Try to unbreak Linux buildbots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185237
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Jakob Stoklund Olesen [Fri, 28 Jun 2013 22:40:43 +0000 (22:40 +0000)]
Minimize precision loss when computing cyclic probabilities.
Allow block frequencies to exceed 32 bits by using the new
BlockFrequency division function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185236
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Hal Finkel [Fri, 28 Jun 2013 22:29:56 +0000 (22:29 +0000)]
PPC: Ignore spill/restore requests for VRSAVE (except on Darwin)
This fixes PR16418, which reports that a function calling
__builtin_unwind_init() asserts. The cause is that this generates a
spill/restore for VRSAVE, and we support that only on Darwin (because VRSAVE is
only really used on Darwin).
The test case checks only that we don't crash. We can add correctness checks
once someone verifies what behavior the function is supposed to have.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185235
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Daniel Malea [Fri, 28 Jun 2013 22:17:57 +0000 (22:17 +0000)]
Replace UNIXy path with os-independent one in DebugIR unit test
- should resolve windows buildbot failure
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185232
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Nadav Rotem [Fri, 28 Jun 2013 22:07:09 +0000 (22:07 +0000)]
SLP Vectorizer: Add support for trees with external users.
To support this we have to insert 'extractelement' instructions to pick the right lane.
We had this functionality before but I removed it when we moved to the multi-block design because it was too complicated.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185230
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Richard Trieu [Fri, 28 Jun 2013 21:54:25 +0000 (21:54 +0000)]
Fix broken asserts that never fire.
Change assert("text") to assert(0 && "text"). The first case is a const char *
to bool conversion, which always evaluates to true, never triggering the
assert. The second case will always trigger the assert.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185227
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Jakob Stoklund Olesen [Fri, 28 Jun 2013 21:51:18 +0000 (21:51 +0000)]
Fix a bad overflow check pointed out by Ben.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185226
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Daniel Malea [Fri, 28 Jun 2013 21:49:53 +0000 (21:49 +0000)]
Fix Windows/Darwin build error in DebugIR unit tests
- mistakenly used get_current_dir() linux function
- replaced with getcwd/_getcwd as appropriate for current platform
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185225
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Andrew Kaylor [Fri, 28 Jun 2013 21:40:16 +0000 (21:40 +0000)]
Revising the MCJIT ObjectCache interface to allow subclasses to avoid retaining references to returned objects
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185221
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David Blaikie [Fri, 28 Jun 2013 21:28:01 +0000 (21:28 +0000)]
Remove unused member
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185219
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Jakob Stoklund Olesen [Fri, 28 Jun 2013 21:10:25 +0000 (21:10 +0000)]
Eliminate an assortment of undefined behavior.
Hopefully, this fixes the PPC64 buildbots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185218
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