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Huang Rui [Sun, 21 Jul 2019 14:27:50 +0000 (22:27 +0800)]
drm/amdgpu: skip mec2 jump table loading for renoir
Renoir need not load mec2 jump table with psp.
Acked-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Aaron Liu <aaron.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Huang Rui [Sun, 21 Jul 2019 12:58:31 +0000 (20:58 +0800)]
drm/amdgpu: use direct loading on renoir vcn for the moment
PSP has issue for renoir, that will cause VCN fw failed to be loaded. So use
direct loading for the moment till the issue is addressed.
Acked-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Aaron Liu <aaron.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Aaron Liu [Fri, 9 Aug 2019 15:46:36 +0000 (10:46 -0500)]
drm/amdgpu: set fw default loading by psp for renoir
By default, set amdgpu ucode type to AMDGPU_FW_LOAD_PSP.
Acked-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Aaron Liu <aaron.liu@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Aaron Liu [Tue, 16 Jul 2019 09:36:43 +0000 (17:36 +0800)]
drm/amdgpu: update lbpw for renoir
enable gfx_v9_0_init_lbpw for renoir
Acked-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Aaron Liu <aaron.liu@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Aaron Liu [Tue, 16 Jul 2019 09:09:47 +0000 (17:09 +0800)]
drm/amdgpu: enable power gating for renoir
enable gfx power gating for renoir
Acked-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Aaron Liu <aaron.liu@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Aaron Liu [Mon, 12 Aug 2019 16:32:56 +0000 (11:32 -0500)]
drm/amdgpu: enable clock gating for renoir
enable gfx&common clock gating for renoir
Acked-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Aaron Liu <aaron.liu@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Leo Liu [Mon, 15 Jul 2019 13:21:57 +0000 (09:21 -0400)]
drm/amdgpu: add VCN2.0 to Renoir IP blocks
Thus enable VCN2.0 for Renoir
Acked-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Leo Liu [Mon, 15 Jul 2019 14:14:17 +0000 (10:14 -0400)]
drm/amdgpu: enable Doorbell support for Renoir (v2)
Add VCN range aperture to NBIO 7.0
v2: rebase (Alex)
Acked-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Leo Liu [Mon, 15 Jul 2019 13:01:51 +0000 (09:01 -0400)]
drm/amdgpu: enable Renoir VCN firmware loading
By adding new Renoir VCN firmware
Acked-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Huang Rui [Wed, 24 Jul 2019 19:03:25 +0000 (14:03 -0500)]
drm/amdgpu: add sdma golden settings for renoir
This patch adds sdma golden settings for renoir asic.
Acked-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Huang Rui [Sat, 22 Jun 2019 18:51:57 +0000 (02:51 +0800)]
drm/amdgpu: add gfx golden settings for renoir (v2)
This patch adds gfx golden settings for renoir real asic.
v2: update settings (Alex)
Acked-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Aaron Liu [Fri, 9 Aug 2019 15:32:15 +0000 (10:32 -0500)]
drm/amdgpu: add psp_v12_0 for renoir (v2)
1. Add psp ip block
2. Use direct loading type by default and it can also config psp
loading type.
3. Bypass sos fw loading and xgmi&ras interface
v2: drop TA loading
Acked-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Aaron Liu <aaron.liu@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Aaron Liu [Wed, 24 Jul 2019 18:56:27 +0000 (13:56 -0500)]
drm/amdgpu: set rlc funcs for renoir
add gfx_v9_0_rlc_funcs for renoir
Acked-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Aaron Liu <aaron.liu@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Aaron Liu [Mon, 8 Apr 2019 05:14:28 +0000 (13:14 +0800)]
drm/amdgpu: add asic funcs for renoir
add asic funcs for renoir, init soc15_asic_funcs
Acked-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Aaron Liu <aaron.liu@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Aaron Liu [Wed, 24 Jul 2019 18:55:38 +0000 (13:55 -0500)]
drm/amdgpu: enable dce virtual ip module for Renoir
Acked-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Aaron Liu <aaron.liu@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Aaron Liu [Wed, 24 Jul 2019 18:53:17 +0000 (13:53 -0500)]
drm/amdgpu: fix no interrupt issue for renoir emu
In renoir's ih model, there's a change in mmIH_CHICKEN
register, that limits IH to use physical address directly.
Those chicken bits need to be programmed first.
Acked-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Aaron Liu <aaron.liu@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Huang Rui [Tue, 30 Oct 2018 03:43:02 +0000 (11:43 +0800)]
drm/amdgpu: add renoir pci id
Add Renoir PCI id support.
Acked-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Huang Rui [Wed, 24 Jul 2019 18:50:22 +0000 (13:50 -0500)]
drm/amdgpu: set ip blocks for renoir
Enable ip blocks for renoir.
Acked-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Huang Rui [Thu, 8 Aug 2019 19:58:51 +0000 (14:58 -0500)]
drm/amdgpu: add sdma support for renoir
Add renoir checks to appropriate places.
Acked-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Huang Rui [Wed, 24 Jul 2019 18:47:52 +0000 (13:47 -0500)]
drm/amdgpu: add gfx support for renoir
Add Renoir checks to gfx9 code.
Acked-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Huang Rui [Wed, 24 Jul 2019 18:43:16 +0000 (13:43 -0500)]
drm/amdgpu: set fw load type for renoir
This patch sets fw load type as direct for renoir for the moment.
Will switch to psp when psp is ready.
Acked-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Huang Rui [Wed, 24 Jul 2019 18:42:16 +0000 (13:42 -0500)]
drm/amdgpu: add gmc v9 supports for renoir
Add gfx memory controller support for renoir.
Acked-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Huang Rui [Wed, 24 Jul 2019 18:39:36 +0000 (13:39 -0500)]
drm/amdgpu: add soc15 common ip block support for renoir
This patch adds common ip support for renoir.
Acked-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Huang Rui [Wed, 24 Jul 2019 18:38:15 +0000 (13:38 -0500)]
drm/amdgpu: add renoir support for gpu_info and ip block setting
This patch adds renoir support for gpu_info firmware and ip block setting.
Acked-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Huang Rui [Wed, 24 Jul 2019 18:36:09 +0000 (13:36 -0500)]
drm/amdgpu: add renoir asic_type enum
This patch adds renoir to amd_asic_type enum and amdgpu_asic_name[].
Acked-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Huang Rui [Thu, 25 Oct 2018 11:49:10 +0000 (19:49 +0800)]
drm/amdgpu: add renoir header files (v2)
This patch add all renoir header files.
v2: clean up headers (Alex)
Acked-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Colin Ian King [Mon, 5 Aug 2019 10:29:40 +0000 (11:29 +0100)]
drm/amd/powerplay: remove redundant duplicated return check
The check on ret is duplicated in two places, it is redundant code.
Remove it.
Addresses-Coverity: ("Logically dead code")
Fixes:
b94afb61cdae ("drm/amd/powerplay: honor hw limit on fetching metrics data for navi10")
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Colin Ian King <colin.king@canonical.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christophe JAILLET [Fri, 9 Aug 2019 20:12:19 +0000 (22:12 +0200)]
drm/amd/display: Fix a typo - dce_aduio_mask --> dce_audio_mask
This should be 'dce_audio_mask', not 'dce_aduio_mask'.
Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Thu, 8 Aug 2019 05:29:23 +0000 (00:29 -0500)]
drm/amd/display: use kvmalloc for dc_state (v2)
It's large and doesn't need contiguous memory. Fixes
allocation failures in some cases.
v2: kvfree the memory.
Reviewed-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Pierre-Eric Pelloux-Prayer [Tue, 6 Aug 2019 16:27:26 +0000 (18:27 +0200)]
drm/amdgpu: fix gfx9 soft recovery
The SOC15_REG_OFFSET() macro wasn't used, making the soft recovery fail.
v2: use WREG32_SOC15 instead of WREG32 + SOC15_REG_OFFSET
Signed-off-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Le Ma [Fri, 9 Aug 2019 07:44:22 +0000 (15:44 +0800)]
drm/amdgpu/powerplay: update Arcturus smu version in new place
Follow patch below:
drm/amd/powerplay: re-define smu interface version for smu v11
Signed-off-by: Le Ma <le.ma@amd.com>
Reviewed-by: Kevin Wang <kevin1.wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Le Ma [Fri, 9 Aug 2019 10:58:42 +0000 (18:58 +0800)]
drm/amdgpu: enable mmhub clock gating for Arcturus
Init MC_MGCG/LS flag. Also apply to athub CG.
Signed-off-by: Le Ma <le.ma@amd.com>
Reviewed-by: Kevin Wang <kevin1.wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Le Ma [Fri, 9 Aug 2019 10:57:15 +0000 (18:57 +0800)]
drm/amdgpu: add mmhub clock gating for Arcturus
Add 2 mmhub instances CG
Signed-off-by: Le Ma <le.ma@amd.com>
Reviewed-by: Kevin Wang <kevin1.wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Le Ma [Fri, 9 Aug 2019 07:13:38 +0000 (15:13 +0800)]
drm/amdgpu: increase CGCG gfx idle threshold for Arcturus
Follow the hw spec, and no need to consider gfxoff on Arcturus
Signed-off-by: Le Ma <le.ma@amd.com>
Reviewed-by: Kevin Wang <kevin1.wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Le Ma [Fri, 9 Aug 2019 07:24:56 +0000 (15:24 +0800)]
drm/amdgpu: add GFX_CP_LS flag to Arcturus
Missed AMD_CG_SUPPORT_GFX_CP_LS accidently when commit patch before
drm/amdgpu: enable gfx clock gating for Arcturus
Signed-off-by: Le Ma <le.ma@amd.com>
Reviewed-by: Kevin Wang <kevin1.wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tao Zhou [Fri, 9 Aug 2019 09:39:06 +0000 (17:39 +0800)]
drm/amdgpu: remove ras block's feature status info in sysfs
feature mask info is enough for rocm tool,
"cat /sys/class/drm/card0/device/ras/features" will get the
info like this:
feature mask: 0x3ffb
Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Kenneth Feng [Tue, 23 Jul 2019 04:16:25 +0000 (12:16 +0800)]
drm/amd/powerplay: change smu_read_sensor sequence in smu
change the smu_read_sensor sequence to:
asic specific sensor read -> smu v11 specific sensor read -> smu v11 common sensor read
Signed-off-by: Kenneth Feng <kenneth.feng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Le Ma [Thu, 8 Aug 2019 06:54:12 +0000 (14:54 +0800)]
drm/amdgpu: split athub clock gating from mmhub
Untie the bind of get/set athub CG state from mmhub, for cosmetic fix and Asic
not using mmhub 1.0. Besides, also fix wrong athub CG state in amdgpu_pm_info.
Signed-off-by: Le Ma <le.ma@amd.com>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Le Ma [Wed, 7 Aug 2019 07:48:44 +0000 (15:48 +0800)]
drm/amdgpu: enable sdma clock gating for Arcturus
Init sdma MGCG/LS flag
Signed-off-by: Le Ma <le.ma@amd.com>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
Reviewed-by: Kenneth Feng <kenneth.feng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Le Ma [Wed, 7 Aug 2019 07:47:34 +0000 (15:47 +0800)]
drm/amdgpu: add sdma clock gating for Arcturus
Add ARCTURUS case in sdma set clockgating function
Signed-off-by: Le Ma <le.ma@amd.com>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
Reviewed-by: Kenneth Feng <kenneth.feng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Le Ma [Wed, 7 Aug 2019 07:45:25 +0000 (15:45 +0800)]
drm/amdgpu: support sdma clock gating for more instances
Shorten the code with RREG32_SDMA/WREG32_SDMA macro in CG part.
Signed-off-by: Le Ma <le.ma@amd.com>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
Reviewed-by: Kenneth Feng <kenneth.feng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Le Ma [Wed, 7 Aug 2019 07:17:38 +0000 (15:17 +0800)]
drm/amdgpu: enable hdp clock gating for Arcturus
Init hdp MGCG/LS flag as Vega20
Signed-off-by: Le Ma <le.ma@amd.com>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
Reviewed-by: Kenneth Feng <kenneth.feng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Le Ma [Wed, 7 Aug 2019 07:16:19 +0000 (15:16 +0800)]
drm/amdgpu: add hdp clock gating for Arcturus
Add hdp CGLS for Arcturus in set common clockgating function
Signed-off-by: Le Ma <le.ma@amd.com>
Reviewed-by: Kenneth Feng <kenneth.feng@amd.com>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Le Ma [Wed, 7 Aug 2019 06:52:38 +0000 (14:52 +0800)]
drm/amdgpu: enable gfx clock gating for Arcturus
Init gfx MGCG/LS and CGCG/LS flag.
Signed-off-by: Le Ma <le.ma@amd.com>
Reviewed-by: Kenneth Feng <kenneth.feng@amd.com>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Le Ma [Wed, 7 Aug 2019 06:59:07 +0000 (14:59 +0800)]
drm/amdgpu: add gfx clock gating for Arcturus
Add ARCTURUS case in gfx set clockgating function. No 3d clock on Arcturus.
Signed-off-by: Le Ma <le.ma@amd.com>
Reviewed-by: Kenneth Feng <kenneth.feng@amd.com>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tao Zhou [Wed, 7 Aug 2019 04:21:22 +0000 (12:21 +0800)]
drm/amdgpu: create mmhub ras framework
enable mmhub ras feature and create sysfs/debugfs node for mmhub
Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tao Zhou [Tue, 6 Aug 2019 12:22:49 +0000 (20:22 +0800)]
drm/amdgpu: support mmhub ras in amdgpu ras
call mmhub ras query/inject in amdgpu ras
Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tao Zhou [Tue, 6 Aug 2019 12:15:55 +0000 (20:15 +0800)]
drm/amdgpu: add amdgpu_mmhub_funcs definition
add amdgpu_mmhub_funcs definition and initialize it,
prepare for mmhub ras enablement
Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tao Zhou [Wed, 7 Aug 2019 06:27:42 +0000 (14:27 +0800)]
drm/amdgpu: add sub block parameter in ras inject command
ras sub block index could be passed from shell command
Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Guchun Chen <guchun.chen@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Guchun Chen [Thu, 8 Aug 2019 06:54:41 +0000 (14:54 +0800)]
drm/amdgpu: add check to avoid array bound issue
Sub_block_index can be passed from user level, so
add one check before accessing the array first to
prevent array index out of bound problem.
Signed-off-by: Guchun Chen <guchun.chen@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
tiancyin [Thu, 8 Aug 2019 05:20:40 +0000 (13:20 +0800)]
drm/amd/powerplay: update smu11_driver_if_navi10.h
update the smu11_driver_if_navi10.h since navi14 smu fw
update to 53.12
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: tiancyin <tianci.yin@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
tiancyin [Thu, 8 Aug 2019 03:57:28 +0000 (11:57 +0800)]
drm/amd/powerplay: re-define smu interface version for smu v11
[why]
navi14 share same defination of smu interface version with navi10,
anyone of them update the version may break the other one's
version checking.
[how]
create different version defination, so that they can
update their version separately.
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: tiancyin <tianci.yin@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Wed, 7 Aug 2019 19:37:26 +0000 (14:37 -0500)]
drm/amdgpu: add navi14 PCI ID
Add the navi14 PCI device id.
Reviewed-by: Xiaojie Yuan <xiaojie.yuan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Michel Dänzer [Wed, 24 Jul 2019 15:56:28 +0000 (17:56 +0200)]
drm/amdgpu: Update pitch on page flips without DC as well
DC already handles this correctly since amdgpu minor version 31. Bump
the minor version again so that xf86-video-amdgpu can take advantage of
this working without DC as well now.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
David Francis [Wed, 7 Aug 2019 14:25:48 +0000 (10:25 -0400)]
drm/amd/display: Remove drm_dsc_dc.c
This file was accidentally added to the driver during
Navi promotion
Nothing includes it. No makefile attempts to compile it, and
it would fail compilation if they tried
Remove it
Signed-off-by: David Francis <David.Francis@amd.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>w
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Xiaojie Yuan [Thu, 1 Aug 2019 07:22:59 +0000 (15:22 +0800)]
drm/amdgpu: enable vcn clock gating for navi12
enables vcn medium grained clock gating
Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Xiaojie Yuan [Thu, 1 Aug 2019 07:19:10 +0000 (15:19 +0800)]
drm/amdgpu: enable athub clock gating for navi12
enables athub medium grained clock gating and memory light sleep
Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Xiaojie Yuan [Tue, 6 Aug 2019 05:42:03 +0000 (13:42 +0800)]
drm/amdgpu/athub2: set clock gating for navi12
add navi12 define
Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Xiaojie Yuan [Thu, 1 Aug 2019 07:01:23 +0000 (15:01 +0800)]
drm/amdgpu: enable ih clock gating for navi12
enables ih clock gating
Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Xiaojie Yuan [Thu, 1 Aug 2019 07:39:59 +0000 (15:39 +0800)]
drm/amdgpu: enable mmhub clock gating for navi12
enables mmhub medium grained clock gating and memory light sleep
Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Xiaojie Yuan [Thu, 1 Aug 2019 07:47:15 +0000 (15:47 +0800)]
drm/amdgpu/mmhub2: set clock gating for navi12
add navi12 define
Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Xiaojie Yuan [Tue, 30 Jul 2019 04:18:55 +0000 (12:18 +0800)]
drm/amdgpu: enable sdma clock gating for navi12
enables sdma medium grained clock gating and memory light sleep
Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Xiaojie Yuan [Tue, 30 Jul 2019 04:16:02 +0000 (12:16 +0800)]
drm/amdgpu/sdma5: set sdma clock gating for navi12
add navi12 define
Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Xiaojie Yuan [Thu, 1 Aug 2019 07:00:28 +0000 (15:00 +0800)]
drm/amdgpu: enable hdp clock gating for navi12
enables hdp medium grained clock gating and memory light sleep
Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Xiaojie Yuan [Tue, 30 Jul 2019 03:28:20 +0000 (11:28 +0800)]
drm/amdgpu: enable gfx clock gatings for navi12
enables following gfx clock gating features:
- medium grained clock gating
- medium grained light sleep
- coarse grained clock gating
- cp memory light sleep
- rlc memory light sleep
CGLS (Coarse Grained Light Sleep) will break s3, so don't enable it.
Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Marek Olšák [Fri, 2 Aug 2019 21:44:06 +0000 (17:44 -0400)]
Revert "drm/amdgpu: fix transform feedback GDS hang on gfx10 (v2)"
This reverts commit
9ed2c993d723129f85101e51b2ccc36ef5400a67.
SET_CONFIG_REG writes to memory if register shadowing is enabled,
causing a VM fault.
NGG streamout is unstable anyway, so all UMDs should use legacy
streamout. I think Mesa is the only driver using NGG streamout.
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Le Ma <Le.Ma@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Dave Airlie [Mon, 12 Aug 2019 04:20:21 +0000 (14:20 +1000)]
Merge tag 'drm-next-5.4-2019-08-09' of git://people.freedesktop.org/~agd5f/linux into drm-next
drm-next-5.4-2019-08-09:
Same as drm-next-5.4-2019-08-06, but with the
readq/writeq stuff fixed and 5.3-rc3 backmerged.
amdgpu:
- Add navi14 support
- Add navi12 support
- Add Arcturus support
- Enable mclk DPM for Navi
- Misc DC display fixes
- Add perfmon support for DF
- Add scatter/gather display support for Raven
- Improve SMU handling for GPU reset
- RAS support for GFX
- Drop last of drmP.h
- Add support for wiping memory on buffer release
- Allow cursor async updates for fb swaps
- Misc fixes and cleanups
amdkfd:
- Add navi14 support
- Add navi12 support
- Add Arcturus support
- CWSR trap handlers updates for gfx9, 10
- Drop last of drmP.h
- Update MAINTAINERS
radeon:
- Misc fixes and cleanups
- Make kexec more reliable by tearing down the GPU
ttm:
- Add release_notify callback
uapi:
- Add wipe memory on release flag for buffer creation
Signed-off-by: Dave Airlie <airlied@redhat.com>
[airlied: resolved conflicts with ttm resv moving]
From: Alex Deucher <alexdeucher@gmail.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190809184807.3381-1-alexander.deucher@amd.com
Alex Deucher [Fri, 9 Aug 2019 18:07:28 +0000 (13:07 -0500)]
Merge tag 'v5.3-rc3' into drm-next-5.4
Linux 5.3-rc3
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tao Zhou [Fri, 9 Aug 2019 07:57:51 +0000 (15:57 +0800)]
drm/amdgpu: remove RREG64/WREG64
atomic 64 bits REG operations are useless currently
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tao Zhou [Fri, 9 Aug 2019 07:57:50 +0000 (15:57 +0800)]
drm/amdgpu: implement UMC 64 bits REG operations
implement 64 bits operations via 32 bits interface
v2: make use of lower_32_bits() and upper_32_bits() macros
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tao Zhou [Wed, 7 Aug 2019 02:28:54 +0000 (10:28 +0800)]
drm/amdgpu: replace readq/writeq with atomic64 operations
what we really want is a read or write that is guaranteed to be 64 bits
at a time, atomic64 operations are supported on all architectures
Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Dave Airlie [Fri, 9 Aug 2019 06:04:15 +0000 (16:04 +1000)]
Merge tag 'drm-misc-next-2019-08-08' of git://anongit.freedesktop.org/drm/drm-misc into drm-next
drm-misc-next for 5.4:
UAPI Changes:
- HDCP: Add a Content protection type property
Cross-subsystem Changes:
Core Changes:
- Continue to rework the include dependencies
- fb: Remove the unused drm_gem_fbdev_fb_create function
- drm-dp-helper: Make the link rate calculation more tolerant to
non-explicitly defined, yet supported, rates
- fb-helper: Map DRM client buffer only when required, and instanciate a
shadow buffer when the device has a dirty function or says so
- connector: Add a helper to link the DDC adapter used by that connector to
the userspace
- vblank: Switch from DRM_WAIT_ON to wait_event_interruptible_timeout
- dma-buf: Fix a stack corruption
- ttm: Embed a drm_gem_object struct to make ttm_buffer_object a
superclass of GEM, and convert drivers to use it.
- hdcp: Improvements to report the content protection type to the
userspace
Driver Changes:
- Remove drm_gem_prime_import/export from being defined in the drivers
- Drop DRM_AUTH usage from drivers
- Continue to drop drmP.h
- Convert drivers to the connector ddc helper
- ingenic: Add support for more panel-related cases
- komeda: Support for dual-link
- lima: Reduce logging
- mpag200: Fix the cursor support
- panfrost: Export GPU features register to userspace through an ioctl
- pl111: Remove the CLD pads wiring support from the DT
- rockchip: Rework to use DRM PSR helpers, fix a bug in the VOP_WIN_GET
macro
- sun4i: Improve support for color encoding and range
- tinydrm: Rework SPI support, improve MIPI-DBI support, move to drm/tiny
- vkms: Rework of the CRC tracking
- bridges:
- sii902x: Add support for audio graph card
- tc358767: Rework AUX data handling code
- ti-sn65dsi86: Add Debugfs and proper DSI mode flags support
- panels
- Support for GiantPlus GPM940B0, Sharp LQ070Y3DG3B, Ortustech
COM37H3M, Novatek NT39016, Sharp LS020B1DD01D, Raydium RM67191,
Boe Himax8279d, Sharp LD-D5116Z01B
- Conversion of the device tree bindings to the YAML description
- jh057n00900: Rework the enable / disable path
- fbdev:
- ssd1307fb: Support more devices based on that controller
Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Maxime Ripard <maxime.ripard@bootlin.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190808121423.xzpedzkpyecvsiy4@flea
John Keeping [Wed, 3 Jul 2019 09:51:11 +0000 (10:51 +0100)]
drm/rockchip: fix VOP_WIN_GET macro
Commit
9a61c54b9bff ("drm/rockchip: vop: group vop registers") seems to
have unintentionally changed the defintion of this macro. Since it is
unused, this was not spotted but any attempt to use it results in
compilation errors.
Revert to the previous definition.
Fixes:
9a61c54b9bff ("drm/rockchip: vop: group vop registers")
Signed-off-by: John Keeping <john@metanate.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20190703095111.29117-1-john@metanate.com
Rob Herring [Wed, 7 Aug 2019 14:52:47 +0000 (10:52 -0400)]
Revert "drm/gem: Rename drm_gem_dumb_map_offset() to drm_gem_map_offset()"
This reverts commit
220df83a5394fbf7c1486ba7848794b7b351d598.
Turns out drm_gem_dumb_map_offset really only worked for the dumb buffer
case, so revert the name change.
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Sean Paul <sean@poorly.run>
Link: https://patchwork.freedesktop.org/patch/msgid/20190807145253.2037-2-sean@poorly.run
Rob Herring [Wed, 7 Aug 2019 14:52:48 +0000 (10:52 -0400)]
Revert "drm/panfrost: Use drm_gem_map_offset()"
This reverts commit
583bbf46133c726bae277e8f4e32bfba2a528c7f.
Turns out we need mmap to work on imported BOs even if the current code
is buggy.
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Sean Paul <sean@poorly.run>
Link: https://patchwork.freedesktop.org/patch/msgid/20190807145253.2037-3-sean@poorly.run
Emil Velikov [Mon, 27 May 2019 08:17:39 +0000 (09:17 +0100)]
drm/vgem: drop DRM_AUTH usage from the driver
The authentication can be circumvented, by design, by using the render
node.
From the driver POV there is no distinction between primary and render
nodes, thus we can drop the token.
Cc: David Airlie <airlied@linux.ie>
Cc: Daniel Vetter <daniel@ffwll.ch>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20190527081741.14235-11-emil.l.velikov@gmail.com
Emil Velikov [Mon, 27 May 2019 08:17:35 +0000 (09:17 +0100)]
drm/msm: drop DRM_AUTH usage from the driver
The authentication can be circumvented, by design, by using the render
node.
From the driver POV there is no distinction between primary and render
nodes, thus we can drop the token.
Cc: Rob Clark <robdclark@gmail.com>
Cc: Sean Paul <sean@poorly.run>
Cc: freedreno@lists.freedesktop.org
Cc: David Airlie <airlied@linux.ie>
Cc: Daniel Vetter <daniel@ffwll.ch>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20190527081741.14235-7-emil.l.velikov@gmail.com
Emil Velikov [Wed, 22 May 2019 15:02:19 +0000 (16:02 +0100)]
drm/nouveau: remove open-coded drm_invalid_op()
Cc: Ben Skeggs <bskeggs@redhat.com>
Cc: nouveau@lists.freedesktop.org
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20190522150219.13913-2-emil.l.velikov@gmail.com
Sean Paul [Wed, 7 Aug 2019 14:20:58 +0000 (10:20 -0400)]
Revert "drm/nouveau: remove open-coded drm_invalid_op()"
This reverts commit
ccdae42575695ab442941310bd67c7ed1714e273.
Mandatory review was missing from this patch.
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Acked-by: Emil Velikov <emil.velikov@collabora.com>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20190807142101.251400-6-sean@poorly.run
Sean Paul [Wed, 7 Aug 2019 14:20:57 +0000 (10:20 -0400)]
Revert "drm/msm: drop DRM_AUTH usage from the driver"
This reverts commit
88209d2c5035737f96bcfc2fd73c0fd8d80e9bf1.
Mandatory review was missing from this patch.
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Acked-by: Emil Velikov <emil.velikov@collabora.com>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20190807142101.251400-5-sean@poorly.run
Sean Paul [Wed, 7 Aug 2019 14:20:56 +0000 (10:20 -0400)]
Revert "drm/vgem: drop DRM_AUTH usage from the driver"
This reverts commit
e4eee93d25776da998ec2dfaabe7d2206598d26d.
Mandatory review was missing from this patch.
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Acked-by: Emil Velikov <emil.velikov@collabora.com>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20190807142101.251400-4-sean@poorly.run
Sean Paul [Wed, 7 Aug 2019 14:20:55 +0000 (10:20 -0400)]
Revert "Revert "drm/panfrost: Use drm_gem_map_offset()""
This reverts commit
be855382bacb5ccfd24f9be6098d87acf4cfbb15.
Mandatory review was missing from this patch.
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20190807142101.251400-3-sean@poorly.run
Sean Paul [Wed, 7 Aug 2019 14:20:54 +0000 (10:20 -0400)]
Revert "Revert "drm/gem: Rename drm_gem_dumb_map_offset() to drm_gem_map_offset()""
This reverts commit
415d2e9e07574d3de63b8df77dc686e0ebf64865.
Mandatory review was missing from this patch.
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20190807142101.251400-2-sean@poorly.run
Sam Ravnborg [Sun, 4 Aug 2019 20:16:29 +0000 (22:16 +0200)]
drm/sti: fix opencoded use of drm_panel_*
Use the drm_panel_(enable|disable|get_modes) functions.
Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
Cc: Benjamin Gaignard <benjamin.gaignard@linaro.org>
Cc: Vincent Abriou <vincent.abriou@st.com>
Signed-off-by: Benjamin Gaignard <benjamin.gaignard@linaro.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20190804201637.1240-9-sam@ravnborg.org
Christian König [Mon, 5 Aug 2019 09:49:20 +0000 (11:49 +0200)]
dma-buf: simplify reservation_object_get_fences_rcu a bit
We can add the exclusive fence to the list after making sure we got
a consistent state.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/322034/?series=64786&rev=1
Christian König [Mon, 5 Aug 2019 11:18:43 +0000 (13:18 +0200)]
drm/i915: stop using seqcount for fence pruning
After waiting for a reservation object use reservation_object_test_signaled_rcu
to opportunistically prune the fences on the object.
This allows removal of the seqcount handling in the reservation object.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/322032/?series=64786&rev=1
Christian König [Tue, 6 Aug 2019 11:33:12 +0000 (13:33 +0200)]
dma-buf: fix shared fence list handling in reservation_object_copy_fences
Add some helpers to correctly allocate/free reservation_object_lists.
Otherwise we might forget to drop dma_fence references on list destruction.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/322031/?series=64786&rev=1
Christian König [Mon, 5 Aug 2019 09:14:27 +0000 (11:14 +0200)]
dma-buf: fix busy wait for new shared fences
When reservation_object_add_shared_fence is replacing an old fence with a new
one we should not drop the old one before the new one is in place.
Otherwise other cores can busy wait for the new one to appear.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/322030/
Hariprasad Kelam [Mon, 5 Aug 2019 17:21:38 +0000 (22:51 +0530)]
gpu: drm: amd: powerplay: Remove logically dead code
Result of pointer airthmentic is never null
fix coverity defect:
1451876
Signed-off-by: Hariprasad Kelam <hariprasad.kelam@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Nathan Chancellor [Sun, 4 Aug 2019 20:37:13 +0000 (13:37 -0700)]
drm/amd/powerplay: Zero initialize some variables
Clang warns (only Navi warning shown but Arcturus warns as well):
drivers/gpu/drm/amd/amdgpu/../powerplay/navi10_ppt.c:1534:4: warning:
variable 'asic_default_power_limit' is used uninitialized whenever '?:'
condition is false [-Wsometimes-uninitialized]
smu_read_smc_arg(smu, &asic_default_power_limit);
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../powerplay/inc/amdgpu_smu.h:588:3: note:
expanded from macro 'smu_read_smc_arg'
((smu)->funcs->read_smc_arg? (smu)->funcs->read_smc_arg((smu), (arg)) : 0)
^~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../powerplay/navi10_ppt.c:1550:30: note:
uninitialized use occurs here
smu->default_power_limit = asic_default_power_limit;
^~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../powerplay/navi10_ppt.c:1534:4: note:
remove the '?:' if its condition is always true
smu_read_smc_arg(smu, &asic_default_power_limit);
^
drivers/gpu/drm/amd/amdgpu/../powerplay/inc/amdgpu_smu.h:588:3: note:
expanded from macro 'smu_read_smc_arg'
((smu)->funcs->read_smc_arg? (smu)->funcs->read_smc_arg((smu), (arg)) : 0)
^
drivers/gpu/drm/amd/amdgpu/../powerplay/navi10_ppt.c:1517:35: note:
initialize the variable 'asic_default_power_limit' to silence this
warning
uint32_t asic_default_power_limit;
^
= 0
1 warning generated.
As the code is currently written, if read_smc_arg were ever NULL, arg
would fail to be initialized but the code would continue executing as
normal because the return value would just be zero.
There are a few different possible solutions to resolve this class
of warnings which have appeared in these drivers before:
1. Assume the function pointer will never be NULL and eliminate the
wrapper macros.
2. Have the wrapper macros initialize arg when the function pointer is
NULL.
3. Have the wrapper macros return an error code instead of 0 when the
function pointer is NULL so that the callsites can properly bail out
before arg can be used.
4. Initialize arg at the top of its function.
Number four is the path of least resistance right now as every other
change will be driver wide so do that here. I only make the comment
now as food for thought.
Fixes:
b4af964e75c4 ("drm/amd/powerplay: make power limit retrieval as asic specific")
Link: https://github.com/ClangBuiltLinux/linux/issues/627
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Nathan Chancellor <natechancellor@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Oded Gabbay [Thu, 4 Jul 2019 06:32:20 +0000 (09:32 +0300)]
MAINTAINERS: update amdkfd maintainer (v3)
I'm leaving the role of amdkfd maintainer. Therefore, update the relevant
entry in the MAINTAINERS file with the name of the new maintainer.
Good Luck!
v3: update mailing list, file list (Alex)
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> (v2)
Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Andrey Grodzovsky [Fri, 2 Aug 2019 20:48:08 +0000 (16:48 -0400)]
drm/amdgpu: Fix GPU reset crash regression.
amdgpu_ip_block.status.hw for GMC wasn't set to
false on suspend during GPU reset and so on resume gmc_v9_0_resume
wasn't called.
Caused by 'drm/amdgpu: fix double ucode load by PSP(v3)'
Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Evan Quan [Tue, 6 Aug 2019 08:14:22 +0000 (16:14 +0800)]
drm/amd/powerplay: check before issuing messages for max sustainable clocks
Those messages are not supported on Arcturus and should not be
issued.
Affected ASIC: Arcturus
Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Xiaojie Yuan [Mon, 5 Aug 2019 08:19:45 +0000 (16:19 +0800)]
drm/amdgpu/discovery: move common discovery code out of navi1*_reg_base_init()
move amdgpu_discovery_reg_base_init() from navi1*_reg_base_init() to a
common function nv_reg_base_init().
Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
tiancyin [Mon, 5 Aug 2019 09:32:45 +0000 (17:32 +0800)]
drm/amdgpu/soc15: fix external_rev_id for navi14
fix the hard code external_rev_id.
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: tiancyin <tianci.yin@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tao Zhou [Mon, 5 Aug 2019 07:48:30 +0000 (15:48 +0800)]
drm/amdgpu: update ras sysfs feature info
remove confused ras error type info
Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Evan Quan [Mon, 5 Aug 2019 06:53:12 +0000 (14:53 +0800)]
drm/amd/powerplay: skip pcie params override on Arcturus V2
This is not supported on Arcturus.
Affected ASIC: Arcturus
V2: minor cosmetic fix
Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Le Ma <Le.Ma@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
xinhui pan [Mon, 5 Aug 2019 06:53:49 +0000 (14:53 +0800)]
drm/amdgpu: Fix panic during gpu reset
Clear the flag after hw suspend, otherwise it skips the corresponding hw
resume.
Signed-off-by: xinhui pan <xinhui.pan@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Likun Gao [Fri, 2 Aug 2019 07:18:57 +0000 (15:18 +0800)]
drm/amdgpu: pin the csb buffer on hw init for gfx v8
Without this pin, the csb buffer will be filled with inconsistent
data after S3 resume. And that will causes gfx hang on gfxoff
exit since this csb will be executed then.
Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Tested-by: Paul Gover <pmw.gover@yahoo.co.uk>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
Reviewed-by: Xiaojie Yuan <xiaojie.yuan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Nicholas Kazlauskas [Fri, 2 Aug 2019 14:45:11 +0000 (10:45 -0400)]
drm/amd/display: Block immediate flips for non-fast updates
[Why]
Underflow can occur in the case where we change buffer pitch, DCC state,
rotation or mirroring for a plane while also performing an immediate
flip. It can also generate a p-state warning stack trace on DCN1 which
is typically observed during the cursor handler pipe locking because of
how frequent cursor updates can occur.
[How]
Store the update type on each CRTC - every plane will have access to
the CRTC state if it's flipping. If the update type is not
UPDATE_TYPE_FAST then the immediate flip should be disallowed.
No changes to the target vblank sequencing need to be done, we just
need to ensure that the surface registers do a double buffered update.
Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Reviewed-by: David Francis <david.francis@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>