OSDN Git Service
Colin LeMahieu [Wed, 3 Dec 2014 20:23:22 +0000 (20:23 +0000)]
[Hexagon] Converting subclass members to an implicit operand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223264
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David Blaikie [Wed, 3 Dec 2014 19:58:49 +0000 (19:58 +0000)]
range-for some things
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223263
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David Blaikie [Wed, 3 Dec 2014 19:58:48 +0000 (19:58 +0000)]
Simplify CodeGenRegBank::inferMatchingSuperRegClass & its caller by passing an iterator rather than index
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223262
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David Blaikie [Wed, 3 Dec 2014 19:58:45 +0000 (19:58 +0000)]
Simplify ownership of RegClasses by using list<CodeGenRegisterClass> instead of vector<CodeGenRegisterClass*>
This complicates a few algorithms due to not having random access, but
not by a huge degree I don't think (open to debate/design
discussion/etc).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223261
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David Blaikie [Wed, 3 Dec 2014 19:58:41 +0000 (19:58 +0000)]
Range-for some stuff related to RegClasses, and comment cases where range-for isn't suitable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223260
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Philip Reames [Wed, 3 Dec 2014 19:53:15 +0000 (19:53 +0000)]
Make the Verifier more strict about gc.statepoints
The recently added documentation for statepoints claimed that we checked the parameters of the various intrinsics for validity. This patch adds the code to actually do so. I also removed a couple of redundant checks for conditions which are checked elsewhere in the Verifier and simplified the logic using the helper functions from Statepoint.h.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223259
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Will Schmidt [Wed, 3 Dec 2014 18:46:30 +0000 (18:46 +0000)]
Add TableGen info for Power8.
This is based on the Power7 version, with units added and renamed to match P8.
Differential Revision: http://reviews.llvm.org/D6358
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223257
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Roman Divacky [Wed, 3 Dec 2014 18:39:44 +0000 (18:39 +0000)]
Change the name to be in style.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223255
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Matt Arsenault [Wed, 3 Dec 2014 18:35:11 +0000 (18:35 +0000)]
Fix sphinx error from Statepoints.rst
It was complaining it wasn't included in any toctree
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223254
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Tom Stellard [Wed, 3 Dec 2014 18:27:08 +0000 (18:27 +0000)]
R600/SI: Move SIInsertWaits into AMDGPUPassConfig::addPreSched2()
This pass needs to be run after PrologEpilogInserter, because
that pass may inserter spill code which reads or writes memory.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223253
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Tom Stellard [Wed, 3 Dec 2014 18:27:05 +0000 (18:27 +0000)]
R600/SI: Don't run SI passes on R600 subtargets
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223252
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Tim Northover [Wed, 3 Dec 2014 17:49:26 +0000 (17:49 +0000)]
AArch64: fix wrong-endian parameter passing.
The blocked arguments code didn't take account of the hacks needed to support
it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223247
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Colin LeMahieu [Wed, 3 Dec 2014 17:36:39 +0000 (17:36 +0000)]
[NFC] Fixing pendantic warning extra semicolons.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223246
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Colin LeMahieu [Wed, 3 Dec 2014 17:35:39 +0000 (17:35 +0000)]
[Hexagon] [NFC] Moving function implementations out of header. Clang-formatting files.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223245
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Nick Lewycky [Wed, 3 Dec 2014 17:32:44 +0000 (17:32 +0000)]
Fix test to use the right metadata node (reapply r223239 plus a fix) and also to use the correct path to the GCNO file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223244
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Colin LeMahieu [Wed, 3 Dec 2014 17:31:43 +0000 (17:31 +0000)]
[Hexagon] [NFC] Renaming *packetStart to *packetBegin
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223243
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Alexander Potapenko [Wed, 3 Dec 2014 16:03:08 +0000 (16:03 +0000)]
Revert r223239, which broke some bots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223240
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Alexander Potapenko [Wed, 3 Dec 2014 15:15:58 +0000 (15:15 +0000)]
Fix the metadata number used by llvm.gcov to match the number of the inserted metadata node.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223239
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Aaron Ballman [Wed, 3 Dec 2014 14:44:16 +0000 (14:44 +0000)]
Silencing several "multiple copy constructors" warnings from MSVC; NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223238
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Aaron Ballman [Wed, 3 Dec 2014 14:39:58 +0000 (14:39 +0000)]
Silencing a 32-bit implicit conversion warning in MSVC; NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223237
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Evgeniy Stepanov [Wed, 3 Dec 2014 14:15:53 +0000 (14:15 +0000)]
msan] Add compile-time checks for missing origins.
This change makes MemorySanitizer instrumentation a bit more strict
about instructions that have no origin id assigned to them.
This would have caught the bug that was fixed in r222918.
This is re-commit of r222997, reverted in r223211, with 3 more
missing origins added.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223236
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Erik Eckstein [Wed, 3 Dec 2014 10:39:15 +0000 (10:39 +0000)]
InstCombine: simplify signed range checks
Try to convert two compares of a signed range check into a single unsigned compare.
Examples:
(icmp sge x, 0) & (icmp slt x, n) --> icmp ult x, n
(icmp slt x, 0) | (icmp sgt x, n) --> icmp ugt x, n
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223224
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Hal Finkel [Wed, 3 Dec 2014 09:37:50 +0000 (09:37 +0000)]
[PowerPC] Print all inline-asm consts as signed numbers
Almost all immediates in PowerPC assembly (both 32-bit and 64-bit) are signed
numbers, and it is important that we print them as such. To make sure that
happens, we change PPCTargetLowering::LowerAsmOperandForConstraint so that it
does all intermediate checks on a signed-extended int64_t value, and then
creates the resulting target constant using MVT::i64. This will ensure that all
negative values are printed as negative values (mirroring what is done in other
backends to achieve the same sign-extension effect).
This came up in the context of inline assembly like this:
"add%I2 %0,%0,%2", ..., "Ir"(-1ll)
where we used to print:
addi 3,3,
4294967295
and gcc would print:
addi 3,3,-1
and gas accepts both forms, but our builtin assembler (correctly) does not. Now
we print -1 like gcc does.
While here, I replaced a bunch of custom integer checks with isInt<16> and
friends from MathExtras.h.
Thanks to Paul Hargrove for the bug report.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223220
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Charlie Turner [Wed, 3 Dec 2014 08:12:26 +0000 (08:12 +0000)]
Emit ABI_FP_rounding attribute.
LLVM understands a -enable-sign-dependent-rounding-fp-math codegen option. When
the user has specified this option, the Tag_ABI_FP_rounding attribute should be
emitted with value 1. This option currently does not appear to disable
transformations and optimizations that assume default floating point rounding
behavior, AFAICT, but the intention should be recorded in the build attributes,
regardless of what the compiler actually does with the intention.
Change-Id: If838578df3dc652b6f2796b8d152545674bcb30e
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223218
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Charlie Turner [Wed, 3 Dec 2014 07:59:50 +0000 (07:59 +0000)]
Add tests for default value of Tag_ABI_FP_rounding.
Change-Id: I051866d073fc6ce87ce3e693a3762da6d81f4393
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223217
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Benjamin Poulain [Wed, 3 Dec 2014 07:32:36 +0000 (07:32 +0000)]
Fix a typo in the documentation of LTO
Fix defininitions->definitions.
Reviewed by David Blaikie.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223216
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Rafael Espindola [Wed, 3 Dec 2014 07:18:23 +0000 (07:18 +0000)]
Ask the module for its the identified types.
When lazy reading a module, the types used in a function will not be visible to
a TypeFinder until the body is read.
This patch fixes that by asking the module for its identified struct types.
If a materializer is present, the module asks it. If not, it uses a TypeFinder.
This fixes pr21374.
I will be the first to say that this is ugly, but it was the best I could find.
Some of the options I looked at:
* Asking the LLVMContext. This could be made to work for gold, but not currently
for ld64. ld64 will load multiple modules into a single context before merging
them. This causes us to see types from future merges. Unfortunately,
MappedTypes is not just a cache when it comes to opaque types. Once the
mapping has been made, we have to remember it for as long as the key may
be used. This would mean moving MappedTypes to the Linker class and having
to drop the Linker::LinkModules static methods, which are visible from C.
* Adding an option to ignore function bodies in the TypeFinder. This would
fix the PR by picking the worst result. It would work, but unfortunately
we are currently quite dependent on the upfront type merging. I will
try to reduce our dependency, but it is not clear that we will be able
to get rid of it for now.
The only clean solution I could think of is making the Module own the types.
This would have other advantages, but it is a much bigger change. I will
propose it, but it is nice to have this fixed while that is discussed.
With the gold plugin, this patch takes the number of types in the LTO clang
binary from 52817 to 49669.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223215
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Duncan P. N. Exon Smith [Wed, 3 Dec 2014 05:53:24 +0000 (05:53 +0000)]
ADT: Rename argument in emplace_back_impl
Rename a functor argument in r223201 from `emplace` to `construct` to
reduce confusion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223212
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Nick Lewycky [Wed, 3 Dec 2014 05:47:00 +0000 (05:47 +0000)]
Revert r222997. The newly added compile-time checks are finding missing origins, testcase is being reduced and a PR will be posted shortly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223211
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Duncan P. N. Exon Smith [Wed, 3 Dec 2014 05:41:20 +0000 (05:41 +0000)]
LoopVectorize: Remove unnecessary RAUW
Remove an unnecessary `MDNode::replaceAllUsesWith()`. In the preceding
line, `TheLoop->setLoopID()` visits all backedges and sets the new loop
ID. This sufficiently updates the loop metadata.
Metadata RAUW is going away as part of PR21532.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223210
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Matt Arsenault [Wed, 3 Dec 2014 05:22:39 +0000 (05:22 +0000)]
R600/SI: Fix SIFixSGPRCopies for copies to physical registers
This shows up when operands required to be passed in VCC are copied
to.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223208
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Matt Arsenault [Wed, 3 Dec 2014 05:22:38 +0000 (05:22 +0000)]
R600/SI: Remove incorrect assertion
This can be a COPY to a physical register, such as VCC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223207
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Matt Arsenault [Wed, 3 Dec 2014 05:22:35 +0000 (05:22 +0000)]
R600/SI: Remove i1 pseudo VALU ops
Select i1 logical ops directly to 64-bit SALU instructions.
Vector i1 values are always really in SGPRs, with each
bit for each item in the wave. This saves about 4 instructions
when and/or/xoring any condition, and also helps write conditions
that need to be passed in vcc.
This should work correctly now that the SGPR live range
fixing pass works. More work is needed to eliminate the VReg_1
pseudo regclass and possibly the entire SILowerI1Copies pass.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223206
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Matt Arsenault [Wed, 3 Dec 2014 05:22:32 +0000 (05:22 +0000)]
R600/SI: Fix suspicious indexing
The loop is over the operands of an instruction, and checks the
register with the sub reg index of the dest register. This probably
meant to be checking the sub reg index of the same operand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223205
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Matt Arsenault [Wed, 3 Dec 2014 05:22:30 +0000 (05:22 +0000)]
R600/SI: Fix running SILowerI1Copies a second time
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223204
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Matt Arsenault [Wed, 3 Dec 2014 05:22:29 +0000 (05:22 +0000)]
R600/SI: Fix live range error hidden by SIFoldOperands
m0 is treated as a virtual register class with a single register
rather than the physical register it really is. This was updating
the live range of the used virtual copy of m0 from the first ds_read
instruction, and leaving the unused copy unchanged. This resulted in a
"Live segment doesn't end at a valid instruction" verifier error because
the erased instructions. Update the live range of the second copy (which
should be dead).
No test since I'm not sure how to trigger this with SIFoldOperands
enabled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223203
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Duncan P. N. Exon Smith [Wed, 3 Dec 2014 04:49:16 +0000 (04:49 +0000)]
ADT: Add SmallVector<>::emplace_back(): fixup
Add missing `void` return type from `!LLVM_HAS_VARIADIC_TEMPLATES` case
in r223201.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223202
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Duncan P. N. Exon Smith [Wed, 3 Dec 2014 04:45:09 +0000 (04:45 +0000)]
ADT: Add SmallVector<>::emplace_back()
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223201
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Tom Stellard [Wed, 3 Dec 2014 04:28:32 +0000 (04:28 +0000)]
StructurizeCFG: Use LoopInfo analysis for better loop detection
We were assuming that each back-edge in a region represented a unique
loop, which is not always the case. We need to use LoopInfo to
correctly determine which back-edges are loops.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223199
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Duncan P. N. Exon Smith [Wed, 3 Dec 2014 04:13:23 +0000 (04:13 +0000)]
NVPTX: Delete dead code
`MDNode` does not inherit from `User`, and it never has a name.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223198
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Tom Stellard [Wed, 3 Dec 2014 04:08:00 +0000 (04:08 +0000)]
R600/SI: Enable inline assembly
We just needed to remove the assertion in
AMDGPURegisterInfo::getFrameRegister(), which is called when
initializing the parser for inline assembly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223197
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Peter Zotov [Wed, 3 Dec 2014 03:39:01 +0000 (03:39 +0000)]
[OCaml] [cmake] Disable OCaml bindings if ctypes >=0.3 is not found.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223195
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Matt Arsenault [Wed, 3 Dec 2014 03:12:13 +0000 (03:12 +0000)]
R600/SI: Change mubuf offsets to print as decimal
This matches SC's behavior.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223194
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Nick Lewycky [Wed, 3 Dec 2014 02:45:01 +0000 (02:45 +0000)]
Emit the entry block first and the exit block second, then all the blocks in between afterwards. This is what gcc always does, and some out of tree tools depend on that.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223193
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NAKAMURA Takumi [Wed, 3 Dec 2014 02:40:24 +0000 (02:40 +0000)]
GCRelocateOperands: Try to appease msc17.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223192
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Peter Collingbourne [Wed, 3 Dec 2014 02:08:38 +0000 (02:08 +0000)]
Prologue support
Patch by Ben Gamari!
This redefines the `prefix` attribute introduced previously and
introduces a `prologue` attribute. There are a two primary usecases
that these attributes aim to serve,
1. Function prologue sigils
2. Function hot-patching: Enable the user to insert `nop` operations
at the beginning of the function which can later be safely replaced
with a call to some instrumentation facility
3. Runtime metadata: Allow a compiler to insert data for use by the
runtime during execution. GHC is one example of a compiler that
needs this functionality for its tables-next-to-code functionality.
Previously `prefix` served cases (1) and (2) quite well by allowing the user
to introduce arbitrary data at the entrypoint but before the function
body. Case (3), however, was poorly handled by this approach as it
required that prefix data was valid executable code.
Here we redefine the notion of prefix data to instead be data which
occurs immediately before the function entrypoint (i.e. the symbol
address). Since prefix data now occurs before the function entrypoint,
there is no need for the data to be valid code.
The previous notion of prefix data now goes under the name "prologue
data" to emphasize its duality with the function epilogue.
The intention here is to handle cases (1) and (2) with prologue data and
case (3) with prefix data.
References
----------
This idea arose out of discussions[1] with Reid Kleckner in response to a
proposal to introduce the notion of symbol offsets to enable handling of
case (3).
[1] http://lists.cs.uiuc.edu/pipermail/llvmdev/2014-May/073235.html
Test Plan: testsuite
Differential Revision: http://reviews.llvm.org/D6454
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223189
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NAKAMURA Takumi [Wed, 3 Dec 2014 02:05:51 +0000 (02:05 +0000)]
ExceptionDemo: Let setMCJITMemoryManager() take unique_ptr, since r223183.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223188
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Ahmed Bougacha [Wed, 3 Dec 2014 02:03:26 +0000 (02:03 +0000)]
[X86][MC] Intel syntax: accept implicit memory operand sizes larger than 80.
The X86AsmParser intel handling was refactored in r216481, making it
try each different memory operand size to see which one matches.
Operand sizes larger than 80 ("[xyz]mmword ptr") were forgotten, which
led to an "invalid operand" error for code such as:
movdqa [rax], xmm0
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223187
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Lang Hames [Wed, 3 Dec 2014 00:51:19 +0000 (00:51 +0000)]
[MCJIT] Unique-ptrify the RTDyldMemoryManager member of MCJIT. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223183
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Hal Finkel [Wed, 3 Dec 2014 00:19:17 +0000 (00:19 +0000)]
[PowerPC] Fix readcyclecounter to be custom expanded for all 32-bit targets
We need to use the custom expansion of readcyclecounter on all 32-bit targets
(even those with 64-bit registers). This should fix the ppc64 buildbot.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223182
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Tim Northover [Tue, 2 Dec 2014 23:53:43 +0000 (23:53 +0000)]
AArch64: strengthen Darwin ABI alignment assumptions
A global variable without an explicit alignment specified should be assumed to
be ABI-aligned according to its type, like on other platforms. This allows us
to use better memory operations when accessing it.
rdar://
18533701
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223180
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Pete Cooper [Tue, 2 Dec 2014 23:34:23 +0000 (23:34 +0000)]
Use a typed enum instead of 'unsigned char' for packed field. NFC.
This makes it easier to debug Twine as the 'Kind' fields now show their enum values in lldb and not escaped characters.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223178
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Tim Northover [Tue, 2 Dec 2014 23:13:39 +0000 (23:13 +0000)]
AArch64: don't be too greedy when folding :lo12: accesses into mem ops.
This frequently leads to cases like:
ldr xD, [xN, :lo12:var]
add xA, xN, :lo12:var
ldr xD, [xA, #8]
where the ADD would have been needed anyway, and the two distinct addressing
modes can prevent the formation of an ldp. Because of how we handle ADRP
(aggressively forming an ADRP/ADD pseudo-inst at ISel time), this pattern also
results in duplicated ADRP instructions (one on its own to cover the ldr, and
one combined with the add).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223172
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Michael Zolotukhin [Tue, 2 Dec 2014 22:59:06 +0000 (22:59 +0000)]
PR21302. Vectorize only bottom-tested loops.
rdar://problem/
18886083
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223171
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Michael Zolotukhin [Tue, 2 Dec 2014 22:59:02 +0000 (22:59 +0000)]
Apply loop-rotate to several vectorizer tests.
Such loops shouldn't be vectorized due to the loops form.
After applying loop-rotate (+simplifycfg) the tests again start to check
what they are intended to check.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223170
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Simon Pilgrim [Tue, 2 Dec 2014 22:31:23 +0000 (22:31 +0000)]
[X86][SSE] Keep 4i32 vector insertions in integer domain on SSE4.1 targets
4i32 shuffles for single insertions into zero vectors lowers to X86vzmovl which was using (v)blendps - causing domain switch stalls. This patch fixes this by using (v)pblendw instead.
The updated tests on test/CodeGen/X86/sse41.ll still contain a domain stall due to the use of insertps - I'm looking at fixing this in a future patch.
Differential Revision: http://reviews.llvm.org/D6458
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223165
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Chris Matthews [Tue, 2 Dec 2014 22:19:21 +0000 (22:19 +0000)]
Give lit a --xunit-xml-output option for saving results in xunit format
--xunit-xml-output saves test results to disk in JUnit's xml format. This will allow Jenkins to report the details of a lit run.
Based on a patch by David Chisnall.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223163
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Hal Finkel [Tue, 2 Dec 2014 22:01:00 +0000 (22:01 +0000)]
[PowerPC] Implement readcyclecounter for PPC32
We've long supported readcyclecounter on PPC64, but it is easier there (the
read of the 64-bit time-base register can be accomplished via a single
instruction). This now provides an implementation for PPC32 as well. On PPC32,
the time-base register is still 64 bits, but can only be read 32 bits at a time
via two separate SPRs. The ISA manual explains how to do this properly (it
involves re-reading the upper bits and looping if the counter has wrapped while
being read).
This requires PPC to implement a custom integer splitting legalization for the
READCYCLECOUNTER node, turning it into a target-specific SDAG node, which then
gets turned into a pseudo-instruction, which is then expanded to the necessary
sequence (which has three SPR reads, the comparison and the branch).
Thanks to Paul Hargrove for pointing out to me that this was still unimplemented.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223161
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Tom Stellard [Tue, 2 Dec 2014 22:00:07 +0000 (22:00 +0000)]
R600/SI: Emit amd_kernel_code_t header for AMDGPU environment
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223160
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Eric Christopher [Tue, 2 Dec 2014 21:57:15 +0000 (21:57 +0000)]
Make sure that the TargetOptions operator== is checking the
full contents of the class.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223159
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Lang Hames [Tue, 2 Dec 2014 21:36:24 +0000 (21:36 +0000)]
[AArch64][Stackmaps] Optimize stackmap shadows on AArch64.
Reduce the number of nops emitted for stackmap shadows on AArch64 by counting
non-stackmap instructions up to the next branch target towards the requested
shadow.
<rdar://problem/
14959522>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223156
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Tom Stellard [Tue, 2 Dec 2014 21:28:53 +0000 (21:28 +0000)]
R600/SI: Move more information into SIProgramInfo struct
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223154
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Eric Christopher [Tue, 2 Dec 2014 21:09:01 +0000 (21:09 +0000)]
Add bindings for the rest of the MCJIT options that we previously
had support for. We're still missing a binding for an MCJIT
memory manager.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223153
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Matt Arsenault [Tue, 2 Dec 2014 21:02:20 +0000 (21:02 +0000)]
R600: Cleanup some tests and add missing testcases
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223151
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Philip Reames [Tue, 2 Dec 2014 21:01:48 +0000 (21:01 +0000)]
Restructure some assertion checking based on post commit feedback by Aaron and Tom.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223150
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Daniel Sanders [Tue, 2 Dec 2014 20:40:27 +0000 (20:40 +0000)]
[mips] Fix passing of small structures for big-endian O32.
Summary:
Like N32/N64, they must be passed in the upper bits of the register.
The new code could be merged with the existing if-statements but I've
refrained from doing this since it will make porting the O32 implementation
to tablegen harder later.
Reviewers: vmedic
Reviewed By: vmedic
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D6463
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223148
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Roman Divacky [Tue, 2 Dec 2014 20:03:22 +0000 (20:03 +0000)]
Introduce CPUStringIsValid() into MCSubtargetInfo and use it for ARM .cpu parsing.
Previously .cpu directive in ARM assembler didnt switch to the new CPU and
therefore acted as a nop. This implemented real action for .cpu and eg.
allows to assembler FreeBSD kernel with -integrated-as.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223147
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Tom Stellard [Tue, 2 Dec 2014 19:45:05 +0000 (19:45 +0000)]
R600/SI: Refactor AMDGPUAsmPrinter::EmitProgramInfoSI()
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223144
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Philip Reames [Tue, 2 Dec 2014 19:37:00 +0000 (19:37 +0000)]
[Statepoints 4/4] Statepoint infrastructure for garbage collection: Documentation
This is the fourth and final patch in the statepoint series. It contains the documentation for the statepoint intrinsics and their usage.
There's definitely still room to improve the documentation here, but I wanted to get this landed so it was available for others. There will likely be a series of small cleanup changes over the next few weeks as we work to clarify and revise the documentation. If you have comments or questions, please feel free to discuss them either in this commit thread, the original review thread, or on llvmdev. Comments are more than welcome.
Reviewed by: atrick, ributzka
Differential Revision: http://reviews.llvm.org/D5683
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223143
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Philip Reames [Tue, 2 Dec 2014 19:28:57 +0000 (19:28 +0000)]
Appease a build bot complaining about an unused variable that's used in an assertion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223142
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Reid Kleckner [Tue, 2 Dec 2014 18:59:08 +0000 (18:59 +0000)]
cmake: Remove MAXPATHLEN define as autoconf does not provide it
Presumably it was added to the CMake system when MAXPATHLEN was still
used by code built for Windows. Currently only lib/Support/Path.inc uses
MAXPATHLEN, and it should be available on all Unices.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223139
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Reid Kleckner [Tue, 2 Dec 2014 18:58:38 +0000 (18:58 +0000)]
Remove '#undef const' from config.h.cmake to sync with autoconf
This define was removed from config.h.in when Rafael removed our use of
libtool.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223138
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Philip Reames [Tue, 2 Dec 2014 18:50:36 +0000 (18:50 +0000)]
[Statepoints 3/4] Statepoint infrastructure for garbage collection: SelectionDAGBuilder
This is the third patch in a small series. It contains the CodeGen support for lowering the gc.statepoint intrinsic sequences (223078) to the STATEPOINT pseudo machine instruction (223085). The change also includes the set of helper routines and classes for working with gc.statepoints, gc.relocates, and gc.results since the lowering code uses them.
With this change, gc.statepoints should be functionally complete. The documentation will follow in the fourth change, and there will likely be some cleanup changes, but interested parties can start experimenting now.
I'm not particularly happy with the amount of code or complexity involved with the lowering step, but at least it's fairly well isolated. The statepoint lowering code is split into it's own files and anyone not working on the statepoint support itself should be able to ignore it.
During the lowering process, we currently spill aggressively to stack. This is not entirely ideal (and we have plans to do better), but it's functional, relatively straight forward, and matches closely the implementations of the patchpoint intrinsics. Most of the complexity comes from trying to keep relocated copies of values in the same stack slots across statepoints. Doing so avoids the insertion of pointless load and store instructions to reshuffle the stack. The current implementation isn't as effective as I'd like, but it is functional and 'good enough' for many common use cases.
In the long term, I'd like to figure out how to integrate the statepoint lowering with the register allocator. In principal, we shouldn't need to eagerly spill at all. The register allocator should do any spilling required and the statepoint should simply record that fact. Depending on how challenging that turns out to be, we may invest in a smarter global stack slot assignment mechanism as a stop gap measure.
Reviewed by: atrick, ributzka
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223137
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Bruno Cardoso Lopes [Tue, 2 Dec 2014 18:31:53 +0000 (18:31 +0000)]
[SwitchLowering] Handle destinations on multiple phi instructions
Follow up from r222926. Also handle multiple destinations from merged
cases on multiple and subsequent phi instructions.
rdar://problem/
19106978
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223135
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Ahmed Bougacha [Tue, 2 Dec 2014 18:09:51 +0000 (18:09 +0000)]
[MachineCSE] Clear kill-flag on registers imp-def'd by the CSE'd instruction.
Go through implicit defs of CSMI and MI, and clear the kill flags on
their uses in all the instructions between CSMI and MI.
We might have made some of the kill flags redundant, consider:
subs ... %NZCV<imp-def> <- CSMI
csinc ... %NZCV<imp-use,kill> <- this kill flag isn't valid anymore
subs ... %NZCV<imp-def> <- MI, to be eliminated
csinc ... %NZCV<imp-use,kill>
Since we eliminated MI, and reused a register imp-def'd by CSMI
(here %NZCV), that register, if it was killed before MI, should have
that kill flag removed, because it's lifetime was extended.
Also, add an exhaustive testcase for the motivating example.
Reviewed by: Juergen Ributzka <juergen@apple.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223133
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Philip Reames [Tue, 2 Dec 2014 18:06:10 +0000 (18:06 +0000)]
Remove unneccessary code introduced with 223101.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223132
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Tom Stellard [Tue, 2 Dec 2014 17:41:43 +0000 (17:41 +0000)]
R600/SI: Set correct number of user sgprs for HSA runtime
We don't support scratch buffers yet with HSA.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223130
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Peter Zotov [Tue, 2 Dec 2014 17:35:26 +0000 (17:35 +0000)]
[OCaml] Add Llvm.mdnull.
Patch by Gideon Smeding <gideon.smeding@3ds.com>.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223129
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Sanjay Patel [Tue, 2 Dec 2014 17:25:27 +0000 (17:25 +0000)]
fix typo in comment
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223127
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Tim Northover [Tue, 2 Dec 2014 17:15:22 +0000 (17:15 +0000)]
AArch64: make register block rules apply to vector types too.
The blocking code originated in ARM, which is more aggressive about casting
types to a canonical representative before doing anything else, so I missed out
most vector HFAs and broke the ABI. This should fix it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223126
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Tom Stellard [Tue, 2 Dec 2014 17:05:41 +0000 (17:05 +0000)]
R600/SI: Set the ATC bit on all resource descriptors for the HSA runtime
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223125
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Tom Stellard [Tue, 2 Dec 2014 16:45:47 +0000 (16:45 +0000)]
Triple: Add AMDHSA operating system type
This operating system type represents the AMD HSA runtime,
and will be required by the R600 backend in order to generate
correct code for this runtime.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223124
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Bruno Cardoso Lopes [Tue, 2 Dec 2014 14:22:34 +0000 (14:22 +0000)]
[LICM] Avoind store sinking if no preheader is available
Load instructions are inserted into loop preheaders when sinking stores
and later removed if not used by the SSA updater. Avoid sinking if the
loop has no preheader and avoid crashes. This fixes one more side effect
of not handling indirectbr instructions properly on LoopSimplify.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223119
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Asiri Rathnayake [Tue, 2 Dec 2014 12:09:55 +0000 (12:09 +0000)]
Remove unused function.
Removing an unused function which is causing one of the build bots to fail.
This was introduced in the commit r223113. A proper cleanup of the so_imm
tblgen defintion (made redundant by the mod_imm definition) needs to happen
soon.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223115
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Asiri Rathnayake [Tue, 2 Dec 2014 10:53:20 +0000 (10:53 +0000)]
Add support for ARM modified-immediate assembly syntax.
Certain ARM instructions accept 32-bit immediate operands encoded as a 8-bit
integer value (0-255) and a 4-bit rotation (0-30, even). Current ARM assembly
syntax support in LLVM allows the decoded (32-bit) immediate to be specified
as a single immediate operand for such instructions:
mov r0, #
4278190080
The ARMARM defines an extended assembly syntax allowing the encoding to be made
more explicit, as in:
mov r0, #255, #8 ; (same 32-bit value as above)
The behaviour of the two instructions can be different w.r.t flags, which is
documented under "Modified immediate constants" in ARMARM. This patch enables
support for this extended syntax at the MC layer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223113
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Will Newton [Tue, 2 Dec 2014 09:49:09 +0000 (09:49 +0000)]
Add ARM relocations to ELFYAML
Tested with check-all with no regressions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223112
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Charlie Turner [Tue, 2 Dec 2014 08:22:29 +0000 (08:22 +0000)]
Emit Tag_ABI_FP_denormal correctly in fast-math mode.
The default ARM floating-point mode does not support IEEE 754 mode exactly. Of
relevance to this patch is that input denormals are flushed to zero. The way in
which they're flushed to zero depends on the architecture,
* For VFPv2, it is implementation defined as to whether the sign of zero is
preserved.
* For VFPv3 and above, the sign of zero is always preserved when a denormal
is flushed to zero.
When FP support has been disabled, the strategy taken by this patch is to
assume the software support will mirror the behaviour of the hardware support
for the target *if it existed*. That is, for architectures which can only have
VFPv2, it is assumed the software will flush to positive zero. For later
architectures it is assumed the software will flush to zero preserving sign.
Change-Id: Icc5928633ba222a4ba3ca8c0df44a440445865fd
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223110
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Sonam Kumari [Tue, 2 Dec 2014 05:29:47 +0000 (05:29 +0000)]
[signext.ll] Removal Of Duplicate Test Cases
Removed the duplicate test case existing in signext.ll file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223109
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Nick Lewycky [Tue, 2 Dec 2014 01:09:56 +0000 (01:09 +0000)]
Fix variable used only in assertion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223101
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Chandler Carruth [Tue, 2 Dec 2014 00:52:01 +0000 (00:52 +0000)]
Fix several bugs in r221220's new program finding code.
In both the Unix and Windows variants, std::getenv was called and the
result passed directly to a function accepting a StringRef. This isn't
OK because it might return a null pointer and that causes the StringRef
constructor to assert (and generally produces crash-prone code if
asserts are disabled). Fix this by independently testing the result as
non-null prior to splitting things.
This in turn uncovered another bug in the Unix variant where it would
infinitely recurse if PATH="", or after this fix if PATH isn't set.
There is no need to recurse at all. Slightly re-arrange the code to make
it clear that we can just fixup the Paths argument based on the
environment if we find anything.
I don't know of a particularly useful way to test these routines in
LLVM. I'll commit a test to Clang that ensures that its driver correctly
handles various settings of PATH. However, I have no idea how to
correctly write a Windows test for the PATHEXT change. Any Windows
developers who could provide such a test, please have at. =D
Many thanks to Nick Lewycky and others for helping debug this. =/ It was
quite nasty for us to track down.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223099
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Hal Finkel [Mon, 1 Dec 2014 23:38:06 +0000 (23:38 +0000)]
Simplify pointer comparisons involving memory allocation functions
System memory allocation functions, which are identified at the IR level by the
noalias attribute on the return value, must return a pointer into a memory region
disjoint from any other memory accessible to the caller. We can use this
property to simplify pointer comparisons between allocated memory and local
stack addresses and the addresses of global variables. Neither the stack nor
global variables can overlap with the region used by the memory allocator.
Fixes PR21556.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223093
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Philip Reames [Mon, 1 Dec 2014 23:27:45 +0000 (23:27 +0000)]
Try to fix a bot failure due to a variable used only in an assert.
Specifically, bot lld-x86_64-darwin13. Resulting from change 223085.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223092
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Philip Reames [Mon, 1 Dec 2014 22:52:56 +0000 (22:52 +0000)]
[Statepoints 2/4] Statepoint infrastructure for garbage collection: MI & x86-64 Backend
This is the second patch in a small series. This patch contains the MachineInstruction and x86-64 backend pieces required to lower Statepoints. It does not include the code to actually generate the STATEPOINT machine instruction and as a result, the entire patch is currently dead code. I will be submitting the SelectionDAG parts within the next 24-48 hours. Since those pieces are by far the most complicated, I wanted to minimize the size of that patch. That patch will include the tests which exercise the functionality in this patch. The entire series can be seen as one combined whole in http://reviews.llvm.org/D5683.
The STATEPOINT psuedo node is generated after all gc values are explicitly spilled to stack slots. The purpose of this node is to wrap an actual call instruction while recording the spill locations of the meta arguments used for garbage collection and other purposes. The STATEPOINT is modeled as modifing all of those locations to prevent backend optimizations from forwarding the value from before the STATEPOINT to after the STATEPOINT. (Doing so would break relocation semantics for collectors which wish to relocate roots.)
The implementation of STATEPOINT is closely modeled on PATCHPOINT. Eventually, much of the code in this patch will be removed. The long term plan is to merge the functionality provided by statepoints and patchpoints. Merging their implementations in the backend is likely to be a good starting point.
Reviewed by: atrick, ributzka
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223085
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Philip Reames [Mon, 1 Dec 2014 21:18:12 +0000 (21:18 +0000)]
[Statepoints 1/4] Statepoint infrastructure for garbage collection: IR Intrinsics
The statepoint intrinsics are intended to enable precise root tracking through the compiler as to support garbage collectors of all types. The addition of the statepoint intrinsics to LLVM should have no impact on the compilation of any program which does not contain them. There are no side tables created, no extra metadata, and no inhibited optimizations.
A statepoint works by transforming a call site (or safepoint poll site) into an explicit relocation operation. It is the frontend's responsibility (or eventually the safepoint insertion pass we've developed, but that's not part of this patch series) to ensure that any live pointer to a GC object is correctly added to the statepoint and explicitly relocated. The relocated value is just a normal SSA value (as seen by the optimizer), so merges of relocated and unrelocated values are just normal phis. The explicit relocation operation, the fact the statepoint is assumed to clobber all memory, and the optimizers standard semantics ensure that the relocations flow through IR optimizations correctly.
This is the first patch in a small series. This patch contains only the IR parts; the documentation and backend support will be following separately. The entire series can be seen as one combined whole in http://reviews.llvm.org/D5683.
Reviewed by: atrick, ributzka
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223078
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Jingyue Wu [Mon, 1 Dec 2014 21:16:17 +0000 (21:16 +0000)]
[NVPTX] Do not emit .weak symbols for NVPTX
Summary:
".weak" symbols cannot be consumed by ptxas (PR21685). This patch makes the
weak directive in MCAsmPrinter customizable, and disables emitting ".weak"
symbols for NVPTX.
Test Plan: weak-linkage.ll
Reviewers: jholewinski
Reviewed By: jholewinski
Subscribers: majnemer, jholewinski, llvm-commits
Differential Revision: http://reviews.llvm.org/D6455
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223077
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Reid Kleckner [Mon, 1 Dec 2014 21:04:44 +0000 (21:04 +0000)]
Parse 'ghccc' in .ll files as the GHC convention (cc 10)
Previously we just used "cc 10" in the .ll files, but that isn't very
human readable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223076
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Ahmed Bougacha [Mon, 1 Dec 2014 20:59:00 +0000 (20:59 +0000)]
[AArch64] Don't combine "select (setcc i1 LHS, RHS), vL, vR".
r208210 introduced an optimization that improves the vector select
codegen by doing the setcc on vectors directly.
This is a problem they the setcc operands are i1s, because the
optimization would create vectors of i1, which aren't legal.
Part of PR21549.
Differential Revision: http://reviews.llvm.org/D6308
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223075
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Ahmed Bougacha [Mon, 1 Dec 2014 20:52:32 +0000 (20:52 +0000)]
[AArch64] Fix v2i8->i16 bitcast legalization.
r213378 improved f16 bitcasts, so that they go directly through subregs,
instead of through the stack. That code now causes an assertion failure
for bitcasts from other 16-bits types (most importantly v2i8).
Correct that by doing the custom lowering for i16 bitcasts only when the
input is an f16.
Part of PR21549.
Differential Revision: http://reviews.llvm.org/D6307
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223074
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Peter Zotov [Mon, 1 Dec 2014 19:50:39 +0000 (19:50 +0000)]
[OCaml] Move Llvm.clone_module to its own Llvm_transform_utils module.
This way most code won't link this (substantially large) library,
if compiled statically with LLVM.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223072
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Peter Zotov [Mon, 1 Dec 2014 19:50:23 +0000 (19:50 +0000)]
[OCaml] [cmake] Add CMake buildsystem for OCaml.
Closes PR15325.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223071
91177308-0d34-0410-b5e6-
96231b3b80d8