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Eric Holk [Wed, 27 Jan 2016 22:56:22 +0000 (14:56 -0800)]
ARM32 vorr lowering
BUG= https://bugs.chromium.org/p/nativeclient/issues/detail?id=4076
R=stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1639403004 .
Eric Holk [Wed, 27 Jan 2016 22:06:35 +0000 (14:06 -0800)]
UnimplementedLoweringError's message now includes the instruction name.
R=jpp@chromium.org
Review URL: https://codereview.chromium.org/
1639063002 .
Karl Schimpf [Wed, 27 Jan 2016 21:36:09 +0000 (13:36 -0800)]
Add vmov between floating point registers to ARM assembler.
Adds generating binary versions of vmov for moves between floating
point registers, in the integrated ARM assembler.
Also adds simple lit test. Also simplifies the lit test for push/pop
(which had to be changed anyway since it included vmov instructions as
well).
BUG= https://bugs.chromium.org/p/nativeclient/issues/detail?id=4334
R=eholk@chromium.org, jpp@chromium.org
Review URL: https://codereview.chromium.org/
1645683003 .
Eric Holk [Wed, 27 Jan 2016 19:18:29 +0000 (11:18 -0800)]
Subzero. ARM32. Vector lowering. And.
BUG= https://bugs.chromium.org/p/nativeclient/issues/detail?id=4076
R=jpp@chromium.org, kschimpf@google.com
Review URL: https://codereview.chromium.org/
1637173002 .
Eric Holk [Wed, 27 Jan 2016 19:08:48 +0000 (11:08 -0800)]
Subzero. ARM32. Vector lowering. Subtract.
This CL also changes UnimplementedLoweringError to display the name of
the unimplemented instruction.
Improve test coverage for ARM32 vector load instructions.
BUG= https://bugs.chromium.org/p/nativeclient/issues/detail?id=4076
R=jpp@chromium.org, kschimpf@google.com
Review URL: https://codereview.chromium.org/
1639923002 .
John Porto [Wed, 27 Jan 2016 14:31:53 +0000 (06:31 -0800)]
Subzero. X8664. Fixes various small bugs.
These were all pointed out by the llvm test suite, the gcc torture
tests, and the scons tests.
BUG= https://bugs.chromium.org/p/nativeclient/issues/detail?id=4077
R=stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1631383002 .
Reed Kotler [Wed, 27 Jan 2016 03:15:50 +0000 (19:15 -0800)]
add doxypypy support to Subzero doxygen
BUG=
R=stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1574883002 .
Patch from Reed Kotler <rkotlerimgtec@gmail.com>.
Karl Schimpf [Tue, 26 Jan 2016 23:29:22 +0000 (15:29 -0800)]
Fix template method InstARM32FourAddrFP to only have one definition.
Fixes case where IceTargetLowring.cpp and IceInstARM32.cpp generate
implementations for emitIAS().
BUG=None
R=stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1638123002 .
Karl Schimpf [Tue, 26 Jan 2016 20:25:43 +0000 (12:25 -0800)]
Add VMLA (floating point) to the integrated ARM assembler.
Adds the scalar floating point versions of instruction VMLA to the
integrated ARM assembler.
BUG= https://bugs.chromium.org/p/nativeclient/issues/detail?id=4334
R=jpp@chromium.org, stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1634913005 .
John Porto [Tue, 26 Jan 2016 19:44:01 +0000 (11:44 -0800)]
Subzero. X8664. Enables RIP-based addressing mode.
BUG= https://bugs.chromium.org/p/nativeclient/issues/detail?id=4077
R=stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1616103002 .
Karl Schimpf [Tue, 26 Jan 2016 19:12:29 +0000 (11:12 -0800)]
Add VMOV(immediate) instructions to the ARM assembler.
Adds the vmovs/vmovd instructions to the integerated ARM assembler.
BUG= https://bugs.chromium.org/p/nativeclient/issues/detail?id=4334
R=stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1624383004 .
Eric Holk [Tue, 26 Jan 2016 18:10:39 +0000 (10:10 -0800)]
Initial support for vector addition on ARM32.
BUG= https://bugs.chromium.org/p/nativeclient/issues/detail?id=4076
R=jpp@chromium.org
Review URL: https://codereview.chromium.org/
1635713002 .
Karl Schimpf [Mon, 25 Jan 2016 23:58:55 +0000 (15:58 -0800)]
Clean up register+immediate addresses in ARM.
Cleans up the integrated ARM assembler, and its handling of register
memory addresses that can be modified by an immediate value. Handles
each possible encoding of such memory addresses.
Also adds assertions to check that the immediate value has the proper
range for the immediate value, based on the corresponding encoding.
BUG=None
R=stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1630863002 .
Karl Schimpf [Mon, 25 Jan 2016 17:54:20 +0000 (09:54 -0800)]
Clean up emitInst() in the integrated ARM assembler.
Moves "EnsureCapacity Buffer" declarations inside emitInst(), so that
all callers need not add the declaration before calling emitInst().
BUG=None
R=stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1636513002 .
Karl Schimpf [Mon, 25 Jan 2016 17:17:26 +0000 (09:17 -0800)]
Add the VMRS instruction to the integrated ARM assembler.
Note: Only adds the APSR_nzcv register form of the instruction.
BUG= https://bugs.chromium.org/p/nativeclient/issues/detail?id=4334
R=stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1636473002 .
Eric Holk [Fri, 22 Jan 2016 23:22:47 +0000 (15:22 -0800)]
Adding eholk@chromium.org (Eric Holk) to OWNERS
BUG= https://bugs.chromium.org/p/nativeclient/issues/detail?id=4076
R=jpp@chromium.org
Review URL: https://codereview.chromium.org/
1615613002 .
Karl Schimpf [Fri, 22 Jan 2016 23:15:50 +0000 (15:15 -0800)]
Clean up handling of ARM IR instruction "mov".
Also adds VMOVSR instruction to the integrated ARM assembler.
BUG= https://bugs.chromium.org/p/nativeclient/issues/detail?id=4334
R=jpp@chromium.org, stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1596613002 .
Karl Schimpf [Fri, 22 Jan 2016 23:08:44 +0000 (15:08 -0800)]
Add missing vcvt instructions to integrated ARM assembler.
BUG= https://bugs.chromium.org/p/nativeclient/issues/detail?id=4334
R=stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1623433004 .
Jim Stichnoth [Fri, 22 Jan 2016 21:07:46 +0000 (13:07 -0800)]
Subzero: Make -reg-use and -reg-exclude specific to register class.
The main feature here is that when listing a register via the -reg-use or -reg-exclude option, we can limit the effect to a single register class, instead of applying it across all register classes. Example:
pnacl-sz -reg-use i32:eax,i32:ecx,i32:edx -reg-exclude f32:xmm0
Note that without the register class prefix, behavior is the same as before, specifically that the restriction applies to all register classes.
This requires a few high-level changes:
1. We need a mechanism to name *all* register classes, not just the standard ones that map to IceType values.
2. While we're at it, give standard types a more usable name, e.g. "v4i32" instead of "<4 x i32>".
3. Since we've commandeered ":" as the class/register token separator, we change ARM i64 register pair names from e.g. "r0:r1" to "r0r1".
The motivation is that for register allocator torture testing, we'd like to drastically restrict the registers available to e.g. the extensively-used i32 register class, while not overly restricting the seldom-used i32to8 register class (which reflects the set of i32 registers that may trivially truncate to i8).
BUG= none
R=kschimpf@google.com
Review URL: https://codereview.chromium.org/
1614273002 .
Karl Schimpf [Fri, 22 Jan 2016 20:39:51 +0000 (12:39 -0800)]
Fix vldrs/vstrs handling of immediate offsets in ARM.
A previous patch fixed vldrd/vstrd by dividing the immediate offset of
the instruction by 4 before encoding. This does the same for
vldrs/vstrs. It fixes the remaining problems with compiling spec2k
using -filetype=iasm.
It also fixes a minor bug in the divsion by 4, in the case that the
immediate value is negative.
BUG= https://bugs.chromium.org/p/nativeclient/issues/detail?id=4334
R=jpp@chromium.org
Review URL: https://codereview.chromium.org/
1617993005 .
Karl Schimpf [Fri, 22 Jan 2016 16:33:50 +0000 (08:33 -0800)]
Add vcvt.s32.f32 instruction to the integrated ARM assembler.
BUG= https://bugs.chromium.org/p/nativeclient/issues/detail?id=4334
R=jpp@chromium.org, stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1611293003 .
Karl Schimpf [Fri, 22 Jan 2016 16:22:43 +0000 (08:22 -0800)]
Fix vldrd/vstrd handling of immediate offsets in ARM.
Fixes the ARM integrated assembler by dividing the immediate offset
of the instruction by 4 before encoding.
BUG= https://bugs.chromium.org/p/nativeclient/issues/detail?id=4334
R=jpp@chromium.org, stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1619703008 .
John Porto [Fri, 22 Jan 2016 15:10:56 +0000 (07:10 -0800)]
Subzero. X86. Refactors Address Mode formation.
Refactors the Address Mode optimization interface.
BUG=
R=stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1605103002 .
David Sehr [Fri, 22 Jan 2016 07:16:58 +0000 (23:16 -0800)]
Merge x86 data and header lowering
BUG=
R=stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1616673004 .
Reed Kotler [Fri, 22 Jan 2016 04:33:08 +0000 (20:33 -0800)]
with this patch you can run check-lit on a specific test.
i.e.make -f Makefile.standalone check-lit CHECK_LIT_TESTS=tests_lit/llvm2ice_tests/arith.lll
The default will be for the directory to be in subzero but
it's also possible to create an absolute pathname.
Extended this to work with cross tests.
Added some primitive help for the makefile.
make -f Makefile.standalone help
make -f Makefile.standalone help-check-lit
make -f makefile.standalone help-check-xtest
BUG=
R=stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1582243005 .
Patch from Reed Kotler <rkotlerimgtec@gmail.com>.
Reed Kotler [Fri, 22 Jan 2016 04:22:31 +0000 (20:22 -0800)]
Subzero: Use sphinx to generate production-quality docs.
BUG=
R=stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1571883002 .
Patch from Reed Kotler <rkotlerimgtec@gmail.com>.
Reed Kotler [Fri, 22 Jan 2016 02:48:11 +0000 (18:48 -0800)]
Subzero: Add to doxygen output the python scripts related to lit.
BUG=
R=stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1590403005 .
Patch from Reed Kotler <rkotlerimgtec@gmail.com>.
Reed Kotler [Fri, 22 Jan 2016 02:47:28 +0000 (18:47 -0800)]
Subzero: Always enable --echo-cmd in the lit tests.
BUG= none
R=stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1604063002 .
Patch from Reed Kotler <rkotlerimgtec@gmail.com>.
Karl Schimpf [Thu, 21 Jan 2016 18:16:43 +0000 (10:16 -0800)]
Add instruction veord to the integrated ARM assembler.
BUG= https://bugs.chromium.org/p/nativeclient/issues/detail?id=4334
R=stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1604043005 .
Karl Schimpf [Thu, 21 Jan 2016 18:02:15 +0000 (10:02 -0800)]
Add vstr{s,d} to the integrated ARM assembler.
BUG= https://bugs.chromium.org/p/nativeclient/issues/detail?id=4334
R=stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1603893003 .
Karl Schimpf [Thu, 21 Jan 2016 17:47:14 +0000 (09:47 -0800)]
Add vdlr{s,d} to the integrated ARM assembler.
BUG= https://bugs.chromium.org/p/nativeclient/issues/detail?id=4334
R=stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1601103010 .
David Sehr [Thu, 21 Jan 2016 16:09:27 +0000 (08:09 -0800)]
Merged addProlog and addEpilog on x86.
BUG=
R=jpp@chromium.org
Review URL: https://codereview.chromium.org/
1616483003 .
Jim Stichnoth [Wed, 20 Jan 2016 23:01:39 +0000 (15:01 -0800)]
Subzero: Change the szbuild.py --force default.
With the --force option, the behavior of its default setting is dangerous. Specifically, it doesn't retranslate by default when you change the szbuild command-line arguments. This leads to debugging frustration.
Therefore, we change the default setting to be "dumb" and always retranslate.
For bisection debugging, the user will quickly realize that they want to add "--force=0".
BUG= none
R=jpp@chromium.org
Review URL: https://codereview.chromium.org/
1608323002 .
John Porto [Wed, 20 Jan 2016 21:44:30 +0000 (13:44 -0800)]
Subzero. X8664. Fix broken call sequence.
BUG= https://bugs.chromium.org/p/nativeclient/issues/detail?id=4077
R=sehr@chromium.org
Review URL: https://codereview.chromium.org/
1614453002 .
John Porto [Wed, 20 Jan 2016 19:18:06 +0000 (11:18 -0800)]
Subzero. ARM32 RegTable. Adds missing headers.
BUG=
R=stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1606383002 .
John Porto [Wed, 20 Jan 2016 18:49:38 +0000 (10:49 -0800)]
Subzero. ARM32. Fixes infinite loop during address mode formation.
BUG= https://bugs.chromium.org/p/nativeclient/issues/detail?id=4076
R=kschimpf@google.com, sehr@chromium.org, stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1609753002 .
David Sehr [Wed, 20 Jan 2016 18:00:23 +0000 (10:00 -0800)]
Merge lowerCall and lowerRet between x86 and x64
BUG=
R=jpp@chromium.org, stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1592033002 .
Jim Stichnoth [Tue, 19 Jan 2016 18:25:37 +0000 (10:25 -0800)]
Subzero: Remove unneeded ScratchRegs.
These static members of the various TargetLowering classes are no longer used anywhere and can therefore be removed.
BUG= none
R=jpp@chromium.org
Review URL: https://codereview.chromium.org/
1599803002 .
Jim Stichnoth [Tue, 19 Jan 2016 17:52:22 +0000 (09:52 -0800)]
Subzero: Improve the usability of UnimplementedError during lowering.
Provides a variant of the UnimplementedError macro specifically for use in incomplete target instruction lowering. When --skip-unimplemented is specified, the UnimplementedLoweringError macro adds FakeUse and FakeDef instructions in order to maintain consistency in liveness analysis.
BUG= none
R=kschimpf@google.com
Review URL: https://codereview.chromium.org/
1591893002 .
John Porto [Tue, 19 Jan 2016 14:19:14 +0000 (06:19 -0800)]
Subzero. ARM32. Fixes vpush/vpop bug.
if vpush/vpop needs to emit multiple instructions (because of
non-consecutive registers), then the emitted sequence should be:
vpush list1
vpush list2
...
vpop list2
vpop list1
Subzero was emiting vpop in the wrong order:
vpop list1
vpop list2
These multiple lists push/pop arise because of the way fp32 and fp64
registers are declared (s0 -> s31, d31 -> d0).
This CL modifies fp64 registers so they are declared in ascending
order (d0 -> d31), which fixes subzero temporarily. The appropriate
fix is to change vpop to be emitted in the right order.
BUG= https://bugs.chromium.org/p/nativeclient/issues/detail?id=4076
R=sehr@chromium.org, stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1592663004 .
John Porto [Fri, 15 Jan 2016 19:17:55 +0000 (11:17 -0800)]
Subzero. RAII NaCl Bundling.
This CL introduces the TargetLowering::AutoBundle type, which allows
RAII-style bundle emission. As part of the CL, all of the uses of
TargetLowering::_bundle_lock(), and TargetLowering::_bundle_unlock(),
were replaced with uses of the newly introduced type.
BUG=
R=sehr@chromium.org, stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1585843007 .
Karl Schimpf [Fri, 15 Jan 2016 19:07:46 +0000 (11:07 -0800)]
Implements include/exclude register lists for translation.
This allows better debugging of register encodings into
instructions, in the integrated assembler.
BUG= https://bugs.chromium.org/p/nativeclient/issues/detail?id=4334
R=stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1571433004 .
Jim Stichnoth [Fri, 15 Jan 2016 17:52:54 +0000 (09:52 -0800)]
Subzero: Make optimizations more resilient for early Target development.
A good trick for implementing lowering for a new target is, for not-yet-implemented instructions, to insert a FakeUse of each instruction variable followed by a FakeDef of the dest variable. Otherwise one risks running afoul of liveness analysis integrity checks.
However, if all the high-level instructions in a basic block lack variables (e.g. unconditional branches, or void calls with only constant arguments), the resulting block may be completely empty. In O2 mode, this triggers a couple of assertions/errors that wouldn't normally occur:
1. CfgNode::contractIfEmpty() finds a block with a single out-edge that does *not* end with an unconditional branch.
2. CfgNode::livenessAddIntervals() tries to add a bogus liveness interval to a variable because the empty block contains no actual instruction numbers to form a valid interval from.
This adds some fixes/workarounds for those problems.
Another workaround for the empty basic block problem may be to just to add a FakeUse of the stack pointer when lowering an unconditional branch, which combined with the trick above, should prevent empty blocks. However, these fixes seem reasonable apart from that.
BUG= none
R=sehr@chromium.org
Review URL: https://codereview.chromium.org/
1590303002 .
Karl Schimpf [Fri, 15 Jan 2016 16:11:00 +0000 (08:11 -0800)]
Make RegARM32 a namespace rather than a class.
Cleans up code by removing unnecessary class.
BUG=None
R=stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1581803009 .
Karl Schimpf [Fri, 15 Jan 2016 15:33:15 +0000 (07:33 -0800)]
Fix bitcode parser to check type signatures of functions.
Before, type signatures of functions were only checked when called.
This CL fixes this by checking all function signatures.
BUG=None
R=stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1579203002 .
John Porto [Thu, 14 Jan 2016 17:18:18 +0000 (09:18 -0800)]
Suzero. X8664. NaCl Sandboxing.
BUG= https://bugs.chromium.org/p/nativeclient/issues/detail?id=4077
R=sehr@chromium.org, stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1559243002 .
David Sehr [Wed, 13 Jan 2016 22:17:37 +0000 (14:17 -0800)]
Add option to force filetype=asm for testing
Also turn it on for presubmit testing.
BUG=
R=stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1531623007 .
Jim Stichnoth [Wed, 13 Jan 2016 21:48:46 +0000 (13:48 -0800)]
Subzero: Fix -build-atts option.
If the default --target option is not actually included in the Subzero build (via llvm/Config/SZTargets.def), then "pnacl-sz --build-atts" will fail. This is because the attribute printing is done after the GlobalContext is created, which does some amount of Target initialization.
The fix is to move the attribute printing to a point after the flags are parsed and the output streams are created, but before the GlobalContext is created. This basically disables --build-atts in the browser build, but that should be OK.
BUG= none
R=kschimpf@google.com
Review URL: https://codereview.chromium.org/
1584923002 .
Jim Stichnoth [Wed, 13 Jan 2016 19:39:15 +0000 (11:39 -0800)]
Subzero: Fix g++ warnings.
This tries to use the same -W options that the buildbots use, to reduce the amount of warning spam in the logs.
BUG= none
R=jpp@chromium.org
Review URL: https://codereview.chromium.org/
1575873006 .
Sean Klein [Mon, 11 Jan 2016 18:49:25 +0000 (10:49 -0800)]
Better error message for running szbuild.py out of directory.
TEST=Run szbuild.py in a directory which does not include "native_client" as a subdirectory.
BUG=None
R=stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1565963002 .
Karl Schimpf [Mon, 11 Jan 2016 18:12:20 +0000 (10:12 -0800)]
Add VCMP{s,sz,d,dz} Instructions to ARM integrated assembler.
Also fixes bug in emitVFPddd.
BUG= https://bugs.chromium.org/p/nativeclient/issues/detail?id=4334
R=stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1564393002 .
Karl Schimpf [Mon, 11 Jan 2016 17:59:19 +0000 (09:59 -0800)]
Refactor PUSH/POP in ARM assemblers.
Refactors methods emit() and emitIAS() of InstARM32Push and InstARM32Pop
to separate out the selection of assembler instructions from instruction
emission, using template methods.
Template method assemble() provides a single implementation for emit() and emitIAS(). This method calls template functions in the assembler to generate textual and binary forms of the instruction.
BUG= None
R=jpp@chromium.org, stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1535233002 .
John Porto [Mon, 11 Jan 2016 14:11:00 +0000 (06:11 -0800)]
Subzero. ARM32. Adds header to auto-generated register def file.
BUG= https://bugs.chromium.org/p/nativeclient/issues/detail?id=4076
R=stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1572303002 .
Jim Stichnoth [Mon, 11 Jan 2016 03:46:49 +0000 (19:46 -0800)]
Fix g++ linking error.
The linking errors are the following. Somehow the clang build succeeds.
.../IceInstARM32.o:IceInstARM32.cpp:(.text$_ZNK3Ice5ARM3220InstARM32ThreeAddrFPILNS0_9InstARM3213InstKindARM32E74EE4dumpEPKNS_3CfgE[__ZNK3Ice5ARM3220InstARM32ThreeAddrFPILNS0_9InstARM3213InstKindARM32E74EE4dumpEPKNS_3CfgE]+0x38): undefined reference to `Ice::ARM32::InstARM32ThreeAddrFP<(Ice::ARM32::InstARM32::InstKindARM32)74>::Opcode'
.../IceInstARM32.o:IceInstARM32.cpp:(.text$_ZNK3Ice5ARM3220InstARM32ThreeAddrFPILNS0_9InstARM3213InstKindARM32E75EE4dumpEPKNS_3CfgE[__ZNK3Ice5ARM3220InstARM32ThreeAddrFPILNS0_9InstARM3213InstKindARM32E75EE4dumpEPKNS_3CfgE]+0x38): undefined reference to `Ice::ARM32::InstARM32ThreeAddrFP<(Ice::ARM32::InstARM32::InstKindARM32)75>::Opcode'
collect2.exe: error: ld returned 1 exit status
BUG= none
TBR=jpp
Review URL: https://codereview.chromium.org/
1576823002 .
Jim Stichnoth [Sun, 10 Jan 2016 20:53:44 +0000 (12:53 -0800)]
Fix the g++ build.
It turns out that the g++ test build, initiated by "make presubmit", was
actually using clang++ for the build. This fixes the makefile, plus the
code that actually produces errors under the g++ build.
BUG= none
TBR=jpp
Review URL: https://codereview.chromium.org/
1572863003 .
Reed Kotler [Sun, 10 Jan 2016 03:10:29 +0000 (19:10 -0800)]
add scripts to doxygen for subzero
BUG=
R=stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1572143002 .
Patch from Reed Kotler <rkotlerimgtec@gmail.com>.
Karl Schimpf [Fri, 8 Jan 2016 15:31:08 +0000 (07:31 -0800)]
Add vcvt<c>.f32.f64 and vcvt<c>.f64.32 to ARM.
Adds vcvt<c>.f32.f64 and vcvt<c>.f64.32 to the ARM integrated
assembler.
BUG= https://bugs.chromium.org/p/nativeclient/issues/detail?id=4334
R=stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1567623008 .
Reed Kotler [Fri, 8 Jan 2016 05:42:36 +0000 (21:42 -0800)]
make sure there is always a build directory to put doxgen stuff html in
currently if you do a make clean-all or have never done a code build, there will be no build directory and doxygen is going to want to create and put files into build/docs/html
BUG=
R=stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1567313002 .
Patch from Reed Kotler <rkotlerimgtec@gmail.com>.
Karl Schimpf [Thu, 7 Jan 2016 21:46:20 +0000 (13:46 -0800)]
Add VMULS and VMULD instructions to integrated ARM assembler.
BUG= https://bugs.chromium.org/p/nativeclient/issues/detail?id=4334
R=stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1570543002 .
Karl Schimpf [Thu, 7 Jan 2016 21:37:39 +0000 (13:37 -0800)]
Add VDIVS and VDIVD instructions to the integrated ARM assembler.
Also fixes some badly named locals for VSUBS and VSUBD.
BUG= https://bugs.chromium.org/p/nativeclient/issues/detail?id=4334
R=stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1568933002 .
Karl Schimpf [Thu, 7 Jan 2016 18:20:27 +0000 (10:20 -0800)]
Add VSUB{S,D} instructions to the integrated ARM assembler.
Also adds missing test case for the VADDD instruction.
BUG= https://bugs.chromium.org/p/nativeclient/issues/detail?id=4334
R=stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1568623003 .
Reed Kotler [Thu, 7 Jan 2016 16:45:13 +0000 (08:45 -0800)]
Move Doxyfile files to docs and associated makefile. This is a prelude to allowing a docs directory for all the RST files as well as expanding the makefile to build the docs for those too, not just the doxygen output.
The doxygen html has been moved to build/docs/html so it's not in a source directory.
Gitignore has been fixed to allow files in docs now without complaining.
BUG=
R=stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1562703002 .
Patch from Reed Kotler <rkotlerimgtec@gmail.com>.
Karl Schimpf [Thu, 7 Jan 2016 15:31:19 +0000 (07:31 -0800)]
Add VADD instruction to the ARM integrated assembler.
BUG= https://bugs.chromium.org/p/nativeclient/issues/detail?id=4334
R=stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1540653003 .
Reed Kotler [Thu, 7 Jan 2016 01:22:21 +0000 (17:22 -0800)]
move .rst to docs
BUG=
R=stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1562543002 .
Patch from Reed Kotler <rkotlerimgtec@gmail.com>.
Jim Stichnoth [Wed, 6 Jan 2016 17:34:36 +0000 (09:34 -0800)]
Subzero: Enable Non-SFI vector cross tests.
The driver programs for vector tests use a loop to initialize vector-type values one element at a time. The PNaCl ABI requires the vector element index to be a constant, and the createConstantInsertExtractElementIndexPass() transformation creates an alloca instruction. When this alloca is inside a loop, it can (and does in the cross tests) cause a stack overflow.
The workaround here is to use a noinline helper function to do the insertelement.
We didn't run into this problem until now because native and sandbox cross tests build the driver in a different way that presumably avoids running the PNaCl ABI simplification passes.
BUG= none
R=jpp@chromium.org
Review URL: https://codereview.chromium.org/
1560933002 .
Jim Stichnoth [Mon, 4 Jan 2016 23:39:06 +0000 (15:39 -0800)]
Subzero: Add Non-SFI support for x86-32.
The basic model is that each translated function begins with a special "GotVar = getIP" instruction, and each ConstantRelocatable reference is changed to GotVar+ConstantRelocatable@GOTOFF (assuming GotVar is legalized into a physical register). The getIP instruction is late-lowered into:
call __Sz_getIP_<reg>
add <reg>, $_GLOBAL_OFFSET_TABLE_
mov GotVar, <reg>
Note that _GLOBAL_OFFSET_TABLE_ gets a special relocation type.
The register allocator takes GotVar uses into account, giving appropriate weight toward register allocation.
If there are no uses of GotVar, the getIP instruction gets naturally dead-code eliminated. Special treatment is needed to prevent this elimination when the only GotVar uses are for (floating point) constant pool values from Phi instructions, since the Phi lowering with its GotVar legalization happens after the main round of register allocation.
The x86 mem operand now has a IsPIC field to indicate whether it has been PIC-legalized. Mem operands are sometimes legalized more than once, and this IsPIC field keeps GotVar from being added more than once.
We have to limit the aggressiveness of address mode inference, to make sure a register slot is left for the GotVar.
The Subzero runtime has new asm files to implement all possible __Sz_getIP_<reg> helpers.
The szbuild.py script and the spec2k version support Non-SFI builds. Running spec2k depends on a pending change to the spec2k run_all.sh script.
Read-only data sections need to be named .data.rel.ro instead of .rodata because of PIC rules.
Most cross tests are working, but there is some problem with vector types that seems to be not Subzero related, so most vector tests are disabled for now.
Still to do:
* Fix "--nonsfi --filetype=iasm". The llvm-mc assembler doesn't properly apply the _GLOBAL_OFFSET_TABLE_ relocation in iasm mode. Maybe I can find a different syntactic trick that works, or use hybrid iasm for this limited case.
BUG= https://bugs.chromium.org/p/nativeclient/issues/detail?id=4327
R=jpp@chromium.org
Review URL: https://codereview.chromium.org/
1506653002 .
John Porto [Mon, 4 Jan 2016 21:45:26 +0000 (13:45 -0800)]
Subzero. ARM32. Materializes the register table.
This CL modifies the ARM32 backend so that the REGARM32_TABLE is only
expanded once (to initialize a constexpr array.) This change decreased
the backend size in roughly ~80k.
BUG= https://code.google.com/p/nativeclient/issues/detail?id=4076
R=kschimpf@google.com
Review URL: https://codereview.chromium.org/
1554263002 .
John Porto [Mon, 4 Jan 2016 17:49:55 +0000 (09:49 -0800)]
Subzero. ARM32. Adds an IsGPR attribute to the register tables.
BUG= https://code.google.com/p/nativeclient/issues/detail?id=4076
R=kschimpf@google.com
Review URL: https://codereview.chromium.org/
1554203002 .
John Porto [Mon, 4 Jan 2016 17:33:41 +0000 (09:33 -0800)]
Subzero. Code organization.
This CL does more than any CL should.
First, it moves all target-specific classes (TargetLowering, Assembler,
and Instructions) to a target-specific namespace. For example, the
::Ice::TargetX8632 class now lives in ::Ice::X8632::TargetX8632. Same
goes for ARM32, X8664, and MIPS32. Now, we have a ton of redundant
prefixes (it should be pretty obvious that ::Ice::X8632::TargetLowering
is an X8632 target lowering), but this is definitively not something
for this CL.
Second, this CL gets rid of the excessive use of 'typename Foo::Bar'
in the X86 templates. These changes appear more intimidating than they
really are, and they were fairly mechanical.
Third, the x86?? Traitses (gollum!) classes are no longer template
instatiation. The previous X86 templates were parameterized with a
X86 TargetLowering, and they assumed that a MachineTraits<Target>
was defined for that TargetLowering. The X86 templates are now
parameterized with a TraitsType, and different backends may have
completely unrelated traits.
Fourth, the X86 templates are no longer members of
::Ice::X86Internal. Instead, each file #include'ing a Ice*X86Base.h
file need to #define X86NAMESPACE to the namespace where the backend
is being defined. With this change, the template instantiation for
X8632 live in ::Ice::X8632, and, for X8664, in ::Ice::X8664.
BUG=
R=stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1548363002 .
John Porto [Wed, 30 Dec 2015 17:55:04 +0000 (09:55 -0800)]
Subzero. X86. Refactors initRegisterSet.
initRegisterSet() for x8632 and x8664 were both huge. This CL refactors
those methods to use a pre-initialized table instead of the result of
expanding the x-macros.
BUG=
R=stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1546373003 .
John Porto [Wed, 30 Dec 2015 15:30:10 +0000 (07:30 -0800)]
Subzero. Refactoring.
This is the first step towards hiding backend-specific stuff from the
rest of subzero. In this CL, all the references to target-specific files
(e.g., IceTargetLoweringX8632.h) are removed from target-independent
files.
This CL also changes the named constructors in the Target-specific
classes (e.g., TargetX8632::create()) to return unique_ptrs.
BUG=
R=stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1551633002 .
Reed Kotler [Mon, 28 Dec 2015 08:10:06 +0000 (00:10 -0800)]
misc cleanup of Compiler::run
This assumes patch from
1534883005 though still needs to rename
validateAndGenerateBuildAttributes to dumpBuildAttributes
BUG=
R=stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1541063002 .
Patch from Reed Kotler <rkotlerimgtec@gmail.com>.
Reed Kotler [Mon, 28 Dec 2015 07:57:10 +0000 (23:57 -0800)]
doxygenize IceClFlags.cpp
This is a first cut at this. More can be done and much of this is just moving what is already in the help for the
commands into Doxygen comments. The documentation can be
expanded to better describe the role of the various
command line options.
BUG=
R=stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1547743002 .
Patch from Reed Kotler <rkotlerimgtec@gmail.com>.
John Porto [Thu, 24 Dec 2015 21:22:18 +0000 (13:22 -0800)]
Subzero. X8664. Fixes filetype=asm.
Fixes filetype=asm for x8664.
BUG= https://bugs.chromium.org/p/nativeclient/issues/detail?id=4077
R=stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1543573002 .
Reed Kotler [Tue, 22 Dec 2015 21:31:59 +0000 (13:31 -0800)]
cleanup and rename validateAndGenerateBuildAttributes
there is no way for these values of build attributes to be other than 0,1 by c++ rules since they are constexpr bool.
BUG=
R=stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1534883005 .
Patch from Reed Kotler <rkotlerimgtec@gmail.com>.
John Porto [Tue, 22 Dec 2015 16:14:00 +0000 (08:14 -0800)]
Subzero. x8664. Resurrects the Target.
After a hiatus while x32 was not available in nacl's llvm, x8664 is
being revived. Rejoice!
The Target is now back to where it was before: the crosstests pass, and
SPEC2k builds and verifies.
Makefile.standalone still has the crosstests for x8664 disabled while
we wait for all the plumbing that's needed for x32 support on nacl's
toolchain to be available.
BUG= https://bugs.chromium.org/p/nativeclient/issues/detail?id=4077
R=stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1537703002 .
Reed Kotler [Sun, 20 Dec 2015 15:57:28 +0000 (07:57 -0800)]
fix doxygen for IceClFlagsExtra.h
BUG=
R=stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1538173002 .
Patch from Reed Kotler <rkotlerimgtec@gmail.com>.
Karl Schimpf [Fri, 18 Dec 2015 23:10:55 +0000 (15:10 -0800)]
Fix minimal build for constant VpushVpopMaxConsecRegs.
BUG=None
R=sehr@chromium.org
Review URL: https://codereview.chromium.org/
1534133003 .
Karl Schimpf [Fri, 18 Dec 2015 16:26:16 +0000 (08:26 -0800)]
Add VPUSH/VPOP instructions to the ARM32 integrated assembler.
Also fixes the corresponding emit methods for vpush and vpop to match
constraint that the maximum number of consecutive registers that can
be pushed/popped is 16.
BUG= https://bugs.chromium.org/p/nativeclient/issues/detail?id=4334
R=jpp@chromium.org, stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1532233002 .
Karl Schimpf [Fri, 18 Dec 2015 15:45:05 +0000 (07:45 -0800)]
Remove "Adjuststack" instruction opcode.
Both the X86 and ARM header files define "Adjuststack" in the
enumeration of target specific opcodes. However, it is not used in
either. Removing constant from the enumeration since it is not used.
BUG= None
R=sehr@chromium.org, stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1527363004 .
Karl Schimpf [Fri, 18 Dec 2015 15:41:06 +0000 (07:41 -0800)]
add RBIT instruction to the ARM integrated assembler.
BUG= https://bugs.chromium.org/p/nativeclient/issues/detail?id=4334
R=stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1530233004 .
Karl Schimpf [Fri, 18 Dec 2015 15:36:02 +0000 (07:36 -0800)]
Add mls instruction to the ARM integrated assembler.
BUG= https://bugs.chromium.org/p/nativeclient/issues/detail?id=4334
R=stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1538443003 .
David Sehr [Fri, 18 Dec 2015 00:53:12 +0000 (16:53 -0800)]
Fix regression in SSE instruction opcodes
BUG=
R=jpp@chromium.org, stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1531303004 .
Reed Kotler [Fri, 18 Dec 2015 00:34:00 +0000 (16:34 -0800)]
add include files from llvm used by subzero into doxygen
this fixes a lot of problems with the doxygen. for example
with this, now doxygen correctly understands the cl::opt
variables in ClFlags.cpp as variables, whereas previously
it thought they were functions.
it's possible to make the llvm includes more selective but
this is a good first cut and better than including all
of llvm includes.
BUG=
R=stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1536773003 .
Patch from Reed Kotler <rkotlerimgtec@gmail.com>.
Reed Kotler [Fri, 18 Dec 2015 00:31:55 +0000 (16:31 -0800)]
add predefines to doxygen
this is added for both standard doxygen and clang assisted
doxygen (which cannot be turned on yet without some additions to the third-party toolchain but can be used locally).
the predefines here are the defaults when subzero is built.
not having these creates the bigger issue when clang
assisted parsing is enabled but should be there always.
BUG=
R=stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1533963002 .
Patch from Reed Kotler <rkotlerimgtec@gmail.com>.
Reed Kotler [Fri, 18 Dec 2015 00:30:26 +0000 (16:30 -0800)]
cleanup doxygen for IceClFlags.h
BUG=
R=stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1527173002 .
Patch from Reed Kotler <rkotlerimgtec@gmail.com>.
David Sehr [Thu, 17 Dec 2015 23:01:30 +0000 (15:01 -0800)]
Add template parameter for suffix to BinopXmm
BUG=
R=jpp@chromium.org, stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1530423002 .
Karl Schimpf [Thu, 17 Dec 2015 16:55:10 +0000 (08:55 -0800)]
Add trap (an UDF instruction) to the ARM integrated Assembler.
Uses the same UDF instruction as used for function alignment.
BUG= https://bugs.chromium.org/p/nativeclient/issues/detail?id=4334
R=stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1519873003 .
Karl Schimpf [Thu, 17 Dec 2015 16:06:01 +0000 (08:06 -0800)]
Add various forms of LDREX/STREX to ARM integrated assembler.
BUG= https://bugs.chromium.org/p/nativeclient/issues/detail?id=4334
R=stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1516863003 .
Karl Schimpf [Thu, 17 Dec 2015 16:02:17 +0000 (08:02 -0800)]
Add CLZ instruction to the ARM integrated assembler.
BUG= https://bugs.chromium.org/p/nativeclient/issues/detail?id=4334
R=stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1521133002 .
John Porto [Thu, 17 Dec 2015 14:19:34 +0000 (06:19 -0800)]
Subzero. Introduces a new LoweringContext::insert() method.
Emitting an instruction in Subzero requires a fair amount of
boilerplated code:
Context.insert(<InstType>::create(Func, <Args>...));
The ordeal is worse if one needs access to the recently create
instructionL
auto *Instr = <InstType>::create(Func, <Args>...);
Context.insert(Instr);
Instr->...
This CL introduces a new LoweringContext::insert() method:
template <<InstType>, <Args>...>
<InstType> *LoweringContext::insert(<Args>...) {
auto *New = Inst::create(Node.Cfg, <Args>...);
insert(New);
return New;
}
This is essentially a syntatic sugar that allows instructions to be
emitted by using
Context.insert<InstType>(<Args>...);
The compiler should be able to inline the calls (and get rid of the
return value) when appropriate.
make bloat reviews a small increase in translator code size
BUG=
R=sehr@chromium.org, stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1527143003 .
Jim Stichnoth [Wed, 16 Dec 2015 20:40:31 +0000 (12:40 -0800)]
Subzero: Fix mid-line comments when using -asm-verbose .
The llvm-mc assembler for x86 uses '#' to start a mid-line comment, while arm32 uses '@'. Those characters cause syntax errors for the other architecture. There doesn't seem to be a common character for starting mid-line comments.
However, the /* ... */ style comment works in both (all?) cases.
(The '#' character at the start of a line, preceded by optional whitespace, starts a comment in both cases.)
BUG= none
TEST= ./pydir/szbuild_spec2k.py --force -v -O2 --filetype=asm --sz=--asm-verbose --target=arm32
TEST= ./pydir/szbuild_spec2k.py --force -v -O2 --filetype=asm --sz=--asm-verbose --target=x8632
R=kschimpf@google.com
Review URL: https://codereview.chromium.org/
1521863002 .
John Porto [Wed, 16 Dec 2015 17:52:10 +0000 (09:52 -0800)]
Subzero. ARM32. Fixes register aliasing bugs.
BUG= https://code.google.com/p/nativeclient/issues/detail?id=4076
R=kschimpf@google.com
Review URL: https://codereview.chromium.org/
1528413002 .
John Porto [Wed, 16 Dec 2015 15:48:25 +0000 (07:48 -0800)]
Subzero. ARM32. Introduces explicit register parameter attribute.
The ARM32 backend used to rely on a specific register declaration order
for calling convention register assignment. This CL introduces a new
field in the ARM32 register tables for explicitly setting which
register holds which parameter.
BUG= https://code.google.com/p/nativeclient/issues/detail?id=4076
R=stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1508423003 .
Jim Stichnoth [Wed, 16 Dec 2015 14:17:58 +0000 (06:17 -0800)]
Subzero: Separate "\t" from "opcode" in asm emission.
Instead of output like this:
Str << "\tmov\t" << ...
we prefer to use string concatenation:
Str << "\t" "mov\t" << ...
That way, "git grep -w mov" can be used for more precise pattern matching.
BUG= none
R=kschimpf@google.com
Review URL: https://codereview.chromium.org/
1523873003 .
David Sehr [Wed, 16 Dec 2015 01:34:55 +0000 (17:34 -0800)]
Fuse icmp/fcmp with select
Allows the optimization of pairs of operations, including 64-bit compares and
selects as well as preparing for idioms (minsd, maxsd, etc.).
BUG=
R=stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1497033002 .
Reed Kotler [Tue, 15 Dec 2015 16:54:14 +0000 (08:54 -0800)]
document dump
BUG=
R=stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1522213002 .
Patch from Reed Kotler <rkotlerimgtec@gmail.com>.
Jim Stichnoth [Tue, 15 Dec 2015 16:53:23 +0000 (08:53 -0800)]
add todo for ALLOW_LLVM_CL
BUG=
R=stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1520383002 .
Jim Stichnoth [Mon, 14 Dec 2015 05:36:33 +0000 (21:36 -0800)]
eliminate code related to --no-ir-gen
BUG=
R=stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1522433004 .
Reed Kotler [Sat, 12 Dec 2015 15:04:17 +0000 (07:04 -0800)]
fix doxygen for IceBuildDefs.h
This is an attempt to make IceBuildDefs more understandable
in the Doxygen produced output, as well as when the various
functions are later referenced from other parts of the subzero docs.
If you look at the doxygen for both the file and the IceBuildDefs namespace, I think it's definitely much
clearer.
I'm still learning Doxygen and always see new things and more that I could have done but Rome was not built in a day.
In my browser:
file:///home/rkotler/nacl_dir/native_client/toolchain_build/src/subzero/docs/html/namespaceIce_1_1BuildDefs.html
and
file:///home/rkotler/nacl_dir/native_client/toolchain_build/src/subzero/docs/html/IceBuildDefs_8h.html
BUG=
R=stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1519113003 .
Patch from Reed Kotler <rkotlerimgtec@gmail.com>.