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Adam Nemet [Sun, 30 Mar 2014 18:07:13 +0000 (18:07 +0000)]
[X86] Adjust cost of FP_TO_UINT v8f32->v8i32
There is no direct AVX instruction to convert to unsigned. I have some ideas
how we may be able to do this with three vector instructions but the current
backend just bails on this to get it scalarized.
See the comment why we need to adjust the cost returned by BasicTTI.
The test is a bit roundabout (and checks assembly rather than bit code) because
I'd like it to work even if at some point we could vectorize this conversion.
Fixes <rdar://problem/
16371920>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205159
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Stepan Dyatkovskiy [Sun, 30 Mar 2014 17:09:54 +0000 (17:09 +0000)]
PR18929:
According to ARM assembler language hash symbol is optional before immediates.
For example, see here for more details:
http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0473j/dom1359731154529.html
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205157
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Hal Finkel [Sun, 30 Mar 2014 15:10:18 +0000 (15:10 +0000)]
Make use of previously generated stores in SelectionDAGLegalize::ExpandExtractFromVectorThroughStack
When expanding EXTRACT_VECTOR_ELT and EXTRACT_SUBVECTOR using
SelectionDAGLegalize::ExpandExtractFromVectorThroughStack, we store the entire
vector and then load the piece we want. This is fine in isolation, but
generating a new store (and corresponding stack slot) for each extraction ends
up producing code of poor quality. When we scalarize a vector operation (using
SelectionDAG::UnrollVectorOp for example) we generate one EXTRACT_VECTOR_ELT
for each element in the vector. This used to generate one stored copy of the
vector for each element in the vector. Now we search the uses of the vector for
a suitable store before generating a new one, which results in much more
efficient scalarization code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205153
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NAKAMURA Takumi [Sun, 30 Mar 2014 14:04:00 +0000 (14:04 +0000)]
llvm/test/MC/ELF/nocompression.s: Loosen an expression to match "llvm-mc.EXE".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205148
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Hal Finkel [Sun, 30 Mar 2014 13:22:59 +0000 (13:22 +0000)]
[PowerPC] Handle VSX v2i64 SIGN_EXTEND_INREG
sitofp from v2i32 to v2f64 ends up generating a SIGN_EXTEND_INREG v2i64 node
(and similarly for v2i16 and v2i8). Even though there are no sign-extension (or
algebraic shifts) for v2i64 types, we can handle v2i32 sign extensions by
converting two and from v2i64. The small trick necessary here is to shift the
i32 elements into the right lanes before the i32 -> f64 step. This is because
of the big Endian nature of the system, we need the i32 portion in the high
word of the i64 elements.
For v2i16 and v2i8 we can do the same, but we first use the default Altivec
shift-based expansion from v2i16 or v2i8 to v2i32 (by casting to v4i32) and
then apply the above procedure.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205146
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Chandler Carruth [Sun, 30 Mar 2014 12:07:07 +0000 (12:07 +0000)]
[Allocator] Lift the slab size and size threshold into template
parameters rather than runtime parameters.
There is only one user of these parameters and they are compile time for
that user. Making these compile time seems to better reflect their
intended usage as well.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205143
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Chandler Carruth [Sun, 30 Mar 2014 11:36:32 +0000 (11:36 +0000)]
[Allocator] Simplify unittests by using the default size parameters in
more places.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205141
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Chandler Carruth [Sun, 30 Mar 2014 11:36:29 +0000 (11:36 +0000)]
[Allocator] Stop forward-declaring BumpPtrAllocator in a few places.
This is a necessary step to lifting some of its configuration into
template parameters rather than runtime parameters.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205140
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Chandler Carruth [Sun, 30 Mar 2014 11:20:25 +0000 (11:20 +0000)]
Don't mark the declarations of the TSan annotation functions as weak.
That causes references to them to be weak references which can collapse
to null if no definition is provided. We call these functions
unconditionally, so a definition *must* be provided. Make the
definitions provided in the .cpp file weak by re-declaring them as weak
just prior to defining them. This should keep compilers which cannot
attach the weak attribute to the definition happy while actually
resolving the symbols correctly during the link.
You might ask yourself upon reading this commit log: how did *any* of
this work before? Well, fun story. It turns out we have some code in
Support (BumpPtrAllocator) which both uses virtual dispatch and has
out-of-line vtables used by that virtual dispatch. If you move the
virtual dispatch into its header in *just* the right way, the optimizer
gets to devirtualize, and remove all references to the vtable. Then the
sad part: the references to this one vtable were the only strong symbol
uses in the support library for llvm-tblgen AFAICT. At least, after
doing something just like this, these symbols stopped getting their weak
definition and random calls to them would segfault instead.
Yay software.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205137
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Chandler Carruth [Sun, 30 Mar 2014 09:08:07 +0000 (09:08 +0000)]
[ARM64] Fix a heap-use-after-free spotted by ASan.
StringRef::lower() returns a std::string. Better yet, we can now stop
thinking about what it returns and write 'auto'. It does the right
thing. =]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205135
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Tim Northover [Sun, 30 Mar 2014 08:30:28 +0000 (08:30 +0000)]
ARM64: uncopy/paste helper function
It was doing functional but highly suspect operations on bools due to
the more limited shifting operands supported by memory instructions.
Should fix some MSVC warnings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205134
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Tim Northover [Sun, 30 Mar 2014 07:35:48 +0000 (07:35 +0000)]
ARM64: remove unused variables
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205133
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Tim Northover [Sun, 30 Mar 2014 07:25:23 +0000 (07:25 +0000)]
ARM64: remove -m32/-m64 mapping with ARM.
This is causing the ARM build-bots to fail since they only include
the ARM backend and can't create an ARM64 target.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205132
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Tim Northover [Sun, 30 Mar 2014 07:25:18 +0000 (07:25 +0000)]
ARM64: override all the things.
Actually, mostly only those in the top-level directory that already
had a "virtual" attached. But it's the thought that counts and it's
been a long day.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205131
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Saleem Abdulrasool [Sun, 30 Mar 2014 07:19:31 +0000 (07:19 +0000)]
Support: correct Windows normalisation
If the environment is unknown and no object file is provided, then assume an
"MSVC" environment, otherwise, set the environment to the object file format.
In the case that we have a known environment but a non-native file format for
Windows (COFF) which is used for MCJIT, then append the custom file format to
the triple as an additional component.
This fixes the MCJIT tests on Windows.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205130
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NAKAMURA Takumi [Sun, 30 Mar 2014 05:01:17 +0000 (05:01 +0000)]
Suppress llvm/test/CodeGen/ARM64 for targeting pecoff. ARM64 is unaware of that.
FIXME: Could we support them?
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205126
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NAKAMURA Takumi [Sun, 30 Mar 2014 05:01:04 +0000 (05:01 +0000)]
llvm/test/Transforms/LoopStrengthReduce/ARM64/lsr-*.ll: Add explicit triple arm64-unknown for targeting pecoff.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205125
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NAKAMURA Takumi [Sun, 30 Mar 2014 04:35:00 +0000 (04:35 +0000)]
X86Subtarget.h: isTargetWindows() should tell whether he is targeting msvc.
FYI, !isWindowsGNUEnvironment() is insufficient. It missed cygwin.
FIXME: The name "isTargetWindows" should be fixed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205124
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Lang Hames [Sun, 30 Mar 2014 04:27:33 +0000 (04:27 +0000)]
[MC] Remove an unused (and broken) variant of the setupForSymbolicDisassembly
method in MCDisassembler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205123
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Lang Hames [Sun, 30 Mar 2014 03:47:00 +0000 (03:47 +0000)]
[PBQP] Move invalid graph nodeId/edgeId methods into base class.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205122
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Rafael Espindola [Sun, 30 Mar 2014 03:26:17 +0000 (03:26 +0000)]
Add a missing break.
Patch by Tobias Güntner.
I tried to write a test, but the only difference is the Changed value that
gets returned. It can be tested with "opt -debug-pass=Executions -functionattrs,
but that doesn't seem worth it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205121
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Saleem Abdulrasool [Sun, 30 Mar 2014 03:22:37 +0000 (03:22 +0000)]
Support: normalize the default triple on Unix
This will fix cross-compiling buildbots (e.g. cygwin). This is in the same vein
as SVN r205070. Apply this to fix the cross-compiling scenario, even though the
preferred solution is to update the build system to normalize the embedded
triple rather than perform this at runtime every time. This is meant to tide us
over until that approach is fleshed out and applied.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205120
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Rafael Espindola [Sun, 30 Mar 2014 02:33:01 +0000 (02:33 +0000)]
Remove dead declarations.
Patch by Tobias Güntner.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205119
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Benjamin Kramer [Sat, 29 Mar 2014 20:16:23 +0000 (20:16 +0000)]
Remove outdated comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205117
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Dmitri Gribenko [Sat, 29 Mar 2014 19:40:32 +0000 (19:40 +0000)]
Fix a few -Wdocumentation warnings
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205116
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Benjamin Kramer [Sat, 29 Mar 2014 19:21:20 +0000 (19:21 +0000)]
Detemplatize LOHDirective.
The ARM64 backend uses it only as a container to keep an MCLOHType and
Arguments around so give it its own little copy. The other functionality
isn't used and we had a crazy method specialization hack in place to
keep it working. Unfortunately that was incompatible with MSVC.
Also range-ify a couple of loops while at it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205114
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Benjamin Kramer [Sat, 29 Mar 2014 18:00:49 +0000 (18:00 +0000)]
ARM64: Remove unused helper function, make others static.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205112
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Benjamin Kramer [Sat, 29 Mar 2014 17:17:15 +0000 (17:17 +0000)]
tblgen: Twinify PrintFatalError.
No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205110
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Tim Northover [Sat, 29 Mar 2014 16:59:27 +0000 (16:59 +0000)]
TableGen: don't save a StringRef to a local std::string.
This caused a failure in some Windows builds.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205109
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Benjamin Kramer [Sat, 29 Mar 2014 16:54:29 +0000 (16:54 +0000)]
Avoid storing Twines.
While there nested ifs into a helper function. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205108
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Hal Finkel [Sat, 29 Mar 2014 16:04:40 +0000 (16:04 +0000)]
[PowerPC] Handle v2i64 comparisons
v2i64 is a legal type under VSX, however we don't have native vector
comparisons. We can handle eq/ne by casting it to an Altivec type, but
everything else must be expanded.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205106
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Tim Northover [Sat, 29 Mar 2014 15:35:57 +0000 (15:35 +0000)]
ARM64: format register strings without creating a local Twine.
It was causing horrible failures on some build-bots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205105
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Logan Chien [Sat, 29 Mar 2014 15:10:22 +0000 (15:10 +0000)]
llvm-mc: Fix build breakage caused by r205050.
When LLVM is not built with zlib, nocompression.s will test
for the error message. But this test case will cause breakage
because the exit code is non-zero. This commit fix this issue
by adding "not" to the command.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205102
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Hal Finkel [Sat, 29 Mar 2014 13:20:31 +0000 (13:20 +0000)]
[PowerPC] VSX instruction latency corrections
The vector divide and sqrt instructions have high latencies, and the scalar
comparisons are like all of the others. On the P7, permutations take an extra
cycle over purely-simple vector ops.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205096
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Stepan Dyatkovskiy [Sat, 29 Mar 2014 13:12:40 +0000 (13:12 +0000)]
Recommitted fix for PR18931, with extended tests set.
Issue subject: Crash using integrated assembler with immediate arithmetic
Fix description:
Expressions like 'cmp r0, #(l1 - l2) >> 3' could not be evaluated on asm parsing stage,
since it is impossible to resolve labels on this stage. In the end of stage we still have
expression (MCExpr).
Then, when we want to encode it, we expect it to be an immediate, but it still an expression.
Patch introduces a Fixup (MCFixup instance), that is processed after main encoding stage.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205094
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Tim Northover [Sat, 29 Mar 2014 11:51:49 +0000 (11:51 +0000)]
ARM64: use 64-bit constant even on 32-bit machines
Another existing bot failure so no tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205093
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Tim Northover [Sat, 29 Mar 2014 11:47:07 +0000 (11:47 +0000)]
ARM64: change format specifier to work on 32-bit targets
Existing tests were failing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205092
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Chandler Carruth [Sat, 29 Mar 2014 11:07:40 +0000 (11:07 +0000)]
[ARM64] Fix 'assert("...")' to be 'assert(0 && "...")'. Otherwise, it is
no assert at all. ;] Some of these should probably be switched to
llvm_unreachable, but I didn't want to perturb the behavior in this
patch.
Found by -Wstring-conversion, which I'll try to turn on in CMake builds
at least as it is finding useful things.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205091
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Tim Northover [Sat, 29 Mar 2014 10:18:08 +0000 (10:18 +0000)]
ARM64: initial backend import
This adds a second implementation of the AArch64 architecture to LLVM,
accessible in parallel via the "arm64" triple. The plan over the
coming weeks & months is to merge the two into a single backend,
during which time thorough code review should naturally occur.
Everything will be easier with the target in-tree though, hence this
commit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205090
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Tim Northover [Sat, 29 Mar 2014 09:03:22 +0000 (09:03 +0000)]
TableGen: avoid dereferencing nullptr variable
ARM64 ended up reaching odder parts of TableGen alias generation than
current backends and caused a segfault.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205089
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Tim Northover [Sat, 29 Mar 2014 09:03:18 +0000 (09:03 +0000)]
CodeGen: add sensible defaults for the ISD::FROUND operation
Some exotic types didn't know how to handle FROUND, which ARM64 uses.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205088
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Tim Northover [Sat, 29 Mar 2014 09:03:13 +0000 (09:03 +0000)]
MC-exceptions: add support for compact-unwind without .eh_frame
ARM64 has compact-unwind information, but doesn't necessarily want to
emit .eh_frame directives as well. This teaches MC about such a
situation so that it will skip .eh_frame info when compact unwind has
been successfully produced.
For functions incompatible with compact unwind, the normal information
is still written.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205087
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Tim Northover [Sat, 29 Mar 2014 08:22:29 +0000 (08:22 +0000)]
CodeGenPrep: wrangle IR to exploit AArch64 tbz/tbnz inst.
Given IR like:
%bit = and %val, #imm-with-1-bit-set
%tst = icmp %bit, 0
br i1 %tst, label %true, label %false
some targets can emit just a single instruction (tbz/tbnz in the
AArch64 case). However, with ISel acting at the basic-block level, all
three instructions need to be together for this to be possible.
This adds another transformation to CodeGenPrep to expose these
opportunities, if targets opt in via the hook.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205086
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Tim Northover [Sat, 29 Mar 2014 08:22:20 +0000 (08:22 +0000)]
MC: add a RefKind field to MCValue
This is principally to allow neater mapping of fixups to relocations
in ARM64 ELF. Without this, there isn't enough information available
to GetRelocType, leading to many more fixup_arm64_... enumerators.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205085
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Tim Northover [Sat, 29 Mar 2014 07:34:53 +0000 (07:34 +0000)]
MachO: Add linker-optimisation hint framework to MC.
Another part of the ARM64 backend (so tests will be following soon).
This is currently used by the linker to relax adrp/ldr pairs into nops
where possible, though could well be more broadly applicable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205084
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Tim Northover [Sat, 29 Mar 2014 07:33:24 +0000 (07:33 +0000)]
MachO: actually set linker-private prefix at MC level.
This was accidentally omitted from r205081.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205083
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Tim Northover [Sat, 29 Mar 2014 07:05:06 +0000 (07:05 +0000)]
MachO: allow each section to have a linker-private symbol
The upcoming ARM64 backend doesn't have section-relative relocations,
so we give each section its own symbol to provide this functionality.
Of course, it doesn't need to appear in the final executable, so
linker-private is the best kind for this purpose.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205081
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Tim Northover [Sat, 29 Mar 2014 07:04:59 +0000 (07:04 +0000)]
Make GetCPISymbol a virtual method.
ARM64 for iOS is going to want to emit these symbols in a
linker-private style for efficiency, but other targets probably don't
want that behaviour.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205080
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Tim Northover [Sat, 29 Mar 2014 07:04:54 +0000 (07:04 +0000)]
Intrinsics: add LLVMHalfElementsVectorType constraint
This is like the LLVMMatchType, except the verifier checks that the
second argument is a vector with the same base type and half the
number of elements.
This will be used by the ARM64 backend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205079
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Rafael Espindola [Sat, 29 Mar 2014 06:26:49 +0000 (06:26 +0000)]
Completely rewrite ELFObjectWriter::RecordRelocation.
I started trying to fix a small issue, but this code has seen a small fix too
many.
The old code was fairly convoluted. Some of the issues it had:
* It failed to check if a symbol difference was in the some section when
converting a relocation to pcrel.
* It failed to check if the relocation was already pcrel.
* The pcrel value computation was wrong in some cases (relocation-pc.s)
* It was missing quiet a few cases where it should not convert symbol
relocations to section relocations, leaving the backends to patch it up.
* It would not propagate the fact that it had changed a relocation to pcrel,
requiring a quiet nasty work around in ARM.
* It was missing comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205076
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Hal Finkel [Sat, 29 Mar 2014 05:29:01 +0000 (05:29 +0000)]
[PowerPC] Add subregister classes for f64 VSX values
We had stored both f64 values and v2f64, etc. values in the VSX registers. This
worked, but was suboptimal because we would always spill 16-byte values even
through we almost always had scalar 8-byte values. This resulted in an
increase in stack-size use, extra memory bandwidth, etc. To fix this, I've
added 64-bit subregisters of the Altivec registers, and combined those with the
existing scalar floating-point registers to form a class of VSX scalar
floating-point registers. The ABI code has also been enhanced to use this
register class and some other necessary improvements have been made.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205075
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Saleem Abdulrasool [Sat, 29 Mar 2014 01:08:53 +0000 (01:08 +0000)]
Windows: canonicalise the default windows triple
Canonicalise the default triple that is used on Windows. This should hopefully
fix the MSVC buildbots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205070
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Akira Hatanaka [Fri, 28 Mar 2014 23:28:07 +0000 (23:28 +0000)]
[x86] Fix printing of register operands with q modifier.
Emit 32-bit register names instead of 64-bit register names if the target does
not have 64-bit general purpose registers.
<rdar://problem/
14653996>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205067
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David Blaikie [Fri, 28 Mar 2014 21:48:31 +0000 (21:48 +0000)]
Debug Compression: Avoid compression debug_frame for now
Turns out debug_frame does use multiple fragments, so it doesn't
compress correctly with the current approach. Disable compressing it for
now while I figure out what's the best solution for it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205059
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David Majnemer [Fri, 28 Mar 2014 21:40:47 +0000 (21:40 +0000)]
X86: Disable IsLegalToCallImmediateAddr for Win32
WinCOFF cannot form PC relative relocations to support absolute
MCValues. We should reenable this once WinCOFF supports emission of
IMAGE_REL_I386_REL32 relocations.
This fixes PR19272.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205058
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David Blaikie [Fri, 28 Mar 2014 21:00:25 +0000 (21:00 +0000)]
Add missing include (for r205050)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205053
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David Blaikie [Fri, 28 Mar 2014 20:45:24 +0000 (20:45 +0000)]
llvm-mc: error when -compress-debug-sections is requested and zlib is not linked
This is a bit of a stab in the dark, since I have zlib on my machine.
Just going to bounce it off the bots & see if it sticks.
Do we have some convention for negative REQUIRES: checks? Or do I just
need to add a feature like I've done here?
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205050
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Hal Finkel [Fri, 28 Mar 2014 20:24:55 +0000 (20:24 +0000)]
[PowerPC] Fix VSX permutation isel
Not only did I invert the indices when I wrote the code, but I also did the
same thing when I wrote the regression test. Oops.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205046
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Rafael Espindola [Fri, 28 Mar 2014 19:58:24 +0000 (19:58 +0000)]
Convert one last llc -filetype=obj test.
Unfortunately this one fails deep inside the mips backend, so xfail it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205042
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Hal Finkel [Fri, 28 Mar 2014 19:58:11 +0000 (19:58 +0000)]
[PowerPC] v2[fi]64 need to be explicitly passed in VSX registers
v2[fi]64 values need to be explicitly passed in VSX registers. This is because
the code in TRI that finds the minimal register class given a register and a
value type will assert if given an Altivec register and a non-Altivec type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205041
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Rafael Espindola [Fri, 28 Mar 2014 19:41:33 +0000 (19:41 +0000)]
Convert llc -filetype=obj test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205040
91177308-0d34-0410-b5e6-
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Rafael Espindola [Fri, 28 Mar 2014 19:38:20 +0000 (19:38 +0000)]
Convert llc -filetype=obj test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205039
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Rafael Espindola [Fri, 28 Mar 2014 19:26:05 +0000 (19:26 +0000)]
Remove bogus test.
It was using "lc -filetype=obj" just to pass the result to
"llvm-objdupm -disassemble" and then filecheck assembly.
The CHECK-NOT would never match anyway since it was missing $.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205036
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Rafael Espindola [Fri, 28 Mar 2014 19:19:28 +0000 (19:19 +0000)]
Convert another llc -filetype=obj test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205033
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Justin Bogner [Fri, 28 Mar 2014 19:14:43 +0000 (19:14 +0000)]
Support: Functions for writing endian specific data to streams.
This adds a new header, EndianStream.h, which supplies an adaptor for
writing endian specific data to a raw_ostream.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205032
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Rafael Espindola [Fri, 28 Mar 2014 19:14:08 +0000 (19:14 +0000)]
Map ELf flags back to more specific section kinds.
With that, convert another llc -filetype=obj test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205031
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Rafael Espindola [Fri, 28 Mar 2014 18:50:26 +0000 (18:50 +0000)]
Parse .gpdword and convert another llc -filetype=obj test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205028
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Rafael Espindola [Fri, 28 Mar 2014 18:34:31 +0000 (18:34 +0000)]
convert another llc -filetype=obj test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205027
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Rafael Espindola [Fri, 28 Mar 2014 18:30:07 +0000 (18:30 +0000)]
Convert "llc -filetype=obj" test into llvm-mc tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205026
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Arnold Schwaighofer [Fri, 28 Mar 2014 17:21:32 +0000 (17:21 +0000)]
SLPVectorizer: Take credit for free extractelement instructions
Extract element instructions that will be removed when vectorzing lower the
cost.
Patch by Arch D. Robison!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205020
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Arnold Schwaighofer [Fri, 28 Mar 2014 17:21:27 +0000 (17:21 +0000)]
SLPVectorizer: Fix typos
Patch by Arch D. Robison!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205019
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Arnold Schwaighofer [Fri, 28 Mar 2014 17:21:22 +0000 (17:21 +0000)]
SLPVectorizer: Ignore users that are insertelements we can reschedule them
Patch by Arch D. Robison!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205018
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Mark Seaborn [Fri, 28 Mar 2014 17:08:57 +0000 (17:08 +0000)]
Exception handling docs: Clarify how the llvm.eh.* intrinsics are used
The non-SJLJ and SJLJ intrinsics are generated by the frontend and
backend respectively.
Differential Revision: http://llvm-reviews.chandlerc.com/D3010
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205017
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David Blaikie [Fri, 28 Mar 2014 17:04:53 +0000 (17:04 +0000)]
Only test compression when linked with zlib.
I'll implement error handling and a negative test in both llvm-mc and
Clang soon.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205016
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Rafael Espindola [Fri, 28 Mar 2014 16:14:12 +0000 (16:14 +0000)]
Add const to a method I missed in the previous commit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205014
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Rafael Espindola [Fri, 28 Mar 2014 16:06:09 +0000 (16:06 +0000)]
Add const.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205013
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Erik Verbruggen [Fri, 28 Mar 2014 14:50:57 +0000 (14:50 +0000)]
Revert "InstCombine: merge constants in both operands of icmp."
This reverts commit r204912, and follow-up commit r204948.
This introduced a performance regression, and the fix is not completely
clear yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205010
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Erik Verbruggen [Fri, 28 Mar 2014 14:42:34 +0000 (14:42 +0000)]
Revert "GVN: merge overflow intrinsics with non-overflow instructions."
This reverts commit r203553, and follow-up commits r203558 and r203574.
I will follow this up on the mailinglist to do it in a way that won't
cause subtle PRE bugs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205009
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Christian Pirker [Fri, 28 Mar 2014 14:35:30 +0000 (14:35 +0000)]
Add ARM big endian Target (armeb, thumbeb)
Reviewed at http://llvm-reviews.chandlerc.com/D3095
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205007
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Tim Northover [Fri, 28 Mar 2014 13:52:56 +0000 (13:52 +0000)]
R600: avoid calling std::next on an iterator that might be end()
This was causing my llc to go into an infinite loop on
CodeGen/R600/address-space.ll (just triggered recently by some allocator
changes).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205005
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Tim Northover [Fri, 28 Mar 2014 12:31:39 +0000 (12:31 +0000)]
Intrinsics: expand semantics of LLVMExtendedVectorType (& trunc)
These are used in the ARM backends to aid type-checking on patterns involving
intrinsics. By making sure one argument is an extended/truncated version of
another.
However, there's no reason to limit them to just vectors types. For example
AArch64 has the instruction "uqshrn sD, dN, #imm" which would naturally use an
intrinsic taking an i64 and returning an i32.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205003
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Chandler Carruth [Fri, 28 Mar 2014 09:18:42 +0000 (09:18 +0000)]
[Allocator Cleanup] Sink the private data members and methods to the
bottom of the interface to make it easier to scan and find the public
API.
No functionality changed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204996
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Chandler Carruth [Fri, 28 Mar 2014 09:08:14 +0000 (09:08 +0000)]
[Allocator Cleanup] Move generic pointer alignment helper out of an
out-of-line private static method and into the collection of inline
alignment helpers in MathExtras.h.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204995
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Chandler Carruth [Fri, 28 Mar 2014 08:53:25 +0000 (08:53 +0000)]
[Allocator Cleanup] Make the growth of the "slab" size of the
BumpPtrAllocator significantly less strange by making it a simple
function of the number of slabs allocated rather than by making it
a recurrance. I *think* the previous behavior was essentially that the
size of the slabs would be doubled after the first 128 were allocated,
and then doubled again each time 64 more were allocated, but only if
every allocation packed perfectly into the slab size. If not, the wasted
space wouldn't be counted toward increasing the size, but allocations
over the size threshold *would*. And since the allocations over the size
threshold might be much larger than the slab size, this could have
somewhat surprising consequences where we rapidly grow the slab size.
This currently requires adding state to the allocator to track the
number of slabs currently allocated, but that isn't too bad. I'm
planning further changes to the allocator that will make this state fall
out even more naturally.
It still doesn't fully decouple the growth rate from the allocations
which are over the size threshold. That fix is coming later.
This specific fix will allow making the entire thing into a more
stateless device and lifting the parameters into template parameters
rather than runtime parameters.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204993
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Chandler Carruth [Fri, 28 Mar 2014 08:53:08 +0000 (08:53 +0000)]
[cleanup] Hoist the initialization and constants for slab sizes to the
top of the default jit memory manager. This will allow them to be used
as template parameters rather than runtime parameters in a subsequent
commit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204992
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David Blaikie [Thu, 27 Mar 2014 23:42:21 +0000 (23:42 +0000)]
PBQP: Minor cleanups to r204857
* Use assignment instead of swap (since the original value is being
destroyed anyway)
* Rename "updateAdjEdgeId" to "setAdjEdgeId"
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204983
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Adrian Prantl [Thu, 27 Mar 2014 23:30:04 +0000 (23:30 +0000)]
C++11: convert verbose loops to range-based loops.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204981
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Hal Finkel [Thu, 27 Mar 2014 23:12:31 +0000 (23:12 +0000)]
[PowerPC] Use a small cleanup pass to remove VSX self copies
As explained in r204976, because of how the allocation of VSX registers
interacts with the call-lowering code, we sometimes end up generating self VSX
copies. Specifically, things like this:
%VSL2<def> = COPY %F2, %VSL2<imp-use,kill>
(where %F2 is really a sub-register of %VSL2, and so this copy is a nop)
This adds a small cleanup pass to remove these prior to post-RA scheduling.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204980
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Manman Ren [Thu, 27 Mar 2014 23:10:04 +0000 (23:10 +0000)]
Provide a target override for the cost of using a callee-saved register
for the first time.
Thanks Andy for the discussion.
rdar://
16162005
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204979
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Saleem Abdulrasool [Thu, 27 Mar 2014 22:50:05 +0000 (22:50 +0000)]
Canonicalise Windows target triple spellings
Construct a uniform Windows target triple nomenclature which is congruent to the
Linux counterpart. The old triples are normalised to the new canonical form.
This cleans up the long-standing issue of odd naming for various Windows
environments.
There are four different environments on Windows:
MSVC: The MS ABI, MSVCRT environment as defined by Microsoft
GNU: The MinGW32/MinGW32-W64 environment which uses MSVCRT and auxiliary libraries
Itanium: The MSVCRT environment + libc++ built with Itanium ABI
Cygnus: The Cygwin environment which uses custom libraries for everything
The following spellings are now written as:
i686-pc-win32 => i686-pc-windows-msvc
i686-pc-mingw32 => i686-pc-windows-gnu
i686-pc-cygwin => i686-pc-windows-cygnus
This should be sufficiently flexible to allow us to target other windows
environments in the future as necessary.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204977
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Hal Finkel [Thu, 27 Mar 2014 22:46:28 +0000 (22:46 +0000)]
[PowerPC] Don't remove self VSX copies in PPCInstrInfo::copyPhysReg
Because of how the allocation of VSX registers interacts with the call-lowering
code, we sometimes end up generating self VSX copies. Specifically, things like
this:
%VSL2<def> = COPY %F2, %VSL2<imp-use,kill>
(where %F2 is really a sub-register of %VSL2, and so this copy is a nop)
The problem is that ExpandPostRAPseudos always assumes that *some* instruction
has been inserted, and adds implicit defs to it. This is a problem if no copy
was inserted because it can cause subtle problems during post-RA scheduling.
These self copies will have to be removed some other way.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204976
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Lang Hames [Thu, 27 Mar 2014 22:45:42 +0000 (22:45 +0000)]
Temporarily remove assert while I dig in to issues that it's causing for LLDB.
<rdar://problem/
16349536>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204975
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Rui Ueyama [Thu, 27 Mar 2014 22:36:06 +0000 (22:36 +0000)]
Revert "[C++11] Do not check __GXX_EXPERIMENTAL_CXX0X__."
This reverts commit r204964 because it disabled "= delete", "constexpr"
and "explicit" on GCC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204973
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Quentin Colombet [Thu, 27 Mar 2014 22:27:41 +0000 (22:27 +0000)]
[X86][Vector Cost Model] Add a comment to explain the workaround
in my previous commit (r204884).
<rdar://problem/
16381225>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204972
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Hal Finkel [Thu, 27 Mar 2014 22:22:48 +0000 (22:22 +0000)]
[PowerPC] Fix v2f64 vector extract and related patterns
First, v2f64 vector extract had not been declared legal (and so the existing
patterns were not being used). Second, the patterns for that, and for
scalar_to_vector, should really be a regclass copy, not a subregister
operation, because the VSX registers directly hold both the vector and scalar data.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204971
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Rui Ueyama [Thu, 27 Mar 2014 21:56:29 +0000 (21:56 +0000)]
[C++11] Do not check __GXX_EXPERIMENTAL_CXX0X__.
Summary: Checking the experimental flag for C++0x is no longer needed.
Differential Revision: http://llvm-reviews.chandlerc.com/D3206
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204964
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Hal Finkel [Thu, 27 Mar 2014 21:26:33 +0000 (21:26 +0000)]
[PowerPC] Expand v2i64 shifts
These operations need to be expanded during legalization so that isel does not
crash. In theory, we might be able to custom lower some of these. That,
however, would need to be follow-up work.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204963
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Manman Ren [Thu, 27 Mar 2014 21:21:57 +0000 (21:21 +0000)]
Register Allocator: refactoring and add comments.
No functionality change. Thanks Andy for reviewing.
rdar://
16162005
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204962
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Rafael Espindola [Thu, 27 Mar 2014 20:49:35 +0000 (20:49 +0000)]
Remove another unused argument.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204961
91177308-0d34-0410-b5e6-
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Hans Wennborg [Thu, 27 Mar 2014 20:48:37 +0000 (20:48 +0000)]
Win installer: provide a pretty icon
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204960
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