OSDN Git Service
Zachary Turner [Fri, 10 Nov 2017 20:57:57 +0000 (20:57 +0000)]
[debuginfo-tests] Make debuginfo-tests work in a standard configuration.
Previously, debuginfo-tests was expected to be checked out into
clang/test and then the tests would automatically run as part of
check-clang. This is not a standard workflow for handling
external projects, and it brings with it some serious drawbacks
such as the inability to depend on things other than clang, which
we will need going forward.
The goal of this patch is to migrate towards a more standard
workflow. To ease the transition for build bot maintainers,
this patch tries not to break the existing workflow, but instead
simply deprecate it to give maintainers a chance to update
the build infrastructure.
Differential Revision: https://reviews.llvm.org/D39605
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317925
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Tony Tye [Fri, 10 Nov 2017 20:51:43 +0000 (20:51 +0000)]
[AMDGPU] AMDGPUUsage.rst minor corrections
Differential Revision: https://reviews.llvm.org/D39887
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317924
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Davide Italiano [Fri, 10 Nov 2017 20:46:21 +0000 (20:46 +0000)]
[SimplifyCFG] Use auto * when the type is obvious. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317923
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Krzysztof Parzyszek [Fri, 10 Nov 2017 20:09:46 +0000 (20:09 +0000)]
Recommit r317904: [Hexagon] Create HexagonISelDAGToDAG.h, NFC
The Windows builder did not reconstruct the HexagonGenDAGISel.inc file
after the TableGen binary has changed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317921
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Konstantin Zhuravlyov [Fri, 10 Nov 2017 20:01:58 +0000 (20:01 +0000)]
AMDGPU/NFC: Split Processors.td into GCNProcessors.td and R600Processors.td
Differential Revision: https://reviews.llvm.org/D39880
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317920
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Daniel Neilson [Fri, 10 Nov 2017 19:38:12 +0000 (19:38 +0000)]
Expand IRBuilder interface for atomic memcpy to require pointer alignments. (NFC)
Summary:
The specification of the @llvm.memcpy.element.unordered.atomic intrinsic requires
that the pointer arguments have alignments of at least the element size. The existing
IRBuilder interface to create a call to this intrinsic does not allow for providing
the alignment of these pointer args. Having an interface that makes it easy to
construct invalid intrinsic calls doesn't seem sensible, so this patch simply
adds the requirement that one provide the argument alignments when using IRBuilder
to create atomic memcpy calls.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317918
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Krzysztof Parzyszek [Fri, 10 Nov 2017 19:27:18 +0000 (19:27 +0000)]
Revert "[Hexagon] Create HexagonISelDAGToDAG.h, NFC"
This reverts r317904: broke Windows build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317916
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Craig Topper [Fri, 10 Nov 2017 19:26:04 +0000 (19:26 +0000)]
[X86] Merge the template method selectAddrOfGatherScatterNode into selectVectorAddr. NFCI
Just need to initialize a couple variables differently based on the node type. No need for a whole separate template method.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317915
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Adrian Prantl [Fri, 10 Nov 2017 19:22:02 +0000 (19:22 +0000)]
Add back target triple to test which I accidentally removed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317912
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Sanjoy Das [Fri, 10 Nov 2017 19:13:35 +0000 (19:13 +0000)]
[CVP] Remove some {s|u}add.with.overflow checks.
Summary:
This adds logic to CVP to remove some overflow checks. It uses LVI to remove
operations with at least one constant. Specifically, this can remove many
overflow intrinsics immediately following an overflow check in the source code,
such as:
if (x < INT_MAX)
... x + 1 ...
Patch by Joel Galenson!
Reviewers: sanjoy, regehr
Reviewed By: sanjoy
Subscribers: fhahn, pirama, srhines, llvm-commits
Differential Revision: https://reviews.llvm.org/D39483
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317911
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Mandeep Singh Grang [Fri, 10 Nov 2017 19:09:28 +0000 (19:09 +0000)]
[RISCV] Silence an unused variable warning in release builds [NFC]
Summary:
Also minor cleanups:
1. Avoided multiple calls to Fixup.getKind()
2. Avoided multiple calls to getFixupKindInfo()
3. Removed a redundant return.
Reviewers: asb, apazos
Reviewed By: asb
Subscribers: rbar, johnrusso, llvm-commits
Differential Revision: https://reviews.llvm.org/D39881
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317908
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Craig Topper [Fri, 10 Nov 2017 18:48:18 +0000 (18:48 +0000)]
[X86] Add test case to demonstrate failure to fold the address computation of a simple gather from a global array. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317905
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Krzysztof Parzyszek [Fri, 10 Nov 2017 18:39:45 +0000 (18:39 +0000)]
[Hexagon] Create HexagonISelDAGToDAG.h, NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317904
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Krzysztof Parzyszek [Fri, 10 Nov 2017 18:36:04 +0000 (18:36 +0000)]
Allow separation of declarations and definitions in <Target>ISelDAGToDAG.inc
This patch adds the ability to include the member function declarations
in the instruction selector class separately from the member bodies.
Defining GET_DAGISEL_DECL macro to any value will only include the member
declarations. To include bodies, define GET_DAGISEL_BODY macro to be the
selector class name. Example:
class FooDAGToDAGISel : public SelectionDAGISel {
// Pull in declarations only.
#define GET_DAGISEL_DECL
#include "FooISelDAGToDAG.inc"
};
// Include the function bodies (with names qualified with the provided
// class name).
#define GET_DAGISEL_BODY FooDAGToDAGISel
#include "FooISelDAGToDAG.inc"
When neither of the two macros are defined, the function bodies are emitted
inline (in the same way as before this patch).
Differential Revision: https://reviews.llvm.org/D39596
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317903
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Lang Hames [Fri, 10 Nov 2017 17:41:28 +0000 (17:41 +0000)]
[ADT] Rewrite mapped_iterator in terms of iterator_adaptor_base.
Summary:
This eliminates the boilerplate implementation of the iterator interface in
mapped_iterator.
This patch also adds unit tests that verify that the mapped function is applied
by operator* and operator->, and that references returned by the map function
are returned via operator*.
Reviewers: dblaikie, chandlerc
Subscribers: llvm-commits, mgorny
Differential Revision: https://reviews.llvm.org/D39855
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317902
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Craig Topper [Fri, 10 Nov 2017 17:10:57 +0000 (17:10 +0000)]
[X86] Add a def file to CPU vendor, type, and subtype encodings used by Host.cpp
Summary:
I want to leverage this to clean up some of the code in clang. This will allow us to simplify D39521 which was trying to do some of the same.
If we accurately keep the code in Host.cpp synced with new CPUs added to compile-rt/libgcc we should be able to use this file as a proxy for what's implemented in the libraries.
The entries for the CPUs recognized by the libraries use separate macros that define additional parameters like the name for __builtin_cpu_is and an alias string for the couple cases where __builtin_cpu_is accepts two different names.
All of the macros contain an ARCHNAME that is usually the same as the __builtin_cpu_is string, but sometimes isn't. This represents the name recognized by X86.td and -march.
I'm following the precedent set by ARM and AArch64 and adding this information to lib/Support/TargetParser.cpp
Reviewers: erichkeane, echristo, asbirlea
Reviewed By: echristo
Subscribers: llvm-commits, aemerson, kristof.beyls
Differential Revision: https://reviews.llvm.org/D39782
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317900
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Bob Haarman [Fri, 10 Nov 2017 17:08:21 +0000 (17:08 +0000)]
LTO: don't fatal when value for cache key already exists
Summary:
LTO/Caching.cpp uses file rename to atomically set the value for a
cache key. On Windows, this fails when the destination file already
exists. Previously, LLVM would report_fatal_error in such
cases. However, because the old and the new value for the cache key
are supposed to be equivalent, it actually doesn't matter which one we
keep. This change makes it so that failing the rename when an openable
file with the desired name already exists causes us to report success
instead of fataling.
Reviewers: pcc, hans
Subscribers: mehdi_amini, llvm-commits, hiraditya
Differential Revision: https://reviews.llvm.org/D39874
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317899
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Adrian Prantl [Fri, 10 Nov 2017 16:36:04 +0000 (16:36 +0000)]
Move test into X86 subdirectory.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317896
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Jatin Bhateja [Fri, 10 Nov 2017 16:26:04 +0000 (16:26 +0000)]
[WebAssembly] Fix stack offsets of return values from call lowering.
Summary: Fixes PR35220
Reviewers: vadimcn, alexcrichton
Reviewed By: alexcrichton
Subscribers: pepyakin, alexcrichton, jfb, dschuff, sbc100, jgravelle-google, llvm-commits, aheejin
Differential Revision: https://reviews.llvm.org/D39866
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317895
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Florian Hahn [Fri, 10 Nov 2017 16:25:16 +0000 (16:25 +0000)]
[AArch64][SVE] Asm: More concise test format
Change the test format for SVE assembler/disassembler tests to be less verbose and have both tests in the same file.
The tests check the following:
* All instructions are assembled correctly into the right encoding.
* All instructions are disassembled correctly (into the preferred assembly format)
* Without -mattr=+sve the instructions are not assembled.
* Without -mattr=+sve the instructions are not disassembled.
This patch also adds several negative tests for SVE add/sub.
Patch by Sander De Smalen.
Reviewed by: rengolin, fhahn
Differential Revision: https://reviews.llvm.org/D39792
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317894
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Simon Pilgrim [Fri, 10 Nov 2017 15:49:41 +0000 (15:49 +0000)]
[X86] Add scheduling tests for DAA/DAS
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317892
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Igor Laevsky [Fri, 10 Nov 2017 15:08:14 +0000 (15:08 +0000)]
[llvm-opt-fuzzer] Add missed library dependence. Fir for rL317883
Differential Revision: https://reviews.llvm.org/D39555
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317889
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Simon Pilgrim [Fri, 10 Nov 2017 13:43:04 +0000 (13:43 +0000)]
[X86] Test non-i64 shld/shll tests on x86_64 targets as well as i686
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317888
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Igor Laevsky [Fri, 10 Nov 2017 13:19:14 +0000 (13:19 +0000)]
[llvm-opt-fuzzer] Fix unused variable warning after rL317883
Differential Revision: https://reviews.llvm.org/D39555
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317887
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Simon Pilgrim [Fri, 10 Nov 2017 12:32:34 +0000 (12:32 +0000)]
[X86] Add scheduling tests
- CBW etc sign extensions
- CLC/CLD/CMC flag modifiers
- CPUID
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317885
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Alexander Timofeev [Fri, 10 Nov 2017 12:21:10 +0000 (12:21 +0000)]
[AMDGPU] Prevent Machine Copy Propagation from replacing live copy with the dead one
Differential revision: https://reviews.llvm.org/D38754
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317884
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Igor Laevsky [Fri, 10 Nov 2017 12:19:08 +0000 (12:19 +0000)]
[llvm-opt-fuzzer] Introduce llvm-opt-fuzzer for fuzzing optimization passes
This change adds generic fuzzing tools capable of running libFuzzer tests on
any optimization pass or combination of them.
Differential Revision: https://reviews.llvm.org/D39555
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317883
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Simon Pilgrim [Fri, 10 Nov 2017 12:04:39 +0000 (12:04 +0000)]
[X86] Added TODO list for missing generic x86 instruction scheduling tests.
Not sure if we want to add the more exotic system instructions (IRET etc.) as well?
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317882
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Karl-Johan Karlsson [Fri, 10 Nov 2017 09:48:40 +0000 (09:48 +0000)]
[RegisterCoalescer] Move debug value after rematerialize trivial def
Summary:
The associated debug value is updated when the virtual source register
of a copy is completely eliminated and replaced with a rematerialize
value in the defed register of the copy. As the debug value now is
associated with another register it also need to be moved, otherwise
the debug value isn't valid.
Reviewers: aprantl
Reviewed By: aprantl
Subscribers: MatzeB, llvm-commits, qcolombet
Differential Revision: https://reviews.llvm.org/D38024
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317880
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Jonas Paulsson [Fri, 10 Nov 2017 08:46:26 +0000 (08:46 +0000)]
[RegAlloc, SystemZ] Increase number of LOCRs by passing "hard" regalloc hints.
* The method getRegAllocationHints() is now of bool type instead of void. If
true is returned, regalloc (AllocationOrder) will *only* try to allocate the
hints, as opposed to merely trying them before non-hinted registers.
* TargetRegisterInfo::getRegAllocationHints() is implemented for SystemZ with
an increase in number of LOCRs.
In this case, it is desired to force the hints even though there is a slight
increase in spilling, because if a non-hinted register would be allocated,
the LOCRMux pseudo would have to be expanded with a jump sequence. The LOCR
(Load On Condition) SystemZ instruction must have both operands in either the
low or high part of the 64 bit register.
Reviewers: Quentin Colombet and Ulrich Weigand
https://reviews.llvm.org/D36795
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317879
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Craig Topper [Fri, 10 Nov 2017 08:22:37 +0000 (08:22 +0000)]
[X86] Add support for combining FMADDSUB(A, B, FNEG(C))->FMSUBADD(A, B, C)
Support the opposite direction as well. Also add a TODO for not being able to combine FMSUB/FNMADD/FNMSUB with FNEG.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317878
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Craig Topper [Fri, 10 Nov 2017 06:07:37 +0000 (06:07 +0000)]
[X86] Remove GCCBuiltin from intrinsics that are no longer used by clang.
I've also added TODOs for intrinsic removal.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317876
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Yaxun Liu [Fri, 10 Nov 2017 02:03:28 +0000 (02:03 +0000)]
[AMDGPU] Fix pointer info for lowering load/store for r600 for amdgiz environment
r600 uses dummy pointer info for lowering load/store. Since dummy pointer info
assumes address space 0, this causes isel failure when temporary load/store SDNodes
are generated for amdgiz environment.
Since the offest is not constant, FixedStack pseudo source value cannot be used
to create the pointer info. This patch creates pointer info using llvm undef value.
At least this provides correct address space so that isel can be done correctly.
Differential Revision: https://reviews.llvm.org/D39698
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317862
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Yaxun Liu [Fri, 10 Nov 2017 01:53:24 +0000 (01:53 +0000)]
[AMDGPU] Fix pointer info for pseudo source for r600
The pointer info for pseudo source for r600 is not correct when
alloca addr space is not 0, which causes invalid SDNode for r600---amdgiz.
This patch fixes that.
Differential Revision: https://reviews.llvm.org/D39670
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317861
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Tony Tye [Fri, 10 Nov 2017 01:00:54 +0000 (01:00 +0000)]
[AMDGPU] Update code object description
- Use ELF header flags to identify processor.
- Remove isa note record.
- Add target feature section.
- Make metadata for NumVGPRs, NumSGPRs and MaxFlatWorkGroupSize required.
- Add FixedWorkGroupSize to CodeProps metadata.
- Add ReqdWorkGroupSize* to kernel descriptor and move MaxFlatWorkGroupSize to be adjacent.
- Move IsXNACKEnabled in the kernel descriptor to be at the end of the unused flags.
- Remove IsDynamicCallStack from the metadata and kernel descriptor.
- Remove legacy debugger metadata.
- Remove old XNACK enabled processor names.
Differential Revision: https://reviews.llvm.org/D39828
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317855
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Volodymyr Sapsai [Fri, 10 Nov 2017 00:47:47 +0000 (00:47 +0000)]
[ThinLTO] Fix missing call graph edges for calls with bitcasts.
This change doesn't fix the root cause of the miscompile PR34966 as the root
cause is in the linker ld64. This change makes call graph more complete
allowing to have better module imports/exports.
rdar://problem/
35344706
Reviewers: tejohnson
Reviewed By: tejohnson
Subscribers: mehdi_amini, inglorion, eraman, llvm-commits, hiraditya
Differential Revision: https://reviews.llvm.org/D39356
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317853
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Bob Haarman [Fri, 10 Nov 2017 00:17:31 +0000 (00:17 +0000)]
[support] allocate exact size required for mapping in Support/Windws/Path.inc
Summary:
zturner suggested that mapped_file_region::init() on Windows seems to
create mappings that are larger than they need to be: Offset+Size
instead of Size. Indeed, that appears to be the case. I confirmed that
tests pass with mappings of just Size bytes, and fail with Size-1
bytes, suggesting that Size is indeed the correct value.
Reviewers: amccarth, zturner
Reviewed By: zturner
Subscribers: hiraditya, llvm-commits
Differential Revision: https://reviews.llvm.org/D39876
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317850
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Easwaran Raman [Thu, 9 Nov 2017 23:17:52 +0000 (23:17 +0000)]
[SimplifyCFG] Fix a test case.
This was first committed in r317845, but had the order of branch weights
wrong and didn't properly check the output.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317848
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Easwaran Raman [Thu, 9 Nov 2017 22:52:20 +0000 (22:52 +0000)]
Add a wrapper function to set branch weights metadata.
Summary:
This wrapper checks if there is at least one non-zero weight before
setting the metadata.
Reviewers: davidxl
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D39872
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317845
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Sanjay Patel [Thu, 9 Nov 2017 22:41:39 +0000 (22:41 +0000)]
[Reassociate] regenerate test checks; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317841
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Kostya Serebryany [Thu, 9 Nov 2017 21:35:28 +0000 (21:35 +0000)]
[libFuzzer] update links in the docs
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317837
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Kostya Serebryany [Thu, 9 Nov 2017 21:32:02 +0000 (21:32 +0000)]
[libFuzzer] update the docs, document how to resume the merge
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317836
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Zachary Turner [Thu, 9 Nov 2017 20:38:16 +0000 (20:38 +0000)]
Add a Cross-compilation toolchain file for MSVC.
With this patch, you can now cross-compile for Windows
on non-Windows hosts.
Differential Revision: https://reviews.llvm.org/D39814
This allows cross-compiling for windows on other platforms.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317830
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Paul Robinson [Thu, 9 Nov 2017 20:01:31 +0000 (20:01 +0000)]
Fix out-of-order stepping behavior in programs with hoisted constants.
When the Constant Hoisting pass moves expensive constants into a
common block, it would assign a debug location equal to the last use
of that constant. While this is certainly intuitive, it places the
constant in an out-of-order location, according to the debug location
information. This produces out-of-order stepping when debugging
programs affected by this pass.
This patch creates in-order stepping behavior by merging the debug
locations for hoisted constants, and the new insertion point.
Patch by Matthew Voss!
Differential Revision: https://reviews.llvm.org/D38088
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317827
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Alex Bradbury [Thu, 9 Nov 2017 20:01:25 +0000 (20:01 +0000)]
[utils] Fix RISC-V support in update_llc_test_checks.py
scrub_asm_riscv now takes two arguments rather than one.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317826
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Adrian Prantl [Thu, 9 Nov 2017 19:50:20 +0000 (19:50 +0000)]
Preserve debug info when DAG-combinging (zext (truncate x)) -> (and x, mask).
rdar://problem/
27139077
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317825
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Zachary Turner [Thu, 9 Nov 2017 19:31:52 +0000 (19:31 +0000)]
[Support] Make llvm::Error and Expected faster.
Whenever LLVM_ENABLE_ABI_BREAKING_CHECKS is enabled, which
is usually the case for example when asserts are enabled,
Error's destructor does some additional checking to make sure
that that it does not represent an error condition and that it
was checked.
However, this is -- by definition -- not the likely codepath.
Some profiling shows that at least with some compilers, simply
calling assertIsChecked -- in a release build with full
optimizations -- can account for up to 15% of the entire
runtime of the program, even though this function should almost
literally be a no-op.
The problem is that the assertIsChecked function can be considered
too big to inline depending on the compiler's inliner. Since it's
unlikely to ever need to failure path though, we can move it out
of line and force it to not be inlined, so that the fast path
can be inlined.
In my test (using lld to link clang with CMAKE_BUILD_TYPE=Release
and LLVM_ENABLE_ASSERTIONS=ON), this reduces link time from 27
seconds to 23.5 seconds, which is a solid 15% gain.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317824
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Alexey Bataev [Thu, 9 Nov 2017 19:07:16 +0000 (19:07 +0000)]
[SLP] Fix PR23510: Try to find best possible vectorizable stores.
Summary:
The analysis of the store sequence goes in straight order - from the
first store to the last. Bu the best opportunity for vectorization will
happen if we're going to use reverse order - from last store to the
first. It may be best because usually users have some initialization
part + further processing and this first initialization may confuse
SLP vectorizer.
Reviewers: RKSimon, hfinkel, mkuper, spatel
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D39606
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317821
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Sanjay Patel [Thu, 9 Nov 2017 18:26:49 +0000 (18:26 +0000)]
[Reassociate] auto-generate test checks; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317819
91177308-0d34-0410-b5e6-
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Sanjay Patel [Thu, 9 Nov 2017 18:14:24 +0000 (18:14 +0000)]
[Reassociate] don't name values "tmp"; NFCI
The toxic stew of created values named 'tmp' and tests that already have
values named 'tmp' and CHECK lines looking for values named 'tmp' causes
bad things to happen in our test line auto-generation scripts because it
wants to use 'TMP' as a prefix for unnamed values. Use less 'tmp' to
avoid that.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317818
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Mandeep Singh Grang [Thu, 9 Nov 2017 18:05:17 +0000 (18:05 +0000)]
[GlobalMerge] Stable sort GlobalSets to fix non-deterministic sort order
Summary: This fixes failure in CodeGen/AArch64/global-merge-group-by-use.ll uncovered by D39245.
Reviewers: ab, asl
Reviewed By: ab
Subscribers: aemerson, llvm-commits, kristof.beyls
Differential Revision: https://reviews.llvm.org/D39635
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317817
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Nuno Lopes [Thu, 9 Nov 2017 17:35:36 +0000 (17:35 +0000)]
revert r317812 [BasicAA] fix build break by converting the previously introduced assert into an if stmt
The code has a bug, but some tests regress.
I'll discuss this further on the mailing list.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317815
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Nuno Lopes [Thu, 9 Nov 2017 17:06:42 +0000 (17:06 +0000)]
[BasicAA] fix build break by converting the previously introduced assert into an if stmt
Apparently V1Size == -1 doest imply V2Size == -1, which is a bit surprising to me.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317812
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Sanjay Patel [Thu, 9 Nov 2017 16:46:04 +0000 (16:46 +0000)]
revert r317809 - [Reassociate] regenerate test checks; NFC
The reassociate pass generates named values such as "%tmp2" which trips up the script's regex's
because the script uses a 'TMP' prefix for unnamed values (%2).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317810
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Sanjay Patel [Thu, 9 Nov 2017 16:35:30 +0000 (16:35 +0000)]
[Reassociate] regenerate test checks; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317809
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Ulrich Weigand [Thu, 9 Nov 2017 16:31:57 +0000 (16:31 +0000)]
[SystemZ] Add support for the "o" inline asm constraint
We don't really need any special handling of "offsettable"
memory addresses, but since some existing code uses inline
asm statements with the "o" constraint, add support for this
constraint for compatibility purposes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317807
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Sanjay Patel [Thu, 9 Nov 2017 16:30:19 +0000 (16:30 +0000)]
[Reassociate] regenerate test checks; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317806
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Sanjay Patel [Thu, 9 Nov 2017 16:25:35 +0000 (16:25 +0000)]
[Reassociate] add check lines; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317805
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Sanjay Patel [Thu, 9 Nov 2017 16:23:32 +0000 (16:23 +0000)]
[Reassociate] add tests with 'reassoc' FMF and regenerate checks; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317804
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Nuno Lopes [Thu, 9 Nov 2017 16:16:46 +0000 (16:16 +0000)]
[BasicAA] add assertion for corner case in aliasGEP()
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317803
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Simon Dardis [Thu, 9 Nov 2017 16:02:18 +0000 (16:02 +0000)]
[mips] Correct microMIP's jump and add unconditional branch pseudo
Correct the definition of 'j' as being unavailable for microMIPS32R6 and
provide the 'b' assembly idiom for codegen purposes for microMIPS32r3.
Provide the necessary 'br' pattern for microMIPS32R6 as it now longer
incorrectly uses the 'j' instruction.
Reviewers: atanasyan
Differential Revision: https://reviews.llvm.org/D39741
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317801
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Alex Bradbury [Thu, 9 Nov 2017 15:45:42 +0000 (15:45 +0000)]
[RISCV] Re-generate test/CodeGen/RISCV/alu32.ll using update_llc_test_checks.py
No real change, but makes it marginally easier to merge the remainder of the
out-of-tree patches.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317796
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Alex Bradbury [Thu, 9 Nov 2017 15:00:03 +0000 (15:00 +0000)]
[RISCV] MC layer support for the standard RV32A instruction set extension
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317791
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Simon Pilgrim [Thu, 9 Nov 2017 14:56:17 +0000 (14:56 +0000)]
Fix 'not all control paths return a value' warning on MSVC builds
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317790
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Dave Lee [Thu, 9 Nov 2017 14:53:43 +0000 (14:53 +0000)]
Reapply: Allow yaml2obj to order implicit sections for ELF
Summary:
This change allows yaml input to control the order of implicitly added sections
(`.symtab`, `.strtab`, `.shstrtab`). The order is controlled by adding a
placeholder section of the given name to the Sections field.
This change is to support changes in D39582, where it is desirable to control
the location of the `.dynsym` section.
This reapplied version fixes:
1. use of a function call within an assert
2. failing lld test which has an unnamed section
3. incorrect section count when given an unnamed section
Additionally, one more test to cover the unnamed section failure.
Reviewers: compnerd, jakehehrlich
Reviewed By: jakehehrlich
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D39749
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317789
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Alex Bradbury [Thu, 9 Nov 2017 14:46:30 +0000 (14:46 +0000)]
[RISCV] MC layer support for the standard RV32M instruction set extension
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317788
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Andrew V. Tischenko [Thu, 9 Nov 2017 14:19:59 +0000 (14:19 +0000)]
Sched model improving on btver2: JFPU01 resource, vtestp* for xmm.
Differential Revision: https://reviews.llvm.org/D39802
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317785
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Andrew V. Tischenko [Thu, 9 Nov 2017 12:45:40 +0000 (12:45 +0000)]
Add -print-schedule scheduling comments to inline asm.
Differential Revision: https://reviews.llvm.org/D39728
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317782
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Craig Topper [Thu, 9 Nov 2017 08:26:26 +0000 (08:26 +0000)]
[X86] Give priority to EVEX FMA instructions over FMA4 instructions.
No existing processor has both so it doesn't really matter what we do here. But we were previously just relying on pattern order which gave FMA4 priority.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317775
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Vitaly Buka [Thu, 9 Nov 2017 07:46:13 +0000 (07:46 +0000)]
Fix "default label in switch which covers all enumeration values" warning
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317771
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Sanjoy Das [Thu, 9 Nov 2017 06:31:33 +0000 (06:31 +0000)]
[SectionMemoryManager] Abstract out mmap, munmap, mprotect even more ; NFC
Summary:
This will let ORC JIT clients plug in custom logic for the mmap, munmap and
mprotect paths.
Reviewers: loladiro, dblaikie
Subscribers: mcrosier, llvm-commits
Differential Revision: https://reviews.llvm.org/D39300
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317770
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Craig Topper [Thu, 9 Nov 2017 06:17:05 +0000 (06:17 +0000)]
[X86] Make X86ISD::FMADDS3 isel patterns commutable.
This was missed when FMADDS3 was split from X86ISD::FMADDS3_RND.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317769
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Serguei Katkov [Thu, 9 Nov 2017 06:02:18 +0000 (06:02 +0000)]
[GVN PRE] Patch the source for Phi node in PRE
We must patch all existing incoming values of Phi node,
otherwise it is possible that we can see poison
where program does not expect to see it.
This is the similar what GVN does.
The added test test/Transforms/GVN/PRE/pre-jt-add.ll shows an
example of wrong optimization done by jump threading due to
GVN PRE did not patch existing incoming value.
Reviewers: mkazantsev, wmi, dberlin, davide
Reviewed By: dberlin
Subscribers: efriedma, llvm-commits
Differential Revision: https://reviews.llvm.org/D39637
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317768
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Craig Topper [Thu, 9 Nov 2017 04:10:42 +0000 (04:10 +0000)]
[X86] Rename the VEX scalar fma builtins to end with a '3' to match gcc
I think we need to use different builtins for the FMA4 instructions since those instructions zero the upper bits and FMA3 instructions pass the bits through.
So this moves the existing builtins to be the FMA3 versions. New versions will be added for FMA4.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317765
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Vedant Kumar [Thu, 9 Nov 2017 02:50:24 +0000 (02:50 +0000)]
[llvm-cov] Fix more -path-equivalence test bugs
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317764
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Vedant Kumar [Thu, 9 Nov 2017 02:42:34 +0000 (02:42 +0000)]
[llvm-cov] Fix a -path-equivalence bug in a test
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317763
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Vedant Kumar [Thu, 9 Nov 2017 02:33:44 +0000 (02:33 +0000)]
[llvm-cov] Don't render empty region marker lines
This fixes an issue where llvm-cov prints an empty line, thinking it
needs to display region markers, when it actually doesn't.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317762
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Vedant Kumar [Thu, 9 Nov 2017 02:33:43 +0000 (02:33 +0000)]
[Coverage] Use the wrapped segment when a line has entry segments
We've worked around bugs in the frontend by ignoring the count from
wrapped segments when a line has at least one region entry segment.
Those frontend bugs are now fixed, so it's time to regenerate the
checked-in covmapping files and remove the workaround.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317761
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Marek Olsak [Thu, 9 Nov 2017 01:52:55 +0000 (01:52 +0000)]
AMDGPU: Merge BUFFER_STORE_DWORD_OFFEN/OFFSET into x2, x4
Summary:
Only 56 shaders (out of 48486) are affected.
Totals from affected shaders (changed stats only):
SGPRS: 2420 -> 2460 (1.65 %)
Spilled VGPRs: 94 -> 112 (19.15 %)
Scratch size: 524 -> 528 (0.76 %) dwords per thread
Code Size: 187400 -> 184992 (-1.28 %) bytes
One DiRT Showdown shader spills 6 more VGPRs.
One Grid Autosport shader spills 12 more VGPRs.
The other 54 shaders only have a decrease in code size.
(I'm ignoring the SGPR noise)
Reviewers: arsenm, nhaehnle
Subscribers: kzhuravl, wdng, yaxunl, dstuttard, tpr, llvm-commits, t-tye
Differential Revision: https://reviews.llvm.org/D39012
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317755
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Marek Olsak [Thu, 9 Nov 2017 01:52:48 +0000 (01:52 +0000)]
AMDGPU: Lower buffer store and atomic intrinsics manually
Summary:
Without this, SIMemoryLegalizer inserts s_waitcnt vmcnt(0) before every
buffer store and atomic instruction.
Reviewers: arsenm, nhaehnle
Subscribers: kzhuravl, wdng, yaxunl, dstuttard, tpr, llvm-commits, t-tye
Differential Revision: https://reviews.llvm.org/D39060
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317754
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Marek Olsak [Thu, 9 Nov 2017 01:52:36 +0000 (01:52 +0000)]
AMDGPU: Merge BUFFER_LOAD_DWORD_OFFSET into x2, x4
Summary: Only 3 (out of 48486) shaders are affected.
Reviewers: arsenm, nhaehnle
Subscribers: kzhuravl, wdng, yaxunl, dstuttard, tpr, t-tye, llvm-commits
Differential Revision: https://reviews.llvm.org/D38951
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317753
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Marek Olsak [Thu, 9 Nov 2017 01:52:30 +0000 (01:52 +0000)]
AMDGPU: Merge BUFFER_LOAD_DWORD_OFFEN into x2, x4
Summary:
-9.9% code size decrease in affected shaders.
Totals (changed stats only):
SGPRS:
2151462 ->
2170646 (0.89 %)
VGPRS:
1634612 ->
1640288 (0.35 %)
Spilled SGPRs: 8942 -> 8940 (-0.02 %)
Code Size:
52940672 ->
51727288 (-2.29 %) bytes
Max Waves: 373066 -> 371718 (-0.36 %)
Totals from affected shaders:
SGPRS: 283520 -> 302704 (6.77 %)
VGPRS: 227632 -> 233308 (2.49 %)
Spilled SGPRs: 3966 -> 3964 (-0.05 %)
Code Size:
12203080 ->
10989696 (-9.94 %) bytes
Max Waves: 44070 -> 42722 (-3.06 %)
Reviewers: arsenm, nhaehnle
Subscribers: kzhuravl, wdng, yaxunl, dstuttard, tpr, llvm-commits, t-tye
Differential Revision: https://reviews.llvm.org/D38950
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317752
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Marek Olsak [Thu, 9 Nov 2017 01:52:23 +0000 (01:52 +0000)]
AMDGPU: Merge S_BUFFER_LOAD_DWORD_IMM into x2, x4
Summary:
Only constant offsets (*_IMM opcodes) are merged.
It reuses code for LDS load/store merging.
It relies on the scheduler to group loads.
The results are mixed, I think they are mostly positive. Most shaders are
affected, so here are total stats only:
SGPRS:
2072198 ->
2151462 (3.83 %)
VGPRS:
1628024 ->
1634612 (0.40 %)
Spilled SGPRs: 7883 -> 8942 (13.43 %)
Spilled VGPRs: 97 -> 101 (4.12 %)
Scratch size: 1488 -> 1492 (0.27 %) dwords per thread
Code Size:
60222620 ->
52940672 (-12.09 %) bytes
Max Waves: 374337 -> 373066 (-0.34 %)
There is 13.4% increase in SGPR spilling, DiRT Showdown spills a few more
VGPRs (now 37), but 12% decrease in code size.
These are the new stats for SGPR spilling. We already spill a lot SGPRs,
so it's uncertain whether more spilling will make any difference since
SGPRs are always spilled to VGPRs:
SGPR SPILLING APPS Shaders SpillSGPR AvgPerSh
alien_isolation 2938 100 0.0
batman_arkham_origins 589 6 0.0
bioshock-infinite 1769 4 0.0
borderlands2 3968 22 0.0
counter_strike_glob.. 1142 60 0.1
deus_ex_mankind_div.. 1410 79 0.1
dirt-showdown 533 4 0.0
dirt_rally 364 1163 3.2
divinity 1052 2 0.0
dota2 1747 7 0.0
f1-2015 776 1515 2.0
grid_autosport 1767 1505 0.9
hitman 1413 273 0.2
left_4_dead_2 1762 4 0.0
life_is_strange 1296 26 0.0
mad_max 358 96 0.3
metro_2033_redux 2670 60 0.0
payday2 1362 22 0.0
portal 474 3 0.0
saints_row_iv 1704 8 0.0
serious_sam_3_bfe 392 1348 3.4
shadow_of_mordor 1418 12 0.0
shadow_warrior 3956 239 0.1
talos_principle 324 1735 5.4
thea 172 17 0.1
tomb_raider 1449 215 0.1
total_war_warhammer 242 56 0.2
ue4_effects_cave 295 55 0.2
ue4_elemental 572 12 0.0
unigine_tropics 210 56 0.3
unigine_valley 278 152 0.5
victor_vran 1262 84 0.1
yofrankie 82 2 0.0
Reviewers: arsenm, nhaehnle
Subscribers: kzhuravl, wdng, yaxunl, dstuttard, tpr, llvm-commits, t-tye
Differential Revision: https://reviews.llvm.org/D38949
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317751
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Marek Olsak [Thu, 9 Nov 2017 01:52:17 +0000 (01:52 +0000)]
AMDGPU: Fold immediate offset into BUFFER_LOAD_DWORD lowered from SMEM
Summary:
-5.3% code size in affected shaders.
Changed stats only:
48486 shaders in 30489 tests
Totals:
SGPRS:
2086406 ->
2072430 (-0.67 %)
VGPRS:
1626872 ->
1627960 (0.07 %)
Spilled SGPRs: 7865 -> 7912 (0.60 %)
Code Size:
60978060 ->
60188764 (-1.29 %) bytes
Max Waves: 374530 -> 374342 (-0.05 %)
Totals from affected shaders:
SGPRS: 299664 -> 285688 (-4.66 %)
VGPRS: 233844 -> 234932 (0.47 %)
Spilled SGPRs: 3959 -> 4006 (1.19 %)
Code Size:
14905272 ->
14115976 (-5.30 %) bytes
Max Waves: 46202 -> 46014 (-0.41 %)
Reviewers: arsenm, nhaehnle
Subscribers: kzhuravl, wdng, yaxunl, dstuttard, tpr, llvm-commits, t-tye
Differential Revision: https://reviews.llvm.org/D38915
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317750
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Craig Topper [Thu, 9 Nov 2017 01:06:47 +0000 (01:06 +0000)]
[X86] Make sure we don't read too many operands from X86ISD::FMADDS1/FMADDS3 nodes when doing FNEG combine.
r317453 added new ISD nodes without rounding modes that were added to an existing if/else chain. But all the previous nodes handled there included a rounding mode. The final code after this if/else chain expected an extra operand that isn't present for the new nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317748
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Petr Hosek [Thu, 9 Nov 2017 00:21:29 +0000 (00:21 +0000)]
[CMake] Passthrough CMAKE_SYSROOT to external projects
Differential Revision: https://reviews.llvm.org/D39029
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317744
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Mitch Phillips [Thu, 9 Nov 2017 00:18:31 +0000 (00:18 +0000)]
[cfi-verify] Adds blacklist blame behaviour to cfi-verify.
Adds the blacklist behaviour to llvm-cfi-verify. Now will calculate which lines caused expected failures in the blacklist and reports the number of affected indirect CF instructions for each blacklist entry.
Also moved DWARF checking after instruction analysis to improve performance significantly - unrolling the inlining stack is expensive.
Reviewers: vlad.tsyrklevich
Subscribers: aprantl, pcc, kcc, llvm-commits
Differential Revision: https://reviews.llvm.org/D39750
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317743
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Petr Hosek [Wed, 8 Nov 2017 23:44:27 +0000 (23:44 +0000)]
[CMake][runtimes] Fix the variable name
This typo causes the llvm-lit path resolution to fail.
Differential Revision: https://reviews.llvm.org/D39811
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317742
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Rui Ueyama [Wed, 8 Nov 2017 22:57:48 +0000 (22:57 +0000)]
[FileOutputBuffer] Move factory methods out of their classes.
InMemoryBuffer and OnDiskBuffer classes have both factory methods and
public constructors, and that looks a bit odd. This patch makes factory
methods non-member function to fix it.
Differential Revision: https://reviews.llvm.org/D39693
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317739
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Craig Topper [Wed, 8 Nov 2017 22:26:41 +0000 (22:26 +0000)]
[X86] X86MaskedGatherSDNode shouldn't inherit from MaskedGatherScatterSDNode
The classof implementation in MaskedGatherScatterSDNode doesn't consider X86MaskedGatherSDNode so its misleading.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317733
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Craig Topper [Wed, 8 Nov 2017 22:26:39 +0000 (22:26 +0000)]
[X86] Preserve memory refs when folding loads into divides.
This is similar to what we already do for multiplies. Without this we can't unfold and hoist an invariant load.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317732
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Craig Topper [Wed, 8 Nov 2017 22:26:37 +0000 (22:26 +0000)]
[X86] Remove an if check on the result of a cast. NFC
cast takes a non-null input and produces a non-null output. So this if can never fail.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317731
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Adrian Prantl [Wed, 8 Nov 2017 22:04:43 +0000 (22:04 +0000)]
Let replaceVTableHolder accept any type.
In Rust, a trait can be implemented for any type, and if a trait
object pointer is used for the type, then a virtual table will be
emitted for that trait/type combination.
We would like debuggers to be able to inspect trait objects, which
requires finding the concrete type associated with a given vtable.
This patch changes LLVM so that any type can be passed to
replaceVTableHolder. This allows the Rust compiler to emit the needed
debug info -- associating a vtable with the concrete type for which it
was emitted.
This is a DWARF extension: DWARF only specifies the meaning of
DW_AT_containing_type in one specific situation. This style of DWARF
extension is routine, though, and LLVM already has one such case for
DW_AT_containing_type.
Patch by Tom Tromey!
Differential Revision: https://reviews.llvm.org/D39503
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317730
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Dan Gohman [Wed, 8 Nov 2017 21:59:51 +0000 (21:59 +0000)]
Add an @llvm.sideeffect intrinsic
This patch implements Chandler's idea [0] for supporting languages that
require support for infinite loops with side effects, such as Rust, providing
part of a solution to bug 965 [1].
Specifically, it adds an `llvm.sideeffect()` intrinsic, which has no actual
effect, but which appears to optimization passes to have obscure side effects,
such that they don't optimize away loops containing it. It also teaches
several optimization passes to ignore this intrinsic, so that it doesn't
significantly impact optimization in most cases.
As discussed on llvm-dev [2], this patch is the first of two major parts.
The second part, to change LLVM's semantics to have defined behavior
on infinite loops by default, with a function attribute for opting into
potential-undefined-behavior, will be implemented and posted for review in
a separate patch.
[0] http://lists.llvm.org/pipermail/llvm-dev/2015-July/088103.html
[1] https://bugs.llvm.org/show_bug.cgi?id=965
[2] http://lists.llvm.org/pipermail/llvm-dev/2017-October/118632.html
Differential Revision: https://reviews.llvm.org/D38336
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317729
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Reid Kleckner [Wed, 8 Nov 2017 21:31:14 +0000 (21:31 +0000)]
Revert "Correct dwarf unwind information in function epilogue for X86"
This reverts r317579, originally committed as r317100.
There is a design issue with marking CFI instructions duplicatable. Not
all targets support the CFIInstrInserter pass, and targets like Darwin
can't cope with duplicated prologue setup CFI instructions. The compact
unwind info emission fails.
When the following code is compiled for arm64 on Mac at -O3, the CFI
instructions end up getting tail duplicated, which causes compact unwind
info emission to fail:
int a, c, d, e, f, g, h, i, j, k, l, m;
void n(int o, int *b) {
if (g)
f = 0;
for (; f < o; f++) {
m = a;
if (l > j * k > i)
j = i = k = d;
h = b[c] - e;
}
}
We get assembly that looks like this:
; BB#1: ; %if.then
Lloh3:
adrp x9, _f@GOTPAGE
Lloh4:
ldr x9, [x9, _f@GOTPAGEOFF]
mov w8, wzr
Lloh5:
str wzr, [x9]
stp x20, x19, [sp, #-16]! ; 8-byte Folded Spill
.cfi_def_cfa_offset 16
.cfi_offset w19, -8
.cfi_offset w20, -16
cmp w8, w0
b.lt LBB0_3
b LBB0_7
LBB0_2: ; %entry.if.end_crit_edge
Lloh6:
adrp x8, _f@GOTPAGE
Lloh7:
ldr x8, [x8, _f@GOTPAGEOFF]
Lloh8:
ldr w8, [x8]
stp x20, x19, [sp, #-16]! ; 8-byte Folded Spill
.cfi_def_cfa_offset 16
.cfi_offset w19, -8
.cfi_offset w20, -16
cmp w8, w0
b.ge LBB0_7
LBB0_3: ; %for.body.lr.ph
Note the multiple .cfi_def* directives. Compact unwind info emission
can't handle that.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317726
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Vedant Kumar [Wed, 8 Nov 2017 21:26:40 +0000 (21:26 +0000)]
[cmake] Allow LLVM_BUILD_INSTRUMENTED to be set to IR or Frontend
- This deprecates LLVM_ENABLE_IR_PGO but keeps it around for now.
- Errors out when LLVM_BUILD_INSTRUMENTED and LLVM_BUILD_INSTRUMENTED_COVERAGE
are both set.
Motivated by bogner's post-commit review of r313770.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317725
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Rafael Espindola [Wed, 8 Nov 2017 21:15:21 +0000 (21:15 +0000)]
Make sure an error is always handled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317724
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Alex Bradbury [Wed, 8 Nov 2017 20:19:16 +0000 (20:19 +0000)]
Set hasSideEffects=0 for PHI and fix affected passes
Previously, hasSideEffects was ? for TargetOpcode::PHI and would be inferred
as 1. D37065 sets the previously inferred properties explicitly. This patch sets
hasSideEffects=0 for PHI, as it is for G_PHI. MachineInstr::isSafeToMove has
been updated so it still returns false for PHI.
Additionally, HexagonBitSimplify relied on a PHI node having the
hasUnmodeledSideEffects property. This patch fixes that assumption.
Differential Revision: https://reviews.llvm.org/D37097
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317721
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Craig Topper [Wed, 8 Nov 2017 20:17:33 +0000 (20:17 +0000)]
[X86] Correct the implementation of BEXTR load folding to use the shift as the parent node and pass a separate root.
We were calling tryFoldLoad with the 'and' node was the root and parent node of the load. But the parent of the load should be the shift that proceeds the and. While the and node is correctly the root node.
To fix this I had to make tryFoldLoad take a separate use and root input. I've added a convenience version with the old signature to avoid updating the other call sites.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317720
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Sam Clegg [Wed, 8 Nov 2017 20:14:06 +0000 (20:14 +0000)]
[WebAssembly] Update test expectations
I believe these were fixed in rL317707
Differential Revision: https://reviews.llvm.org/D39813
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317718
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