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George Burgess IV [Wed, 3 Aug 2016 19:57:02 +0000 (19:57 +0000)]
[MSSA] Add special handling for invariant/constant loads.
This is a follow-up to r277637. It teaches MemorySSA that invariant
loads (and loads of provably constant memory) are always liveOnEntry.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277640
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Sanjay Patel [Wed, 3 Aug 2016 19:48:40 +0000 (19:48 +0000)]
[InstCombine] use m_APInt to allow icmp eq (srem X, C1), C2 folds for splat constant vectors
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277638
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George Burgess IV [Wed, 3 Aug 2016 19:39:54 +0000 (19:39 +0000)]
[MSSA] Add logic for special handling of atomics/volatiles.
This patch makes MemorySSA recognize atomic/volatile loads, and makes
MSSA treat said loads specially. This allows us to be a bit more
aggressive in some cases.
Administrative note: Revision was LGTM'ed by reames in person.
Additionally, this doesn't include the `invariant.load` recognition in
the differential revision, because I feel it's better to commit that
separately. Will commit soon.
Differential Revision: https://reviews.llvm.org/D16875
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277637
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Elliot Colp [Wed, 3 Aug 2016 19:39:20 +0000 (19:39 +0000)]
I can't reproduce this buildbot failure locally, so temporarily remove this test while I investigate.
http://bb.pgr.jp/builders/ninja-x64-msvc-RA-centos6/builds/27427
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277636
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Tobias Grosser [Wed, 3 Aug 2016 19:30:35 +0000 (19:30 +0000)]
[InstCombine] Refactor optimization of zext(or(icmp, icmp)) to enable more aggressive cast-folding
Summary:
InstCombine unfolds expressions of the form `zext(or(icmp, icmp))` to `or(zext(icmp), zext(icmp))` such that in a later iteration of InstCombine the exposed `zext(icmp)` instructions can be optimized. We now combine this unfolding and the subsequent `zext(icmp)` optimization to be performed together. Since the unfolding doesn't happen separately anymore, we also again enable the folding of `logic(cast(icmp), cast(icmp))` expressions to `cast(logic(icmp, icmp))` which had been disabled due to its interference with the unfolding transformation.
Tested via `make check` and `lnt`.
Background
==========
For a better understanding on how it came to this change we subsequently summarize its history. In commit r275989 we've already tried to enable the folding of `logic(cast(icmp), cast(icmp))` to `cast(logic(icmp, icmp))` which had to be reverted in r276106 because it could lead to an endless loop in InstCombine (also see http://lists.llvm.org/pipermail/llvm-commits/Week-of-Mon-
20160718/374347.html). The root of this problem is that in `visitZExt()` in InstCombineCasts.cpp there also exists a reverse of the above folding transformation, that unfolds `zext(or(icmp, icmp))` to `or(zext(icmp), zext(icmp))` in order to expose `zext(icmp)` operations which would then possibly be eliminated by subsequent iterations of InstCombine. However, before these `zext(icmp)` would be eliminated the folding from r275989 could kick in and cause InstCombine to endlessly switch back and forth between the folding and the unfolding transformation. This is the reason why we now combine the `zext`-unfolding and the elimination of the exposed `zext(icmp)` to happen at one go because this enables us to still allow the cast-folding in `logic(cast(icmp), cast(icmp))` without entering an endless loop again.
Details on the submitted changes
================================
- In `visitZExt()` we combine the unfolding and optimization of `zext` instructions.
- In `transformZExtICmp()` we have to use `Builder->CreateIntCast()` instead of `CastInst::CreateIntegerCast()` to make sure that the new `CastInst` is inserted in a `BasicBlock`. The new calls to `transformZExtICmp()` that we introduce in `visitZExt()` would otherwise cause according assertions to be triggered (in our case this happend, for example, with lnt for the MultiSource/Applications/sqlite3 and SingleSource/Regression/C++/EH/recursive-throw tests). The subsequent usage of `replaceInstUsesWith()` is necessary to ensure that the new `CastInst` replaces the `ZExtInst` accordingly.
- In InstCombineAndOrXor.cpp we again allow the folding of casts on `icmp` instructions.
- The instruction order in the optimized IR for the zext-or-icmp.ll test case is different with the introduced changes.
- The test cases in zext.ll have been adopted from the reverted commits r275989 and r276105.
Reviewers: grosser, majnemer, spatel
Subscribers: eli.friedman, majnemer, llvm-commits
Differential Revision: https://reviews.llvm.org/D22864
Contributed-by: Matthias Reisinger <d412vv1n@gmail.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277635
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Sebastian Pop [Wed, 3 Aug 2016 19:13:50 +0000 (19:13 +0000)]
Pass EphValues by const-ref as it is not modified in the callee
Patch by Aditya Kumar.
Differential Revision: https://reviews.llvm.org/D22967
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277634
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Nicolai Haehnle [Wed, 3 Aug 2016 19:10:13 +0000 (19:10 +0000)]
[InstCombine] Cleanup select-bitext.ll tests
Follow-up to r277596.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277633
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Simon Pilgrim [Wed, 3 Aug 2016 19:08:24 +0000 (19:08 +0000)]
[X86][SSE] Enable target shuffle combining to combine multiple shuffle inputs.
We currently only support combining target shuffles that consist of a single source input (plus elements known to be undef/zero).
This patch generalizes the recursive combining of the target shuffle to collect all the inputs, merging any duplicates along the way, into a full set of src ops and its shuffle mask.
We uncover a number of cases where we have failed to combine a unary shuffle because the input has been duplicated and separated during lowering.
This will allow us to combine to 2-input shuffles in a future patch.
Differential Revision: https://reviews.llvm.org/D22859
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277631
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Vedant Kumar [Wed, 3 Aug 2016 19:02:50 +0000 (19:02 +0000)]
Reapply "More fixes to get good error messages for bad archives."
This reverts commit the revert commit r277627. The build errors
mentioned in r277627 were likely caused by an unclean build directory.
Sorry for the noise.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277630
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Sanjay Patel [Wed, 3 Aug 2016 18:59:03 +0000 (18:59 +0000)]
[InstCombine] use m_APInt to allow icmp (binop X, Y), C folds with constant splat vectors
This removes the restriction for the icmp constant, but as noted by the FIXME comments,
we still need to change individual checks for binop operand constants.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277629
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Vedant Kumar [Wed, 3 Aug 2016 18:44:32 +0000 (18:44 +0000)]
Revert "More fixes to get good error messages for bad archives."
This reverts commit r277540. It breaks the build with:
../lib/Object/Archive.cpp:264:41: error: return type of out-of-line definition of 'llvm::object::ArchiveMemberHeader::getUID' differs from that in the declaration
Expected<unsigned> ArchiveMemberHeader::getUID() const {
~~~~~~~~~~~~~~~~~~ ^
include/llvm/Object/Archive.h:53:12: note: previous declaration is here
unsigned getUID() const;
~~~~~~~~ ^
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277627
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Krzysztof Parzyszek [Wed, 3 Aug 2016 18:35:48 +0000 (18:35 +0000)]
[Hexagon] Generate COPY/REG_SEQUENCE more aggressively for vectors
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277626
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Duncan P. N. Exon Smith [Wed, 3 Aug 2016 18:19:43 +0000 (18:19 +0000)]
IR: Drop uniquing when an MDNode Value operand is deleted
This is a fix for PR28697.
An MDNode can indirectly refer to a GlobalValue, through a
ConstantAsMetadata. When the GlobalValue is deleted, the MDNode operand
is reset to `nullptr`. If the node is uniqued, this can lead to a
hard-to-detect cache invalidation in a Metadata map that's shared across
an LLVMContext.
Consider:
1. A map from Metadata* to `T` called RemappedMDs.
2. A node that references a global variable, `!{i1* @GV}`.
3. Insert `!{i1* @GV} -> SomeT` in the map.
4. Delete `@GV`, leaving behind `!{null} -> SomeT`.
Looking up the generic and uninteresting `!{null}` gives you `SomeT`,
which is likely related to `@GV`. Worse, `SomeT`'s lifetime may be tied
to the deleted `@GV`.
This occurs in practice in the shared ValueMap used since r266579 in the
IRMover. Other code that handles more than one Module (with different
lifetimes) in the same LLVMContext could hit it too.
The fix here is a partial revert of r225223: in the rare case that an
MDNode operand is a ConstantAsMetadata (i.e., wrapping a node from the
Value hierarchy), drop uniquing if it gets replaced with `nullptr`.
This changes step #4 above to leave behind `distinct !{null} -> SomeT`,
which can't be confused with the generic `!{null}`.
In theory, this can cause some churn in the LLVMContext's MDNode
uniquing map when Values are being deleted. However:
- The number of GlobalValues referenced from uniqued MDNodes is
expected to be quite small. E.g., the debug info metadata schema
only references GlobalValues from distinct nodes.
- Other Constants have the lifetime of the LLVMContext, whose teardown
is careful to drop references before deleting the constants.
As a result, I don't expect a compile time regression from this change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277625
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Ehsan Amiri [Wed, 3 Aug 2016 18:17:35 +0000 (18:17 +0000)]
Adding -verify-machineinstrs option to PowerPC tests
Currently we have a number of tests that fail with -verify-machineinstrs.
To detect this cases earlier we add the option to the testcases with the
exception of tests that will currently fail with this option. PR 27456 keeps
track of this failures.
No code review, as discussed with Hal Finkel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277624
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Krzysztof Parzyszek [Wed, 3 Aug 2016 18:13:32 +0000 (18:13 +0000)]
[Hexagon-ish] Add function to print cell map contents in bit tracker
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277622
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David Majnemer [Wed, 3 Aug 2016 17:37:10 +0000 (17:37 +0000)]
[CloneFunction] Don't crash if the value map doesn't hold something
It is possible for the value map to not have an entry for some value
that has already been removed.
I don't have a testcase, this is fall-out from a buildbot.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277614
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Sanjay Patel [Wed, 3 Aug 2016 17:23:08 +0000 (17:23 +0000)]
use local variables; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277612
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David Majnemer [Wed, 3 Aug 2016 17:12:47 +0000 (17:12 +0000)]
[CloneFunction] Don't remove side effecting calls
We were able to figure out that the result of a call is some constant.
While propagating that fact, we added the constant to the value map.
This is problematic because it results in us losing the call site when
processing the value map.
This fixes PR28802.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277611
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Weiming Zhao [Wed, 3 Aug 2016 17:05:23 +0000 (17:05 +0000)]
[ARM] Constant Materialize: imms with specific value can be encoded into mov.w
Summary: Thumb2 supports encoding immediates with specific patterns into mov.w by splatting the low 8 bits into other bytes.
Reviewers: john.brawn, jmolloy
Subscribers: jmolloy, aemerson, rengolin, samparker, llvm-commits
Differential Revision: https://reviews.llvm.org/D23090
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277610
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Zachary Turner [Wed, 3 Aug 2016 16:53:21 +0000 (16:53 +0000)]
[msf] Make FPM reader use MappedBlockStream.
MappedBlockSTream can work with any sequence of block data where
the ordering is specified by a list of block numbers. So rather
than manually stitch them together in the case of the FPM, reuse
this functionality so that we can treat the FPM as if it were
contiguous.
Reviewed By: ruiu
Differential Revision: https://reviews.llvm.org/D23066
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277609
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Renato Golin [Wed, 3 Aug 2016 16:20:48 +0000 (16:20 +0000)]
Revert "Teach CorrelatedValuePropagation to mark adds as no wrap"
This reverts commit r277592, trying to fix the AArch64 42VMA buildbot.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277607
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Benjamin Kramer [Wed, 3 Aug 2016 15:51:10 +0000 (15:51 +0000)]
Hexagon: Use llvm_unreachable. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277605
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Elliot Colp [Wed, 3 Aug 2016 15:09:21 +0000 (15:09 +0000)]
Disable shrinking of SNaN constants
When expanding FP constants, we attempt to shrink doubles to floats and perform an extending load.
However, on SystemZ, and possibly on other targets (I've only confirmed the problem on SystemZ), the FP extending load instruction may convert SNaN into QNaN, or may cause an exception. So in the general case, we would still like to shrink FP constants, but SNaNs should be left as doubles.
Differential Revision: https://reviews.llvm.org/D22685
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277602
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Krzysztof Parzyszek [Wed, 3 Aug 2016 15:06:18 +0000 (15:06 +0000)]
[Hexagon] Do not check alignment for unsized types in isLegalAddressingMode
When the same base address is used to load two different data types, LSR
would assume a memory type of "void". This type is not sized and has no
alignment information. Checking for it causes a crash.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277601
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Sanjay Patel [Wed, 3 Aug 2016 14:25:55 +0000 (14:25 +0000)]
add a vector variant of each test
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277598
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Nicolai Haehnle [Wed, 3 Aug 2016 13:37:56 +0000 (13:37 +0000)]
[InstCombine] Add select-bitext.ll tests
As requested for D22747.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277596
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Gil Rapaport [Wed, 3 Aug 2016 13:23:43 +0000 (13:23 +0000)]
[Loop Vectorizer] Move store-predication into its own function, remove obsolete comment (NFC)
Differential Revision: https://reviews.llvm.org/D23013
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277595
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Artur Pilipenko [Wed, 3 Aug 2016 13:11:39 +0000 (13:11 +0000)]
Teach CorrelatedValuePropagation to mark adds as no wrap
Use LVI to prove that adds do not wrap. The change is motivated by https://llvm.org/bugs/show_bug.cgi?id=28620 bug and it's the first step to fix that problem.
Reviewed By: sanjoy
Differential Revision: http://reviews.llvm.org/D23059
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277592
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Igor Breger [Wed, 3 Aug 2016 10:58:05 +0000 (10:58 +0000)]
[AVX512] Add aliases for vcvttss2si{l|q}, vcvttsd2si{l|q}, vcvttss2usi{l|q}, vcvttsd2usi{l|q} instructions.
Differential Revision: http://reviews.llvm.org/D23111
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277586
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Chandler Carruth [Wed, 3 Aug 2016 09:14:03 +0000 (09:14 +0000)]
[PM] Fix a mis-named parameter in parseLoopPass -- the pass manager was
called "FPM" instead of "LPM" in a hold-over from when the code was
modeled on that used to parse function passes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277584
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Chandler Carruth [Wed, 3 Aug 2016 08:16:08 +0000 (08:16 +0000)]
[PM] Add the explicit copy, move, swap, and assignment boilerplate
required by MSVC 2013.
This also makes the repeating pass wrapper assignable. Mildly
unfortunate as it means we can't use a const member for the int, but
that is a really minor invariant to try to preserve at the cost of loss
of regularity of the type. Yet another annoyance of the particular C++
object / move semantic model.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277582
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Chandler Carruth [Wed, 3 Aug 2016 07:44:48 +0000 (07:44 +0000)]
[PM] Add a generic 'repeat N times' pass wrapper to the new pass
manager.
While this has some utility for debugging and testing on its own, it is
primarily intended to demonstrate the technique for adding custom
wrappers that can provide more interesting interation behavior in
a nice, orthogonal, and composable layer.
Being able to write these kinds of very dynamic and customized controls
for running passes was one of the motivating use cases of the new pass
manager design, and this gives a hint at how they might look. The actual
logic is tiny here, and most of this is just wiring in the pipeline
parsing so that this can be widely used.
I'm adding this now to show the wiring without a lot of business logic.
This is a precursor patch for showing how a "iterate up to N times as
long as we devirtualize a call" utility can be added as a separable and
composable component along side the CGSCC pass management.
Differential Revision: https://reviews.llvm.org/D22405
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277581
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Dean Michael Berris [Wed, 3 Aug 2016 07:21:55 +0000 (07:21 +0000)]
[XRay] Make the xray_instr_map section specification more correct
Summary:
We also add a test to show what currently happens when we create a
section per function and emit an xray_instr_map. This illustrates the
relationship (or lack thereof) between the per-function section and the
xray_instr_map section.
We also change the code generation slightly so that we don't always
create group sections, but rather only do so if a function where the
table is associated with is in a group.
Also in this change:
- Remove the "merge" flag on the xray_instr_map section.
- Test that we're generating the right table for comdat and non-comdat functions.
Reviewers: echristo, majnemer
Subscribers: llvm-commits, mehdi_amini
Differential Revision: https://reviews.llvm.org/D23104
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277580
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Jonas Paulsson [Wed, 3 Aug 2016 05:46:35 +0000 (05:46 +0000)]
[IfConversion] Bugfix: Don't use undef flag while adding use operands.
IfConversion used to always add the undef flag when adding a use operand
on a newly predicated instruction. This would be an operand for the register
being conditionally redefined. Due to the undef flag, the liveness of this
register prior to the predicated instruction would get lost.
This patch changes this so that such use operands are added only when the
register is live, without the undef flag.
This was reverted but pushed again now, for details follow link below.
Reviewed by Quentin Colombet.
http://reviews.llvm.org/
D209077
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277571
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David Callahan [Wed, 3 Aug 2016 04:28:39 +0000 (04:28 +0000)]
[ADCE] Refactor anticipating new functionality (NFC)
Summary:
This is the first refactoring before adding new functionality.
Add a class wrapper for the functions and container for
state associated with the transformation.
No functional change
Reviewers: majnemer, nadav, mehdi_amini
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D23065
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277565
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Mehdi Amini [Wed, 3 Aug 2016 03:51:42 +0000 (03:51 +0000)]
RecordStreamer: handle inline asm "lazy_reference" and mark symbols as "used"
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277564
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Chandler Carruth [Wed, 3 Aug 2016 03:26:09 +0000 (03:26 +0000)]
[PM] Remove the NDEBUG condition around isModulePassName.
I forgot to do this initially, and added when I saw this fail in
a no-asserts build, but managed to loose the diff from the actual patch
that got submitted. Very sorry.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277562
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Chandler Carruth [Wed, 3 Aug 2016 03:21:41 +0000 (03:21 +0000)]
[PM] Significantly refactor the pass pipeline parsing to be easier to
reason about and less error prone.
The core idea is to fully parse the text without trying to identify
passes or structure. This is done with a single state machine. There
were various bugs in the logic around this previously that were repeated
and scattered across the code. Having a single routine makes it much
easier to fix and get correct. For example, this routine doesn't suffer
from PR28577.
Then the actual pass construction is handled using *much* easier to read
code and simple loops, with particular pass manager construction sunk to
live with other pass construction. This is especially nice as the pass
managers *are* in fact passes.
Finally, the "implicit" pass manager synthesis is done much more simply
by forming "pre-parsed" structures rather than having to duplicate tons
of logic.
One of the bugs fixed by this was evident in the tests where we accepted
a pipeline that wasn't really well formed. Another bug is PR28577 for
which I have added a test case.
The code is less efficient than the previous code but I'm really hoping
that's not a priority. ;]
Thanks to Sean for the review!
Differential Revision: https://reviews.llvm.org/D22724
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277561
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George Burgess IV [Wed, 3 Aug 2016 01:22:19 +0000 (01:22 +0000)]
[MSSA] Fix a caching bug.
This fixes a bug where we'd sometimes cache overly-conservative results
with our walker. This bug was made more obvious by r277480, which makes
our cache far more spotty than it was. Test case is llvm-unit, because
we're likely going to use CachingWalker only for def optimization in the
future.
The bug stems from that there was a place where the walker assumed that
`DefNode.Last` was a valid target to cache to when failing to optimize
phis. This is sometimes incorrect if we have a cache hit. The fix is to
use the thing we *can* assume is a valid target to cache to. :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277559
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Chandler Carruth [Wed, 3 Aug 2016 01:02:31 +0000 (01:02 +0000)]
[Inliner] clang-format various parts of the inliner prior to changes
here. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277557
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Ivan Krasin [Wed, 3 Aug 2016 00:59:38 +0000 (00:59 +0000)]
Add -lowertypetests-bitsets-level to control bitsets generation.
Summary:
Sometimes, bitsets could get really large (>300k entries) and
we might want to drop a check, as it would have a too much cost.
Adding a flag to control how much penalty are we willing to pay
for bitsets.
Reviewers: kcc
Differential Revision: https://reviews.llvm.org/D23088
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277556
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Sanjay Patel [Wed, 3 Aug 2016 00:36:54 +0000 (00:36 +0000)]
add vector test for icmp+sub
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277555
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Daniel Berlin [Wed, 3 Aug 2016 00:01:46 +0000 (00:01 +0000)]
Support for lifetime begin/end markers in the MemorySSA use optimizer
Summary: Depends on D23072
Reviewers: george.burgess.iv
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D23076
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277553
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Matthias Braun [Tue, 2 Aug 2016 23:36:06 +0000 (23:36 +0000)]
CommandFlags.h/llc: Move StopAfter/StartBefore options to llc.
Move those two options to llc:
The options in CommandFlags.h are shared by dsymutil, gold, llc,
llvm-dwp, llvm-lto, llvm-mc, lto, opt.
-stop-after/-start-after only affect codegen passes however only gold and llc
actually create codegen passes and I believe these flags to be only
useful for users of llc. For the other tools they are just highly
confusing: -stop-after claims to "Stop compilation after a specific
pass" which is not true in the context of the "opt" tool.
Differential Revision: https://reviews.llvm.org/D23050
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277551
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Sanjoy Das [Tue, 2 Aug 2016 23:32:53 +0000 (23:32 +0000)]
[Verifier] Add more tests related to non-integral pointers
As suggested by Matt Arsenault in post-commit review.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277550
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Derek Schuff [Tue, 2 Aug 2016 23:31:56 +0000 (23:31 +0000)]
[WebAssembly] Remove unnecessary subtarget checks in peephole pass
Leftover from D22686; the passes can handle all the instructions
unconditionally; only isel needs to care whether to generate them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277549
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Rui Ueyama [Tue, 2 Aug 2016 23:25:59 +0000 (23:25 +0000)]
Fix a test for r277545.
This change should have been submitted with that commit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277548
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Rui Ueyama [Tue, 2 Aug 2016 23:22:46 +0000 (23:22 +0000)]
pdbdump: Do not treat stream 0 pages as allocated pages.
I examined a few PDBs and all of them treated pages for stream 0
are unused, thus they were unmarked in their free page bitmap.
I think we should do the same thing for compatibility.
Differential Revision: https://reviews.llvm.org/D23047
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277545
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Evgeniy Stepanov [Tue, 2 Aug 2016 23:21:30 +0000 (23:21 +0000)]
[safestack] Layout large allocas first to reduce fragmentation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277544
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Derek Schuff [Tue, 2 Aug 2016 23:16:09 +0000 (23:16 +0000)]
[WebAssembly] Initial SIMD128 support.
Kicks off the implementation of wasm SIMD128 support (spec:
https://github.com/stoklund/portable-simd/blob/master/portable-simd.md),
adding support for add, sub, mul for i8x16, i16x8, i32x4, and f32x4.
The spec is WIP, and might change in the near future.
Patch by João Porto
Differential Revision: https://reviews.llvm.org/D22686
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277543
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Tim Northover [Tue, 2 Aug 2016 23:12:36 +0000 (23:12 +0000)]
ARM: only form SMMLS when SUBE flags unused.
In this particular example we wouldn't want the smmls anyway (the value is
actually unused), but in general smmls does not provide the required flags
register so if that SUBE result is used we can't replace it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277541
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Kevin Enderby [Tue, 2 Aug 2016 22:58:55 +0000 (22:58 +0000)]
More fixes to get good error messages for bad archives.
Fixed the last incorrect uses of llvm_unreachable() in the code
which were actually just cases of errors in the input Archives.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277540
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Sanjay Patel [Tue, 2 Aug 2016 22:38:33 +0000 (22:38 +0000)]
[InstCombine] replace dyn_casts with matches; NFCI
Clean-up before changing this to allow folds for vectors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277538
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Kostya Serebryany [Tue, 2 Aug 2016 22:25:38 +0000 (22:25 +0000)]
[sanitizer] Implement a __asan_default_options() equivalent for Scudo
Summary:
Currently, the Scudo Hardened Allocator only gets its flags via the SCUDO_OPTIONS environment variable.
With this patch, we offer the opportunity for programs to define their own options via __scudo_default_options() which behaves like __asan_default_options() (weak symbol).
A relevant test has been added as well, and the documentation updated accordingly.
I also used this patch as an opportunity to rename a few variables to comply with the LLVM naming scheme, and replaced a use of Report with dieWithMessage for consistency (and to avoid a callback).
Reviewers: llvm-commits, kcc
Differential Revision: https://reviews.llvm.org/D23018
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277536
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Matt Arsenault [Tue, 2 Aug 2016 22:25:04 +0000 (22:25 +0000)]
AMDGPU: fdiv -1, x -> rcp -x
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277535
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Piotr Padlewski [Tue, 2 Aug 2016 22:18:47 +0000 (22:18 +0000)]
Imported statistics types changes
Reviewers: tejohnson, eraman
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D22980
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277534
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George Burgess IV [Tue, 2 Aug 2016 22:17:25 +0000 (22:17 +0000)]
[CFLAA] Be more conservative with values we haven't seen.
There were issues with simply reporting AttrUnknown on
previously-unknown values in CFLAnders. So, we now act *entirely*
conservatively for values we haven't seen before. As in the prior patch
(r277362), writing a lit test for this isn't exactly trivial. If someone
wants a test badly, I'm willing to try to write one.
Patch by Jia Chen.
Differential Revision: https://reviews.llvm.org/D23077
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277533
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Daniel Berlin [Tue, 2 Aug 2016 21:57:52 +0000 (21:57 +0000)]
Move to having a single real instructionClobbersQuery
Summary: We really want to move towards MemoryLocOrCall (or fix AA) everywhere, but for now, this lets us have a single instructionClobbersQuery.
Reviewers: george.burgess.iv
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D23072
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277530
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Rui Ueyama [Tue, 2 Aug 2016 21:56:37 +0000 (21:56 +0000)]
PDB: Mark extended file pages as free by default.
BitVector::extend initializes extended bits as true by default.
That is not desirable because new pages should be initially free.
Differential Revision: https://reviews.llvm.org/D23048
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277529
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Krzysztof Parzyszek [Tue, 2 Aug 2016 21:49:20 +0000 (21:49 +0000)]
[Hexagon] Recognize vcombine in copy propagation
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277528
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Michael Zolotukhin [Tue, 2 Aug 2016 21:43:25 +0000 (21:43 +0000)]
[LoopUnroll] Fix a PowerPC test broken by r277524.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277527
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Michael Zolotukhin [Tue, 2 Aug 2016 21:24:14 +0000 (21:24 +0000)]
[LoopUnroll] Switch the default value of -unroll-runtime-epilog back to its original value.
As agreed in post-commit review of r265388, I'm switching the flag to
its original value until the 90% runtime performance regression on
SingleSource/Benchmarks/Stanford/Bubblesort is addressed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277524
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Lang Hames [Tue, 2 Aug 2016 21:00:40 +0000 (21:00 +0000)]
[lli] Add the ability for OrcLazyJIT to accept multiple input modules.
LLI already supported passing multiple input modules to MCJIT via the
-extra-module option. This patch adds the plumbing to pass these modules to
the OrcLazy JIT too.
This functionality will be used in an upcoming test case for weak symbol
handling.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277521
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Artem Belevich [Tue, 2 Aug 2016 20:58:24 +0000 (20:58 +0000)]
[NVPTX] remove unnecessary named metadata update that happens to break debug info.
Also added test case to verify IR changes done by NVPTXGenericToNVVM pass.
Differential Revision: https://reviews.llvm.org/D22837
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277520
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Wei Mi [Tue, 2 Aug 2016 20:27:49 +0000 (20:27 +0000)]
[LoopVectorize] Change comment for isOutOfScope in collectLoopUniforms, NFC
Update comment for isOutOfScope and add a testcase for uniform value being used
out of scope.
Differential Revision: https://reviews.llvm.org/D23073
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277515
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Tim Northover [Tue, 2 Aug 2016 20:22:36 +0000 (20:22 +0000)]
AArch64: properly calculate cmpxchg status in FastISel.
We were relying on the misleadingly-names $status result to actually be the
status. Actually it's just a scratch register that may or may not be valid (and
is the inverse of the real ststus anyway). Success can be determined by
comparing the value loaded against the one we wanted to see for "cmpxchg
strong" loops like this.
Should fix PR28819.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277513
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Daniel Berlin [Tue, 2 Aug 2016 20:02:21 +0000 (20:02 +0000)]
Fixes for post-commit review comments on r277480
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277510
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Sanjoy Das [Tue, 2 Aug 2016 19:32:01 +0000 (19:32 +0000)]
[IRCE] Rename variable; NFC
There is nothing "Original" about "OriginalLoopInfo".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277506
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Sanjoy Das [Tue, 2 Aug 2016 19:31:54 +0000 (19:31 +0000)]
[IRCE] Preserve DomTree and LCSSA
This changes IRCE to "preserve" LCSSA and DomTree by recomputing them.
It still does not preserve LoopSimplify.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277505
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Nicolai Haehnle [Tue, 2 Aug 2016 19:31:14 +0000 (19:31 +0000)]
AMDGPU: Stay in WQM for non-intrinsic stores
Summary:
Two types of stores are possible in pixel shaders: stores to memory that are
explicitly requested at the API level, and stores that are an implementation
detail of register spilling or lowering of arrays.
For the first kind of store, we must ensure that helper pixels have no effect
and hence WQM must be disabled. The second kind of store must always be
executed, because the written value may be loaded again in a way that is
relevant for helper pixels as well -- and there are no externally visible
effects anyway.
This is a candidate for the 3.9 release branch.
Reviewers: arsenm, tstellarAMD, mareko
Subscribers: arsenm, kzhuravl, llvm-commits
Differential Revision: https://reviews.llvm.org/D22675
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277504
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Albert Gutowski [Tue, 2 Aug 2016 19:25:17 +0000 (19:25 +0000)]
test commit
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277503
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Michael Zolotukhin [Tue, 2 Aug 2016 19:19:31 +0000 (19:19 +0000)]
[LoopUnroll] Ensure we create prolog loops in simplified form.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277502
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Nirav Dave [Tue, 2 Aug 2016 19:17:54 +0000 (19:17 +0000)]
Fix handling of end-of-line preprocessor comments Attempt 2
Attempt 2: Retryign after Tsan.mman test fix.
Attempt 1: Recommitting after fixing test.
When parsing assembly where the line comment syntax is not hash, the
lexer cannot distinguish between hash's that start a hash line comment
and one that is part of an assembly statement and must be distinguished
during parsing. Previously, this was incompletely handled by not checking
for EndOfStatement at the end of statements and interpreting hash
prefixed statements as comments.
Change EndOfStatement Parsing to check for Hash comments and reintroduce
Hash statement parsing to catch previously handled cases.
Reviewers: rnk, majnemer
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D23017
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277501
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Nicolai Haehnle [Tue, 2 Aug 2016 19:17:37 +0000 (19:17 +0000)]
AMDGPU: Track physical registers in SIWholeQuadMode
Summary:
There are cases where uniform branch conditions are computed in VGPRs, and
we didn't correctly mark those as WQM.
The stray change in basic-branch.ll is because invoking the LiveIntervals
analysis leads to the detection of a dead register that would otherwise not
be seen at -O0.
This is a candidate for the 3.9 branch, as it fixes a possible hang.
Reviewers: arsenm, tstellarAMD, mareko
Subscribers: arsenm, llvm-commits, kzhuravl
Differential Revision: https://reviews.llvm.org/D22673
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277500
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Ahmed Bougacha [Tue, 2 Aug 2016 19:04:29 +0000 (19:04 +0000)]
[AArch64][GlobalISel] Replace test REQUIRES with lit.local.cfg. NFC.
I forgot the REQUIRES once (see r277486).
Let's prevent it from happening again.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277499
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Ahmed Bougacha [Tue, 2 Aug 2016 19:04:25 +0000 (19:04 +0000)]
[AArch64] Remove useless 'import re' from CodeGen lit.local.cfg. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277498
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Krzysztof Parzyszek [Tue, 2 Aug 2016 18:50:05 +0000 (18:50 +0000)]
[Hexagon] Prefer _io over _rr for 64-bit store with constant offset
Identify patterns where the address is aligned to an 8-byte boundary,
but both the base address and the constant offset are both proper
multiples of 4. In such cases, extract Base+4 into a separate instruc-
tion, and use S2_storerd_io, instead of using S4_storerd_rr.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277497
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Krzysztof Parzyszek [Tue, 2 Aug 2016 18:39:32 +0000 (18:39 +0000)]
[Hexagon] Remove unused option
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277496
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Krzysztof Parzyszek [Tue, 2 Aug 2016 18:34:31 +0000 (18:34 +0000)]
[Hexagon] Improvements to address mode checks in TargetLowering
- Implement getOptimalMemOpType.
- Check BaseOffset in isLegalAddressingMode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277494
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Nirav Dave [Tue, 2 Aug 2016 17:56:03 +0000 (17:56 +0000)]
[MC] Fix Intel Operand assembly parsing for .set ids
Recommitting after fixing overaggressive fastpath return in parsing.
Fix intel syntax special case identifier operands that refer to a constant
(e.g. .set <ID> n) to be interpreted as immediate not memory in parsing.
Associated commit to fix clang test commited shortly.
Reviewers: rnk
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D22585
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277489
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Ahmed Bougacha [Tue, 2 Aug 2016 17:19:35 +0000 (17:19 +0000)]
[AArch64][GlobalISel] Add REQUIRES: global-isel to verifier tests.
I thought the directory had a lit.local.cfg, but it doesn't.
I'll add one, but for now, add the REQUIRES line. While there,
move the triple into the IR and add a datalayout.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277486
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Daniel Berlin [Tue, 2 Aug 2016 16:59:51 +0000 (16:59 +0000)]
MSVC 2013 does not implement C++11 unions properly, so remove the anoymous union for now,
and leave a FIXME.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277485
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Ahmed Bougacha [Tue, 2 Aug 2016 16:49:25 +0000 (16:49 +0000)]
[GlobalISel] Set the Selected MF property.
None of GlobalISel requires the property, but this lets us use the
verifier instead of rolling our own "all instructions selected" check.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277484
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Ahmed Bougacha [Tue, 2 Aug 2016 16:49:22 +0000 (16:49 +0000)]
[GlobalISel] Verify Selected MF property.
After instruction selection, there should be no pre-isel generic
instructions remaining, nor should generic virtual registers be
used. Verify that.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277483
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Ahmed Bougacha [Tue, 2 Aug 2016 16:49:19 +0000 (16:49 +0000)]
[GlobalISel] Add Selected MachineFunction property.
Selected: the InstructionSelect pass ran and all pre-isel generic
instructions have been eliminated; i.e., all instructions are now
target-specific or non-pre-isel generic instructions (e.g., COPY).
Since only pre-isel generic instructions can have generic virtual register
operands, this also means that all generic virtual registers have been
constrained to virtual registers (assigned to register classes) and that
all sizes attached to them have been eliminated.
This lets us enforce certain invariants across passes.
This property is GlobalISel-specific, but is always available.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277482
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Daniel Berlin [Tue, 2 Aug 2016 16:24:03 +0000 (16:24 +0000)]
Rewrite the use optimizer to be less memory intensive and 50% faster.
Fixes PR28670
Summary:
Rewrite the use optimizer to be less memory intensive and 50% faster.
Fixes PR28670
The new use optimizer works like a standard SSA renaming pass, storing
all possible versions a MemorySSA use could get in a stack, and just
tracking indexes into the stack.
This uses much less memory than caching N^2 alias query results.
It's also a lot faster.
The current version defers phi node walking to the normal walker.
Reviewers: george.burgess.iv
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D23032
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277480
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Artur Pilipenko [Tue, 2 Aug 2016 16:20:48 +0000 (16:20 +0000)]
[LVI] NFC. Sink a condition type check from the caller down to getValueFromCondition
This is a preparatory refactoring to support conditions other than ICmpInst.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277479
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Ahmed Bougacha [Tue, 2 Aug 2016 16:17:18 +0000 (16:17 +0000)]
[GlobalISel] Set and require RegBankSelected MF property.
The InstructionSelect pass assumes that RegBankSelect ran; set the
property on all tests (thereby verifying the test inputs) and require
it in the pass.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277477
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Ahmed Bougacha [Tue, 2 Aug 2016 16:17:15 +0000 (16:17 +0000)]
[GlobalISel] Verify RegBankSelected MF property.
RegBankSelected functions shouldn't have any generic virtual
register not assigned to a bank. Verify that.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277476
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Ahmed Bougacha [Tue, 2 Aug 2016 16:17:10 +0000 (16:17 +0000)]
[GlobalISel] Add RegBankSelected MachineFunction property.
RegBankSelected: the RegBankSelect pass ran and all generic virtual
registers have been assigned to a register bank.
This lets us enforce certain invariants across passes.
This property is GlobalISel-specific, but is always available.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277475
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Matthew Simpson [Tue, 2 Aug 2016 15:25:16 +0000 (15:25 +0000)]
[LV] Generate both scalar and vector integer induction variables
This patch enables the vectorizer to generate both scalar and vector versions
of an integer induction variable for a given loop. Previously, we only
generated a scalar induction variable if we knew all its users were going to be
scalar. Otherwise, we generated a vector induction variable. In the case of a
loop with both scalar and vector users of the induction variable, we would
generate the vector induction variable and extract scalar values from it for
the scalar users. With this patch, we now generate both versions of the
induction variable when there are both scalar and vector users and select which
version to use based on whether the user is scalar or vector.
Differential Revision: https://reviews.llvm.org/D22869
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277474
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Ahmed Bougacha [Tue, 2 Aug 2016 15:10:32 +0000 (15:10 +0000)]
[GlobalISel] Set, require, and verify Legalized MF property.
RegBankSelect and InstructionSelect run after the legalizer and
require a Legalized function: check that all instructions are legal.
Note that this should be in the MachineVerifier, but it can't use the
MachineLegalizer as it's currently in the separate GlobalISel library.
Note that the RegBankSelect verifier checks have the same layering
problem, but we only use inline methods so end up not needing to link
against the GlobalISel library.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277472
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Ahmed Bougacha [Tue, 2 Aug 2016 15:10:28 +0000 (15:10 +0000)]
[AArch64][GlobalISel] Mark basic binops/memops as legal.
We currently use and test these, and select most of them. Mark them
as legal even though we don't go through the full ir->asm flow yet.
This doesn't currently have standalone tests, but the verifier will
soon learn to check that the regbankselect/select tests are legal.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277471
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Ahmed Bougacha [Tue, 2 Aug 2016 15:10:25 +0000 (15:10 +0000)]
[GlobalISel] Add Legalized MachineFunction property.
Legalized: The MachineLegalizer ran; all pre-isel generic instructions
have been legalized, i.e., all instructions are now one of:
- generic and always legal (e.g., COPY)
- target-specific
- legal pre-isel generic instructions.
This lets us enforce certain invariants across passes.
This property is GlobalISel-specific, but is always available.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277470
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Nirav Dave [Tue, 2 Aug 2016 15:08:52 +0000 (15:08 +0000)]
Revert "[MC] Fix handling of end-of-line preprocessor comments"
Causes TSan failure on PPC64
This reverts commit r277459.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277468
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Dan Gohman [Tue, 2 Aug 2016 14:53:44 +0000 (14:53 +0000)]
[WebAssembly] Remove a README.txt entry that is now implemented.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277467
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Artur Pilipenko [Tue, 2 Aug 2016 14:44:32 +0000 (14:44 +0000)]
[LVI] NFC. Fix a typo getValueFromFromCondition -> getValueFromCondition
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277466
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Ahmed Bougacha [Tue, 2 Aug 2016 14:42:57 +0000 (14:42 +0000)]
[CodeGen] Generalize MachineFunctionProperties::print comma handling.
This is only used for debug prints, but the previous hardcoded ", "
caused it to be printed unnecessarily when OnlySet, and is annoying
when adding new properties.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277465
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Ahmed Bougacha [Tue, 2 Aug 2016 14:42:55 +0000 (14:42 +0000)]
[GlobalISel] Require isSSA in GISel passes.
The GISel passes don't make sense on non-SSA functions.
All GISel tests already set isSSA. Enforce that.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277464
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Matthew Simpson [Tue, 2 Aug 2016 14:29:41 +0000 (14:29 +0000)]
[LV] Untangle the concepts of uniform and scalar
This patch refactors the logic in collectLoopUniforms and
collectValuesToIgnore, untangling the concepts of "uniform" and "scalar". It
adds isScalarAfterVectorization along side isUniformAfterVectorization to
distinguish the two. Known scalar values include those that are uniform,
getelementptr instructions that won't be vectorized, and induction variables
and induction variable update instructions whose users are all known to be
scalar.
This patch includes the following functional changes:
- In collectLoopUniforms, we mark uniform the pointer operands of interleaved
accesses. Although non-consecutive, these pointers are treated like
consecutive pointers during vectorization.
- In collectValuesToIgnore, we insert a value into VecValuesToIgnore if it
isScalarAfterVectorization rather than isUniformAfterVectorization. This
differs from the previous functionaly in that we now add getelementptr
instructions that will not be vectorized into VecValuesToIgnore.
This patch also removes the ValuesNotWidened set used for induction variable
scalarization since, after the above changes, it is now equivalent to
isScalarAfterVectorization.
Differential Revision: https://reviews.llvm.org/D22867
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277460
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