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David Blaikie [Tue, 9 Jan 2018 22:13:56 +0000 (22:13 +0000)]
ADT: Add a range-based version of std::copy
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322127
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Chris Bieneman [Tue, 9 Jan 2018 21:58:46 +0000 (21:58 +0000)]
[IPSCCP] Remove calls without side effects
Summary:
When performing constant propagation for call instructions we have historically replaced all uses of the return from a call, but not removed the call itself. This is required for correctness if the calls have side effects, however the compiler should be able to safely remove calls that don't have side effects.
This allows the compiler to completely fold away calls to functions that have no side effects if the inputs are constant and the output can be determined at compile time.
Reviewers: davide, sanjoy, bruno, dberlin
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D38856
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322125
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Stefan Pintilie [Tue, 9 Jan 2018 21:57:49 +0000 (21:57 +0000)]
[PowerPC] Manually schedule the prologue and epilogue
This patch makes the following changes to the schedule of instructions in the
prologue and epilogue.
The stack pointer update is moved down in the prologue so that the callee saves
do not have to wait for the update to happen.
Saving the lr is moved down in the prologue to hide the latency of the mflr.
The stack pointer is moved up in the epilogue so that restoring of the lr can
happen sooner.
The mtlr is moved up in the epilogue so that it is away form the blr at the end
of the epilogue. The latency of the mtlr can now be hidden by the loads of the
callee saved registers.
This commit is almost identical to this one: r322036 except that two warnings
that broke build bots have been fixed.
The revision number is D41737 as before.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322124
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Rafael Espindola [Tue, 9 Jan 2018 21:55:10 +0000 (21:55 +0000)]
Don't create MCFillFragment directly.
Instead use higher level APIs that take care of most bookkeeping.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322123
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Sam Clegg [Tue, 9 Jan 2018 21:38:53 +0000 (21:38 +0000)]
[WebAssembly] Explicitly specify function/global index space in YAML
These indexes are useful because they are not always zero based and
functions and globals are referenced elsewhere by their index.
This matches what we already do for the type index space.
Differential Revision: https://reviews.llvm.org/D41877
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322121
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Tim Renouf [Tue, 9 Jan 2018 21:36:25 +0000 (21:36 +0000)]
[SelectionDAG] Fixed f16-from-vector promotion problem
Summary:
In the case of an fp_extend of v1f16 to v1f32 where the v1f16 is the
result of a bitcast from i16, avoid creating an illegal fp16_to_fp where
the input is not a vector and the result is a v1f32.
V2: The fix is now to avoid vector scalarization creating a v1->scalar
bitcast.
Reviewers: srhines, t.p.northover
Subscribers: nhaehnle, llvm-commits, dstuttard, t-tye, yaxunl, wdng, kzhuravl, arsenm
Differential Revision: https://reviews.llvm.org/D41126
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322120
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Tim Renouf [Tue, 9 Jan 2018 21:34:43 +0000 (21:34 +0000)]
[AMDGPU] Fixed incorrect uniform branch condition
Summary:
I had a case where multiple nested uniform ifs resulted in code that did
v_cmp comparisons, combining the results with s_and_b64, s_or_b64 and
s_xor_b64 and using the resulting mask in s_cbranch_vccnz, without first
ensuring that bits for inactive lanes were clear.
There was already code for inserting an "s_and_b64 vcc, exec, vcc" to
clear bits for inactive lanes in the case that the branch is instruction
selected as s_cbranch_scc1 and is then changed to s_cbranch_vccnz in
SIFixSGPRCopies. I have added the same code into SILowerControlFlow for
the case that the branch is instruction selected as s_cbranch_vccnz.
This de-optimizes the code in some cases where the s_and is not needed,
because vcc is the result of a v_cmp, or multiple v_cmp instructions
combined by s_and/s_or. We should add a pass to re-optimize those cases.
Reviewers: arsenm, kzhuravl
Subscribers: wdng, yaxunl, t-tye, llvm-commits, dstuttard, timcorringham, nhaehnle
Differential Revision: https://reviews.llvm.org/D41292
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322119
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Rui Ueyama [Tue, 9 Jan 2018 20:36:42 +0000 (20:36 +0000)]
[COFF] Process /EXPORT option in fastpath
Patch by Takuto Ikuta.
This patch reduces lld link time of chromium's blink_core.dll in
component build.
Total size of input argument in .directives become nearly 300MB in the
build and almost all its content are /EXPORT.
To reduce time of parsing too many /EXPORT option in the build, I
introduce fastpath for /EXPORT in ArgParser::parseDirectives.
On my desktop machine, 4 times stats of the link time are like below.
Improved around 20%.
This patch
TotalSeconds : 8.
6217627
TotalSeconds : 8.
5402175
TotalSeconds : 8.
6855853
TotalSeconds : 8.
3624441
Ave : 8.
5525024
master
TotalSeconds : 10.
9975031
TotalSeconds : 11.
3409428
TotalSeconds : 10.
6332897
TotalSeconds : 10.
7650687
Ave : 10.
934201075
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322117
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Daniel Berlin [Tue, 9 Jan 2018 20:12:42 +0000 (20:12 +0000)]
NewGVN: Fix PR/33367, which was causing us to delete non-copy intrinsics accidentally in some rare cases
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322115
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Hubert Tong [Tue, 9 Jan 2018 20:09:23 +0000 (20:09 +0000)]
Profiling tests: Endianess XFAIL for powerpc- (32-bit)
Add powerpc- (32-bit) as XFAIL for tests that are documented either in-
line or via commit messages as expected to fail on big-endian systems.
Tests not documented in-line are documented in commit messages as
follows:
r211172 - test/tools/llvm-cov/llvm-cov.test
r247920 - test/Transforms/SampleProfile/gcc-simple.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322114
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Rafael Espindola [Tue, 9 Jan 2018 20:02:35 +0000 (20:02 +0000)]
Don't duplicate names in comments. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322113
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Rafael Espindola [Tue, 9 Jan 2018 19:50:29 +0000 (19:50 +0000)]
Inline a emitFill variant that is only used once. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322111
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Easwaran Raman [Tue, 9 Jan 2018 19:39:35 +0000 (19:39 +0000)]
Add a pass to generate synthetic function entry counts.
Summary:
This pass synthesizes function entry counts by traversing the callgraph
and using the relative block frequencies of the callsites. The intended
use of these counts is in inlining to determine hot/cold callsites in
the absence of profile information.
The pass is split into two files with the code that propagates the
counts in a callgraph in a Utils file. I plan to add support for
propagation in the thinlto link phase and the propagation code will be
shared and hence this split. I did not add support to the old PM since
hot callsite determination in inlining is not possible in old PM
(although we could use hot callee heuristic with synthetic counts in the
old PM it is not worth the effort tuning it)
Reviewers: davidxl, silvas
Subscribers: mgorny, mehdi_amini, llvm-commits
Differential Revision: https://reviews.llvm.org/D41604
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322110
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Brian Gesiak [Tue, 9 Jan 2018 19:38:04 +0000 (19:38 +0000)]
[Option] For typo '-foo', suggest '--foo'
Summary:
https://reviews.llvm.org/rL321877 introduced the `OptTable::findNearest`
method, to find the closest edit distance option for a given string.
However, the implementation contained a bug: for a typo `-foo` with an
edit distance of 1 away from a valid option `--foo`, `findNearest`
would suggest a nearby option of `foo`. That is, the result would not
include the `--` prefix, and so was not a valid option.
Fix the bug by ensuring that the prefix string is initialized to one of
the valid prefixes for the option.
Test Plan: `check-llvm-unit`
Reviewers: v.g.vassilev, teemperor, ruiu, jroelofs, yamaguchi
Reviewed By: jroelofs
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D41873
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322109
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Rafael Espindola [Tue, 9 Jan 2018 19:29:33 +0000 (19:29 +0000)]
Make one of the emitFill methods non virtual. NFC.
This is just preparatory work to fix PR35858.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322108
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Alexey Bataev [Tue, 9 Jan 2018 19:08:22 +0000 (19:08 +0000)]
[COST]Fix PR35865: Fix cost model evaluation for shuffle on X86.
Summary:
If the vector type is transformed to non-vector single type, the compile
may crash trying to get vector information about non-vector type.
Reviewers: RKSimon, spatel, mkuper, hfinkel
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D41862
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322106
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Derek Schuff [Tue, 9 Jan 2018 19:05:34 +0000 (19:05 +0000)]
[WebAssembly] Update libcall signature lists
New signatures added in r322087. A fix for this tight coupling is forthcoming.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322105
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Sanjay Patel [Tue, 9 Jan 2018 18:56:03 +0000 (18:56 +0000)]
[InstCombine] weaken assertions for icmp folds (PR35846)
Because of potential UB (known bits conflicts with an llvm.assume),
we have to check rather than assert here because InstSimplify doesn't
kill the compare:
https://bugs.llvm.org/show_bug.cgi?id=35846
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322104
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Teresa Johnson [Tue, 9 Jan 2018 18:32:53 +0000 (18:32 +0000)]
Fix crash when linking metadata with ODR type uniquing
Summary:
With DebugTypeODRUniquing enabled, during IR linking debug metadata
in the destination module may be reached from the source module.
This means that ConstantAsMetadata nodes (e.g. on DITemplateValueParameter)
may contain a value the destination module. When trying to map such
metadata nodes, we will attempt to map a GV already in the dest module.
linkGlobalValueProto will end up with a source GV that is the same as
the dest GV as well as the new GV. Trying to access the TypeMap for the
source GV type, which is actually a dest GV type, hits an assertion
since it appears that we have mapped into the source module (because the
type is the value not a key into the map).
Detect that we don't need to access the TypeMap in this case, since
there is no need to create a bitcast from the new GV to the source GV
type as they GV are the same.
Fixes PR35722.
Reviewers: mehdi_amini, pcc
Subscribers: probinson, llvm-commits, eraman
Differential Revision: https://reviews.llvm.org/D41624
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322103
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Max Moroz [Tue, 9 Jan 2018 18:23:34 +0000 (18:23 +0000)]
[lit] Implement "-r" option for builtin "diff" command + a test using that.
Summary:
That would allow to recursively compare directories in tests using
"diff -r" on Windows in a similar way as it can be done on Linux or Mac.
Reviewers: zturner, morehouse, vsk
Reviewed By: zturner
Subscribers: kcc, llvm-commits
Differential Revision: https://reviews.llvm.org/D41776
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322102
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Craig Topper [Tue, 9 Jan 2018 18:14:22 +0000 (18:14 +0000)]
[X86] Add a DAG combine to combine (sext (setcc)) with VLX
Normally target independent DAG combine would do this combine based on getSetCCResultType, but with VLX getSetCCResultType returns a vXi1 type preventing the DAG combining from kicking in.
But doing this combine can allow us to remove the explicit sign extend that would otherwise be emitted.
This patch adds a target specific DAG combine to combine the sext+setcc when the result type is the same size as the input to the setcc. I've restricted this to FP compares and things that can be represented with PCMPEQ and PCMPGT since we don't have full integer compare support on the older ISAs.
Differential Revision: https://reviews.llvm.org/D41850
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322101
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Craig Topper [Tue, 9 Jan 2018 18:14:18 +0000 (18:14 +0000)]
[lli] Make lli support -mcpu=native for CPU autodetection
llc, opt, and clang can all autodetect the CPU and supported features. lli cannot as far as I could tell.
This patch uses the getCPUStr() and introduces a new getCPUFeatureList() and uses those in lli in place of MCPU and MAttrs.
Ideally, we would merge getCPUFeatureList and getCPUFeatureStr, but opt and llc need a string and lli wanted a list. Maybe we should just return the SubtargetFeature object and let the caller decide what it needs?
Differential Revision: https://reviews.llvm.org/D41833
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322100
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Matthew Voss [Tue, 9 Jan 2018 17:52:00 +0000 (17:52 +0000)]
Test commit
This is a commit to test commit access.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322099
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Florian Hahn [Tue, 9 Jan 2018 17:49:25 +0000 (17:49 +0000)]
[TargetParser] Add missing armv8l ARMv8 variant.
This change adds the missing armv8l variant as an alias of armv8 architecture.
The issue was observed with several regressions in validation on armv8l
hardware (for instance ExecutionEngine/frem.ll failed due to lack of neon fpu).
Tested with regression testsuite passed without regression on ARM and x86_64.
Patch by Yvan Roux.
Reviewers: rengolin, rogfer01, olista01, fhahn
Reviewed By: fhahn
Differential Revision: https://reviews.llvm.org/D41859
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322098
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Francis Visoiu Mistrih [Tue, 9 Jan 2018 17:31:07 +0000 (17:31 +0000)]
[CodeGen] Don't print "pred:" and "opt:" in -debug output
In -debug output we print "pred:" whenever a MachineOperand is a
predicate operand in the instruction descriptor, and "opt:" whenever a
MachineOperand is an optional def in the instruction descriptor.
Differential Revision: https://reviews.llvm.org/D41870
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322096
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Davide Italiano [Tue, 9 Jan 2018 17:27:45 +0000 (17:27 +0000)]
[Support] Use realpath(3) instead of trying to open a file.
If we don't have read permissions on the directory the call would
fail.
<rdar://problem/
35871293>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322095
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Pavel Labath [Tue, 9 Jan 2018 17:26:06 +0000 (17:26 +0000)]
[Support] Add WritableMemoryBuffer::getNewMemBuffer
Summary:
The idea is that it would replace
(non-Writable)MemoryBuffer::getNewMemBuffer, which is quite useless
unless you const_cast its contents to write to it (which all (both)
callers of this function were doing). This patch also fixes one of the usages in
COFFWriter. After fixing the other usage in clang, I plan to delete the old
function.
Reviewers: dblaikie, Bigcheese
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D41540
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322094
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Sander de Smalen [Tue, 9 Jan 2018 17:01:27 +0000 (17:01 +0000)]
Recommit r322073: [AArch64][SVE] Asm: Add predicated ADD/SUB instructions
Fixed issue that was found on sanitizer-x86_64-linux-fast.
I changed the result type of 'Parser.getTok().getString().lower()'
in AArch64AsmParser::tryParseSVEPredicateVector() from 'StringRef' to
'auto', since StringRef::lower() returns a std::string.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322092
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Zvi Rackover [Tue, 9 Jan 2018 16:26:06 +0000 (16:26 +0000)]
X86 Tests: Update more isel tests with FastVariableShuffle feature
Summary:
Added the FastVariableShuffle feature to cases that resembled processors
for which this fearure is on.
For AVX2 there are processors with and w/o this fearue enable.
For AVX512 only KNL does enable this feature so cases which only have
+avx512f were left without the FastVariableShuffle enabled.
Reviewers: RKSimon, craig.topper
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D41851
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322090
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Zvi Rackover [Tue, 9 Jan 2018 16:14:15 +0000 (16:14 +0000)]
X86 Tests: Add common check prefix to test-case. NFC.
As suggested in D41851
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322089
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Francis Visoiu Mistrih [Tue, 9 Jan 2018 16:11:51 +0000 (16:11 +0000)]
[CodeGen] Print frame-setup/destroy flags in -debug output like we do in MIR
Currently the MachineInstr::print function prints the
frame-setup/frame-destroy differently than it does in MIR.
Instead of:
%x21 = LDR %sp, -16; flags: FrameDestroy
print:
%x21 = frame-destroy LDR %sp, -16
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322088
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Sanjay Patel [Tue, 9 Jan 2018 15:41:00 +0000 (15:41 +0000)]
[SelectionDAG] lower math intrinsics to finite version of libcalls when possible (PR35672)
Ingredients in this patch:
1. Add HANDLE_LIBCALL defs for finite mathlib functions that correspond to LLVM intrinsics.
2. Plumbing to send TargetLibraryInfo down to SelectionDAGLegalize.
3. Relaxed math and library checking in SelectionDAGLegalize::ConvertNodeToLibcall() to choose finite libcalls.
There was a bug about determining the availability of the finite calls that should be fixed with:
rL322010
Not in this patch:
This doesn't resolve the question/bug of clang creating the intrinsic IR in the first place.
There's likely follow-up work needed to support the long double variants better.
There's room for improvement to reduce the code duplication.
Create finite calls that don't originate from a corresponding intrinsic or DAG node?
Differential Revision: https://reviews.llvm.org/D41338
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322087
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Francis Visoiu Mistrih [Tue, 9 Jan 2018 15:39:44 +0000 (15:39 +0000)]
[CodeGen] Don't print register classes in -debug output
Since register classes and banks are already printed with the register
definition, don't print it at the end of every instruction anymore.
This follows MIR in this regard and is another step to the unification
of the two formats.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322086
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Nirav Dave [Tue, 9 Jan 2018 15:23:12 +0000 (15:23 +0000)]
[DAG] Elide overlapping stores
Relanding after fixing handling of pre-indexed memory operations in
BaseIndexOffset analysis (r322003).
Extend overlapping store elision to handle overwrites of stores by
larger stores.
Reviewers: craig.topper, rnk, t.p.northover
Subscribers: javed.absar, hiraditya, llvm-commits
Differential Revision: https://reviews.llvm.org/D40969
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322085
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Petar Jovanovic [Tue, 9 Jan 2018 15:08:37 +0000 (15:08 +0000)]
[EarlyCSE] Salvage debug info during DCE
EarlyCSE did not try to salvage debug info during erasing of instructions.
This change fixes it.
Patch by Djordje Todorovic.
Differential Revision: https://reviews.llvm.org/D41496
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322083
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Simon Pilgrim [Tue, 9 Jan 2018 14:23:46 +0000 (14:23 +0000)]
[InstCombine] Check for out of range ashr values using APInt before calling getZExtValue
Reduced from oss-fuzz #5032 test case
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322078
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Sander de Smalen [Tue, 9 Jan 2018 13:51:09 +0000 (13:51 +0000)]
Reverted r322073 because of AddressSanitizer failure on
sanitizer-x86_64-linux-fast builder.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322077
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Simon Pilgrim [Tue, 9 Jan 2018 13:35:18 +0000 (13:35 +0000)]
[X86][AVX] Add v2i64/v2f64 load tests
Ensure these use insertions, not masked load ops
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322076
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Sander de Smalen [Tue, 9 Jan 2018 12:43:46 +0000 (12:43 +0000)]
[AArch64][SVE] Asm: Add predicated ADD/SUB instructions
Summary:
Add the predicated ADD/SUB instructions and corresponding tests.
Patch [3/3] in a series to add predicated ADD/SUB instructions for SVE.
Reviewers: rengolin, mcrosier, evandro, fhahn, echristo
Reviewed By: fhahn
Subscribers: aemerson, javed.absar, tschuett, llvm-commits, kristof.beyls
Differential Revision: https://reviews.llvm.org/D41443
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322073
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Simon Pilgrim [Tue, 9 Jan 2018 11:55:27 +0000 (11:55 +0000)]
[InstCombine] Add pow2 mul -> shl tests for vectors with uniform/non-uniform constants
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322072
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Francis Visoiu Mistrih [Tue, 9 Jan 2018 11:33:22 +0000 (11:33 +0000)]
[MIR] Add support for the frame-destroy MachineInstr flag
We are printing / parsing the `frame-setup` MachineInstr flag but not
the `frame-destroy` one.
Differential Revision: https://reviews.llvm.org/D41509
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322071
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Sander de Smalen [Tue, 9 Jan 2018 11:17:06 +0000 (11:17 +0000)]
[AArch64][SVE] Asm: Add parsing of merging/zeroing suffix for SVE predicate vector operands
Summary:
Parsing of the '/m' (merging) or '/z' (zeroing) suffix of a predicate operand.
Patch [2/3] in a series to add predicated ADD/SUB instructions for SVE.
Reviewers: rengolin, mcrosier, evandro, fhahn, echristo, MatzeB, t.p.northover
Reviewed By: fhahn
Subscribers: t.p.northover, MatzeB, aemerson, javed.absar, tschuett, llvm-commits, kristof.beyls
Differential Revision: https://reviews.llvm.org/D41442
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322070
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Nikolai Bozhenov [Tue, 9 Jan 2018 11:15:08 +0000 (11:15 +0000)]
[Nios2] Arithmetic instructions for R1 and R2 ISA.
Summary:
This commit enables some of the arithmetic instructions for Nios2 ISA (for both
R1 and R2 revisions), implements facilities required to emit those instructions
and provides LIT tests for added instructions.
Reviewed By: hfinkel
Differential Revision: https://reviews.llvm.org/D41236
Author: belickim <mateusz.belicki@intel.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322069
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Oren Ben Simhon [Tue, 9 Jan 2018 08:51:18 +0000 (08:51 +0000)]
Instrument Control Flow For Indirect Branch Tracking
CET (Control-Flow Enforcement Technology) introduces a new mechanism called IBT (Indirect Branch Tracking).
According to IBT, each Indirect branch should land on dedicated ENDBR instruction (End Branch).
The new pass adds ENDBR instructions for every indirect jmp/call (including jumps using jump tables / switches).
For more information, please see the following:
https://software.intel.com/sites/default/files/managed/4d/2a/control-flow-enforcement-technology-preview.pdf
Differential Revision: https://reviews.llvm.org/D40482
Change-Id: Icb754489faf483a95248f96982a4e8b1009eb709
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322062
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Shoaib Meenai [Tue, 9 Jan 2018 07:50:18 +0000 (07:50 +0000)]
[cmake] Use symlinks for Windows-hosted toolchains built on Unix
When cross-compiling for Windows on Unix, the built toolchain will need
to be transferred to Windows to actually run. My opinion is that the
Unix build should use symlinks, and the transfer to Windows should take
care of making those symlinks usable. E.g., I envision tarballs to be a
common form of transfer from Unix to Windows, in which case the tarball
can be created using --dereference to follow the symlinks.
The motivation here is that, when cross-compiling for Windows on Unix,
the installation will *already* create symlinks. The reason is that the
installation script will be invoked without knowing the host system, so
the `if(UNIX)` check in the installation symlink creation script will
reflect the build system rather than the host system. We could either
make the build and install trees both contain copies or both contain
symlinks, and using symlinks is a significant space saving without (in
my opinion) having any detrimental effect on the usage of the cross-
compiled toolchain on Windows.
A secondary motivation is that Windows 10 version 1703 and later finally
lift the administrator rights requirement for creating symbolic links
(if the system is in Developer Mode), which makes symlinks a lot more
practical even on Windows. Of course Unix and Windows symlinks aren't
interoperable, but symlinks for Windows toolchains is a reasonable
future direction to be going in anyway.
Differential Revision: https://reviews.llvm.org/D41314
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322061
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Craig Topper [Tue, 9 Jan 2018 07:09:34 +0000 (07:09 +0000)]
[X86] Allow more cmpps/pd immediate encodings to be commuted during isel.
The code that checks the immediate wasn't masking to the lower 3-bits like the code in X86InstrInfo.cpp that's used by the peephole pass does.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322060
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Serguei Katkov [Tue, 9 Jan 2018 06:47:14 +0000 (06:47 +0000)]
[SCEV] Do not cache S -> V if S is not equivalent of V
SCEV tracks the correspondence of created SCEV to original instruction.
However during creation of SCEV it is possible that nuw/nsw/exact flags are
lost.
As a result during expansion of the SCEV the instruction with nuw/nsw/exact
will be used where it was expected and we produce poison incorreclty.
Reviewers: sanjoy, mkazantsev, sebpop, jbhateja
Reviewed By: sanjoy
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D41578
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322058
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Serguei Katkov [Tue, 9 Jan 2018 04:37:06 +0000 (04:37 +0000)]
[CGP] Fix Complex addressing mode for offset
If the offset is differ in two addressing mode we can continue only if
ScaleReg is not set due to we will use it as merge of different offsets.
It should fix PR35799 and PR35805.
Reviewers: john.brawn, reames
Reviewed By: reames
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D41227
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322056
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Sean Fertile [Tue, 9 Jan 2018 03:03:41 +0000 (03:03 +0000)]
[PowerPC] Can not assume an intrinsic argument is a simple type.
The CTRLoop pass performs checks on the argument of certain libcalls/intrinsics,
and assumes the arguments must be of a simple type. This isn't always the case
though. For example if we unroll and vectorize a loop we may end up with vectors
larger then the largest legal type, along with intrinsics that operate on those
wider types. This happened in the ffmpeg build, where we unrolled a loop and
ended up with a sqrt intrinsic that operated on V16f64, triggering an assertion.
Differential Revision: https://reviews.llvm.org/D41758
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322055
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Eric Christopher [Tue, 9 Jan 2018 02:38:17 +0000 (02:38 +0000)]
Remove unused function HvxSelector::zerous.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322053
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Stefan Pintilie [Tue, 9 Jan 2018 01:06:21 +0000 (01:06 +0000)]
Revert "[PowerPC] Manually schedule the prologue and epilogue"
[PowerPC] This reverts commit r322036.
Failing build bots. Revert the commit now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322051
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Craig Topper [Tue, 9 Jan 2018 00:50:47 +0000 (00:50 +0000)]
[X86] Remove llvm.x86.avx512.cvt*2mask.* intrinsics and autoupgrade to (icmp slt X, 0)
I had to drop fast-isel-abort from a test because we can't fast isel some of the mask stuff. When we used intrinsics we implicitly fell back to SelectionDAG for the intrinsic call without triggering the abort error. But with native IR that doesn't happen the same way.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322050
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Craig Topper [Tue, 9 Jan 2018 00:50:42 +0000 (00:50 +0000)]
[X86] Remove unnecessary isel pattern that is a combination of two other patterns.
The pattern was this
def : Pat<(i32 (zext (i8 (bitconvert (v8i1 VK8:$src))))),
(MOVZX32rr8 (EXTRACT_SUBREG (i32 (COPY_TO_REGCLASS VK8:$src, GR32)), sub_8bit))>, Requires<[NoDQI]>;
but if you just let (i32 (zext X)) match byte itself you'll get MOVZX32rr8. And if you let (i8 (bitconvert (v8i1 VK8:$src))) match by itself you'll get (EXTRACT_SUBREG (i32 (COPY_TO_REGCLASS VK8:$src, GR32)), sub_8bit).
So we can just let isel do the two patterns naturally.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322049
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Jessica Paquette [Tue, 9 Jan 2018 00:26:18 +0000 (00:26 +0000)]
[MachineOutliner] AArch64: Handle instrs that use SP and will never need fixups
This commit does two things. Firstly, it adds a collection of flags which can
be passed along to the target to encode information about the MBB that an
instruction lives in to the outliner.
Second, it adds some of those flags to the AArch64 outliner in order to add
more stack instructions to the list of legal instructions that are handled
by the outliner. The two flags added check if
- There are calls in the MachineBasicBlock containing the instruction
- The link register is available in the entire block
If the link register is available and there are no calls, then a stack
instruction can always be outlined without fixups, regardless of what it is,
since in this case, the outliner will never modify the stack to create a
call or outlined frame.
The motivation for doing this was checking which instructions are most often
missed by the outliner. Instructions like, say
%sp<def> = ADDXri %sp, 32, 0; flags: FrameDestroy
are very common, but cannot be outlined in the case that the outliner might
modify the stack. This commit allows us to outline instructions like this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322048
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Petr Hosek [Mon, 8 Jan 2018 23:50:59 +0000 (23:50 +0000)]
[CMake] Support for cross-compilation when build runtimes
When cross-compiling, we cannot use the just built toolchain, instead
we need to use the host toolchain which we assume has a support for
targeting the selected target platform. We also need to pass the path
to the native version of llvm-config to external projects.
Differential Revision: https://reviews.llvm.org/D41678
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322046
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Craig Topper [Mon, 8 Jan 2018 22:37:49 +0000 (22:37 +0000)]
[X86] Remove GCCBuiltin from int_x86_avx512_cvtb2mask_128 and similar intrinsics.
I'm going to convert these to 'icmp slt X, zeroinitializer' in clang's CGBuiltin.cpp, but the GCCBuiltin names need to be removed to do that.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322037
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Stefan Pintilie [Mon, 8 Jan 2018 22:23:10 +0000 (22:23 +0000)]
[PowerPC] Manually schedule the prologue and epilogue
This patch makes the following changes to the schedule of instructions in the
prologue and epilogue.
The stack pointer update is moved down in the prologue so that the callee saves
do not have to wait for the update to happen.
Saving the lr is moved down in the prologue to hide the latency of the mflr.
The stack pointer is moved up in the epilogue so that restoring of the lr can
happen sooner.
The mtlr is moved up in the epilogue so that it is away form the blr at the end
of the epilogue. The latency of the mtlr can now be hidden by the loads of the
callee saved registers.
Differential Revision: https://reviews.llvm.org/D41737
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322036
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Justin Bogner [Mon, 8 Jan 2018 22:07:42 +0000 (22:07 +0000)]
AlwaysInliner: Alow setting InsertLifetime in the new-style pass
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322033
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Shoaib Meenai [Mon, 8 Jan 2018 21:52:58 +0000 (21:52 +0000)]
[cmake] Pass CMAKE_MAKE_PROGRAM to native configure
If the make program isn't in the path, the native configure will fail.
Pass CMAKE_MAKE_PROGRAM to the native configure explicitly to remedy
this, similar to what's already done for external project configuration.
Explicitly set CMAKE_MAKE_PROGRAM before the user flags so that they can
override it for the native build if they desire (though I can't fathom
why that would be useful).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322032
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Zachary Turner [Mon, 8 Jan 2018 21:38:50 +0000 (21:38 +0000)]
Fix uninitialized read error reported by MSAN.
The problem was that our Obj -> Yaml dumper had not been taught
to handle certain types of records. This meant that when I
generated the test input files, the records were still there but
none of its fields were filled out. So when it did the
Yaml -> Obj conversion as part of the test, it generated records
with garbage in them.
The patch here fixes the Obj <-> Yaml converter, and additionally
updates the test file with fresh Yaml generated by the fixed
converter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322029
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Justin Bogner [Mon, 8 Jan 2018 21:13:35 +0000 (21:13 +0000)]
ArgPromotion: Allow setting MaxElements in the new-style pass
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322025
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Petar Jovanovic [Mon, 8 Jan 2018 19:44:03 +0000 (19:44 +0000)]
Add lit.local.cfg in test/DebugInfo/MIR/Mips/
Add test/DebugInfo/MIR/Mips/lit.local.cfg so no tests are run if Mips is
not a supported target.
This should resolve buildbot failures seen after r322015.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322020
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Sanjay Patel [Mon, 8 Jan 2018 18:31:13 +0000 (18:31 +0000)]
[ValueTracking] remove overzealous assert
The test is derived from a failing fuzz test:
https://bugs.chromium.org/p/oss-fuzz/issues/detail?id=5008
Credit to @rksimon for pointing out the problem.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322016
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Petar Jovanovic [Mon, 8 Jan 2018 18:21:15 +0000 (18:21 +0000)]
[LiveDebugValues] Change condition for block termination recognition
The last iterator of MBB should be recognized as MBB.end() not as
MBB.instr_end() which could return bundled instruction that is not iterable
with basic iterator.
Patch by Nikola Prica.
Differential Revision: https://reviews.llvm.org/D41626
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322015
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Sanjay Patel [Mon, 8 Jan 2018 17:38:09 +0000 (17:38 +0000)]
[TargetLibraryInfo] fix finite mathlib function availability
This patch was part of:
https://reviews.llvm.org/D41338
...but we can expose the bug in IR via constant propagation
as shown in the test. Unless the triple includes 'linux', we
should not fold these because the functions don't exist on
other platforms (yet?).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322010
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Simon Pilgrim [Mon, 8 Jan 2018 17:16:59 +0000 (17:16 +0000)]
Fixed spelling mistake. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322009
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Adrian McCarthy [Mon, 8 Jan 2018 17:12:01 +0000 (17:12 +0000)]
Revert "Emit Function IDs table for Control Flow Guard"
The new test fails on the Hexagon bot. Reverting while I investigate.
This reverts https://reviews.llvm.org/rL322005
This reverts commit
b7e0026b4385180c378edc658ec91a39566f2942.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322008
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Aleksandar Beserminji [Mon, 8 Jan 2018 16:50:33 +0000 (16:50 +0000)]
[mips] Remove duplicated R6 EVA instructions
This patch removes duplicated EVA instructions in R6.
Differential Revision: https://reviews.llvm.org/D41769
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322007
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Davide Italiano [Mon, 8 Jan 2018 16:34:06 +0000 (16:34 +0000)]
[CVP] Replace incoming values from unreachable blocks with undef.
This is an attempt of fixing PR35807.
Due to the non-standard definition of dominance in LLVM, where uses in
unreachable blocks are dominated by anything, you can have, in an
unreachable block:
%patatino = OP1 %patatino, CONSTANT
When `SimplifyInstruction` receives a PHI where an incoming value is of
the aforementioned form, in some cases, loops indefinitely.
What I propose here instead is keeping track of the incoming values
from unreachable blocks, and replacing them with undef. It fixes this
case, and it seems to be good regardless (even if we can't prove that
the value is constant, as it's coming from an unreachable block, we
can ignore it).
Differential Revision: https://reviews.llvm.org/D41812
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322006
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Adrian McCarthy [Mon, 8 Jan 2018 16:33:42 +0000 (16:33 +0000)]
Emit Function IDs table for Control Flow Guard
Adds option /guard:cf to clang-cl and -cfguard to cc1 to emit function IDs
of functions that have their address taken into a section named .gfids$y for
compatibility with Microsoft's Control Flow Guard feature.
Differential Revision: https://reviews.llvm.org/D40531
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322005
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Aleksandar Beserminji [Mon, 8 Jan 2018 16:25:40 +0000 (16:25 +0000)]
[mips] Improve diagnostics for instruction mapping
This patch improves diagnostic for case when mapped instruction
does not contain a field listed under RowFields.
Differential Revision: https://reviews.llvm.org/D41778
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322004
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Nirav Dave [Mon, 8 Jan 2018 16:21:35 +0000 (16:21 +0000)]
[DAG] Teach BaseIndexOffset to correctly handle with indexed operations
BaseIndexOffset address analysis incorrectly ignores offsets folded
into indexed memory operations causing potential errors in alias
analysis of pre-indexed operations.
Reviewers: efriedma, RKSimon, hfinkel, jyknight
Subscribers: hiraditya, javed.absar, llvm-commits
Differential Revision: https://reviews.llvm.org/D41701
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322003
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Sanjay Patel [Mon, 8 Jan 2018 15:05:34 +0000 (15:05 +0000)]
[InstCombine] fold min/max tree with common operand (PR35717)
There is precedence for factorization transforms in instcombine for FP ops with fast-math.
We also have similar logic in foldSPFofSPF().
It would take more work to add this to reassociate because that's specialized for binops,
and min/max are not binops (or even single instructions). Also, I don't have evidence that
larger min/max trees than this exist in real code, but if we find that's true, we might
want to reorganize where/how we do this optimization.
In the motivating example from https://bugs.llvm.org/show_bug.cgi?id=35717 , we have:
int test(int xc, int xm, int xy) {
int xk;
if (xc < xm)
xk = xc < xy ? xc : xy;
else
xk = xm < xy ? xm : xy;
return xk;
}
This patch solves that problem because we recognize more min/max patterns after rL321672
https://rise4fun.com/Alive/Qjne
https://rise4fun.com/Alive/3yg
Differential Revision: https://reviews.llvm.org/D41603
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321998
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Momchil Velikov [Mon, 8 Jan 2018 14:47:19 +0000 (14:47 +0000)]
[ARM] Fix PR35379 - incorrect unwind information when compiling with -Oz
The patch makes the unwind information not mention registers, which were pushed
solely for the purpose of saving stack adjustment instructions.
Differential revision: https://reviews.llvm.org/D41300
Fixes https://bugs.llvm.org/show_bug.cgi?id=35379
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321996
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Alexey Bataev [Mon, 8 Jan 2018 14:43:06 +0000 (14:43 +0000)]
[SLP] Fix PR35777: Incorrect handling of aggregate values.
Summary:
Fixes the bug with incorrect handling of InsertValue|InsertElement
instrucions in SLP vectorizer. Currently, we may use incorrect
ExtractElement instructions as the operands of the original
InsertValue|InsertElement instructions.
Reviewers: mkuper, hfinkel, RKSimon, spatel
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D41767
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321994
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Alexey Bataev [Mon, 8 Jan 2018 14:33:11 +0000 (14:33 +0000)]
[SLP] Fix PR35628: Count external uses on extra reduction arguments.
Summary:
If the vectorized value is marked as extra reduction argument, its users
are not considered as external users. Patch fixes this.
Reviewers: mkuper, hfinkel, RKSimon, spatel
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D41786
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321993
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Sam Parker [Mon, 8 Jan 2018 13:21:24 +0000 (13:21 +0000)]
[DAGCombine] Fix for PR35761
I had falsely assumed that constant operands would be operand(1) of
the bin ops that may need their constant operand to be masked.
Bugzilla: https://bugs.llvm.org/show_bug.cgi?id=35761
Differential Revision: https://reviews.llvm.org/D41667
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321991
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Jonas Paulsson [Mon, 8 Jan 2018 12:52:40 +0000 (12:52 +0000)]
[SystemZ] Comment fix in SystemZElimCompare.cpp
NFC
Review: Ulrich Weigand
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321990
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Momchil Velikov [Mon, 8 Jan 2018 11:32:37 +0000 (11:32 +0000)]
[ARM] Fix PR35481
This patch allows `r7` to be used, regardless of its use as a frame pointer, as
a temporary register when popping `lr`, and also falls back to using a high
temporary register if, for some reason, we weren't able to find a suitable low
one.
Differential revision: https://reviews.llvm.org/D40961
Fixes https://bugs.llvm.org/show_bug.cgi?id=35481
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321989
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Sam Parker [Mon, 8 Jan 2018 10:56:44 +0000 (10:56 +0000)]
[X86] Renamed CodeGen test
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321988
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Francis Visoiu Mistrih [Mon, 8 Jan 2018 10:46:05 +0000 (10:46 +0000)]
[X86] Remove side-effects from determineCalleeSaves
(Target)FrameLowering::determineCalleeSaves can be called multiple
times. I don't think it should have side-effects as creating stack
objects and setting global MachineFunctionInfo state as it is doing
today (in other back-ends as well).
This moves the creation of stack objects from determineCalleeSaves to
assignCalleeSavedSpillSlots.
Differential Revision: https://reviews.llvm.org/D41703
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321987
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Craig Topper [Mon, 8 Jan 2018 06:53:54 +0000 (06:53 +0000)]
[X86] Replace CVT2MASK ISD opcode with PCMPGTM compared to zero.
CVT2MASK is just checking the sign bit which can be represented with a comparison with zero.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321985
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Craig Topper [Mon, 8 Jan 2018 06:53:52 +0000 (06:53 +0000)]
[X86] Add patterns to allow 512-bit BWI compare instructions to be used for 128/256-bit compares when VLX is not available.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321984
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Petr Hosek [Mon, 8 Jan 2018 02:48:41 +0000 (02:48 +0000)]
Don't try to run MCJIT/OrcJIT EH tests when C++ library is statically linked
These tests assumes availability of external symbols provided by the
C++ library, but those won't be available in case when the C++ library
is statically linked because lli itself doesn't need these.
This uses llvm-readobj -needed-libs to check if C++ library is linked as
shared library and exposes that information as a feature to lit.
Differential Revision: https://reviews.llvm.org/D41272
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321981
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Petr Hosek [Mon, 8 Jan 2018 02:23:10 +0000 (02:23 +0000)]
[llvm-readobj] Support -needed-libs option for Mach-O files
This implements the -needed-libs option in Mach-O dumper.
Differential Revision: https://reviews.llvm.org/D41527
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321980
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Craig Topper [Sun, 7 Jan 2018 23:56:37 +0000 (23:56 +0000)]
[X86] Simplify some code in lower1BitVectorShuffle by relying on getNode's ability to constant fold vector SIGN_EXTEND.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321979
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Craig Topper [Sun, 7 Jan 2018 23:30:20 +0000 (23:30 +0000)]
[X86] Add VSHUFF32X4 and similar instructions to load folding tables.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321978
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Davide Italiano [Sun, 7 Jan 2018 22:09:44 +0000 (22:09 +0000)]
Revert "[SCCP] Manually fold branches on undef."
I thought this was responsible for PR35723, but I was
wrong, the issue lies elsewhere. Revert while I debug.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321975
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Davide Italiano [Sun, 7 Jan 2018 22:06:24 +0000 (22:06 +0000)]
[SLPVectorizer] Reintroduce std::stable_sort(properlyDominates()).
The approach was never discussed, I wasn't able to reproduce this
non-determinism, and the original author went AWOL.
After a discussion on the ML, Philip suggested to revert this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321974
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Craig Topper [Sun, 7 Jan 2018 21:03:43 +0000 (21:03 +0000)]
[X86] Revert accidental change to CMakeLists.txt in r321952
I had removed the qualifiers around the autogenerated folding table so I could compare with the manual table, but didn't intend to commit the change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321971
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Zvi Rackover [Sun, 7 Jan 2018 20:21:10 +0000 (20:21 +0000)]
X86 Tests: Add Tests for PMADDWD selection. NFC.
Support for ISel to be added.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321970
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Simon Pilgrim [Sun, 7 Jan 2018 19:09:40 +0000 (19:09 +0000)]
[DAG] Fix for Bug PR34620 - Allow SimplifyDemandedBits to look through bitcasts
Allow SimplifyDemandedBits to use TargetLoweringOpt::computeKnownBits to look through bitcasts. This can help simplifying in some cases where bitcasts of constants generated during or after legalization can't be folded away, and thus didn't get picked up by SimplifyDemandedBits. This fixes PR34620, where a redundant pand created during legalization from lowering and lshr <16xi8> wasn't being simplified due to the presence of a bitcasted build_vector as an operand.
Committed on the behalf of @sameconrad (Sam Conrad)
Differential Revision: https://reviews.llvm.org/D41643
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321969
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Craig Topper [Sun, 7 Jan 2018 18:34:08 +0000 (18:34 +0000)]
[X86] Remove unneeded code from combineGatherScatter that used to delte SIGN_EXTEND_INREG nodes created during legalization of v2i1/v4i1 masks on KNL.
v2i1/v4i1 are now legal on KNL so no sign_extend_inreg is generated.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321968
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Craig Topper [Sun, 7 Jan 2018 18:20:37 +0000 (18:20 +0000)]
[X86] Make v2i1 and v4i1 legal types without VLX
Summary:
There are few oddities that occur due to v1i1, v8i1, v16i1 being legal without v2i1 and v4i1 being legal when we don't have VLX. Particularly during legalization of v2i32/v4i32/v2i64/v4i64 masked gather/scatter/load/store. We end up promoting the mask argument to these during type legalization and then have to widen the promoted type to v8iX/v16iX and truncate it to get the element size back down to v8i1/v16i1 to use a 512-bit operation. Since need to fill the upper bits of the mask we have to fill with 0s at the promoted type.
It would be better if we could just have the v2i1/v4i1 types as legal so they don't undergo any promotion. Then we can just widen with 0s directly in a k register. There are no real v4i1/v2i1 instructions anyway. Everything is done on a larger register anyway.
This also fixes an issue that we couldn't implement a masked vextractf32x4 from zmm to xmm properly.
We now have to support widening more compares to 512-bit to get a mask result out so new tablegen patterns got added.
I had to hack the legalizer for widening the operand of a setcc a bit so it didn't try create a setcc returning v4i32, extract from it, then try to promote it using a sign extend to v2i1. Now we create the setcc with v4i1 if the original setcc's result type is v2i1. Then extract that and don't sign extend it at all.
There's definitely room for improvement with some follow up patches.
Reviewers: RKSimon, zvi, guyblank
Reviewed By: RKSimon
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D41560
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321967
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Hal Finkel [Sun, 7 Jan 2018 16:02:58 +0000 (16:02 +0000)]
[LV][VPlan] NFC patch to move LoopVectorizationPlanner class out of LoopVectorize.cpp
Another small step forward to move VPlan stuff outside of LoopVectorize.cpp.
VPlanBuilder.h is renamed to LoopVectorizationPlanner.h
LoopVectorizationPlanner class is moved from LoopVectorize.cpp to
LoopVectorizationPlanner.h LoopVectorizationCostModel::VectorizationFactor
class is moved to LoopVectorizationPlanner.h (used by the planner class) ---
this needs further streamlining work in later patches and thus all I did was
take it out of the CostModel class and moved to the header file. The callback
function had to stay inside LoopVectorize.cpp since it calls an
InnerLoopVectorizer member function declared in it. Next Steps: Make
InnerLoopVectorizer, LoopVectorizationCostModel, and other classes more modular
and more aligned with VPlan direction, in small increments.
Previous step was: r320900 (https://reviews.llvm.org/D41045)
Patch by Hideki Saito, thanks!
Differential Revision: https://reviews.llvm.org/D41420
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321962
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Florian Hahn [Sun, 7 Jan 2018 11:22:25 +0000 (11:22 +0000)]
[CodeExtractor] Use subset of function attributes for extracted function.
In addition to target-dependent attributes, we can also preserve a
white-listed subset of target independent function attributes. The white-list
excludes problematic attributes, most prominently:
* attributes related to memory accesses, as alloca instructions
could be moved in/out of the extracted block
* control-flow dependent attributes, like no_return or thunk, as the
relerelevant instructions might or might not get extracted.
Thanks @efriedma and @aemerson for providing a set of attributes that cannot be
propagated.
Reviewers: efriedma, davidxl, davide, silvas
Reviewed By: efriedma
Differential Revision: https://reviews.llvm.org/D41334
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321961
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Craig Topper [Sun, 7 Jan 2018 07:51:36 +0000 (07:51 +0000)]
[PowerPC] Add an ISD::TRUNCATE to the legalization for ppc_is_decremented_ctr_nonzero
Summary:
I believe legalization is really expecting that ReplaceNodeResults will return something with the same type as the thing that's being legalized. Ultimately, it uses the output to replace the uses in the DAG so the type should match to make that work.
There are two relevant cases here. When crbits are enabled, then i1 is a legal type and getSetCCResultType should return i1. In this case, the truncate will be between i1 and i1 and should be removed (SelectionDAG::getNode does this). Otherwise, getSetCCResultType will be i32 and the legalizer will promote the truncate to be i32 -> i32 which will be similarly removed.
With this fixed we can remove some code from PromoteIntRes_SETCC that seemed to only exist to deal with the intrinsic being replaced with a larger type without changing the other operand. With the truncate being used for connectivity this doesn't happen anymore.
Reviewers: hfinkel
Reviewed By: hfinkel
Subscribers: nemanjai, llvm-commits, kbarton
Differential Revision: https://reviews.llvm.org/D41654
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321959
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Craig Topper [Sun, 7 Jan 2018 06:48:20 +0000 (06:48 +0000)]
[X86] Add the 16 and 8-bit CRC32 instructions to the load folding tables.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321958
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Craig Topper [Sun, 7 Jan 2018 06:24:30 +0000 (06:24 +0000)]
[X86] Correct the load folding flags for xmm fp->mmx conversion instructions.
The instructions that load 64-bits or an xmm register should be TB_NO_REVERSE to avoid the load being widened during unfold. The instructions that load 128-bits need to ensure 128-bit alignment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321956
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Craig Topper [Sun, 7 Jan 2018 06:24:29 +0000 (06:24 +0000)]
[X86] Add TB_NO_REVERSE to some scalar intrinsic instructions in the load folding table.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321955
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