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Daniel Charles [Thu, 3 Jul 2014 21:28:50 +0000 (14:28 -0700)]
check that intel-gen4asm tool is actually present
intel-gen4asm tool has to be present on the host tools so that
it can actually be used. Cross compiling shows problems when the
gpu-tools version is met but the tool is not available on the PATH
So, first check that the tool is available and later check for version
before defining HAVE_GEN4ASM.
Signed-off-by: Daniel Charles <daniel.charles@intel.com>
(cherry picked from commit
038097c00ad7b4f2e0fd572ee20f255dd378b5cb)
Conflicts:
configure.ac
Gwenole Beauchesne [Fri, 20 Mar 2015 15:09:42 +0000 (16:09 +0100)]
vpp: add support for "low-power" mode.
Add support for "low-power" mode expressed with VA_PROC_PIPELINE_FAST
flag set to VAProcPipelineParameterBuffer.pipeline_flags. The purpose
is to discard any complex operation that would consume too many HW
resources.
While doing so, also try to optimize for cases where we only want to
perform format conversion, scaling and basic bob-deinterlacing.
Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>
Olivier Crete [Mon, 9 Mar 2015 22:20:34 +0000 (18:20 -0400)]
gen7_mfd: Optimise start code search
Code inspired from GStreamer
See https://bugs.freedesktop.org/show_bug.cgi?id=89507
Signed-off-by: Olivier Crete <olivier.crete@collabora.com>
Sean V Kelley [Wed, 18 Feb 2015 16:29:55 +0000 (08:29 -0800)]
Add support for HEVC decoding on CHV
We can re-use SKL HEVC decode pipeline
Signed-off-by: Sean V Kelley <seanvk@posteo.de>
Cc: haihao.xiang@intel.com
Cc: focus.luo@intel.com
(cherry picked from commit
78171ec3b8e73071405d9ff6ecbddc05a6787001)
Zhong Li [Fri, 6 Feb 2015 08:56:07 +0000 (16:56 +0800)]
MPEG2 ENC: Remove gen9 pak pipeline code
SKL pak pipeline of mpeg2 encoding is same as gen8,
so remove the redundant code
Signed-off-by: Zhong Li <zhong.li@intel.com>
(cherry picked from commit
ac46de469dd5eeaed34be0510631228a07748ec3)
Zhong Li [Fri, 6 Feb 2015 08:29:50 +0000 (16:29 +0800)]
VP8 DEC: Change error concealment method
Use intra prediciton as error concealment method, instead of inter P
copy.
Signed-off-by: Zhong Li <zhong.li@intel.com>
(cherry picked from commit
8d8b4a577fbaa8d278fbc5fe213023cfeea5d57a)
Qu,Pengfei [Mon, 26 Jan 2015 05:01:23 +0000 (13:01 +0800)]
Disable the context check to avoid JPEG ENC failed
https://bugs.freedesktop.org/show_bug.cgi?id=88728
Signed-off-by: Qu,Pengfei <Pengfei.Qu@intel.com>
(cherry picked from commit
a8ca5f911c7c19b5ede3f96ac6113606b9dd4d95)
Qu,Pengfei [Thu, 8 Jan 2015 08:41:26 +0000 (16:41 +0800)]
Just Style alignment
Signed-off-by: Qu,Pengfei <Pengfei.Qu@intel.com>
(cherry picked from commit
22439f1fcebbd2c1d563503720b1123a4bb97160)
Qu,Pengfei [Thu, 8 Jan 2015 08:40:07 +0000 (16:40 +0800)]
HEVC ENC:Added HEVC support in API function
Signed-off-by: Qu,Pengfei <Pengfei.Qu@intel.com>
(cherry picked from commit
d4f1087a0606c7c8d2d5fd65d9f46990f41ce93a)
Qu,Pengfei [Thu, 8 Jan 2015 08:39:38 +0000 (16:39 +0800)]
HEVC ENC:Added pipeline init
Signed-off-by: Qu,Pengfei <Pengfei.Qu@intel.com>
(cherry picked from commit
2759cabfa57c6e78ab2033cad4e7c2cbf2b9d4e2)
Qu,Pengfei [Thu, 8 Jan 2015 08:39:18 +0000 (16:39 +0800)]
HEVC ENC:Added VME pipeline
Signed-off-by: Qu,Pengfei <Pengfei.Qu@intel.com>
(cherry picked from commit
2a85633e34a4e66b18634e7b53cc91aa44ad2c2b)
Conflicts:
src/gen6_mfc_common.c
Qu,Pengfei [Thu, 8 Jan 2015 08:38:52 +0000 (16:38 +0800)]
HEVC ENC:Added PAK pipeline
Signed-off-by: Qu,Pengfei <Pengfei.Qu@intel.com>
[Fix PAK-BSE data start offset in HCP_SLICE_STATE]
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
(cherry picked from commit
3f47222004c6c2e575b170c7c7c3be00f61df302)
Qu,Pengfei [Thu, 8 Jan 2015 08:38:25 +0000 (16:38 +0800)]
HEVC ENC:Added slice header generated internally
Signed-off-by: Qu,Pengfei <Pengfei.Qu@intel.com>
(cherry picked from commit
2c54b96fe89aa0839f8c34935a84b79c41fde55d)
Conflicts:
src/i965_encoder_utils.h
Qu,Pengfei [Thu, 8 Jan 2015 08:23:43 +0000 (16:23 +0800)]
HEVC ENC:Added PAK context for HEVC
Signed-off-by: Qu,Pengfei <Pengfei.Qu@intel.com>
(cherry picked from commit
41f23f3dcfe24ca9493b36cb00bab5317584b099)
Zhong Li [Thu, 15 Jan 2015 14:04:59 +0000 (22:04 +0800)]
VP8 HWEnc: Add BSW VP8 HWEnc support
Add BSW vp8 encoding support, and let SKL and BDW use the same PAK pipeline.
Signed-off-by: Zhong Li <zhong.li@intel.com>
(cherry picked from commit
c2be56ae6f3628ea246a1dd02e5cac18da84df56)
Zhong Li [Thu, 15 Jan 2015 14:04:58 +0000 (22:04 +0800)]
VP8 HWEnc: declare copyright and license of vp8_probs.h
Signed-off-by: Zhong Li <zhong.li@intel.com>
(cherry picked from commit
a52a5ffe1dc62ff12989e329860ae81ced247f00)
Zhong Li [Thu, 15 Jan 2015 14:04:57 +0000 (22:04 +0800)]
VP8 HWEnc: vp8 encode quality optimization
1. Add mv and mode cost calc
2. Support 16x16 and 4x4 intra prediction
3. Support multi-mode intar prediction
4. Support 16x16 New_MV mode inter prediction
Signed-off-by: Zhong Li <zhong.li@intel.com>
(cherry picked from commit
a25bda914d4041a96252bd24a597558af3237b15)
Zhong Li [Thu, 15 Jan 2015 14:04:56 +0000 (22:04 +0800)]
VP8 HWEnc: Calc vp8 coded size by internal buffer
Signed-off-by: Zhong Li <zhong.li@intel.com>
(cherry picked from commit
379282cbc79b65c994c22009412472bdeddbb4cc)
Zhong Li [Thu, 15 Jan 2015 14:04:55 +0000 (22:04 +0800)]
VP8 HWEnc: Add P frame encoding support
Signed-off-by: Zhong Li <zhong.li@intel.com>
(cherry picked from commit
e4737bb3b29c5ac9fb01f4efccd743d260673e27)
Conflicts:
src/shaders/vme/Makefile.am
Zhong Li [Thu, 15 Jan 2015 14:04:54 +0000 (22:04 +0800)]
VP8 HWEnc: Build VP8 PAK pipeline and enabling I frame
Signed-off-by: Zhong Li <zhong.li@intel.com>
(cherry picked from commit
a18ce4664113d5b1a9b29ed45bf137df6b7a7898)
Conflicts:
src/i965_encoder_utils.c
Zhong Li [Thu, 15 Jan 2015 14:04:53 +0000 (22:04 +0800)]
VP8 HWEnc: Build vp8 gen9 encoding vme pipeline
Signed-off-by: Zhong Li <zhong.li@intel.com>
(cherry picked from commit
d8588862d85414ef412fd5e7ae1fb9ca78b69e84)
Conflicts:
src/i965_device_info.c
Zhong Li [Thu, 15 Jan 2015 14:04:52 +0000 (22:04 +0800)]
VP8 HWEnc: Add vp8 gen9 intra frame encoding shader
Signed-off-by: Zhong Li <zhong.li@intel.com>
(cherry picked from commit
722fe89eae811743d7d46f9d11162aa3a5c3ba53)
Conflicts:
src/shaders/vme/Makefile.am
Xiang, Haihao [Thu, 19 Mar 2015 01:59:11 +0000 (09:59 +0800)]
1.5.2.pre1 for development
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Mon, 16 Mar 2015 02:00:07 +0000 (10:00 +0800)]
Add new SKL PCI ids
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
Sreerenj Balachandran [Thu, 5 Mar 2015 11:03:45 +0000 (13:03 +0200)]
jpeg_enc: Fix the column raster conversion of quatization matrix.
Use temp array for the new raster order calculation, otherwise
it simply generate wrong values.
Note: There is opportunity for more optimization, for eg
we can avoid the usage of mulitple for loops here and there.
Signed-off-by: Sreerenj Balachandran <sreerenj.balachandran@intel.com>
Reviewed-by: Sirisha Muppavarapu <sirisha.muppavarapu@intel.com>
Sreerenj Balachandran [Thu, 5 Mar 2015 11:03:44 +0000 (13:03 +0200)]
jpeg_enc: Fix the quatisation matrix scaling.
The misplaced parentheses are causing wrong value assignment
to the quatization matrix.
This will allow the ecoding when quality > 50.
Otherwise it will simply generate garbage in encoded video
for any quality factor greater than 50
Signed-off-by: Sreerenj Balachandran <sreerenj.balachandran@intel.com>
Reviewed-by: Sirisha Muppavarapu <sirisha.muppavarapu@intel.com>
Sreerenj Balachandran [Thu, 5 Mar 2015 11:03:43 +0000 (13:03 +0200)]
jpeg_enc: Avoid integer overflow while doing quality factor scaling
For eg: The uint8_t will simple overflow if submitted
quality factor is 1 (5000/1).
Signed-off-by: Sreerenj Balachandran <sreerenj.balachandran@intel.com>
Reviewed-by: Sirisha Muppavarapu <sirisha.muppavarapu@intel.com>
Michael Müller [Wed, 4 Mar 2015 23:15:45 +0000 (00:15 +0100)]
Do not print warnings on stdout
The driver should not use stdout as this pipe is used by
a lot of programs to exchange data and should instead print
debug messages to stderr
Signed-off-by: Michael Müller <michael@fds-team.de>
Zhong Li [Wed, 28 Jan 2015 07:40:01 +0000 (15:40 +0800)]
decode/VP8: HW needs 1 extra byte for each partition
Signed-off-by: Zhong Li <zhong.li@intel.com>
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Reviewed-by: Sean V Kelley <seanvk@posteo.de>
Tested-by: Sean V Kelley <seanvk@posteo.de>
Heng-ruey Hsu [Tue, 3 Feb 2015 21:11:30 +0000 (13:11 -0800)]
libva-intel-driver: Implement max width and height in QuerySurfaceAttributes
With this, we can get hardware supported resolution for video encode and
decode. This CL is used to prepare GetSupportedResolution in chrome.
Signed-off-by: Heng-ruey Hsu <henryhsu@chromium.org>
Reviewed-by: Wu-cheng Li <wuchengli@chromium.org>
Reviewed-by: Sean V Kelley <seanvk@posteo.de>
Cc: Pawel Osciak <posciak@chromium.org>
Cc: Stéphane Marchesin <marcheu@chromium.org>
Chris Wilson [Tue, 3 Feb 2015 16:59:54 +0000 (16:59 +0000)]
dri: Update region's width/height on every PutSurface
Currently we expect that if a surface changes size, we will be given a
new buffer with a new name. This is not always true as the ddx may try
to keep the same buffer for the client if it is large enough for the new
size. Since we always know the width/height of the buffer, we can pass
that information along every time into the intel_region struct.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Gwenole Beauchesne <gwenole.beauchesne@intel.com>
Cc: Dmitry Ermilov <dmitry.ermilov@intel.com>
Reviewed-by: Sean V Kelley <seanvk@posteo.de>
Tested-by: Sean V Kelley <seanvk@posteo.de>
Xiang, Haihao [Thu, 29 Jan 2015 15:19:41 +0000 (23:19 +0800)]
The SEND with EOT message must use R112-R127 for message payload on GEN7+
EOT message on GEN9 has used R112-R127, but the same message on GEN7-GEN8 still uses
other registers. To avoid potential issues, use R112-R127 on GEN7-GEN8 too
In additition, GEN7-GEN9 use the same 'write' message, so factor out the same
code to exa_wm_write.g7i in this patch
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
Xiang, Haihao [Thu, 22 Jan 2015 02:59:58 +0000 (10:59 +0800)]
VC1: No overlap smoothing if the overlap flag is 0
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
Xiang, Haihao [Mon, 2 Feb 2015 01:11:21 +0000 (09:11 +0800)]
Disable upper bound check for decoding on BDW+
We saw pixel corruption in stress test with the wrong up-bound address.
For simplicity, disable upper bound check in the driver.
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Tested-by: Zhao Yakui <yakui.zhao@intel.com>
Reviewed-by: Sean V Kelley <sean.v.kelley@intel.com>
Xiang, Haihao [Tue, 27 Jan 2015 03:09:02 +0000 (11:09 +0800)]
Use VMask instead of DMask in 3DSTATE_PS on GEN8+
Mesa uses VMask instead of DMask in 3DSTATE_PS.
"Initialize the execution mask with VMask. Otherwise, derivatives are
incorrect for subspans where some of the pixels are unlit. We believe
the bit just didn't take effect in previous generations."
To avoid potential issue, use VMask in libva too.
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Reviewed-by: Sean V Kelley <sean.v.kelley@intel.com>
Michael Olbrich [Mon, 4 Aug 2014 17:05:18 +0000 (19:05 +0200)]
add missing include
Without this building without HAVE_VA_X11 fails with:
[...]
In file included from i965_drv_video.c:37:0:
i965_output_wayland.h:31:26: error: unknown type name 'VADriverContextP'
i965_output_wayland.h:34:31: error: unknown type name 'VADriverContextP'
i965_drv_video.c:5243:9: error: 'i965_output_wayland_init' undeclared here (not in a function)
i965_drv_video.c:5244:9: error: 'i965_output_wayland_terminate' undeclared here (not in a function)
[....]
Sreerenj Balachandran [Wed, 21 Jan 2015 14:04:57 +0000 (16:04 +0200)]
Fix the GetConfigAttributes() for JPEGBaseline profile
Advertise the PACKED_RAW_DATA header support for JPEGEncoding.
Xiang, Haihao [Wed, 14 Jan 2015 03:59:48 +0000 (11:59 +0800)]
Update license header for some shaders
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Joe Konno [Tue, 13 Jan 2015 22:29:21 +0000 (15:29 -0700)]
BDW+: disable SGVS
BDW introduces separate packets for controlling instancing and system
generated values (eg vertex id and instance id). We don't use
instancing, but still need to disable sgvs to avoid undefined behaviour
when some other driver (mesa) uses it.
Signed-off-by: Joe Konno <joe.konno@intel.com>
Signed-off-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Daniel Charles <daniel.charles@intel.com>
(cherry picked from commit
4caa37b895d39af754e2b2307879752130731f56)
Zhao Yakui [Mon, 12 Jan 2015 12:33:37 +0000 (20:33 +0800)]
i965 render: Explicitly disable instancing for vertex elements on Skylake
We really should guarantee that vertex elements non-instanced,
especially since we don't use our own hardware context - other
programs can change this on us.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Sean V Kelley <seanvk@posteo.de>
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
(cherry picked from commit
96278cab8cbc029d72ef2aa3b4728a722eceba1f)
Kenneth Graunke [Fri, 9 Jan 2015 21:39:36 +0000 (14:39 -0700)]
i965 render: Explicitly disable instancing for vertex elements on Gen8
We really should guarantee that vertex elements non-instanced,
especially since we don't use our own hardware context - other
programs can change this on us.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Sean V Kelley <seanvk@posteo.de>
(cherry picked from commit
e079591f2ed4dbfaad309c95aa1a1ddb00eb80e8)
Xiang, Haihao [Fri, 9 Jan 2015 04:05:31 +0000 (12:05 +0800)]
Fix segmentation fault caused by
4711da5
The corresponding pointer is NULL if VAProcFilterSkinToneEnhancement
isn't enabled in the pipeline
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
(cherry picked from commit
8596cb68e85a5708e05b9b49510ca52dd3d0a468)
Sirisha Muppavarapu [Mon, 15 Dec 2014 19:25:19 +0000 (11:25 -0800)]
STDE Optimization: Added code to support optimization of Skin Tone Detection and Enhancement for stde factors 0(default), 3, 6, and 9.
(cherry picked from commit
4711da55046cb9bd3fa26065869d8c3bcfc9f39a)
Zhao Yakui [Wed, 7 Jan 2015 04:45:34 +0000 (12:45 +0800)]
Fix the broken attribute setting of i965_GetConfigAttrib
Now the some attributes are incorrectly reported. It is not supported while
VA_ATTRIB_NOT_SUPPORTED flag is not returned.
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Reviewed-by: Xiang Haihao <haihao.xiang@intel.com>
(cherry picked from commit
dd23d450f5b2b70c36a0053a0892c0ff1e32e8cf)
Antti Seppälä [Mon, 5 Jan 2015 18:31:35 +0000 (20:31 +0200)]
Fix scaling of NV12 surfaces when no output_region is set
The code block filling destination surface target rectangle is too early
and incorrectly fills input surface width & height as final target width
and height. This results in improper scaling of the source surface.
Move the destination code block further below the point when actual
target surface is referenced and its width and height are known and use
them to fill the destination rectangle.
Signed-off-by: Antti Seppälä <a.seppala@gmail.com>
Antti Seppälä [Mon, 5 Jan 2015 07:50:30 +0000 (09:50 +0200)]
Fix forward reference requirement for Bob deinterlacing in intel-driver
Remove stray semicolon to fix condition check for forward reference surface
count in vaQueryVideoProcPipelineCaps.
This fix allows the pipeline query to return 0 forward references for Bob
deinterlacer.
Signed-off-by: Antti Seppälä <a.seppala@gmail.com>
Xiang, Haihao [Mon, 29 Dec 2014 06:55:49 +0000 (14:55 +0800)]
1.5.1.pre1 for development
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
(cherry picked from commit
939ef3f0031ec404a32e926471e2961bb2079fde)
Xiang, Haihao [Mon, 29 Dec 2014 04:17:14 +0000 (12:17 +0800)]
Intel driver 1.5.0
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
(cherry picked from commit
83b833a19ef72b07e8a103d8e8c59fcb779f2ff6)
Xiang, Haihao [Mon, 15 Dec 2014 06:07:37 +0000 (14:07 +0800)]
Update NEWS
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
(cherry picked from commit
8583cfa22c086f01e00bbdb3ce8883f93dcf2e37)
Xiang, Haihao [Mon, 15 Dec 2014 05:35:08 +0000 (13:35 +0800)]
Update the dependency on VAAPI and intel-gen4asm
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
(cherry picked from commit
3098efb04abf2dca24559bc2bb2d7ab1697484a2)
Xiang, Haihao [Fri, 14 Nov 2014 08:18:09 +0000 (16:18 +0800)]
configure: bump to 1.5.0.pre1
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
(cherry picked from commit
78d8bccf19ec47fb517e7d6140a5faad360a20a7)
Conflicts:
configure.ac
Zhenyu Wang [Fri, 26 Dec 2014 07:04:11 +0000 (00:04 -0700)]
Use libdrm to get device id
Instead of call ioctl by ourself, use libdrm interface to get device id.
This not only saves one ioctl call as is done when gem bufmgr init. It
also allows to use libdrm's device id override helper envionment "INTEL_DEVID_OVERRIDE".
If you override device id combined with aub dump enable, you can get aub
file to debug it under emulator for any device that you might not have real
HW metal.
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
(cherry picked from commit
1879d37119ef65aaf0fbb63c7f5a60390ae64f27)
Zhenyu Wang [Fri, 26 Dec 2014 07:04:10 +0000 (00:04 -0700)]
Add new debug option for aub dump
New VA debug option to dump aub file.
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
(cherry picked from commit
9509ac69a5fdb6f60b471ebc32e767cecaa72268)
Xiang, Haihao [Mon, 15 Dec 2014 04:10:12 +0000 (12:10 +0800)]
Use intel_batchbuffer_free() to free a batch buffer
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Reviewed-by: Zhao, Yakui <yakui.zhao@intel.com>
Xiang, Haihao [Mon, 15 Dec 2014 04:01:16 +0000 (12:01 +0800)]
Fix misused dri_bo_reference()
The object returned from dri_bo_alloc() has been referenced.
This commit fixes https://bugs.freedesktop.org/show_bug.cgi?id=86913
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Reviewed-by: Zhao, Yakui <yakui.zhao@intel.com>
Xiang, Haihao [Sun, 14 Dec 2014 16:53:01 +0000 (00:53 +0800)]
Fix the broken out of tree builds
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Reviewed-by: Zhao, Yakui <yakui.zhao@intel.com>
Xiang, Haihao [Sun, 14 Dec 2014 16:29:45 +0000 (00:29 +0800)]
Fix the build of H.264 encoding shaders for SKL
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Reviewed-by: Zhao, Yakui <yakui.zhao@intel.com>
Xiang, Haihao [Sun, 14 Dec 2014 15:47:59 +0000 (23:47 +0800)]
Fix 'make dist'
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Reviewed-by: Zhao, Yakui <yakui.zhao@intel.com>
Xiang, Haihao [Fri, 10 Oct 2014 07:19:24 +0000 (15:19 +0800)]
Sync NEWS with v1.4-branch
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Fri, 12 Dec 2014 03:05:15 +0000 (11:05 +0800)]
Add support for quality level for H.264 encoding on SKL
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
(cherry picked from commit
422be2d36a6ef35bd886947717e969e3cf1d4101)
Xiang, Haihao [Fri, 12 Dec 2014 01:40:52 +0000 (09:40 +0800)]
SKL and BDW use the same PAK pipeline for H.264/MPEG-2 encoding
Still use different functions if using GPU to construct the batchbuffer
for PAK
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
(cherry picked from commit
9034de9ca1493cd7198b7c3d4717891f08597b88)
Xiang, Haihao [Thu, 11 Dec 2014 14:28:29 +0000 (22:28 +0800)]
Add support for VEBOX on SKL (v2)
Use separate functions to setup VEBOX states
v2: SURFACE_STATE for VEBOX is also changed
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
(cherry picked from commit
6b6e071fa3cdece347250a9a69f0ece9b279f89a)
Sirisha Muppavarapu [Tue, 9 Dec 2014 21:07:19 +0000 (13:07 -0800)]
JPEG Encode: Added support for UYVY/YUY2/Y8 Input formats
Signed-off-by: Sirisha Muppavarapu <sirisha.muppavarapu@intel.com>
(cherry picked from commit
2eb9a2037a05d742ee63638f3400b772f9a311e1)
Zhao Yakui [Mon, 17 Nov 2014 04:44:22 +0000 (12:44 +0800)]
Add the override flag to assure that HEVC video command always uses BSD ring0 for SKL GT3 machine
The SKL GT3 machine has two BSD video rings,which can dispatch the video
command.But the HEVC command is an exception, which can't be handled by
the second BSD video ring. So we need to assure that the HEVC command always
uses the first BSD video ring.
Reviewed-by: Xiang Haihao <haihao.xiang@intel.com>
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
(cherry picked from commit
b2a558b335e27d53436df3cc8562163c1baa8f76)
Zhao, Yakui [Mon, 17 Nov 2014 04:44:19 +0000 (12:44 +0800)]
Allow the batchbuffer to be submitted with override flag
Some machines have two BSD video rings. Sometimes the user-space application
want to specify which BSD ring is to dispatch the video command. In such case
the override flag is needed so that the kernel can handle it.
Reviewed-by: Xiang Haihao <haihao.xiang@intel.com>
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
(cherry picked from commit
a213c724a013412357c355bfb10e472ea4d89d73)
Zhao Yakui [Mon, 17 Nov 2014 04:44:17 +0000 (12:44 +0800)]
Allow the extensional ring flag to be passed when submitting the batchbuffer
This is to add the preparation that the overrride flag can be added to specify
which BSD ring is used to dispatch the video command when there exist two
BSD video rings.
Reviewed-by: Xiang Haihao <haihao.xiang@intel.com>
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
(cherry picked from commit
9e5eee3e96b8f80cdbd840426b573dc64b1c9f9a)
Xiang, Haihao [Mon, 28 Jul 2014 01:51:22 +0000 (09:51 +0800)]
HEVC: Submit HCP_WEIGHTOFFSET_STATE if required
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
(cherry picked from commit
a8b5f9f8f2a7409b46a88bb28ce69045e7703ce1)
Xiang, Haihao [Thu, 24 Jul 2014 00:47:43 +0000 (08:47 +0800)]
HEVC: Submit HCP_TILE_STATE if required
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
(cherry picked from commit
725d5640001c8de6e81a63616a48108db6f3dd8f)
Xiang, Haihao [Fri, 27 Jun 2014 08:08:16 +0000 (16:08 +0800)]
Advertise the support for HEVC on SKL
v2: Only support HEVC Main Profile
v3: Check profile against VAProfileHEVCMain in i965_BeginPicture()
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
(cherry picked from commit
f623373aab09ff1477532dd25bd0ffe5bdd5e7e2)
Xiang, Haihao [Mon, 7 Jul 2014 04:52:51 +0000 (12:52 +0800)]
HEVC: Make sure the buffer store is allocated for the current render target
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
(cherry picked from commit
376a33043b7c305e773d0f081e19136c14aab65b)
Xiang, Haihao [Fri, 27 Jun 2014 07:44:31 +0000 (15:44 +0800)]
HEVC: Verify HEVC parameters before deocoding.
Allocate the underlying surface buffer store for each
reference frame if necessary
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
(cherry picked from commit
f6fe9e1f54d0505d48ef5649c84470dbeabede1c)
Xiang, Haihao [Fri, 27 Jun 2014 07:21:41 +0000 (15:21 +0800)]
HEVC: update frame store index
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
(cherry picked from commit
6f3f9d024a5b000ae86b2b85d35b6e3679903f5d)
Xiang, Haihao [Fri, 20 Jun 2014 13:55:16 +0000 (21:55 +0800)]
HEVC: gen9_hcpd_bsd_object()
Issue HCP_BSD_OBJECT to start decoding
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
(cherry picked from commit
bb11760356acf67a620bec96ae4b1b9327eec53b)
Xiang, Haihao [Fri, 20 Jun 2014 13:52:30 +0000 (21:52 +0800)]
HEVC: gen9_hcpd_slice_state()
Set slice parameters in HCP_SLICE_STATE
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
(cherry picked from commit
7351a70a39b46f8e2eb7cb0079f51606c2d28aeb)
Xiang, Haihao [Fri, 20 Jun 2014 13:47:06 +0000 (21:47 +0800)]
HEVC: gen9_hcpd_weightoffset_state()
Set weight/offset in HCP_WEIGHTOFFSET_STATE
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
(cherry picked from commit
25db1b6e98abfbbbb4b78d02495dd36fd0afacc4)
Xiang, Haihao [Fri, 20 Jun 2014 13:42:36 +0000 (21:42 +0800)]
HEVC: gen9_hcpd_ref_idx_state()
Set reference idx entries in HCP_REF_IDX_STATE
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
(cherry picked from commit
1ac96d7e3691ac02ce109cd72eda1353f8e43dc2)
Xiang, Haihao [Fri, 20 Jun 2014 12:56:01 +0000 (20:56 +0800)]
HEVC: gen9_hcpd_tile_state()
Set tile parameters in HCP_TILE_STATE
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
(cherry picked from commit
cf97c82d84762ea9fe6ec0cdc4c3bc78f0827141)
Xiang, Haihao [Fri, 20 Jun 2014 12:52:37 +0000 (20:52 +0800)]
HEVC: gen9_hcpd_pic_state()
Set picture parameters in HCP_PIC_STATE
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
(cherry picked from commit
7bb3c21ff8b2e0ad27b8170732a80e8ce7c29ed6)
Xiang, Haihao [Fri, 20 Jun 2014 12:44:21 +0000 (20:44 +0800)]
HEVC: gen9_hcpd_hevc_qm_state()
Set the quantization tables in HCP_QM_STATE. The default flat
tables will be used if application doesn't pass the valid tables
to driver or scaling_list_enable_flag is set to 0
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
(cherry picked from commit
481c5bd2b1560c2b1a9193e29b7d1f44f7913011)
Xiang, Haihao [Fri, 20 Jun 2014 12:41:46 +0000 (20:41 +0800)]
HEVC: Set the default flat IQ matrix
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
(cherry picked from commit
d76ba3c5d46878be134dcdf1c17bb1a4e7f276f2)
Xiang, Haihao [Fri, 20 Jun 2014 12:11:15 +0000 (20:11 +0800)]
HEVC: gen9_hcpd_ind_obj_base_addr_state()
Set the base address for the input bitsteam data buffer in
HCP_IND_OBJ_BASE_ADDR_STATE.
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
(cherry picked from commit
b8cab43f24168958416aa483fda1678e895caf20)
Xiang, Haihao [Fri, 20 Jun 2014 11:53:30 +0000 (19:53 +0800)]
HEVC: gen9_hcpd_pipe_buf_addr_state()
Set memory base address for all internal buffers and output buffer
in HCP_PIPE_BUF_ADDR_STATE
v2: Fix the command length and payload
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
(cherry picked from commit
44a175a30e4e4d21781d90bad1138eeff3797ce0)
Xiang, Haihao [Fri, 20 Jun 2014 11:29:35 +0000 (19:29 +0800)]
HEVC: gen9_hcpd_surface_state()
Set the frame buffer pitch and the offset to the chroma component in
HCP_SURFACE_STATE. Only surface id 0 is used for HEVC decoding
v2: Fix the command payload
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
(cherry picked from commit
657d5999179e70b290db08ea4ca4399d26f52c2c)
Xiang, Haihao [Fri, 20 Jun 2014 11:24:57 +0000 (19:24 +0800)]
HEVC: gen9_hcpd_pipe_mode_select();
Set HCP_PIPE_MODE_SELECT for HEVC decoding
v2: Fix the command payload
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
(cherry picked from commit
7616e76fe14238d752b88768dffb132eba195908)
Xiang, Haihao [Thu, 19 Jun 2014 15:23:30 +0000 (23:23 +0800)]
HEVC: Add the frame store array
The function to update the frame store index will be added later
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
(cherry picked from commit
e758dcb38b37773df7253bc2ea7910adaf31258d)
Xiang, Haihao [Thu, 19 Jun 2014 15:07:40 +0000 (23:07 +0800)]
HEVC: All internal buffers used for HCP pipe on SKL
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
(cherry picked from commit
fb48bc409a187ad1bc8a4ef626d95c4ecfaff828)
Xiang, Haihao [Thu, 19 Jun 2014 08:49:54 +0000 (16:49 +0800)]
HEVC: append a motion vector temporal buffer to a VA surface
It is the current motion vector temporal buffer to the decoded
current surface, and the collocated motion verctor temporal buffer
for reference surface
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
(cherry picked from commit
1b1019020ebe3064bd0320bcc1391cc73c9b596c)
Xiang, Haihao [Thu, 19 Jun 2014 08:35:00 +0000 (16:35 +0800)]
HEVC: some variables used later
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
(cherry picked from commit
4c8834b73dbf3b996b30ad05b140e07e52dd7ab9)
Xiang, Haihao [Thu, 12 Jun 2014 07:14:11 +0000 (15:14 +0800)]
Add the initial code for HEVC decoding on SKL into the driver
The hcp (HEVC codec pipeline) for decoding will be built later
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
(cherry picked from commit
f5de561ddbf6f70efbbd9a2663327cce4ba5f0fb)
Xiang, Haihao [Thu, 12 Jun 2014 08:04:03 +0000 (16:04 +0800)]
HEVC Codec Pipeline (HCP) commands on SKL
v2: replace HCP_BSD_OBJECT_STATE with HCP_BSD_OBJECT (Yakui)
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Reviewed-by: Zhao, Yakui <yakui.zhao@intel.com>
(cherry picked from commit
cfd6e631cc1941cc442030281d1ab525c7b40f62)
Xiang, Haihao [Tue, 18 Nov 2014 06:52:28 +0000 (14:52 +0800)]
Add support for JPEG encoding on SKL
We can re-use CHV JPEG encoding pipeline
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
(cherry picked from commit
85fe60453c674d1927c9e05df2d896c53cb0e401)
Xiang, Haihao [Mon, 28 Apr 2014 08:26:37 +0000 (16:26 +0800)]
Fix SKL media pipeline for VPP
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
(cherry picked from commit
2433a174971266c092b8db59943557e000dcbb4e)
Conflicts:
src/gen8_post_processing.c
Zhong Li [Wed, 18 Jun 2014 05:02:22 +0000 (13:02 +0800)]
Use BDW rebuilt shaders for skl encoding
BDW rebuilt shaders can be used for SKL encoding as verification on
simulator. Further checking of DOCs is needed.
V2:follow haihao's suggestion to update comments and some declaration.
Signed-off-by: Zhong Li <zhong.li@intel.com>
Reviewed-by: Xiang, Haihao <haihao.xiang@intel.com>
(cherry picked from commit
3815273df04cce853d849cd55a32e100057c2a48)
Conflicts:
src/shaders/vme/Makefile.am
Xiang, Haihao [Tue, 29 Apr 2014 07:39:19 +0000 (15:39 +0800)]
Add Makefile.am to build the shader code for VPP on SKL
We can reuse all of BDW assembly shader code. CSC between
I420/YV12/NV12 are verfied on Simulator, other shaders will be
verfied on HW.
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
(cherry picked from commit
65c30b5eec1951694fc051a1a9574c0613c09e9a)
Xiang, Haihao [Mon, 28 Apr 2014 07:57:16 +0000 (15:57 +0800)]
Add the initial support for VPP on SKL
There are only a few changes on media pipeline between BDW
and SKL, so we can reuse most BDW VPP code. I will follow the DOCs
to fix media pipeline states for SKL and add shaders for each
processing
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
(cherry picked from commit
31f09369d4f934e19909616b2a2e94bc54ef3e64)
Conflicts:
src/gen8_post_processing.c
Xiang, Haihao [Fri, 11 Apr 2014 08:41:54 +0000 (16:41 +0800)]
SKL: The minimum URB start address for VS is 4
Otherwise it may result in GPU hang
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Acked-by: Zhao Yakui <yakui.zhao@intel.com>
(cherry picked from commit
e4efb9ea03a975a3b47b321be3c069f6ecd409e2)
Xiang, Haihao [Fri, 11 Apr 2014 08:22:23 +0000 (16:22 +0800)]
SKL: Set the 3DSTATE_VF/3DSTATE_VF_INSTANCING
To ensure the "Component Packing Enable" bit is set to 0
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Acked-by: Zhao Yakui <yakui.zhao@intel.com>
(cherry picked from commit
d43fbfedfaf3d645c744b84de5d35be7bb3b7294)
Zhao Yakui [Fri, 21 Mar 2014 05:37:13 +0000 (13:37 +0800)]
Rendering/SKL: Add the rendering shaders
Rendering is used to display the decoded image. It will do the color-space
conversion from NV12 to RGB, which is implemented by using 3D pipeline.
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
(cherry picked from commit
0a5df060ed3a1090172d55ee1e4066670f79e8b9)
SKL: update the native SEND instruction
The extdesc field in SEND instruction is changed on SKL.
The Gfx assembler has been updated for this change, however
the used shader in the driver still use the wrong format.
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Acked-by: Zhao Yakui <yakui.zhao@intel.com>
(cherry picked from commit
931d32091caada8f569fc5a87db2b31af40e0131)
SKL: The SEND with EOT message must use register 112-127 as source register
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Acked-by: Zhao Yakui <yakui.zhao@intel.com>
(cherry picked from commit
a60ae225bc927f895d6778c1206fa5b9250d6c11)
Zhao Yakui [Fri, 21 Mar 2014 05:26:19 +0000 (13:26 +0800)]
Rendering/SKL: Update the 3DSTATE_SBE command for 3D pipeline
This is based on the hardware spec.
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
(cherry picked from commit
31b7d4edeb23f467787d816cf2c5ea6b7aa9ecfb)
Zhao Yakui [Fri, 21 Mar 2014 05:26:16 +0000 (13:26 +0800)]
SKL: Add the Render_SURFACE_STATE for SKL
This is based on the hardware spec.
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
(cherry picked from commit
1a5d7fa7c3a7a3c9a14ccf2adb1b7687adde6f96)