VPP: avoid depending on va_backend.h for some file

Signed-off-by: Xiang, Haihai <haihao.xiang@intel.com>

VPP: Fix parameters for SCALING & AVS

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>

VPP: Fixed surface height for DN/DI

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>

VPP: Update DNDI kernel and DNDI states on Sandybridge

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>

VPP: Update surface state, sampler state and kernel for AVS on Sandybridge

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>

VPP: update AVS kernel

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>

VPP: Support video process on Ivybridge

Only AVS enabled currently on Ivybridge.

Signed-off-by: Li,Xiaowei A <xiaowei.a.li@intel.com>

VPP: Update the gen7 shader Makefile.am

Signed-off-by: Li,Xiaowei A <xiaowei.a.li@intel.com>

VPP: Add support for field and frame mixed content

Signed-off-by: Li,Xiaowei A <xiaowei.a.li@intel.com>

VPP: Support DN only on Ironlake and Sandybridge

signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>

VPP: Emit base address command before other commands

This fixes potential GPU hang issue on SandyBridge

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>

VPP: set surface base address for post processing

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>

VPP: Add image format conversion function

Signed-off-by: Li,Xiaowei A <xiaowei.a.li@intel.com>

VPP: code refine for video process

Signed-off-by: Li,Xiaowei A <xiaowei.a.li@intel.com>

VPP: Add shaders for video process on Ivybridge.

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>

VPP: Add NV12<->PL3 load and save shaders to gen5_6/

Signed-off-by: Li,Xiaowei A <xiaowei.a.li@intel.com>

VPP: move all vpp shaders to new gen5_6/ directory.

Signed-off-by: Li,Xiaowei A <xiaowei.a.li@intel.com>

VPP: Modify the definition for PP module number

Signed-off-by: Li,Xiaowei A <xiaowei.a.li@intel.com>

Update the check for intel-gen4asm to support Haswell

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>

Remove the dependence of va_vpp.h

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>

Make it built against the current upstream libdrm

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>

VEBox: setup haswell vebox pipeline for video post process

Currently, deinterlacing, denoise, color balance, color space conversion
are supported by vebox pipeline, and only deinterlace is exposed to video
post process on haswell.

Signed-off-by: Li,Xiaowei A <xiaowei.a.li@intel.com>

VEBox: add special batch command and macro for VEBox command streamer

VEBox is a new feature introducted in haswell, which aims
to do video process through fixed functions, it also owns
one seperated command streamer.

Signed-off-by: Li,Xiaowei A <xiaowei.a.li@intel.com>

VPP: enabling scaling function for post processing

Signed-off-by: Li,Xiaowei A <xiaowei.a.li@intel.com>

Fix thread issue with AVC private surafce

https://bugs.freedesktop.org/show_bug.cgi?id=55282

Signed-off-by: Gautam <manamgautam@gmail.com>
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>

Unify the code for xxx_free_avc_surface

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>

Haswell: Disable Picture ID Remapping for AVC decoding

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>

Handle the MFX change between A stepping and B-stepping for haswell

The A0-stepping is still covered.

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>

Add the support of encoding P frame on haswell

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>

Add the Intra VME for I-frame on Haswell

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>

Add the seperated file for media decoding on Haswell

As the MFX involves quite a lot of changes between Ivy and Haswell,
the seperated file is added for the media decoding on haswell. This
can avoid the complex backward logic for Ivy.

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>

Add the separated file for media encoding on haswell

There exist a lot of changes about the media encoder between Haswell
and IvyBridge. For example: the VME programming and the corresponding
general media command. To be simple, the separated files are added for Haswell.
Otherwise it has to consider the complex backward compatibility.

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>

haswell: fix render kernels.

Regenerate render kernels for Haswell because JMPI instruction semantics
changed there. In particular, the offset is now expressed in bytes instead
of 64-bit units.

Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>

haswell: set "Shader Channel Select" fields in surface state.

For normal behaviour, each Shader Channel Select should be set to the
value indicating that same channel. i.e. Shader Channel Select Red is
set to SCS_RED, Shader Channel Select Green is set to SCS_GREEN, etc.

Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>

haswell: fix 3DSTATE_PS to fill in number of samples.

The sample mask value must match what is set for 3DSTATE_SAMPLE_MASK,
through gen7_emit_invarient_states().

Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>

haswell: fix max PS threads shift value.

The maximum number of threads is now a 9-bit value. Thus, one more bit
towards LSB was re-used. i.e. bit position is now 23 instead of 24 on
Ivy Bridge.

Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>

intel: fix max number of threads used on Ivy Bridge.

Fix the max number of threads to be used on Ivy Bridge. In particular,
the GEN7_PS_MAX_THREADS_SHIFT offset was wrong, thus causing the GPU
to use half of what was specified.

Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>

haswell: use at least 64 URB entries for GT2+.

Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>

Add haswell PCI IDs

Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>

Fix inconsistent surface dimension during allocating surface buffer object

When one surface is created, the height/width is aligned to 16 pixels.
But when trying to allocate the buffer object for it, the width is aligned
to 128 and height is aligned to 32. If the surface is mapped and accessed
before allocating the buffer object, the APP will get the incorrect dimension.

From: Zhao Yakui <yakui.zhao@intel.com>

Fix build with VA-API 0.32.0.

Really fix build back to VA-API 0.32.0, and not only VA-API 0.32.1,
thus checking for VA/JPEG decode API. VA-API 0.32.0 was provided by
libva 1.0.15 and earlier version, which is still available in
Ubuntu 12.04-LTS.

Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>

Add sysdeps.h for system-dependent definitions.

Add new "sysdeps.h" file for system-dependent definitions and common
include files. This will be helpful for Android support so that to
stack every definition useful to Android that could not be auto-generated
since configure script is not built there.

Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>

Fix build with VA-API 0.32.0.

Add new <va/va_backend_compat.h> glue file with various utility functions
and definitions to help building the driver against a previous version of
libva (1.0.x for VA-API 0.32.x in particular).

Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>

render: fix rotation vertices for Ironlake.

Ironlake requires the vertex buffer to be ordered in a particular way.
More specifically, the correct order is bottom-right, bottom-left and
top-left vertices in "output" view, i.e. transformed.

Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>

Fix make dist.

The recent changes for Wayland support broke make dist. This is due
to the fact that DIST_SUBDIRS requires all subdirectories needed to
complete make dist. i.e. the generated list of subdirectories used
for make dist is *not* an union of DIST_SUBDIRS and SUBDIRS.

Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>

fix ttmbf/ttfrm when vstransform is 0

Fix inconsistent surface dimension during allocating surface buffer object

This is to fix the regression caused by e25b3fbce3fc3c13ca054ba9a512bec954642fa8.
When one surface is created,the height/width is aligned to 16 pixels. But when
trying to allocate buffer object for it on SNB/IVB and the later chips,the width
is aligned to 128 and height is aligned to 32. If the surface is mapped and accessed
before allocating surface buffer object, the APP will get incorrect dimension.

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>

Change ILLEGAL instructions to NOP instructions in avc_mc.g4b.gen5

wayland: drop explicit dependencies to Wayland libraries.

Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>

wayland: ship with wayland-drm protocol.

Signed-off-by: Zhao Halley <halley.zhao@intel.com>
Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>

Add Wayland support.

Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>

Drop explicit dependency on libva-x11.

Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>

Allow build without VA/X11 API.

Signed-off-by: Dmitry Ermilov <dmitry.ermilov@intel.com>
Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>

Add raw DRM support.

Signed-off-by: Dmitry Ermilov <dmitry.ermilov@intel.com>
Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>

Add shared library utils.

Add a few helpers to open shared libraries and load specific symbols
from there.

Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>

dri: cope with drm_state changes.

Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>

render: add support for display rotation attribute.

Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>

render: prepare for display attributes.

Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>

README: fix libva required version.

Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>

configure: simplify check for VA-API version.

Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>

build: use libva-intel-driver as the package name.

Most OSVs adopted XXX-intel-driver as their shipping packages for the
Intel VA driver, with XXX = { vaapi, libva }. Adopt libva-intel-driver
from now on for upstream packages too.

Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>

intel-driver: Call intel_driver_terminate after i965_destroy_heap

Otherwise this leads to use-after-free of the bufmgr.

Signed-off-by: Stéphane Marchesin <marcheu@chromium.org>

Bump a new version for development

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>

intel-driver 1.0.18

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>

The version of VA-API is at least 0.32.1

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>

Adopt the new interfaces for JPEG decoding

Currently the HW only supprts JPEG baseline decoding

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
(cherry picked from commit d4be016d054ba79f5b4882088ded96528a60c985)

Conflicts:

src/gen7_mfd.c

Revert "Fix build with older VA-API (libva)."

This reverts commit bcca7d23de29423b0d7d9954bfb21cc9bf3834f5.

NEWS: updates.

Sync changes from 1.0.x series.

Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>

configure: bump version for development.

Preparatory work for some changes to be promoted from staging to master.

Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>

configure: require automake >= 1.9 for tar-ustar option.

By default, newer automake versions make tar use the ancient tar V7 format
that limits filenames to 99 characters. This is troublesome for certain shader
sources files. Now require automake 1.9 and use the tar-ustar option so that
a newer format, defined in POSIX 1003.1-1988, is used. The limitation is now
256 characters.

PAX interchange format (POSIX 1003.1-2001) was considered but probably still
to young? Just stick to the intermediate format for now as this is enough for
our purposes.

Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>

h264: fix 4K decoding (IVB).

Fix decoding of 4K videos on Ivy Bridge. Note that either dimension
shall not exceed 4096 pixels.

Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>

Implementation for i965_SyncSurface and i965_QuerySurfaceStatus

new version for development

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>

1.0.18

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>

Fix the error code for unsupported resolution

Thank Gwenole for pointing it out

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>

MPEG-2: Fix MFX_QM_STATE command on Ivybridge

If load_intra_quantiser_matrix/load_non_intra_quantiser_matrix is set to 0, then
there is no change to quantisation matrix. In this case, submit MFX_QM_STATE
with previous setting

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>

Enlarge some internal buffer for H.264 decoding on Ivybridge

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>

Add support for new Ivybridge chipset

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>

Include the missing config.h

It won't build JPEG without config.h

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>

mpeg2: propagate reference surfaces to other slots.

Fill in remaining reference surfaces as recommanded in HW specs.

Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>

Check the max resolution supported by hardware when create VA context

It will avoid GPU hang when try to play unsupported large resolution
videos.

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>

Allocate internal buffers with right size for SNB & IVB

The size is scalable with frame width or height

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>

Avoid moving objects in a heap to a new address when expanding this heap

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>

mpeg2: fix construction of reference frames list (SNB, IVB).

Fix construction of reference frames list for interlaced streams.
In this case, the array is indexed by frame store ID >> 1 where
bit 0 of frame store ID represents top (0) or bottom (1) field.

Besides, current render target can also be used as a reference
while decoding the second field.

Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>

mpeg2: fix reference surfaces construction (IVB).

Avoid an assert() since we were assigning a reference surface even
if it did not have any backing store.

Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>

mpeg2: fix TFF calculation (SNB).

Gen6 has specific requirements for the TFF flag, and thus has different
semantics than Gen7 (IVB). In particular, HW uses picture_structure and
TFF flag to determine the correct field to render.

Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>

mpeg2: fix incorrect slice_vertical_position from codec layers.

Correctly emit slice_vertical_position, as per the definition from
the bitstream, to the HW decoder (MFD_MPEG2_BSD_OBJECT).

Add workaround for players that have not fixed their usage of
slice_vertical_position. That field shall represent the slice vertical
position as it comes from the bitstream.

Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>

Add WARN_ONCE() helper macro.

Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>

render: fix rendering of interlaced surfaces.

Handle bob-deinterlacing flags passed to vaPutSurface().
i.e. VA_TOP_FIELD|VA_BOTTOM_FIELD.

Avoid advanced deinterlacing kernels as they allocate extra temporary
surfaces, which are useless for such simple tasks. i.e. display either
field of an interlaced surface.

Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>

h264: fix max header size calculation with EPB.

... aka fix wrong patch applied. For the records, considering header
size without EPB is N, then the max header size with EPB is N * 3/2.
However, it's not possible to reach this value since that would mean
that slice_header() only contained zeroes.

Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>

h264: fix scan for bit offset to macroblock.

Handle two indices in parallel, one relative to the bitstream with
EPB, and the other without EPB.

Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>

h264: fix weight denom for implicit weight tables (SNB).

If weighted_bipred_idc == 2, luma and chroma weight denom (in log2 base)
shall be set to the default value on Sandy Bridge. i.e. 5 as per defined
at 8-279 in AVC specs.

https://bugs.freedesktop.org/show_bug.cgi?id=40820

Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>

h264: fix weighted prediction indicator (SNB).

Implicit weight tables derivation (weighted_bipred_idc == 2) could
not be set. Only default weight tables were possible instead of
explicit weight tables provided by the codec layer.

https://bugs.freedesktop.org/show_bug.cgi?id=40820

Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>

h264: fix first macroblock bit offset calculation (ILK, SNB, IVB).

Fix and simplify the scan for emulation_prevention_bytes, thus avoiding
a read beyond the end of the slice data buffer. Besides, if slice_header()
bytes are needed, use dri_bo_get_subdata() instead.

HW specific changes:
- SNB: make the HW skip the emulation prevention bytes itself.
- IVB: fix MFD_AVC_BSD_OBJECT to report the actual slice data buffer size.

Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>

vc1: fix bitplane buffer size (SNB, IVB).

This fixes buffer overflow in the newly allocated Gen buffer that holds
VC-1 bitplanes.

Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>

h264: always submit MFX_QM_STATE for flat scaling lists (IVB).

If codec layer does not provide a VAIQMatrixBufferH264, this means
flat scaling lists shall be used. The MFX_QM_STATE command still has
to be submitted since IVB+ does not have a means to use HW generated
scaling lists.

Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>

jpeg: fix memory leak of huffman tables.

Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>

Fix build with older VA-API (libva).

Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>

Fix compile error after cherry-pick

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>

A workaround for JPEG decoding on Ivybridge

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>