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3 years agoaccel/tcg: Add mips support to alloc_code_gen_buffer_splitwx_memfd
Richard Henderson [Wed, 4 Nov 2020 23:31:43 +0000 (15:31 -0800)]
accel/tcg: Add mips support to alloc_code_gen_buffer_splitwx_memfd

Re-use the 256MiB region handling from alloc_code_gen_buffer_anon,
and replace that with the shared file mapping.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
3 years agotcg/riscv: Support split-wx code generation
Richard Henderson [Wed, 4 Nov 2020 21:11:26 +0000 (13:11 -0800)]
tcg/riscv: Support split-wx code generation

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
3 years agotcg/riscv: Remove branch-over-branch fallback
Richard Henderson [Wed, 4 Nov 2020 20:43:20 +0000 (12:43 -0800)]
tcg/riscv: Remove branch-over-branch fallback

Since 7ecd02a06f8, we are prepared to re-start code generation
with a smaller TB if a relocation is out of range.  We no longer
need to leave a nop in the stream Just In Case.

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
3 years agotcg/riscv: Fix branch range checks
Richard Henderson [Wed, 4 Nov 2020 20:35:35 +0000 (12:35 -0800)]
tcg/riscv: Fix branch range checks

The offset even checks were folded into the range check incorrectly.
By offsetting by 1, and not decrementing the width, we silently
allowed out of range branches.

Assert that the offset is always even instead.  Move tcg_out_goto
down into the CONFIG_SOFTMMU block so that it is not unused.

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
3 years agotcg/s390: Support split-wx code generation
Richard Henderson [Thu, 5 Nov 2020 04:56:16 +0000 (20:56 -0800)]
tcg/s390: Support split-wx code generation

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
3 years agotcg/s390: Use tcg_tbrel_diff
Richard Henderson [Thu, 5 Nov 2020 02:00:35 +0000 (18:00 -0800)]
tcg/s390: Use tcg_tbrel_diff

Use tcg_tbrel_diff when we need a displacement to a label,
and with a NULL argument when we need the normalizing addend.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
3 years agotcg/sparc: Support split-wx code generation
Richard Henderson [Wed, 4 Nov 2020 19:49:09 +0000 (22:49 +0300)]
tcg/sparc: Support split-wx code generation

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
3 years agotcg/sparc: Use tcg_tbrel_diff
Richard Henderson [Thu, 5 Nov 2020 20:20:45 +0000 (23:20 +0300)]
tcg/sparc: Use tcg_tbrel_diff

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
3 years agotcg/ppc: Support split-wx code generation
Richard Henderson [Wed, 4 Nov 2020 18:17:46 +0000 (18:17 +0000)]
tcg/ppc: Support split-wx code generation

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
3 years agotcg/ppc: Use tcg_out_mem_long to reset TCG_REG_TB
Richard Henderson [Thu, 5 Nov 2020 19:34:51 +0000 (19:34 +0000)]
tcg/ppc: Use tcg_out_mem_long to reset TCG_REG_TB

The maximum TB code gen size is UINT16_MAX, which the current
code does not support.  Use our utility function to optimally
add an arbitrary constant.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
3 years agotcg/ppc: Use tcg_tbrel_diff
Richard Henderson [Thu, 5 Nov 2020 18:58:14 +0000 (18:58 +0000)]
tcg/ppc: Use tcg_tbrel_diff

Use tcg_tbrel_diff when we need a displacement to a label,
and with a NULL argument when we need the normalizing addend.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
3 years agotcg: Introduce tcg_tbrel_diff
Richard Henderson [Thu, 5 Nov 2020 00:15:07 +0000 (16:15 -0800)]
tcg: Introduce tcg_tbrel_diff

Reviewed-by: Joelle van Dyne <j@getutm.app>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
3 years agotcg/tci: Push const down through bytecode reading
Richard Henderson [Sat, 31 Oct 2020 22:18:58 +0000 (15:18 -0700)]
tcg/tci: Push const down through bytecode reading

Reviewed-by: Joelle van Dyne <j@getutm.app>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
3 years agodisas: Push const down through host disassembly
Richard Henderson [Sat, 31 Oct 2020 03:59:01 +0000 (20:59 -0700)]
disas: Push const down through host disassembly

Reviewed-by: Joelle van Dyne <j@getutm.app>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
3 years agotcg/aarch64: Support split-wx code generation
Richard Henderson [Thu, 29 Oct 2020 21:37:16 +0000 (21:37 +0000)]
tcg/aarch64: Support split-wx code generation

Reviewed-by: Joelle van Dyne <j@getutm.app>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
3 years agotcg/aarch64: Use B not BL for tcg_out_goto_long
Richard Henderson [Thu, 29 Oct 2020 22:00:18 +0000 (22:00 +0000)]
tcg/aarch64: Use B not BL for tcg_out_goto_long

A typo generated a branch-and-link insn instead of plain branch.

Reviewed-by: Joelle van Dyne <j@getutm.app>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
3 years agotcg/i386: Support split-wx code generation
Richard Henderson [Thu, 29 Oct 2020 06:42:12 +0000 (23:42 -0700)]
tcg/i386: Support split-wx code generation

Reviewed-by: Joelle van Dyne <j@getutm.app>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
3 years agotcg: Return the TB pointer from the rx region from exit_tb
Richard Henderson [Thu, 29 Oct 2020 20:18:12 +0000 (13:18 -0700)]
tcg: Return the TB pointer from the rx region from exit_tb

This produces a small pc-relative displacement within the
generated code to the TB structure that preceeds it.

Reviewed-by: Joelle van Dyne <j@getutm.app>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
3 years agoaccel/tcg: Support split-wx for darwin/iOS with vm_remap
Richard Henderson [Thu, 29 Oct 2020 23:49:57 +0000 (23:49 +0000)]
accel/tcg: Support split-wx for darwin/iOS with vm_remap

Cribbed from code posted by Joelle van Dyne <j@getutm.app>,
and rearranged to a cleaner structure.

Reviewed-by: Joelle van Dyne <j@getutm.app>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
3 years agoaccel/tcg: Support split-wx for linux with memfd
Richard Henderson [Thu, 29 Oct 2020 05:49:42 +0000 (22:49 -0700)]
accel/tcg: Support split-wx for linux with memfd

We cannot use a real temp file, because we would need to find
a filesystem that does not have noexec enabled.  However, a
memfd is not associated with any filesystem.

Reviewed-by: Joelle van Dyne <j@getutm.app>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
3 years agotcg: Add --accel tcg,split-wx property
Richard Henderson [Thu, 29 Oct 2020 03:50:29 +0000 (20:50 -0700)]
tcg: Add --accel tcg,split-wx property

Plumb the value through to alloc_code_gen_buffer.  This is not
supported by any os or tcg backend, so for now enabling it will
result in an error.

Reviewed-by: Joelle van Dyne <j@getutm.app>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
3 years agotcg: Use Error with alloc_code_gen_buffer
Richard Henderson [Thu, 29 Oct 2020 03:14:54 +0000 (20:14 -0700)]
tcg: Use Error with alloc_code_gen_buffer

Report better error messages than just "could not allocate".
Let alloc_code_gen_buffer set ctx->code_gen_buffer_size
and ctx->code_gen_buffer, and simply return bool.

Reviewed-by: Joelle van Dyne <j@getutm.app>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
3 years agotcg: Make tb arg to synchronize_from_tb const
Richard Henderson [Thu, 29 Oct 2020 19:30:01 +0000 (12:30 -0700)]
tcg: Make tb arg to synchronize_from_tb const

There is nothing within the translators that ought to be
changing the TranslationBlock data, so make it const.

This does not actually use the read-only copy of the
data structure that exists within the rx region.

Reviewed-by: Joelle van Dyne <j@getutm.app>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
3 years agotcg: Make DisasContextBase.tb const
Richard Henderson [Thu, 29 Oct 2020 16:49:05 +0000 (09:49 -0700)]
tcg: Make DisasContextBase.tb const

There is nothing within the translators that ought to be
changing the TranslationBlock data, so make it const.

This does not actually use the read-only copy of the
data structure that exists within the rx region.

Reviewed-by: Joelle van Dyne <j@getutm.app>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
3 years agotcg: Adjust tb_target_set_jmp_target for split-wx
Richard Henderson [Thu, 29 Oct 2020 06:30:21 +0000 (23:30 -0700)]
tcg: Adjust tb_target_set_jmp_target for split-wx

Pass both rx and rw addresses to tb_target_set_jmp_target.

Reviewed-by: Joelle van Dyne <j@getutm.app>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
3 years agotcg: Adjust tcg_register_jit for const
Richard Henderson [Thu, 29 Oct 2020 16:17:30 +0000 (09:17 -0700)]
tcg: Adjust tcg_register_jit for const

We must change all targets at once, since all must match
the declaration in tcg.c.

Reviewed-by: Joelle van Dyne <j@getutm.app>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
3 years agotcg: Adjust tcg_out_label for const
Richard Henderson [Thu, 29 Oct 2020 01:55:50 +0000 (18:55 -0700)]
tcg: Adjust tcg_out_label for const

Simplify the arguments to always use s->code_ptr instead of
take it as an argument.  That makes it easy to ensure that
the value_ptr is always the rx version.

Reviewed-by: Joelle van Dyne <j@getutm.app>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
3 years agotcg: Adjust tcg_out_call for const
Richard Henderson [Wed, 28 Oct 2020 22:29:04 +0000 (15:29 -0700)]
tcg: Adjust tcg_out_call for const

We must change all targets at once, since all must match
the declaration in tcg.c.

Reviewed-by: Joelle van Dyne <j@getutm.app>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
3 years agotcg: Adjust TCGLabel for const
Richard Henderson [Fri, 30 Oct 2020 22:55:28 +0000 (15:55 -0700)]
tcg: Adjust TCGLabel for const

Change TCGLabel.u.value_ptr to const, and initialize it with
tcg_splitwx_to_rx.  Propagate const through tcg/host/ only
as far as needed to avoid errors from the value_ptr change.

Reviewed-by: Joelle van Dyne <j@getutm.app>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
3 years agotcg: Introduce tcg_splitwx_to_{rx,rw}
Richard Henderson [Wed, 28 Oct 2020 19:05:44 +0000 (12:05 -0700)]
tcg: Introduce tcg_splitwx_to_{rx,rw}

Add two helper functions, using a global variable to hold
the displacement.  The displacement is currently always 0,
so no change in behaviour.

Begin using the functions in tcg common code only.

Reviewed-by: Joelle van Dyne <j@getutm.app>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
3 years agotcg: Add in_code_gen_buffer
Richard Henderson [Sat, 31 Oct 2020 01:59:09 +0000 (18:59 -0700)]
tcg: Add in_code_gen_buffer

Create a function to determine if a pointer is within the buffer.

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
3 years agotcg: Move tcg epilogue pointer out of TCGContext
Richard Henderson [Wed, 28 Oct 2020 21:48:55 +0000 (14:48 -0700)]
tcg: Move tcg epilogue pointer out of TCGContext

This value is constant across all thread-local copies of TCGContext,
so we might as well move it out of thread-local storage.

Reviewed-by: Joelle van Dyne <j@getutm.app>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
3 years agotcg: Move tcg prologue pointer out of TCGContext
Richard Henderson [Wed, 28 Oct 2020 21:11:54 +0000 (14:11 -0700)]
tcg: Move tcg prologue pointer out of TCGContext

This value is constant across all thread-local copies of TCGContext,
so we might as well move it out of thread-local storage.

Use the correct function pointer type, and name the variable
tcg_qemu_tb_exec, which means that we are able to remove the
macro that does the casting.

Replace HAVE_TCG_QEMU_TB_EXEC with CONFIG_TCG_INTERPRETER,
as this is somewhat clearer in intent.

Reviewed-by: Joelle van Dyne <j@getutm.app>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
3 years agoutil: Specialize flush_idcache_range for aarch64
Richard Henderson [Sat, 12 Dec 2020 16:46:34 +0000 (10:46 -0600)]
util: Specialize flush_idcache_range for aarch64

For darwin, the CTR_EL0 register is not accessible, but there
are system routines that we can use.

For other hosts, copy the single pointer implementation from
libgcc and modify it to support the double pointer interface
we require.  This halves the number of cache operations required
when split-rwx is enabled.

Reviewed-by: Joelle van Dyne <j@getutm.app>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
3 years agoutil: Enhance flush_icache_range with separate data pointer
Richard Henderson [Sat, 12 Dec 2020 16:38:21 +0000 (10:38 -0600)]
util: Enhance flush_icache_range with separate data pointer

We are shortly going to have a split rw/rx jit buffer.  Depending
on the host, we need to flush the dcache at the rw data pointer and
flush the icache at the rx code pointer.

For now, the two passed pointers are identical, so there is no
effective change in behaviour.

Reviewed-by: Joelle van Dyne <j@getutm.app>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
3 years agotcg: Do not flush icache for interpreter
Richard Henderson [Sat, 12 Dec 2020 15:08:02 +0000 (09:08 -0600)]
tcg: Do not flush icache for interpreter

This is currently a no-op within tci/tcg-target.h, but
is about to be moved to a more generic location.

Reviewed-by: Joelle van Dyne <j@getutm.app>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
3 years agoutil/oslib: Assert qemu_try_memalign() alignment is a power of 2
Philippe Mathieu-Daudé [Wed, 21 Oct 2020 17:38:03 +0000 (19:38 +0200)]
util/oslib: Assert qemu_try_memalign() alignment is a power of 2

qemu_try_memalign() expects a power of 2 alignment:

- posix_memalign(3):

  The address of the allocated memory will be a multiple of alignment,
  which must be a power of two and a multiple of sizeof(void *).

- _aligned_malloc()

  The alignment value, which must be an integer power of 2.

Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-Id: <20201021173803.2619054-3-philmd@redhat.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
3 years agoutil/oslib-win32: Use _aligned_malloc for qemu_try_memalign
Richard Henderson [Wed, 21 Oct 2020 17:38:02 +0000 (19:38 +0200)]
util/oslib-win32: Use _aligned_malloc for qemu_try_memalign

We do not need or want to be allocating page sized quanta.

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Stefan Weil <sw@weilnetz.de>
Message-Id: <20201018164836.1149452-1-richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
3 years agotcg: Introduce INDEX_op_qemu_st8_i32
Richard Henderson [Wed, 9 Dec 2020 19:58:39 +0000 (13:58 -0600)]
tcg: Introduce INDEX_op_qemu_st8_i32

Enable this on i386 to restrict the set of input registers
for an 8-bit store, as required by the architecture.  This
removes the last use of scratch registers for user-only mode.

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
3 years agotcg/i386: Adjust TCG_TARGET_HAS_MEMORY_BSWAP
Richard Henderson [Tue, 20 Nov 2018 09:26:40 +0000 (10:26 +0100)]
tcg/i386: Adjust TCG_TARGET_HAS_MEMORY_BSWAP

Always true when movbe is available, otherwise leave
this to generic code.

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
3 years agolinux-user: Conditionalize TUNSETVNETLE
Richard Henderson [Mon, 4 Jan 2021 23:40:42 +0000 (13:40 -1000)]
linux-user: Conditionalize TUNSETVNETLE

This fixes the build for older ppc64 kernel headers.

Fixes: 6addf06a3c4
Reviewed-by: Laurent Vivier <laurent@vivier.eu>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
3 years agoMerge remote-tracking branch 'remotes/stsquad/tags/pull-testing-060121-4' into staging
Peter Maydell [Wed, 6 Jan 2021 22:18:36 +0000 (22:18 +0000)]
Merge remote-tracking branch 'remotes/stsquad/tags/pull-testing-060121-4' into staging

Testing updates (back to green)

  - include ccache in Debian 10 docker image
  - iotests: drop 312 from auto group
  - bound reading of s390x framebuffer file
  - cirrus: drop non-x86 tests so we complete

# gpg: Signature made Wed 06 Jan 2021 17:31:14 GMT
# gpg:                using RSA key 6685AE99E75167BCAFC8DF35FBD0DB095A9E2A44
# gpg: Good signature from "Alex Bennée (Master Work Key) <alex.bennee@linaro.org>" [full]
# Primary key fingerprint: 6685 AE99 E751 67BC AFC8  DF35 FBD0 DB09 5A9E 2A44

* remotes/stsquad/tags/pull-testing-060121-4:
  cirrus: don't run full qtest on macOS
  tests/acceptance: bound the size of readline in s390_ccw_virtio
  tests/iotests: drop test 312 from auto group
  tests/docker: Include 'ccache' in Debian base image

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
3 years agocirrus: don't run full qtest on macOS
Daniel P. Berrangé [Wed, 6 Jan 2021 11:41:59 +0000 (11:41 +0000)]
cirrus: don't run full qtest on macOS

The Cirrus CI macOS build hosts have exhibited a serious performance
degradation in recent months. For example the "qom-test" qtest takes
over an hour for only the qemu-system-aarch64 binary. This is as much
20-40 times slower than other environments. The other qtests all show
similar performance degradation, as do many of the unit tests.

This does not appear related to QEMU code changes, since older git
commits which were known to fully complete in less than 1 hour on
Cirrus CI now also show similar bad performance. Either Cirrus CI
performance has degraded, or an change in its environment has exposed
a latent bug widely affecting all of QEMU. Debugging the qom-test
showed no easily identified large bottleneck - every step of the
test execution was simply slower.

macOS builds/tests run outside Cirrus CI show normal performance.

With an inability to identify any obvious problem, the only viable
way to get a reliably completing Cirrus CI macOS job is to cut out
almost all of the qtests. We choose to run the x86_64 target only,
since that has very few machine types and thus is least badly
impacted in the qom-test execution.

With this change, the macOS jobs complete in approx 35 minutes.

Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Willian Rampazzo <willianr@redhat.com>
Message-Id: <20210106114159.981538-1-berrange@redhat.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
3 years agotests/acceptance: bound the size of readline in s390_ccw_virtio
Alex Bennée [Tue, 5 Jan 2021 12:44:05 +0000 (12:44 +0000)]
tests/acceptance: bound the size of readline in s390_ccw_virtio

The read binary data as text via a PPM export of the frame buffer
seems a bit sketchy and it did blow up in the real world when the
assertion failed:

  https://gitlab.com/qemu-project/qemu/-/jobs/943183183

However short of cleaning up the test to be more binary focused at
least limit the attempt to dump the whole file as hexified zeros in
the logs.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Reviewed-by: Willian Rampazzo <willianr@redhat.com>
Acked-by: Halil Pasic <pasic@linux.ibm.com>
Acked-by: Thomas Huth <thuth@redhat.com>
Message-Id: <20210105124405.15424-1-alex.bennee@linaro.org>

3 years agotests/iotests: drop test 312 from auto group
Alex Bennée [Tue, 5 Jan 2021 10:04:02 +0000 (10:04 +0000)]
tests/iotests: drop test 312 from auto group

The "auto" documentation states:

  That means they should run with every QEMU binary (also non-x86)

which is not the case as the check-system-fedora build which only
includes a rag tag group of rare and deprecated targets doesn't
support the virtio device required.

Fixes: ef9bba1484b ("quorum: Implement bdrv_co_block_status()")
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-Id: <20210105100402.12350-1-alex.bennee@linaro.org>

3 years agotests/docker: Include 'ccache' in Debian base image
Philippe Mathieu-Daudé [Sun, 13 Dec 2020 21:16:01 +0000 (22:16 +0100)]
tests/docker: Include 'ccache' in Debian base image

Include the 'ccache' package to speed up compilation.

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20201213211601.253530-1-f4bug@amsat.org>
Fixes: d6db2a1cdf ("docker: add debian-buster-arm64-cross")
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
3 years agoMerge remote-tracking branch 'remotes/bonzini-gitlab/tags/for-upstream' into staging
Peter Maydell [Wed, 6 Jan 2021 15:55:29 +0000 (15:55 +0000)]
Merge remote-tracking branch 'remotes/bonzini-gitlab/tags/for-upstream' into staging

From Alex's pull request:
* improve cross-build KVM coverage
* new --without-default-features configure flag
* add __repr__ for ConsoleSocket for debugging
* build tcg tests with -Werror
* test 32 bit builds with fedora
* remove last traces of debian9
* hotfix for centos8 powertools repo

* Move lots of feature detection code to meson (Alex, myself)
* CFI and LTO support (Daniele)
* test-char dangling pointer (Eduardo)
* Build system and win32 fixes (Marc-André)
* Initialization fixes (myself)
* TCG include cleanup (Richard, myself)
* x86 'int N' fix (Peter)

# gpg: Signature made Wed 06 Jan 2021 09:21:25 GMT
# gpg:                using RSA key F13338574B662389866C7682BFFBD25F78C7AE83
# gpg:                issuer "pbonzini@redhat.com"
# gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full]
# gpg:                 aka "Paolo Bonzini <pbonzini@redhat.com>" [full]
# Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4  E2F7 7E15 100C CD36 69B1
#      Subkey fingerprint: F133 3857 4B66 2389 866C  7682 BFFB D25F 78C7 AE83

* remotes/bonzini-gitlab/tags/for-upstream: (52 commits)
  win32: drop fd registration to the main-loop on setting non-block
  configure: move tests/qemu-iotests/common.env generation to meson
  meson.build: convert --with-default-devices to meson
  libattr: convert to meson
  cap_ng: convert to meson
  virtfs: convert to meson
  seccomp: convert to meson
  zstd: convert to meson
  lzfse: convert to meson
  snappy: convert to meson
  lzo: convert to meson
  rbd: convert to meson
  libnfs: convert to meson
  libiscsi: convert to meson
  bzip2: convert to meson
  glusterfs: convert to meson
  curl: convert to meson
  curl: remove compatibility code, require 7.29.0
  brlapi: convert to meson
  configure: remove CONFIG_FILEVERSION and CONFIG_PRODUCTVERSION
  ...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
# Conflicts:
# trace/meson.build

3 years agoMerge remote-tracking branch 'remotes/mcayland/tags/qemu-sparc-20210106' into staging
Peter Maydell [Wed, 6 Jan 2021 13:31:11 +0000 (13:31 +0000)]
Merge remote-tracking branch 'remotes/mcayland/tags/qemu-sparc-20210106' into staging

qemu-sparc queue

# gpg: Signature made Wed 06 Jan 2021 11:43:02 GMT
# gpg:                using RSA key CC621AB98E82200D915CC9C45BC2C56FAE0F321F
# gpg:                issuer "mark.cave-ayland@ilande.co.uk"
# gpg: Good signature from "Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>" [full]
# Primary key fingerprint: CC62 1AB9 8E82 200D 915C  C9C4 5BC2 C56F AE0F 321F

* remotes/mcayland/tags/qemu-sparc-20210106:
  sun4m: don't connect two qemu_irqs directly to the same input
  include/hw/sparc/grlib.h: Remove unused set_pil_in_fn typedef
  hw/sparc: Make grlib-irqmp device handle its own inbound IRQ lines
  hw/timer/slavio_timer: Allow 64-bit accesses

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
3 years agosun4m: don't connect two qemu_irqs directly to the same input
Mark Cave-Ayland [Sat, 19 Dec 2020 11:19:34 +0000 (11:19 +0000)]
sun4m: don't connect two qemu_irqs directly to the same input

The sun4m board code connects both of the IRQ outputs of each ESCC to the
same slavio input qemu_irq. Connecting two qemu_irqs outputs directly to the
same input is not valid as it produces subtly wrong behaviour (for instance
if both the IRQ lines are high, and then one goes low, the PIC input will see
this as a high-to-low transition even though the second IRQ line should still
be holding it high).

This kind of wiring needs an explicitly created OR gate; add one.

Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Message-Id: <20201219111934.5540-1-mark.cave-ayland@ilande.co.uk>
Reviewed-by: Artyom Tarasenko <atar4qemu@gmail.com>
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
3 years agoinclude/hw/sparc/grlib.h: Remove unused set_pil_in_fn typedef
Peter Maydell [Sat, 12 Dec 2020 14:41:34 +0000 (14:41 +0000)]
include/hw/sparc/grlib.h: Remove unused set_pil_in_fn typedef

The grlib.h header defines a set_pil_in_fn typedef which is never
used; remove it.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-Id: <20201212144134.29594-3-peter.maydell@linaro.org>
Reviewed-by: KONRAD Frederic <frederic.konrad@adacore.com>
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
3 years agohw/sparc: Make grlib-irqmp device handle its own inbound IRQ lines
Peter Maydell [Sat, 12 Dec 2020 14:41:33 +0000 (14:41 +0000)]
hw/sparc: Make grlib-irqmp device handle its own inbound IRQ lines

Currently the GRLIB_IRQMP device is used in one place (the leon3 board),
but instead of the device providing inbound gpio lines for the board
to wire up, the board code itself calls qemu_allocate_irqs() with
the handler function being a set_irq function defined in the code
for the device.

Refactor this into the standard setup of a device having input
gpio lines.

This fixes a trivial Coverity memory leak report (the leon3
board code leaks the IRQ array returned from qemu_allocate_irqs()).

Fixes: Coverity CID 1421922
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-Id: <20201212144134.29594-2-peter.maydell@linaro.org>
Reviewed-by: KONRAD Frederic <frederic.konrad@adacore.com>
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
3 years agohw/timer/slavio_timer: Allow 64-bit accesses
Philippe Mathieu-Daudé [Sat, 5 Dec 2020 15:09:03 +0000 (16:09 +0100)]
hw/timer/slavio_timer: Allow 64-bit accesses

Per the "NCR89C105 Chip Specification" referenced in the header:

                  Chip-level Address Map

  ------------------------------------------------------------------
  | 1D0 0000 ->   | Counter/Timers                        | W,D    |
  |   1DF FFFF    |                                       |        |
  ...

  The address map indicated the allowed accesses at each address.
  [...] W indicates a word access, and D indicates a double-word
  access.

The SLAVIO timer controller is implemented expecting 32-bit accesses.
Commit a3d12d073e1 restricted the memory accesses to 32-bit, while
the device allows 64-bit accesses.

This was not an issue until commit 5d971f9e67 which reverted
("memory: accept mismatching sizes in memory_region_access_valid").

Fix by renaming .valid MemoryRegionOps as .impl, and add the valid
access range (W -> 4, D -> 8).

Since commit 21786c7e598 ("memory: Log invalid memory accesses")
this class of bug can be quickly debugged displaying 'guest_errors'
accesses, as:

  $ qemu-system-sparc -M SS-20 -m 256 -bios ss20_v2.25_rom -serial stdio -d guest_errors

  Power-ON Reset
  Invalid access at addr 0x0, size 8, region 'timer-1', reason: invalid size (min:4 max:4)

  $ qemu-system-sparc -M SS-20 -m 256 -bios ss20_v2.25_rom -monitor stdio -S
  (qemu) info mtree
  address-space: memory
    0000000000000000-ffffffffffffffff (prio 0, i/o): system
      ...
      0000000ff1300000-0000000ff130000f (prio 0, i/o): timer-1
             ^^^^^^^^^                                 ^^^^^^^
                   \ memory region base address and name /

  (qemu) info qtree
  bus: main-system-bus
    dev: slavio_timer, id ""              <-- device type name
      gpio-out "sysbus-irq" 17
      num_cpus = 1 (0x1)
      mmio 0000000ff1310000/0000000000000014
      mmio 0000000ff1300000/0000000000000010 <--- base address
      mmio 0000000ff1301000/0000000000000010
      mmio 0000000ff1302000/0000000000000010
      ...

Reported-by: Yap KV <yapkv@yahoo.com>
Buglink: https://bugs.launchpad.net/bugs/1906905
Fixes: a3d12d073e1 ("slavio_timer: convert to memory API")
CC: qemu-stable@nongnu.org
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20201205150903.3062711-1-f4bug@amsat.org>
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
3 years agoMerge remote-tracking branch 'remotes/dg-gitlab/tags/ppc-for-6.0-20210106' into staging
Peter Maydell [Wed, 6 Jan 2021 11:24:11 +0000 (11:24 +0000)]
Merge remote-tracking branch 'remotes/dg-gitlab/tags/ppc-for-6.0-20210106' into staging

ppc patch queue 2021-01-06

First pull request for 2021, which has a bunch of things accumulated
over the holidays.  Includes:
  * A number of cleanups to sam460ex and ppc440 code from BALATON Zoltan
  * Several fixes for builds with --without-default-devices from Greg Kurz
  * Fixes for some DRC reset problems from Greg Kurz
  * QOM conversion of the PPC 4xx UIC devices from Peter Maydell
  * Some other assorted fixes and cleanups

# gpg: Signature made Wed 06 Jan 2021 03:33:19 GMT
# gpg:                using RSA key 75F46586AE61A66CC44E87DC6C38CACA20D9B392
# gpg: Good signature from "David Gibson <david@gibson.dropbear.id.au>" [full]
# gpg:                 aka "David Gibson (Red Hat) <dgibson@redhat.com>" [full]
# gpg:                 aka "David Gibson (ozlabs.org) <dgibson@ozlabs.org>" [full]
# gpg:                 aka "David Gibson (kernel.org) <dwg@kernel.org>" [unknown]
# Primary key fingerprint: 75F4 6586 AE61 A66C C44E  87DC 6C38 CACA 20D9 B392

* remotes/dg-gitlab/tags/ppc-for-6.0-20210106: (22 commits)
  ppc440_pcix: Fix up pci config access
  ppc440_pcix: Fix register write trace event
  ppc440_pcix: Improve comment for IRQ mapping
  sam460ex: Remove FDT_PPC dependency from KConfig
  ppc4xx: Move common dependency on serial to common option
  pnv: Fix reverse dependency on PCI express root ports
  ppc: Simplify reverse dependencies of POWERNV and PSERIES on XICS and XIVE
  ppc: Fix build with --without-default-devices
  spapr: Add drc_ prefix to the DRC realize and unrealize functions
  spapr: Use spapr_drc_reset_all() at machine reset
  spapr: Introduce spapr_drc_reset_all()
  spapr: Fix reset of transient DR connectors
  spapr: Call spapr_drc_reset() for all DRCs at CAS
  spapr: Fix buffer overflow in spapr_numa_associativity_init()
  spapr: Allow memory unplug to always succeed
  spapr: Fix DR properties of the root node
  spapr/xive: Make spapr_xive_pic_print_info() static
  spapr: DRC lookup cannot fail
  hw/ppc/ppc440_bamboo: Drop use of ppcuic_init()
  hw/ppc/virtex_ml507: Drop use of ppcuic_init()
  ...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
3 years agowin32: drop fd registration to the main-loop on setting non-block
Marc-André Lureau [Fri, 18 Dec 2020 13:57:11 +0000 (17:57 +0400)]
win32: drop fd registration to the main-loop on setting non-block

Low-level fd users from QEMU use aio_set_fd_handler(), which handles
event registration with the main loop; qemu_fd_register() is only
needed together with the main loop's poll notifiers, of which SLIRP
is the only user.

This removes a dependency from oslib-win32.c to main-loop.c.

Suggested-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Message-Id: <20201218135712.674094-1-marcandre.lureau@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
3 years agoconfigure: move tests/qemu-iotests/common.env generation to meson
Paolo Bonzini [Mon, 14 Dec 2020 11:12:10 +0000 (12:12 +0100)]
configure: move tests/qemu-iotests/common.env generation to meson

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
3 years agomeson.build: convert --with-default-devices to meson
Paolo Bonzini [Fri, 20 Nov 2020 07:38:22 +0000 (08:38 +0100)]
meson.build: convert --with-default-devices to meson

Pass the boolean option directly instead of writing
CONFIG_MINIKCONF_MODE to config-host.mak.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
3 years agolibattr: convert to meson
Paolo Bonzini [Tue, 17 Nov 2020 13:45:24 +0000 (14:45 +0100)]
libattr: convert to meson

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
3 years agocap_ng: convert to meson
Paolo Bonzini [Tue, 17 Nov 2020 13:46:58 +0000 (14:46 +0100)]
cap_ng: convert to meson

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
3 years agovirtfs: convert to meson
Paolo Bonzini [Tue, 17 Nov 2020 13:46:21 +0000 (14:46 +0100)]
virtfs: convert to meson

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
3 years agoseccomp: convert to meson
Paolo Bonzini [Tue, 17 Nov 2020 13:22:24 +0000 (14:22 +0100)]
seccomp: convert to meson

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
3 years agozstd: convert to meson
Paolo Bonzini [Tue, 17 Nov 2020 12:37:39 +0000 (13:37 +0100)]
zstd: convert to meson

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
3 years agolzfse: convert to meson
Paolo Bonzini [Tue, 17 Nov 2020 12:35:28 +0000 (13:35 +0100)]
lzfse: convert to meson

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
3 years agosnappy: convert to meson
Paolo Bonzini [Tue, 17 Nov 2020 12:32:34 +0000 (13:32 +0100)]
snappy: convert to meson

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
3 years agolzo: convert to meson
Paolo Bonzini [Tue, 17 Nov 2020 12:11:25 +0000 (13:11 +0100)]
lzo: convert to meson

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
3 years agorbd: convert to meson
Paolo Bonzini [Tue, 17 Nov 2020 12:11:25 +0000 (13:11 +0100)]
rbd: convert to meson

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
3 years agoppc440_pcix: Fix up pci config access
BALATON Zoltan via [Sun, 3 Jan 2021 01:09:33 +0000 (02:09 +0100)]
ppc440_pcix: Fix up pci config access

This fixes a long standing issue with MorphOS booting on sam460ex
which turns out to be because of suspicious values written to PCI
config address that apparently works on real machine but caused wrong
access on this device model. This replaces a previous work around for
this with a better fix that makes it work.

Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
Message-Id: <6fd215ab2bc5f8d4455cd20ed1a2f059e4415fe5.1609636173.git.balaton@eik.bme.hu>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
3 years agoppc440_pcix: Fix register write trace event
BALATON Zoltan via [Sun, 3 Jan 2021 01:09:33 +0000 (02:09 +0100)]
ppc440_pcix: Fix register write trace event

The trace event for pci_host_config_write() was also using the trace
event for read. Add corresponding trace and correct this.

Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
Message-Id: <a6c7dcf7153cc537123ed8ceac060f2f64a883cb.1609636173.git.balaton@eik.bme.hu>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
3 years agoppc440_pcix: Improve comment for IRQ mapping
BALATON Zoltan via [Sun, 3 Jan 2021 01:09:33 +0000 (02:09 +0100)]
ppc440_pcix: Improve comment for IRQ mapping

The code mapping all PCI interrupts to a single CPU IRQ works but is
not trivial so document it in a comment.

Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
Message-Id: <c25c0310510672b58466e795fd701e65e8f1ff97.1609636173.git.balaton@eik.bme.hu>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
3 years agosam460ex: Remove FDT_PPC dependency from KConfig
BALATON Zoltan via [Sun, 3 Jan 2021 01:09:33 +0000 (02:09 +0100)]
sam460ex: Remove FDT_PPC dependency from KConfig

Dependency on FDT_PPC was added in commit b0048f76095
("hw/ppc/Kconfig: Only select FDT helper for machines using it") but
it does not seem to be really necessary so remove it again.

Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <7461a20b129a912aeacdb9ad115a55f0b84c8726.1609636173.git.balaton@eik.bme.hu>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
3 years agoppc4xx: Move common dependency on serial to common option
BALATON Zoltan via [Sun, 3 Jan 2021 01:09:33 +0000 (02:09 +0100)]
ppc4xx: Move common dependency on serial to common option

All machines that select SERIAL also select PPC4XX so we can just add
this common dependency there once.

Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
Message-Id: <94f1eb7cfb7f315bd883d825f3ce7e0cfc2f2b69.1609636173.git.balaton@eik.bme.hu>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
3 years agopnv: Fix reverse dependency on PCI express root ports
Greg Kurz [Thu, 24 Dec 2020 17:23:03 +0000 (18:23 +0100)]
pnv: Fix reverse dependency on PCI express root ports

qemu-system-ppc64 built with --without-default-devices crashes:

Type 'pnv-phb4-root-port' is missing its parent 'pcie-root-port-base'
Aborted (core dumped)

Have POWERNV to select PCIE_PORT. This is done through a
new PCI_POWERNV config in hw/pci-host/Kconfig since POWERNV
doesn't have a direct dependency on PCI. For this reason,
PCI_EXPRESS and MSI_NONBROKEN are also moved under
PCI_POWERNV.

Signed-off-by: Greg Kurz <groug@kaod.org>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Message-Id: <160883058299.253005.342913177952681375.stgit@bahia.lan>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
3 years agoppc: Simplify reverse dependencies of POWERNV and PSERIES on XICS and XIVE
Greg Kurz [Thu, 24 Dec 2020 17:22:55 +0000 (18:22 +0100)]
ppc: Simplify reverse dependencies of POWERNV and PSERIES on XICS and XIVE

Have PSERIES to select XICS and XIVE, and directly check PSERIES
in hw/intc/meson.build to enable build of the XICS and XIVE sPAPR
backends, like POWERNV already does. This allows to get rid of the
intermediate XICS_SPAPR and XIVE_SPAPR.

Signed-off-by: Greg Kurz <groug@kaod.org>
Message-Id: <160883057560.253005.4206568349917633920.stgit@bahia.lan>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
3 years agoppc: Fix build with --without-default-devices
Greg Kurz [Thu, 24 Dec 2020 17:22:47 +0000 (18:22 +0100)]
ppc: Fix build with --without-default-devices

Linking of the qemu-system-ppc64 fails on a POWER9 host when
--without-default-devices is passed to configure:

$ ./configure --without-default-devices \
              --target-list=ppc64-softmmu && make

...

libqemu-ppc64-softmmu.fa.p/hw_ppc_e500.c.o: In function `ppce500_init_mpic_kvm':
/home/greg/Work/qemu/qemu-ppc/build/../hw/ppc/e500.c:777: undefined reference to `kvm_openpic_connect_vcpu'
libqemu-ppc64-softmmu.fa.p/hw_ppc_spapr_irq.c.o: In function `spapr_irq_check':
/home/greg/Work/qemu/qemu-ppc/build/../hw/ppc/spapr_irq.c:189: undefined reference to `xics_kvm_has_broken_disconnect'
libqemu-ppc64-softmmu.fa.p/hw_intc_spapr_xive.c.o: In function `spapr_xive_post_load':
/home/greg/Work/qemu/qemu-ppc/build/../hw/intc/spapr_xive.c:530: undefined reference to `kvmppc_xive_post_load'

... and tons of other symbols belonging to the KVM backend of the
openpic, XICS and XIVE interrupt controllers.

It turns out that OPENPIC_KVM, XICS_KVM and XIVE_KVM are marked
to depend on KVM but this has no effect when minikconf runs in
allnoconfig mode. Such reverse dependencies should rather be
handled with a 'select' statement, eg.

config OPENPIC
    select OPENPIC_KVM if KVM

or even better by getting rid of the intermediate _KVM config
and directly checking CONFIG_KVM in the meson.build file:

specific_ss.add(when: ['CONFIG_KVM', 'CONFIG_OPENPIC'],
if_true: files('openpic_kvm.c'))

Go for the latter with OPENPIC, XICS and XIVE.

This went unnoticed so far because CI doesn't test the build with
--without-default-devices and KVM enabled on a POWER host.

Signed-off-by: Greg Kurz <groug@kaod.org>
Message-Id: <160883056791.253005.14924294027763955653.stgit@bahia.lan>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
3 years agospapr: Add drc_ prefix to the DRC realize and unrealize functions
Greg Kurz [Fri, 18 Dec 2020 10:33:59 +0000 (11:33 +0100)]
spapr: Add drc_ prefix to the DRC realize and unrealize functions

Use a less generic name for an easier experience with tools such as
cscope or grep.

Signed-off-by: Greg Kurz <groug@kaod.org>
Message-Id: <20201218103400.689660-6-groug@kaod.org>
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Tested-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
3 years agospapr: Use spapr_drc_reset_all() at machine reset
Greg Kurz [Fri, 18 Dec 2020 10:33:58 +0000 (11:33 +0100)]
spapr: Use spapr_drc_reset_all() at machine reset

Documentation of object_child_foreach_recursive() clearly stipulates
that "it is forbidden to add or remove children from @obj from the @fn
callback". But this is exactly what we do during machine reset. The call
to spapr_drc_reset() can finalize the hot-unplug sequence of a PHB or a
PCI bridge, both of which will then in turn destroy their PCI DRCs. This
could potentially invalidate the iterator used by do_object_child_foreach().
It is pure luck that this haven't caused any issues so far.

Use spapr_drc_reset_all() since it can cope with DRC removal.

Signed-off-by: Greg Kurz <groug@kaod.org>
Message-Id: <20201218103400.689660-5-groug@kaod.org>
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Tested-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
3 years agospapr: Introduce spapr_drc_reset_all()
Greg Kurz [Fri, 18 Dec 2020 10:33:57 +0000 (11:33 +0100)]
spapr: Introduce spapr_drc_reset_all()

No need to expose the way DRCs are traversed outside of spapr_drc.c.

Signed-off-by: Greg Kurz <groug@kaod.org>
Message-Id: <20201218103400.689660-4-groug@kaod.org>
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Tested-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
3 years agospapr: Fix reset of transient DR connectors
Greg Kurz [Fri, 18 Dec 2020 10:33:56 +0000 (11:33 +0100)]
spapr: Fix reset of transient DR connectors

Documentation of object_property_iter_init() clearly stipulates that
"it is forbidden to modify the property list while iterating". But this
is exactly what we do when resetting transient DR connectors during CAS.
The call to spapr_drc_reset() can finalize the hot-unplug sequence of a
PHB or a PCI bridge, both of which will then in turn destroy their PCI
DRCs. This could potentially invalidate the iterator. It is pure luck
that this haven't caused any issues so far.

Change spapr_drc_reset() to return true if it caused a device to be
removed. Restart from scratch in this case. This can potentially
increase the overall DRC reset time, especially with a high maxmem
which generates a lot of LMB DRCs. But this kind of setup is rare,
and so is the use case of rebooting a guest while doing hot-unplug.

Signed-off-by: Greg Kurz <groug@kaod.org>
Message-Id: <20201218103400.689660-3-groug@kaod.org>
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Tested-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
3 years agospapr: Call spapr_drc_reset() for all DRCs at CAS
Greg Kurz [Fri, 18 Dec 2020 10:33:55 +0000 (11:33 +0100)]
spapr: Call spapr_drc_reset() for all DRCs at CAS

Non-transient DRCs are either in the empty or the ready state,
which means spapr_drc_reset() doesn't change their state. It
is thus not needed to do any checking. Call spapr_drc_reset()
unconditionally and squash spapr_drc_transient() into its
only user, spapr_drc_needed().

Signed-off-by: Greg Kurz <groug@kaod.org>
Message-Id: <20201218103400.689660-2-groug@kaod.org>
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Tested-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
3 years agospapr: Fix buffer overflow in spapr_numa_associativity_init()
Greg Kurz [Fri, 18 Dec 2020 13:53:24 +0000 (14:53 +0100)]
spapr: Fix buffer overflow in spapr_numa_associativity_init()

Running a guest with 128 NUMA nodes crashes QEMU:

../../util/error.c:59: error_setv: Assertion `*errp == NULL' failed.

The crash happens when setting the FWNMI migration blocker:

2861     if (spapr_get_cap(spapr, SPAPR_CAP_FWNMI) == SPAPR_CAP_ON) {
2862         /* Create the error string for live migration blocker */
2863         error_setg(&spapr->fwnmi_migration_blocker,
2864             "A machine check is being handled during migration. The handler"
2865             "may run and log hardware error on the destination");
2866     }

Inspection reveals that papr->fwnmi_migration_blocker isn't NULL:

(gdb) p spapr->fwnmi_migration_blocker
$1 = (Error *) 0x8000000004000000

Since this is the only place where papr->fwnmi_migration_blocker is
set, this means someone wrote there in our back. Further analysis
points to spapr_numa_associativity_init(), especially the part
that initializes the associative arrays for NVLink GPUs:

    max_nodes_with_gpus = nb_numa_nodes + NVGPU_MAX_NUM;

ie. max_nodes_with_gpus = 128 + 6, but the array isn't sized to
accommodate the 6 extra nodes:

struct SpaprMachineState {
    .
    .
    .
    uint32_t numa_assoc_array[MAX_NODES][NUMA_ASSOC_SIZE];

    Error *fwnmi_migration_blocker;
};

and the following loops happily overwrite spapr->fwnmi_migration_blocker,
and probably more:

    for (i = nb_numa_nodes; i < max_nodes_with_gpus; i++) {
        spapr->numa_assoc_array[i][0] = cpu_to_be32(MAX_DISTANCE_REF_POINTS);

        for (j = 1; j < MAX_DISTANCE_REF_POINTS; j++) {
            uint32_t gpu_assoc = smc->pre_5_1_assoc_refpoints ?
                                 SPAPR_GPU_NUMA_ID : cpu_to_be32(i);
            spapr->numa_assoc_array[i][j] = gpu_assoc;
        }

        spapr->numa_assoc_array[i][MAX_DISTANCE_REF_POINTS] = cpu_to_be32(i);
    }

Fix the size of the array. This requires "hw/ppc/spapr.h" to see
NVGPU_MAX_NUM. Including "hw/pci-host/spapr.h" introduces a
circular dependency that breaks the build, so this moves the
definition of NVGPU_MAX_NUM to "hw/ppc/spapr.h" instead.

Reported-by: Min Deng <mdeng@redhat.com>
BugLink: https://bugzilla.redhat.com/show_bug.cgi?id=1908693
Fixes: dd7e1d7ae431 ("spapr_numa: move NVLink2 associativity handling to spapr_numa.c")
Cc: danielhb413@gmail.com
Signed-off-by: Greg Kurz <groug@kaod.org>
Message-Id: <160829960428.734871.12634150161215429514.stgit@bahia.lan>
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
3 years agospapr: Allow memory unplug to always succeed
Greg Kurz [Mon, 14 Dec 2020 10:05:50 +0000 (11:05 +0100)]
spapr: Allow memory unplug to always succeed

It is currently impossible to hot-unplug a memory device between
machine reset and CAS.

(qemu) device_del dimm1
Error: Memory hot unplug not supported for this guest

This limitation was introduced in order to provide an explicit
error path for older guests that didn't support hot-plug event
sources (and thus memory hot-unplug).

The linux kernel has been supporting these since 4.11. All recent
enough guests are thus capable of handling the removal of a memory
device at all time, including during early boot.

Lift the limitation for the latest machine type. This means that
trying to unplug memory from a guest that doesn't support it will
likely just do nothing and the memory will only get removed at
next reboot. Such older guests can still get the existing behavior
by using an older machine type.

Signed-off-by: Greg Kurz <groug@kaod.org>
Message-Id: <160794035064.23292.17560963281911312439.stgit@bahia.lan>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
3 years agospapr: Fix DR properties of the root node
Greg Kurz [Mon, 14 Dec 2020 11:19:55 +0000 (12:19 +0100)]
spapr: Fix DR properties of the root node

Section 13.5.2 of LoPAPR mandates various DR related indentifiers
for all hot-pluggable entities to be exposed in the "ibm,drc-indexes",
"ibm,drc-power-domains", "ibm,drc-names" and "ibm,drc-types" properties
of their parent node. These properties are created with spapr_dt_drc().

PHBs and LMBs are both children of the machine. Their DR identifiers
are thus supposed to be exposed in the afore mentioned properties of
the root node.

When PHB hot-plug support was added, an extra call to spapr_dt_drc()
was introduced: this overwrites the existing properties, previously
populated with the LMB identifiers, and they end up containing only
PHB identifiers. This went unseen so far because linux doesn't care,
but this is still not conformant with LoPAPR.

Fortunately spapr_dt_drc() is able to handle multiple DR entity types
at the same time. Use that to handle DR indentifiers for PHBs and LMBs
with a single call to spapr_dt_drc(). While here also account for PMEM
DR identifiers, which were forgotten when NVDIMM hot-plug support was
added. Also add an assert to prevent further misuse of spapr_dt_drc().

With -m 1G,maxmem=2G,slots=8 passed on the QEMU command line we get:

Without this patch:

/proc/device-tree/ibm,drc-indexes
 0000001f 20000001 20000002 20000003
 20000000 20000005 20000006 20000007
 20000004 20000009 20000008 20000010
 20000011 20000012 20000013 20000014
 20000015 20000016 20000017 20000018
 20000019 2000000a 2000000b 2000000c
 2000000d 2000000e 2000000f 2000001a
 2000001b 2000001c 2000001d 2000001e

These are the DRC indexes for the 31 possible PHBs.

With this patch:

/proc/device-tree/ibm,drc-indexes
 0000002b 90000000 90000001 90000002
 90000003 90000004 90000005 90000006
 90000007 20000001 20000002 20000003
 20000000 20000005 20000006 20000007
 20000004 20000009 20000008 20000010
 20000011 20000012 20000013 20000014
 20000015 20000016 20000017 20000018
 20000019 2000000a 2000000b 2000000c
 2000000d 2000000e 2000000f 2000001a
 2000001b 2000001c 2000001d 2000001e
 80000004 80000005 80000006 80000007

And now we also have the 4 ((2G - 1G) / 256M) LMBs and the
8 (slots) PMEMs.

Fixes: 3998ccd09298 ("spapr: populate PHB DRC entries for root DT node")
Signed-off-by: Greg Kurz <groug@kaod.org>
Message-Id: <160794479566.35245.17809158217760761558.stgit@bahia.lan>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
3 years agospapr/xive: Make spapr_xive_pic_print_info() static
Cédric Le Goater [Tue, 15 Dec 2020 17:40:25 +0000 (18:40 +0100)]
spapr/xive: Make spapr_xive_pic_print_info() static

Signed-off-by: Cédric Le Goater <clg@kaod.org>
Message-Id: <20201215174025.2636824-1-clg@kaod.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
3 years agospapr: DRC lookup cannot fail
Greg Kurz [Tue, 15 Dec 2020 17:36:51 +0000 (18:36 +0100)]
spapr: DRC lookup cannot fail

All memory DRC objects are created during machine init. It is thus safe
to assume spapr_drc_by_id() cannot return NULL when hot-plug/unplugging
memory.

Make this clear with an assertion, like the code already does a few lines
above when looping over memory DRCs. This fixes Coverity reports 1437757
and 1437758.

Signed-off-by: Greg Kurz <groug@kaod.org>
Message-Id: <160805381160.228955.5388294067094240175.stgit@bahia.lan>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
3 years agohw/ppc/ppc440_bamboo: Drop use of ppcuic_init()
Peter Maydell [Sat, 12 Dec 2020 00:15:33 +0000 (00:15 +0000)]
hw/ppc/ppc440_bamboo: Drop use of ppcuic_init()

Switch the bamboo board to directly creating and configuring the UIC,
rather than doing it via the old ppcuic_init() helper function.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-Id: <20201212001537.24520-5-peter.maydell@linaro.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
3 years agohw/ppc/virtex_ml507: Drop use of ppcuic_init()
Peter Maydell [Sat, 12 Dec 2020 00:15:32 +0000 (00:15 +0000)]
hw/ppc/virtex_ml507: Drop use of ppcuic_init()

Switch the virtex_ml507 board to directly creating and
configuring the UIC, rather than doing it via the old
ppcuic_init() helper function.

This fixes a trivial Coverity-detected memory leak where
we were leaking the array of IRQs returned by ppcuic_init().

Fixes: Coverity CID 1421992
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-Id: <20201212001537.24520-4-peter.maydell@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
3 years agoppc: Convert PPC UIC to a QOM device
Peter Maydell [Sat, 12 Dec 2020 00:15:31 +0000 (00:15 +0000)]
ppc: Convert PPC UIC to a QOM device

Currently the PPC UIC ("Universal Interrupt Controller") is implemented
as a non-QOM device in ppc4xx_devs.c. Convert it to a proper QOM device
in hw/intc.

The ppcuic_init() function is retained for the moment with its current
interface; in subsequent commits this will be tidied up to avoid the
allocation of an irq array.

This conversion adds VMState support.

It leaves the LOG_UIC() macro as-is to maximise the extent to which
this is simply code-movement rather than a rewrite (in new code it
would be better to use tracepoints).

The default property values for dcr-base and use-vectors are set to
match those use by most of our boards with a UIC.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-Id: <20201212001537.24520-3-peter.maydell@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
3 years agohw/ppc/ppc4xx_devs: Make code style fixes to UIC code
Peter Maydell [Sat, 12 Dec 2020 00:15:30 +0000 (00:15 +0000)]
hw/ppc/ppc4xx_devs: Make code style fixes to UIC code

In a following commit we will move the PPC UIC implementation to
its own file in hw/intc. To prevent checkpatch complaining about that
code-motion, fix up the minor style issues first.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-Id: <20201212001537.24520-2-peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
3 years agoMerge remote-tracking branch 'remotes/philmd-gitlab/tags/mips-20210104' into staging
Peter Maydell [Tue, 5 Jan 2021 21:06:42 +0000 (21:06 +0000)]
Merge remote-tracking branch 'remotes/philmd-gitlab/tags/mips-20210104' into staging

MIPS patches queue

- Use PCI macros (Philippe Mathieu-Daudé)
- Clean up VT82C686B south bridge (BALATON Zoltan)
- Introduce clock_ticks_to_ns() (Peter Maydell)
- Add Loongson-3 machine (Huacai Chen)
- Make addresses used by bootloader unsigned (Jiaxun Yang)
- Clean fuloong2e PROM environment (Jiaxun Yang)
- Add integration test of fuloong2e booting Linux (Jiaxun Yang)

# gpg: Signature made Mon 04 Jan 2021 22:37:48 GMT
# gpg:                using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE
# gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full]
# Primary key fingerprint: FAAB E75E 1291 7221 DCFD  6BB2 E3E3 2C2C DEAD C0DE

* remotes/philmd-gitlab/tags/mips-20210104: (35 commits)
  tests/acceptance: Test boot_linux_console for fuloong2e
  hw/mips/fuloong2e: Correct cpuclock in PROM environment
  hw/mips/fuloong2e: Remove unused env entry
  hw/mips/fuloong2e: Replace faulty documentation links
  hw/mips/fuloong2e: Remove define DEBUG_FULOONG2E_INIT
  hw/mips: Use address translation helper to handle ENVP_ADDR
  hw/mips/malta: Use address translation helper to calculate bootloader_run_addr
  hw/mips: Make bootloader addresses unsigned
  docs/system: Update MIPS machine documentation
  hw/mips: Add Loongson-3 machine support
  hw/mips: Add Loongson-3 boot parameter helpers
  hw/mips: Implement fw_cfg_arch_key_name()
  hw/intc: Rework Loongson LIOINTC
  clock: Define and use new clock_display_freq()
  clock: Remove clock_get_ns()
  target/mips: Don't use clock_get_ns() in clock period calculation
  clock: Introduce clock_ticks_to_ns()
  vt82c686: Rename superio config related parts
  vt82c686: Use shorter name for local variable holding object state
  vt82c686: Remove unneeded includes and defines
  ...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
3 years agoMerge remote-tracking branch 'remotes/rth-gitlab/tags/pull-tcg-20210104' into staging
Peter Maydell [Tue, 5 Jan 2021 16:18:20 +0000 (16:18 +0000)]
Merge remote-tracking branch 'remotes/rth-gitlab/tags/pull-tcg-20210104' into staging

Fix vector clear issue.
Fix riscv host shift issue.
Add tcg_gen_bswap_tl.

# gpg: Signature made Mon 04 Jan 2021 17:16:24 GMT
# gpg:                using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F
# gpg:                issuer "richard.henderson@linaro.org"
# gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full]
# Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A  05C0 64DF 38E8 AF7E 215F

* remotes/rth-gitlab/tags/pull-tcg-20210104:
  tcg: Add tcg_gen_bswap_tl alias
  tcg/riscv: Fix illegal shift instructions
  tcg: Use memset for large vector byte replication

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
3 years agoMerge remote-tracking branch 'remotes/stefanha-gitlab/tags/tracing-pull-request'...
Peter Maydell [Tue, 5 Jan 2021 13:09:10 +0000 (13:09 +0000)]
Merge remote-tracking branch 'remotes/stefanha-gitlab/tags/tracing-pull-request' into staging

Pull request

Show trace-events filename/lineno in fmt string errors and send -d trace:help
output to stdout for consistency.

# gpg: Signature made Mon 04 Jan 2021 14:26:58 GMT
# gpg:                using RSA key 8695A8BFD3F97CDAAC35775A9CA4ABB381AB73C8
# gpg: Good signature from "Stefan Hajnoczi <stefanha@redhat.com>" [full]
# gpg:                 aka "Stefan Hajnoczi <stefanha@gmail.com>" [full]
# Primary key fingerprint: 8695 A8BF D3F9 7CDA AC35  775A 9CA4 ABB3 81AB 73C8

* remotes/stefanha-gitlab/tags/tracing-pull-request:
  tracetool: show trace-events filename/lineno in fmt string errors
  tracetool: add input filename and line number to Event
  tracetool: add out_lineno and out_next_lineno to out()
  tracetool: add output filename command-line argument
  trace: Send "-d trace:help" output to stdout

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
3 years agotests/acceptance: Test boot_linux_console for fuloong2e
Jiaxun Yang [Thu, 24 Dec 2020 03:17:50 +0000 (11:17 +0800)]
tests/acceptance: Test boot_linux_console for fuloong2e

The kernel comes from debian archive so it's trusted.

Invoking the test can be done as follows:

  $ avocado --show=app,console run -t machine:fuloong2e tests/acceptance/
   (1/1) tests/acceptance/boot_linux_console.py:BootLinuxConsole.test_mips64el_fuloong2e:
  console: [    0.000000] Initializing cgroup subsys cpuset
  console: [    0.000000] Initializing cgroup subsys cpu
  console: [    0.000000] Initializing cgroup subsys cpuacct
  console: [    0.000000] Linux version 3.16.0-6-loongson-2e (debian-kernel@lists.debian.org) (gcc version 4.8.4 (Debian 4.8.4-1) ) #1 Debian 3.16.56-1+deb8u1 (2018-05-08)
  console: [    0.000000] memsize=256, highmemsize=0
  console: [    0.000000] CpuClock = 533080000
  console: [    0.000000] bootconsole [early0] enabled
  console: [    0.000000] CPU0 revision is: 00006302 (ICT Loongson-2)
  console: [    0.000000] FPU revision is: 00000501
  console: [    0.000000] Checking for the multiply/shift bug... no.
  console: [    0.000000] Checking for the daddiu bug... no.
  console: [    0.000000] Determined physical RAM map:
  console: [    0.000000]  memory: 0000000010000000 @ 0000000000000000 (usable)
  console: [    0.000000]  memory: 0000000004000000 @ 0000000010000000 (reserved)
  console: [    0.000000]  memory: 0000000003ffffff @ 000000001c000001 (reserved)
  console: [    0.000000] Initrd not found or empty - disabling initrd
  console: [    0.000000] Zone ranges:
  console: [    0.000000]   DMA      [mem 0x00000000-0x00ffffff]
  console: [    0.000000]   Normal   [mem 0x01000000-0x0fffffff]
  console: [    0.000000] Movable zone start for each node
  console: [    0.000000] Early memory node ranges
  console: [    0.000000]   node   0: [mem 0x00000000-0x0fffffff]
  console: [    0.000000] Reserving 0MB of memory at 0MB for crashkernel
  console: [    0.000000] Primary instruction cache 64kB, VIPT, direct mapped, linesize 32 bytes.
  console: [    0.000000] Primary data cache 64kB, 4-way, VIPT, no aliases, linesize 32 bytes
  console: [    0.000000] Unified secondary cache 512kB 4-way, linesize 32 bytes.
  console: [    0.000000] Built 1 zonelists in Zone order, mobility grouping on.  Total pages: 16327
  console: [    0.000000] Kernel command line: printk.time=0 console=ttyS0
  PASS (2.27 s)

Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Reviewed-by: Wainer dos Santos Moschetta <wainersm@redhat.com>
Reviewed-by: Willian Rampazzo <willianr@redhat.com>
Reviewed-by: Huacai Chen <chenhuacai@kernel.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20201224031750.52146-9-jiaxun.yang@flygoat.com>
[PMD: Added command line example]
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
3 years agohw/mips/fuloong2e: Correct cpuclock in PROM environment
Jiaxun Yang [Thu, 24 Dec 2020 03:17:48 +0000 (11:17 +0800)]
hw/mips/fuloong2e: Correct cpuclock in PROM environment

Missed in 3ca7639ff00 ("hw/mips/fuloong2e: Set CPU frequency
to 533 MHz"), we need to tell the kernel the correct clock.

Fixes: 3ca7639ff00 ("hw/mips/fuloong2e: Set CPU frequency to 533 MHz").
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Reviewed-by: Huacai Chen <chenhuacai@kernel.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20201224031750.52146-7-jiaxun.yang@flygoat.com>
[PMD: Reworded]
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
3 years agohw/mips/fuloong2e: Remove unused env entry
Jiaxun Yang [Thu, 24 Dec 2020 03:17:47 +0000 (11:17 +0800)]
hw/mips/fuloong2e: Remove unused env entry

modetty is not handled by kernel and the parameter
here seems unreasonable.

Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Message-Id: <20201224031750.52146-6-jiaxun.yang@flygoat.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
[PMD: Do not remove busclock]
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
3 years agohw/mips/fuloong2e: Replace faulty documentation links
Jiaxun Yang [Thu, 24 Dec 2020 03:17:44 +0000 (11:17 +0800)]
hw/mips/fuloong2e: Replace faulty documentation links

Websites are downing, but GitHub may last forever.
Loongson even doesn't recogonize 2E as their products nowadays..

Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Huacai Chen <chenhuacai@kernel.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20201224031750.52146-3-jiaxun.yang@flygoat.com>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
3 years agohw/mips/fuloong2e: Remove define DEBUG_FULOONG2E_INIT
Jiaxun Yang [Thu, 24 Dec 2020 03:17:43 +0000 (11:17 +0800)]
hw/mips/fuloong2e: Remove define DEBUG_FULOONG2E_INIT

Seems useless....

Fixes: 051c190bce5 ("MIPS: Initial support of fulong mini pc (machine construction)")
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Huacai Chen <chenhuacai@kernel.org>
Message-Id: <20201224031750.52146-2-jiaxun.yang@flygoat.com>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
3 years agohw/mips: Use address translation helper to handle ENVP_ADDR
Jiaxun Yang [Tue, 15 Dec 2020 06:41:55 +0000 (14:41 +0800)]
hw/mips: Use address translation helper to handle ENVP_ADDR

It will signed extend vaddr properly.

Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20201215064200.28751-4-jiaxun.yang@flygoat.com>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
3 years agohw/mips/malta: Use address translation helper to calculate bootloader_run_addr
Jiaxun Yang [Tue, 15 Dec 2020 06:41:54 +0000 (14:41 +0800)]
hw/mips/malta: Use address translation helper to calculate bootloader_run_addr

So it will sign extend adresses properly.

Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20201215064200.28751-3-jiaxun.yang@flygoat.com>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
3 years agohw/mips: Make bootloader addresses unsigned
Jiaxun Yang [Tue, 15 Dec 2020 06:41:53 +0000 (14:41 +0800)]
hw/mips: Make bootloader addresses unsigned

Address should be unsigned anyway, otherwise it may carry
calculations wrongly.

Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20201215064200.28751-2-jiaxun.yang@flygoat.com>
[PMD: Fixed typo and convert hw/mips/mipssim.c too]
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
3 years agodocs/system: Update MIPS machine documentation
Huacai Chen [Mon, 21 Dec 2020 11:05:38 +0000 (19:05 +0800)]
docs/system: Update MIPS machine documentation

Update MIPS machine documentation to add Loongson-3 based machine description.

Signed-off-by: Huacai Chen <chenhuacai@kernel.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20201221110538.3186646-6-chenhuacai@kernel.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
3 years agohw/mips: Add Loongson-3 machine support
Huacai Chen [Mon, 27 Apr 2020 09:33:14 +0000 (17:33 +0800)]
hw/mips: Add Loongson-3 machine support

Add Loongson-3 based machine support, it use liointc as the interrupt
controler and use GPEX as the pci controller. Currently it can work with
both TCG and KVM.

As the machine model is not based on any exiting physical hardware, the
name of the machine is "loongson3-virt". It may be superseded in future
by a real machine model. If this happens, then a regular deprecation
procedure shall occur for "loongson3-virt" machine.

We now already have a full functional Linux kernel (based on Linux-5.4.x
LTS) here:

https://github.com/chenhuacai/linux

Of course the upstream kernel is also usable (the kvm host side and
guest side have both been upstream in Linux-5.9):

https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git

How to use QEMU/Loongson-3?
1, Download kernel source from the above URL;
2, Build a kernel with arch/mips/configs/loongson3_defconfig;
3, Boot a Loongson-3A4000 host with this kernel (for KVM mode);
4, Build QEMU-master with this patchset;
5, modprobe kvm (only necessary for KVM mode);
6, Use QEMU with TCG:
       qemu-system-mips64el -M loongson3-virt,accel=tcg -cpu Loongson-3A1000 -kernel <path_to_kernel> -append ...
   Use QEMU with KVM:
       qemu-system-mips64el -M loongson3-virt,accel=kvm -cpu Loongson-3A4000 -kernel <path_to_kernel> -append ...

   The "-cpu" parameter is optional here and QEMU will use the correct type for TCG/KVM automatically.

Co-developed-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Signed-off-by: Huacai Chen <chenhuacai@kernel.org>
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Message-Id: <20201221110538.3186646-5-chenhuacai@kernel.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
[PMD: Set TYPE_LOONGSON_MACHINE instance_size in TypeInfo,
      select FW_CFG_MIPS in Kconfig]
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>