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Hiroshi Inoue [Mon, 29 Jan 2018 05:17:03 +0000 (05:17 +0000)]
[NFC] fix trivial typos in comments and documents
"to to" -> "to"
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323628
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Florian Hahn [Sun, 28 Jan 2018 19:11:49 +0000 (19:11 +0000)]
[InlineCost] Mark functions accessing varargs as not viable.
This prevents functions accessing varargs from being inlined if they
have the alwaysinline attribute.
Reviewers: efriedma, rnk, davide
Reviewed By: efriedma
Differential Revision: https://reviews.llvm.org/D42556
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323619
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Jonas Devlieghere [Sun, 28 Jan 2018 11:05:10 +0000 (11:05 +0000)]
[Support] Move DJB hash to support. NFC
This patch moves the DJB hash to support. This is consistent with other
hashing algorithms living there. The hash is used by the DWARF
accelerator tables. We're doing this now because the hashing function is
needed by dsymutil and we don't want to link against libBinaryFormat.
Differential revision: https://reviews.llvm.org/D42594
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323616
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Craig Topper [Sun, 28 Jan 2018 07:29:35 +0000 (07:29 +0000)]
[X86] Fix a crash that can occur in combineExtractVectorElt due to not checking the width of a ConstantSDNode before calling getConstantOperandVal.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323614
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Craig Topper [Sun, 28 Jan 2018 00:56:30 +0000 (00:56 +0000)]
[X86] Remove VPTESTM/VPTESTNM ISD opcodes. Use isel patterns matching cmpm eq/ne with immallzeros.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323612
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Craig Topper [Sat, 27 Jan 2018 23:49:14 +0000 (23:49 +0000)]
[X86] Add patterns for using masked vptestnmd for 256-bit vectors without VLX.
We can widen the mask and extract it back down.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323610
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Craig Topper [Sat, 27 Jan 2018 23:49:11 +0000 (23:49 +0000)]
[X86] Add test to demonstrate missed opportunity to merge kand into testnm when using 512-bit instruction due to lack of VLX.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323609
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Justin Bogner [Sat, 27 Jan 2018 23:31:09 +0000 (23:31 +0000)]
Add triples or specify REQUIRES: default_triple to some tests
These were all failing when building the X86 backend but specifying
LLVM_DEFAULT_TARGET_TRIPLE=''.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323608
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Simon Pilgrim [Sat, 27 Jan 2018 22:08:27 +0000 (22:08 +0000)]
[X86][AVX512] Add avx512dq fp2int/int2fp tests (PR31630)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323607
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Craig Topper [Sat, 27 Jan 2018 20:19:09 +0000 (20:19 +0000)]
[X86] Use vptestm/vptestnm for comparisons with zero to avoid creating a zero vector.
We can use the same input for both operands to get a free compare with zero.
We already use this trick in a couple places where we explicitly create PTESTM with the same input twice. This generalizes it.
I'm hoping to remove the ISD opcodes and move this to isel patterns like we do for scalar cmp/test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323605
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Craig Topper [Sat, 27 Jan 2018 20:19:02 +0000 (20:19 +0000)]
[X86] Remove X86ISD::PCMPGTM/PCMPEQM and instead just use X86ISD::PCMPM and pattern match the immediate value during isel.
Legalization is still biased to turn LT compares in to GT by swapping operands to avoid needing extra isel patterns to commute.
I'm hoping to remove TESTM/TESTNM next and this should simplify that by making EQ/NE more similar.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323604
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Simon Pilgrim [Sat, 27 Jan 2018 19:49:46 +0000 (19:49 +0000)]
Regenerate test. NFCI
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323603
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Simon Pilgrim [Sat, 27 Jan 2018 19:48:13 +0000 (19:48 +0000)]
[X86][SSE] Simplify demanded elements from BROADCAST shuffle source.
If broadcasting from another shuffle, attempt to simplify it.
We can probably generalize this a lot more (embedding in combineX86ShufflesRecursively), but BROADCAST is one of the more troublesome as it accepts inputs of different sizes to the result.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323602
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Daniel Neilson [Sat, 27 Jan 2018 17:59:10 +0000 (17:59 +0000)]
Add IRBuilder API to create memcpy/memmove calls with differing source and dest alignments
Summary:
This change is step two in the series of changes to remove alignment argument from
memcpy/memmove/memset in favour of alignment attributes. Steps:
Step 1) Remove alignment parameter and create alignment parameter attributes for
memcpy/memmove/memset. ( rL322965 )
Step 2) Expand the IRBuilder API to allow creation of memcpy/memmove with differing
source and dest alignments.
Step 3) Update Clang to use the new IRBuilder API.
Step 4) Update Polly to use the new IRBuilder API.
Step 5) Update LLVM passes that create memcpy/memmove calls to use the new IRBuilder API,
and those that use use MemIntrinsicInst::[get|set]Alignment() to use
getDestAlignment() and getSourceAlignment() instead.
Step 6) Remove the single-alignment IRBuilder API for memcpy/memmove, and the
MemIntrinsicInst::[get|set]Alignment() methods.
Reference
http://lists.llvm.org/pipermail/llvm-dev/2015-August/089384.html
http://lists.llvm.org/pipermail/llvm-commits/Week-of-Mon-
20151109/312083.html
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323597
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Amaury Sechet [Sat, 27 Jan 2018 17:52:32 +0000 (17:52 +0000)]
Regenerate test result for vastart-defs-eflags.ll. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323596
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Amaury Sechet [Sat, 27 Jan 2018 17:19:16 +0000 (17:19 +0000)]
Regenerate test result for testb-je-fusion.ll. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323595
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Amaury Sechet [Sat, 27 Jan 2018 17:16:26 +0000 (17:16 +0000)]
Regenerate test result for stateppint-vector.ll. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323594
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Amaury Sechet [Sat, 27 Jan 2018 16:57:15 +0000 (16:57 +0000)]
Regenrate brcond.ll test results. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323593
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Amaury Sechet [Sat, 27 Jan 2018 16:44:00 +0000 (16:44 +0000)]
Regenrate test results for avx-brcond.ll . NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323592
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Simon Pilgrim [Sat, 27 Jan 2018 16:39:12 +0000 (16:39 +0000)]
[X86][SSE] Regenerate fp2int/int2fp tests
Cleanup check prefixes and check full codegen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323591
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Amaury Sechet [Sat, 27 Jan 2018 16:00:10 +0000 (16:00 +0000)]
Regenerate test results for and-su.ll . NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323588
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Simon Pilgrim [Sat, 27 Jan 2018 15:54:57 +0000 (15:54 +0000)]
[X86][SSE] Add broadcast from v2i32 memory tests (PR34394)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323587
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Craig Topper [Sat, 27 Jan 2018 09:10:58 +0000 (09:10 +0000)]
[TargetLowering] Teach TargetLowering::SimplifySetCC to simplify setcc of vXi1 vectors into logic ops.
This transform was already being done for setcc of scalar i1. This extends it to vectors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323585
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Craig Topper [Sat, 27 Jan 2018 08:41:03 +0000 (08:41 +0000)]
[SelectionDAG] Make DAGTypeLegalizer::PromoteSetCCOperands handle SETEQ/SETNE correctly for vector types.
The code was using getValueSizeInBits and combining with the result of a call to DAG.ComputeNumSignBits. But for vector types getValueSizeInBits returns the width of the full vector while ComputeNumSignBits is going to give a number no larger than the width of a single element. So we should be using getScalarValueSizeInBits to get the element width.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323583
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Amara Emerson [Sat, 27 Jan 2018 07:07:20 +0000 (07:07 +0000)]
[GlobalISel][Legalizer] Convert the FP constants to the right APFloat type for G_FCONSTANT.
We weren't converting the immediate ConstantFP during legalization, which caused
the wrong bit patterns to be emitted for half type FP constants.
Fixes PR36106.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323582
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Alexey Bataev [Sat, 27 Jan 2018 02:42:21 +0000 (02:42 +0000)]
Revert "[SLP] Fix for PR32086: Count InsertElementInstr of the same elements as shuffle."
This reverts commit r323530 to fix possible problems in users code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323581
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Alexey Bataev [Sat, 27 Jan 2018 02:42:17 +0000 (02:42 +0000)]
Revert "[SLP] Removed the warning about unused variable, NFC."
This reverts commit r323533 to fix possible problems in users code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323580
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Vedant Kumar [Sat, 27 Jan 2018 00:01:04 +0000 (00:01 +0000)]
[InstrProfiling] Don't exit early when an unused intrinsic is found
This fixes a think-o in r323574.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323576
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Vedant Kumar [Fri, 26 Jan 2018 23:54:25 +0000 (23:54 +0000)]
[LangRef] Update out-of-date instrprof names
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323575
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Vedant Kumar [Fri, 26 Jan 2018 23:54:24 +0000 (23:54 +0000)]
[InstrProfiling] Improve compile time when there is no work
When there are no uses of profiling intrinsics in a module, and there's
no coverage data to lower, InstrProfiling has no work to do.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323574
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Justin Bogner [Fri, 26 Jan 2018 22:56:31 +0000 (22:56 +0000)]
update_mir_test_checks: Accept "." in function names
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323573
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Craig Topper [Fri, 26 Jan 2018 22:17:40 +0000 (22:17 +0000)]
[X86] Use vpternlog to implement vector not under AVX512.
Previously we had to materialize all 1s in a register using vpternlog or pcmpeq and then xor with that. By using vpternlog directly we can do it in one operation.
This is implemented using isel patterns, but we should maybe consider creating a generalized vpternlog combiner.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323572
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Sanjay Patel [Fri, 26 Jan 2018 22:06:07 +0000 (22:06 +0000)]
[x86] auto-generate complete checks; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323571
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Vedant Kumar [Fri, 26 Jan 2018 22:02:52 +0000 (22:02 +0000)]
[InstCombine] Preserve debug values for eliminable casts
A cast from A to B is eliminable if its result is casted to C, and if
the pair of casts could just be expressed as a single cast. E.g here,
%c1 is eliminable:
%c1 = zext i16 %A to i32
%c2 = sext i32 %c1 to i64
InstCombine optimizes away eliminable casts. This patch teaches it to
insert a dbg.value intrinsic pointing to the final result, so that local
variables pointing to the eliminable result are preserved.
Differential Revision: https://reviews.llvm.org/D42566
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323570
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Richard Trieu [Fri, 26 Jan 2018 21:55:13 +0000 (21:55 +0000)]
Inline variable only used within assert.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323569
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Krzysztof Parzyszek [Fri, 26 Jan 2018 21:54:56 +0000 (21:54 +0000)]
[Hexagon] Generate constant splats instead of loads from constant pool
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323568
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Wolfgang Pieb [Fri, 26 Jan 2018 21:24:22 +0000 (21:24 +0000)]
[DWARF] Temporarily removing test to make buildbots happy while investigating.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323564
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Krzysztof Parzyszek [Fri, 26 Jan 2018 21:20:04 +0000 (21:20 +0000)]
[Hexagon] Make sure that offset on globals matches alignment requirements
A correctly aligned address may happen to be separated into a variable
part and a constant part, where the constant part does not match the
alignment needed in a load/store that uses this address. Such a constant
cannot be used as an immediate offset in an indexed instruction.
When lowering a global address, make sure that if there is an offset
folded into the global, the offset is valid for all uses in load/store
instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323562
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Krzysztof Parzyszek [Fri, 26 Jan 2018 21:17:14 +0000 (21:17 +0000)]
[Hexagon] Replace multiple vector extracts with store-load combinations
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323561
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Wolfgang Pieb [Fri, 26 Jan 2018 20:47:24 +0000 (20:47 +0000)]
[DWARF] Temporarily removing a test that caused an independent failure on the mingw target.
Will recommit once that is addressed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323560
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Eli Friedman [Fri, 26 Jan 2018 20:23:00 +0000 (20:23 +0000)]
[LivePhysRegs] Preserve pristine regs in blocks with no successors.
One common source of blocks with no successors is calls to noreturn
functions; we want to preserve pristine registers in case they throw an
exception.
The whole pristine register thing is messy (we should really prefer to
explicitly model registers), but this fills a hole in the model for now.
Fixes https://bugs.llvm.org/show_bug.cgi?id=36073.
Differential Revision: https://reviews.llvm.org/D42509
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323559
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Benjamin Kramer [Fri, 26 Jan 2018 20:21:02 +0000 (20:21 +0000)]
[Support] Move PrintEscapedString into the library its declaration is in
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323558
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Benjamin Kramer [Fri, 26 Jan 2018 20:16:43 +0000 (20:16 +0000)]
[X86] Unbreak the build.
X86ISelLowering.cpp:34130:5: error: return type 'llvm::SDValue' must
match previous return type 'const llvm::SDValue' when lambda expression
has unspecified explicit return type
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323557
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Alexey Bataev [Fri, 26 Jan 2018 20:07:55 +0000 (20:07 +0000)]
[SLP] Test for trunc vectorization, NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323556
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Craig Topper [Fri, 26 Jan 2018 20:02:52 +0000 (20:02 +0000)]
[X86] Allow any_extend to be combined with setcc on VLX targets.
For VLX target getSetccResultType returns vXi1 which prevents the target independent DAG combine from doing this tranform itself.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323555
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Simon Pilgrim [Fri, 26 Jan 2018 20:01:12 +0000 (20:01 +0000)]
[X86][AVX512] Add combining support for X86ISD::VTRUNCS
Similar to the existing support for X86ISD::VTRUNCUS.
Differential Revision: https://reviews.llvm.org/D42544
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323553
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Craig Topper [Fri, 26 Jan 2018 19:34:20 +0000 (19:34 +0000)]
[SelectionDAGISel] Add a debug print before call to Select. Adjust where blank lines are printed during isel process to make things more sensibly grouped.
Previously some targets printed their own message at the start of Select to indicate what they were selecting. For the targets that didn't, it means there was no print of the root node before any custom handling in the target executed. So if the target did something custom and never called SelectNodeCommon, no print would be made. For the targets that did print a message in Select, if they didn't custom handle a node SelectNodeCommon would reprint the root node before walking the isel table.
It seems better to just print the message before the call to Select so all targets behave the same. And then remove the root node printing from SelectNodeCommon and just leave a message that says we're starting the table search.
There were also some oddities in blank line behavior. Usually due to a \n after a call to SelectionDAGNode::dump which already inserted a new line.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323551
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Craig Topper [Fri, 26 Jan 2018 19:34:14 +0000 (19:34 +0000)]
[X86] Add 'rdrnd' feature to silvermont to match recent gcc bug fix.
gcc recently fixed this bug https://gcc.gnu.org/bugzilla/show_bug.cgi?id=83546
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323550
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Krzysztof Parzyszek [Fri, 26 Jan 2018 19:20:50 +0000 (19:20 +0000)]
[Hexagon] Fix an incorrect assertion in HexagonConstExtenders
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323548
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Wolfgang Pieb [Fri, 26 Jan 2018 18:52:58 +0000 (18:52 +0000)]
[DWARF] Generate DWARF v5 string offsets tables along with strx* index forms.
Summary: This is the producer side for DWARF v5 string offsets tables. The reader/consumer
side was committed with r321295. All compile and type units in a module share a
contribution to the string offsets table. Indirect strings use the strx{1,2,3,4} index forms.
Reviewers: dblaikie, aprantl, JDevliegehere
Differential Revision: https://reviews.llvm.org/D42021
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323546
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Sanjay Patel [Fri, 26 Jan 2018 18:44:32 +0000 (18:44 +0000)]
[x86] fix typo in comment; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323545
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Matt Davis [Fri, 26 Jan 2018 18:43:57 +0000 (18:43 +0000)]
[NFC] Remove apostrophe to use 'it' in the possessive form.
Summary: This is a simple change to test commit access with.
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D42586
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323544
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Simon Pilgrim [Fri, 26 Jan 2018 17:19:59 +0000 (17:19 +0000)]
[X86][AVX] LowerBUILD_VECTORAsVariablePermute - add support for VPERMILPV to v4i32/v4f32
Extension to D42431, adding support for v4i32/v4f32 as well as v2i64/v2f64 now that D42308 has landed
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323542
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Simon Pilgrim [Fri, 26 Jan 2018 17:11:34 +0000 (17:11 +0000)]
[X86][SSE] Don't colaesce v4i32 extracts
We currently coalesce v4i32 extracts from all 4 elements to 2 v2i64 extracts + shifts/sign-extends.
This seems to have been added back in the days when we tended to spill vectors and reload scalars, or ended up with repeated shuffles moving everything down to 0'th index. I don't think either of these are likely these days as we have better EXTRACT_VECTOR_ELT and VECTOR_SHUFFLE handling, and the existing code tends to make it very difficult for various vector and load combines.
Differential Revision: https://reviews.llvm.org/D42308
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323541
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Simon Pilgrim [Fri, 26 Jan 2018 16:57:36 +0000 (16:57 +0000)]
[X86][SSE] Drop PMADDWD in lowerMul
As mentioned in D42258, we don't need this any more
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323540
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Nirav Dave [Fri, 26 Jan 2018 16:51:27 +0000 (16:51 +0000)]
[DAG] Teach findBaseOffset to interpret indexes of indexed memory operations
Indexed outputs are addition / subtractions and can be interpreted as such.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323539
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Dmitry Preobrazhensky [Fri, 26 Jan 2018 16:42:51 +0000 (16:42 +0000)]
[AMDGPU][MC] Added validation of image dst/data size (must match dmask and tfe)
See bug 36000: https://bugs.llvm.org/show_bug.cgi?id=36000
Differential Revision: https://reviews.llvm.org/D42483
Reviewers: vpykhtin, artem.tamazov, arsenm
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323538
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Alexander Richardson [Fri, 26 Jan 2018 15:56:14 +0000 (15:56 +0000)]
[MIPS] Don't crash on unsized extern types with -mgpopt
Summary: This fixes an assertion when building the FreeBSD MIPS64 kernel.
Reviewers: atanasyan, sdardis, emaste
Reviewed By: sdardis
Subscribers: krytarowski, llvm-commits
Differential Revision: https://reviews.llvm.org/D42571
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323536
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Simon Pilgrim [Fri, 26 Jan 2018 15:50:20 +0000 (15:50 +0000)]
[DAGCombine] reduceBuildVecToShuffle - ensure EXTRACT_VECTOR_ELT index is in range
From OSS Fuzz Test Case #5688
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323535
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Dmitry Preobrazhensky [Fri, 26 Jan 2018 15:43:29 +0000 (15:43 +0000)]
[AMDGPU][MC] Added support of 64-bit image atomics
See bug 35998: https://bugs.llvm.org/show_bug.cgi?id=35998
Differential Revision: https://reviews.llvm.org/D42469
Reviewers: vpykhtin, artem.tamazov, arsenm
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323534
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Alexey Bataev [Fri, 26 Jan 2018 15:34:44 +0000 (15:34 +0000)]
[SLP] Removed the warning about unused variable, NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323533
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Simon Pilgrim [Fri, 26 Jan 2018 14:58:50 +0000 (14:58 +0000)]
[X86][SSE] Add tests for vector truncation with PACKUS style signed saturation
PACKUS - truncates signed value, saturating to [0,unsigned_max_trunc]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323531
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Alexey Bataev [Fri, 26 Jan 2018 14:31:09 +0000 (14:31 +0000)]
[SLP] Fix for PR32086: Count InsertElementInstr of the same elements as shuffle.
Summary:
If the same value is going to be vectorized several times in the same
tree entry, this entry is considered to be a gather entry and cost of
this gather is counter as cost of InsertElementInstrs for each gathered
value. But we can consider these elements as ShuffleInstr with
SK_PermuteSingle shuffle kind.
Reviewers: spatel, RKSimon, mkuper, hfinkel
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D38697
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323530
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Dmitry Preobrazhensky [Fri, 26 Jan 2018 14:07:38 +0000 (14:07 +0000)]
[AMDGPU][MC] Enabled disassembler for image atomic operations
See bug 35988: https://bugs.llvm.org/show_bug.cgi?id=35988
Differential Revision: https://reviews.llvm.org/D42186
Reviewers: vpykhtin, artem.tamazov, arsenm
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323527
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Simon Pilgrim [Fri, 26 Jan 2018 14:00:01 +0000 (14:00 +0000)]
[X86] Cleanup SDLoc arguments as mentioned on D42544
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323526
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Clement Courbet [Fri, 26 Jan 2018 13:21:43 +0000 (13:21 +0000)]
[TableGen][NFC]Remove dead variable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323525
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Francis Visoiu Mistrih [Fri, 26 Jan 2018 11:47:28 +0000 (11:47 +0000)]
[MIR] Add support for addrspace in MIR
Add support for printing / parsing the addrspace of a MachineMemOperand.
Fixes PR35970.
Differential Revision: https://reviews.llvm.org/D42502
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323521
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Daniil Fukalov [Fri, 26 Jan 2018 11:09:38 +0000 (11:09 +0000)]
[AMDGPU] fix LDS f32 intrinsics
- using qualified pointer addrspace in intrinsics class to avoid .f32 mangling
- changed too common atomic mangling to ds
- added missing intrinsics to AMDGPUTTIImpl::getTgtMemIntrinsic
Reviewed by: b-sumner
Differential Revision: https://reviews.llvm.org/D42383
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323516
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Florian Hahn [Fri, 26 Jan 2018 10:36:50 +0000 (10:36 +0000)]
[CallSiteSplitting] Fix infinite loop when recording conditions.
Fix infinite loop when recording conditions by correctly marking basic
blocks as visited.
Fixes https://bugs.llvm.org/show_bug.cgi?id=36105
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323515
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Momchil Velikov [Fri, 26 Jan 2018 10:20:58 +0000 (10:20 +0000)]
[ARM] Accept a subset of Thumb GPR register class when emitting an SP-relative
load instruction
The function `Thumb1InstrInfo::loadRegFromStackSlot` accepts only the `tGPR`
register class. The function serves to emit a `tLDRspi` instruction and
certainly any subset of the `tGPR` register class is a valid destination of the
load.
Differential revision: https://reviews.llvm.org/D42535
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323514
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Andrei Elovikov [Fri, 26 Jan 2018 09:50:32 +0000 (09:50 +0000)]
[X86FixupBWInsts] Prefer positive checks in the test. NFC
Reviewers: andrew.w.kaylor, craig.topper, MatzeB
Reviewed By: andrew.w.kaylor
Subscribers: aivchenk, llvm-commits
Differential Revision: https://reviews.llvm.org/D42531
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323513
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Sjoerd Meijer [Fri, 26 Jan 2018 09:26:40 +0000 (09:26 +0000)]
[ARM] Armv8.2-A FP16 code generation (part 1/3)
This is the groundwork for Armv8.2-A FP16 code generation .
Clang passes and returns _Float16 values as floats, together with the required
bitconverts and truncs etc. to implement correct AAPCS behaviour, see D42318.
We will implement half-precision argument passing/returning lowering in the ARM
backend soon, but for now this means that this:
_Float16 sub(_Float16 a, _Float16 b) {
return a + b;
}
gets lowered to this:
define float @sub(float %a.coerce, float %b.coerce) {
entry:
%0 = bitcast float %a.coerce to i32
%tmp.0.extract.trunc = trunc i32 %0 to i16
%1 = bitcast i16 %tmp.0.extract.trunc to half
<SNIP>
%add = fadd half %1, %3
<SNIP>
}
When FullFP16 is *not* supported, we don't make f16 a legal type, and we get
legalization for "free", i.e. nothing changes and everything works as before.
And also f16 argument passing/returning is handled.
When FullFP16 is supported, we do make f16 a legal type, and have 2 places that
we need to patch up: f16 argument passing and returning, which involves minor
tweaks to avoid unnecessary code generation for some bitcasts.
As a "demonstrator" that this works for the different FP16, FullFP16, softfp
modes, etc., I've added match rules to the VSUB instruction description showing
that we can codegen this instruction from IR, but more importantly, also to
some conversion instructions. These conversions were causing issue before in
the FP16 and FullFP16 cases.
I've also added match rules to the VLDRH and VSTRH desriptions, so that we can
actually compile the entire half-precision sub code example above. This showed
that these loads and stores had the wrong addressing mode specified: AddrMode5
instead of AddrMode5FP16, which turned out not be implemented at all, so that
has also been added.
This is the minimal patch that shows all the different moving parts. In patch
2/3 I will add some efficient lowering of bitcasts, and in 2/3 I will add the
remaining Armv8.2-A FP16 instruction descriptions.
Thanks to Sam Parker and Oliver Stannard for their help and reviews!
Differential Revision: https://reviews.llvm.org/D38315
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323512
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Hiroshi Inoue [Fri, 26 Jan 2018 08:15:29 +0000 (08:15 +0000)]
[NFC] fix trivial typos in comments and documents
"in in" -> "in", "on on" -> "on" etc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323508
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Shiva Chen [Fri, 26 Jan 2018 07:53:07 +0000 (07:53 +0000)]
[RISCV] Encode RISCV specific ELF e_flags to RISCV Binary by RISCVTargetStreamer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323507
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Craig Topper [Fri, 26 Jan 2018 07:30:44 +0000 (07:30 +0000)]
[X86] Remove dead code from LowerBUILD_VECTOR that tried to handle i64 element type in 32-bit mode.
Type legalization would prevent any i64 operands to the build_vector from existing before we get here. The coverage bots show this code as uncovered.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323506
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Craig Topper [Fri, 26 Jan 2018 07:15:22 +0000 (07:15 +0000)]
[SelectionDAG] Replace a std::vector<SDValue> with a SmallVector.
It likely the number of elements in the type we're legalizing here is reasonably small.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323505
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Craig Topper [Fri, 26 Jan 2018 07:15:21 +0000 (07:15 +0000)]
[X86] Remove code from combineBitcastvxi1 that was needed to support the previous native IR for kunpck intrinsics.
The original autoupgrade for kunpck intrinsics used a bitcasted scalar shift, or, and. This combine would turn this into a concat_vectors. Now the kunpck intrinsics are autoupgraded to a vector shuffle that will become a concat_vectors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323504
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Craig Topper [Fri, 26 Jan 2018 07:15:20 +0000 (07:15 +0000)]
[X86] Remove unused intrinsic type handling. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323503
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Craig Topper [Fri, 26 Jan 2018 07:15:18 +0000 (07:15 +0000)]
[X86] Simplify condition in VSETCC. NFC
This listed all legal 128-bit integer types individually, but since we already know we have a legal type and its integer, we can just check is128BitVector.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323502
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Craig Topper [Fri, 26 Jan 2018 07:15:17 +0000 (07:15 +0000)]
[X86] Remove LowerVSETCC code for handling vXi1 setcc with vXi8/vXi16 input type. NFC
These kinds of setccs are promoted by a DAG combine before they ever get to legalization.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323501
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Craig Topper [Fri, 26 Jan 2018 07:15:16 +0000 (07:15 +0000)]
[X86] Remove some dead code from LowerVSETCC. NFC
This code was added in r321967, but ultimately I fixed the issue in the legalizer and this code was no longer required.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323500
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Serguei Katkov [Fri, 26 Jan 2018 06:26:56 +0000 (06:26 +0000)]
[CGP] Re-enable Select in complex addressing mode.
Switch Select handling on after fixing two bugs: rL323192 and rL323497.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323498
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Serguei Katkov [Fri, 26 Jan 2018 04:49:26 +0000 (04:49 +0000)]
[X86] Fix killed flag handling in X86FixupLea pass
When pass creates a MOV instruction for
lea (%base,%index,1), %dst => mov %base,%dst; add %index,%dst
modification it should clean the killed flag for base
if base is equal to index.
Otherwise verifier complains about usage of killed register in add instruction.
Reviewers: lsaba, zvi, zansari, aaboud
Reviewed By: lsaba
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D42522
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323497
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Jake Ehrlich [Fri, 26 Jan 2018 02:01:37 +0000 (02:01 +0000)]
Reland "[llvm-objcopy] Refactor llvm-objcopy to use reader and writer objects"
Somehow I reverted changes I made in a previous Reland. This change re-relands
unconfusing a varible name with a type name.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323494
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Jake Ehrlich [Fri, 26 Jan 2018 01:48:12 +0000 (01:48 +0000)]
Reland "[llvm-objcopy] Refactor llvm-objcopy to use reader and writer objects"
I had more unused varibles. This change removes those to get rid of warnings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323493
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Jake Ehrlich [Fri, 26 Jan 2018 01:17:35 +0000 (01:17 +0000)]
Reland "[llvm-objcopy] Refactor llvm-objcopy to use reader and writer objects"
Added line to output the proper files in the output to binary case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323489
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Aditya Nandakumar [Fri, 26 Jan 2018 00:50:56 +0000 (00:50 +0000)]
Fix buildfailure by making some MIPatternMatchers inline
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323487
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Jake Ehrlich [Fri, 26 Jan 2018 00:38:30 +0000 (00:38 +0000)]
Revert "Reland "[llvm-objcopy] Refactor llvm-objcopy to use reader and writer objects""
Tests were working on my system because the old correct files were left over
and the new bug was that the output files were not being output at all.
Consequently the test work on my system but fail on any other system.
This reverts commit r323484.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323486
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Jake Ehrlich [Fri, 26 Jan 2018 00:19:30 +0000 (00:19 +0000)]
Reland "[llvm-objcopy] Refactor llvm-objcopy to use reader and writer objects"
I named a varible the same as a type which caused a warning. I also had unamed varibles.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323484
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Shoaib Meenai [Fri, 26 Jan 2018 00:15:25 +0000 (00:15 +0000)]
[CodeGen] Ignore private symbols in llvm.used for COFF
Similar to the existing handling for internal symbols, private symbols
are also not visible to the linker and should be ignored.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323483
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Vedant Kumar [Thu, 25 Jan 2018 23:48:29 +0000 (23:48 +0000)]
[Debug] LCSSA: Insert dbg.value at the first available insertion point
Inserting a dbg.value instruction at the start of a basic block with a
landingpad instruction triggers a verifier failure. We should be OK if
we insert the instruction a bit later.
Speculative fix for the bot failure described here:
https://reviews.llvm.org/D42551
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323482
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Paul Robinson [Thu, 25 Jan 2018 23:06:36 +0000 (23:06 +0000)]
[DWARFv5] Classify all the new forms. NFC.
Move standard forms from a switch statement to the table of forms;
fill in all the missing ones defined in DWARF v5. I'm guessing at
classifications in a couple of cases where v5 forms aren't actually
supported yet, but whoever adds support for the forms can fix the
classifications as needed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323481
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Jake Ehrlich [Thu, 25 Jan 2018 22:46:17 +0000 (22:46 +0000)]
[llvm-objcopy] Refactor llvm-objcopy to use reader and writer objects
While writing code for input and output formats in llvm-objcopy it became
apparent that there was a code health problem. This change attempts to solve
that problem by refactoring the code to use Reader and Writer objects that can
read in different objects in different formats, convert them to a single shared
internal representation, and then write them to any other representation.
New classes:
Reader: the base class used to construct instances of the internal
representation
Writer: the base class used to write out instances of the internal
representation
ELFBuilder: a helper class for ELFWriter that takes an ELFFile and converts it
to a Object
SectionVisitor: it became necessary to remove writeSection from SectionBase
because, under the new Reader/Writer scheme, it's possible to convert between
ELF Types such as ELF32LE and ELF32BE. This isn't possible with writeSection
because it (dynamically) depends on the underlying section type *and*
(statically) depends on the ELF type. Bad things would happen if the underlying
sections for ELF32LE were used for writing to ELF64BE. To avoid this code smell
(which would have compiled, run, and output some nonsesnse) I decoupled writing
of sections from a class.
SectionWriter: This is just the ELFT templated implementation of
SectionVisitor. Many classes now have this class as a friend so that the
writing methods in this class can write out private data.
ELFWriter: This is the Writer that outputs to ELF
BinaryWriter: This is the Writer that outputs to Binary
ElfType: Because the ELF Type is not a part of the Object anymore we need a way
to construct the correct default Writer based on properties of the Reader. This
enum just keeps track of the ELF type of the input so it can be used as the
default output type as well.
Object has correspondingly undergone some serious changes as well. It now has
more generic methods for building and manipulating ELF binaries. This interface
makes ELFBuilder easy enough to use and will make the BinaryReader/Builder easy
to create as well. Most changes in this diff are cosmetic and deal with the
fact that a method has been moved from one class to another or a change from a
pointer to a reference. Almost no changes should result in a functional
difference (this is after all a refactor). One minor functional change was made
and the result can be seen in remove-shstrtab-error.test. The fact that it
fails hasn't changed but the error message has changed because that failure is
detected at a later point in the code now (because WriteSectionHeaders is a
property of the ElfWriter *not* a property of the Object). I'd say roughly
80-90% of this code is cosmetically different, 10-19% is different but
functionally the same, and 1-5% is functionally different despite not causing a
change in tests.
Differential Revision: https://reviews.llvm.org/D42222
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323480
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Easwaran Raman [Thu, 25 Jan 2018 22:23:52 +0000 (22:23 +0000)]
Add testcase accidentally left out from r323460.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323478
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Jake Ehrlich [Thu, 25 Jan 2018 22:15:14 +0000 (22:15 +0000)]
[llvm-objcopy] Add --add-gnu-debuglink
This change adds support for --add-gnu-debuglink to llvm-objcopy
Differential Revision: https://reviews.llvm.org/D41731
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323477
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Paul Robinson [Thu, 25 Jan 2018 22:02:36 +0000 (22:02 +0000)]
[DWARFv5] Support DW_FORM_line_strp in llvm-dwarfdump.
This form is like DW_FORM_strp, but points to .debug_line_str instead
of .debug_str as the string section. It's intended to be used from
the line-table header, and allows string-pooling of directory and
filenames across compilation units.
Differential Revision: https://reviews.llvm.org/D42553
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323476
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Easwaran Raman [Thu, 25 Jan 2018 22:02:29 +0000 (22:02 +0000)]
[SyntheticCounts] Rewrite the code using only graph traits.
Summary:
The intent of this is to allow the code to be used with ThinLTO. In
Thinlink phase, a traditional Callgraph can not be computed even though
all the necessary information (nodes and edges of a call graph) is
available. This is due to the fact that CallGraph class is closely tied
to the IR. This patch first extends GraphTraits to add a CallGraphTraits
graph. This is then used to implement a version of counts propagation
on a generic callgraph.
Reviewers: davidxl
Subscribers: mehdi_amini, tejohnson, llvm-commits
Differential Revision: https://reviews.llvm.org/D42311
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323475
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Joel Jones [Thu, 25 Jan 2018 21:55:39 +0000 (21:55 +0000)]
[AArch64] Enable aggressive FMA on T99 and provide AArch64 options for others.
This patch enables aggressive FMA by default on T99, and provides a -mllvm
option to enable the same on other AArch64 micro-arch's (-mllvm
-aarch64-enable-aggressive-fma).
Test case demonstrating the effects on T99 is included.
Patch by: steleman (Stefan Teleman)
Differential Revision: https://reviews.llvm.org/D40696
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323474
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Vedant Kumar [Thu, 25 Jan 2018 21:37:07 +0000 (21:37 +0000)]
[Debug] Add dbg.value intrinsics for PHIs created during LCSSA.
This patch is an enhancement to propagate dbg.value information when
Phis are created on behalf of LCSSA. I noticed a case where a value
carried across a loop was reported as <optimized out>.
Specifically this case:
int bar(int x, int y) {
return x + y;
}
int foo(int size) {
int val = 0;
for (int i = 0; i < size; ++i) {
val = bar(val, i); // Both val and i are correct
}
return val; // <optimized out>
}
In the above case, after all of the interesting computation completes
our value is reported as "optimized out." This change will add a
dbg.value to correct this.
This patch also moves the dbg.value insertion routine from
LoopRotation.cpp into Local.cpp, so that we can share it in both places
(LoopRotation and LCSSA).
Patch by Matt Davis!
Differential Revision: https://reviews.llvm.org/D42551
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323472
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Vedant Kumar [Thu, 25 Jan 2018 21:37:05 +0000 (21:37 +0000)]
[Debug] Add a utility to propagate dbg.value to new PHIs, NFC
This simply moves an existing utility to Utils for reuse.
Split out of: https://reviews.llvm.org/D42551
Patch by Matt Davis!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323471
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