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6 years agollvm-pdbutil: Fix an off-by-one error.
Peter Collingbourne [Tue, 17 Apr 2018 21:44:17 +0000 (21:44 +0000)]
llvm-pdbutil: Fix an off-by-one error.

Differential Revision: https://reviews.llvm.org/D45740

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330222 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoLoadStoreVectorizer crashes due to unsized type
Stanislav Mekhanoshin [Tue, 17 Apr 2018 21:40:04 +0000 (21:40 +0000)]
LoadStoreVectorizer crashes due to unsized type

When we skip bitcasts while looking for GEP in LoadSoreVectorizer
we should also verify that the type is sized otherwise we assert

Differential Revision: https://reviews.llvm.org/D45709

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330221 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[XRay] Typed event logging intrinsic
Keith Wyss [Tue, 17 Apr 2018 21:30:29 +0000 (21:30 +0000)]
[XRay] Typed event logging intrinsic

Summary:
Add an LLVM intrinsic for type discriminated event logging with XRay.
Similar to the existing intrinsic for custom events, but also accepts
a type tag argument to allow plugins to be aware of different types
and semantically interpret logged events they know about without
choking on those they don't.

Relies on a symbol defined in compiler-rt patch D43668. I may wait
to submit before I can see demo everything working together including
a still to come clang patch.

Reviewers: dberris, pelikan, eizan, rSerge, timshen

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D45633

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330219 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[WebAssembly] Add an assertion for an invalid CFG
Heejin Ahn [Tue, 17 Apr 2018 21:19:21 +0000 (21:19 +0000)]
[WebAssembly] Add an assertion for an invalid CFG

Summary:
It was not easy to provide a test case for D45648 (rL330079) because the bug
didn't manifest itself in the set of currently valid IRs. Added an assertion to
check this faster, thanks to @dblaikie's suggestion.

Reviewers: dblaikie

Subscribers: jfb, dschuff, sbc100, jgravelle-google, llvm-commits, dblaikie

Differential Revision: https://reviews.llvm.org/D45711

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330217 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoRename sys::Process::GetArgumentVector -> sys::windows::GetCommandLineArguments
Rui Ueyama [Tue, 17 Apr 2018 21:09:16 +0000 (21:09 +0000)]
Rename sys::Process::GetArgumentVector -> sys::windows::GetCommandLineArguments

GetArgumentVector (or GetCommandLineArguments) is very Windows-specific.
I think it doesn't make much sense to provide that function from sys::Process.

I also made a change so that the function takes a BumpPtrAllocator
instead of a SpecificBumpPtrAllocator. The latter is the class to call
dtors, but since char * is trivially destructible, we should use the
former class.

Differential Revision: https://reviews.llvm.org/D45641

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330216 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[WebAssembly] Teach fast-isel to gracefully recover from illegal return types.
Dan Gohman [Tue, 17 Apr 2018 20:46:42 +0000 (20:46 +0000)]
[WebAssembly] Teach fast-isel to gracefully recover from illegal return types.

Fixes PR36564.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330215 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[llvm-pdbutil] Dump first section contribution for each module.
Zachary Turner [Tue, 17 Apr 2018 20:06:43 +0000 (20:06 +0000)]
[llvm-pdbutil] Dump first section contribution for each module.

The DBI stream contains a list of module descriptors.  At the
beginning of each descriptor is a structure representing the first
section contribution in the output file for that module.  LLD
currently doesn't fill out this structure at all, but link.exe
does.  So as a precursor to emitting this data in LLD, we first
need a way to dump it so that it can be checked.

This patch adds support for the dumping, and verifies via a test
that LLD emits bogus information.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330208 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86] Add separate scheduling class for PSADBW instruction.
Craig Topper [Tue, 17 Apr 2018 19:35:19 +0000 (19:35 +0000)]
[X86] Add separate scheduling class for PSADBW instruction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330204 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86] Remove unnecessary InstRW overrides. Add somes FIXMEs/TODOs.
Craig Topper [Tue, 17 Apr 2018 19:35:14 +0000 (19:35 +0000)]
[X86] Remove unnecessary InstRW overrides. Add somes FIXMEs/TODOs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330203 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86] Remove -mcpu=skx/knl from some tests and use -mattr instead.
Craig Topper [Tue, 17 Apr 2018 17:30:06 +0000 (17:30 +0000)]
[X86] Remove -mcpu=skx/knl from some tests and use -mattr instead.

mcpu exposes other tuning flags. These tests are only trying to test instruction set features so it is better to use mattr.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330196 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoRevert "Fix incorrect choice of callee-saved registers save/restore points (take 2)"
Momchil Velikov [Tue, 17 Apr 2018 16:29:58 +0000 (16:29 +0000)]
Revert "Fix incorrect choice of callee-saved registers save/restore points (take 2)"

Revert in order to fix the test to not run when required targets aren't
configured.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330193 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoFix incorrect choice of callee-saved registers save/restore points (take 2)
Momchil Velikov [Tue, 17 Apr 2018 15:59:06 +0000 (15:59 +0000)]
Fix incorrect choice of callee-saved registers save/restore points (take 2)

Add the accidentally omitted testcase.

Differential revision: https://reviews.llvm.org/D45524

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330192 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[Hexagon] Do not merge initializers for stack and non-stack expressions
Krzysztof Parzyszek [Tue, 17 Apr 2018 15:23:09 +0000 (15:23 +0000)]
[Hexagon] Do not merge initializers for stack and non-stack expressions

Stack addressing needs addressing modes that provide an offset field
immediately following the frame index. An initializer from a non-stack
addressing could force the stack address to use a form that does not
provide an offset field.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330191 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[LLVM-C] [PR34633] Avoid calling ->dump() methods from LLVMDump*.
whitequark [Tue, 17 Apr 2018 14:52:43 +0000 (14:52 +0000)]
[LLVM-C] [PR34633] Avoid calling ->dump() methods from LLVMDump*.

LLVMDump* functions are available in Release builds too.

Patch by Brenton Bostick.

Differential Revision: https://reviews.llvm.org/D44600

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330189 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[PowerPC] Mark the BDNZ intrinsic as NoDuplicate
Nemanja Ivanovic [Tue, 17 Apr 2018 13:07:01 +0000 (13:07 +0000)]
[PowerPC] Mark the BDNZ intrinsic as NoDuplicate

Duplicating this intrinsic is not generally valid because it has the side-effect
of decrementing the CTR. Any passes that duplicate it would need to be taught to
keep the regions formed completely disjoint.
This patch should be NFC for typical uses as CTRLoops runs after the remaining
loop passes. It only affects situations where the loop passes are scheduled on
the IR after the codegen passes (as is the case with some JIT pipelines).

Fixes https://bugs.llvm.org/show_bug.cgi?id=37050

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330186 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoFix incorrect choice of callee-saved registers save/restore points
Momchil Velikov [Tue, 17 Apr 2018 08:37:38 +0000 (08:37 +0000)]
Fix incorrect choice of callee-saved registers save/restore points

Make the shrink wrapping pass pay attention to uses/defs of the stack pointer.

Differential revision: https://reviews.llvm.org/D45524

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330183 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoRevert "Reapply "[PR16756] Use SSAUpdaterBulk in JumpThreading." again."
Michael Zolotukhin [Tue, 17 Apr 2018 07:31:27 +0000 (07:31 +0000)]
Revert "Reapply "[PR16756] Use SSAUpdaterBulk in JumpThreading." again."

This reverts r330175. There are still stage3/stage4 miscompares.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330180 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86] Add FP comparison scheduler classes
Simon Pilgrim [Tue, 17 Apr 2018 07:22:44 +0000 (07:22 +0000)]
[X86] Add FP comparison scheduler classes

Split VCMP/VMAX/VMIN instructions off to WriteFCmp and VCOMIS instructions off to WriteFCom instead of assuming they match WriteFAdd

Differential Revision: https://reviews.llvm.org/D45656

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330179 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[DAGCombiner] Fix for oss-fuzz bug
Gerolf Hoflehner [Tue, 17 Apr 2018 07:22:34 +0000 (07:22 +0000)]
[DAGCombiner] Fix for oss-fuzz bug

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330178 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[SSAUpdaterBulk] Add debug logging.
Michael Zolotukhin [Tue, 17 Apr 2018 04:45:40 +0000 (04:45 +0000)]
[SSAUpdaterBulk] Add debug logging.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330176 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoReapply "[PR16756] Use SSAUpdaterBulk in JumpThreading." again.
Michael Zolotukhin [Tue, 17 Apr 2018 04:45:22 +0000 (04:45 +0000)]
Reapply "[PR16756] Use SSAUpdaterBulk in JumpThreading." again.

One more, hopefully the last, bug is fixed: when forming UsesToRewrite
we should ignore phi operands coming from edges that we want to delete.

This reverts r329910.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330175 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[IR] Upgrade comment token in objc retain release marker for asm call
Gerolf Hoflehner [Tue, 17 Apr 2018 04:02:24 +0000 (04:02 +0000)]
[IR] Upgrade comment token in objc retain release marker for asm call

Older compiler issued '#' instead of ';'

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330173 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoCOFF: Make SectionChunk::Relocs field an ArrayRef. NFCI.
Peter Collingbourne [Tue, 17 Apr 2018 01:54:34 +0000 (01:54 +0000)]
COFF: Make SectionChunk::Relocs field an ArrayRef. NFCI.

Differential Revision: https://reviews.llvm.org/D45714

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330172 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoCODE_OWNERS: Take ownership of C API.
whitequark [Tue, 17 Apr 2018 01:09:12 +0000 (01:09 +0000)]
CODE_OWNERS: Take ownership of C API.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330171 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[DebugInfo] Follow-up bug fix on "Fixing a couple of DI duplication bugs of CloneModule"
Roman Tereshin [Mon, 16 Apr 2018 23:39:44 +0000 (23:39 +0000)]
[DebugInfo] Follow-up bug fix on "Fixing a couple of DI duplication bugs of CloneModule"

Apparently, DebugInfoFinder::processCompileUnit doesn't process all
of the possible kinds of DIImportedEntit'ies, e.g. DIGlobalVariable's.

Previously introduced `llvm_unreachable` is therefore incorrect.
Removing it here.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330167 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoRevert "build: reserve `--color-diagnostics` for lld"
Saleem Abdulrasool [Mon, 16 Apr 2018 21:57:10 +0000 (21:57 +0000)]
Revert "build: reserve `--color-diagnostics` for lld"

This reverts SVN r330158.

Seems that there was a change to linker flags handling in SVN r316972.
That would alter the behaviour to correct the linker flag handling in
CMake (requiring CMake 3.4.3+).  Since that is already the minimum
version required for LLVM, hard coding the knowledge of the linker is
not required, which is a strictly better solution.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330161 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agobuild: reserve `--color-diagnostics` for lld
Saleem Abdulrasool [Mon, 16 Apr 2018 21:05:56 +0000 (21:05 +0000)]
build: reserve `--color-diagnostics` for lld

When building out-of-tree compilers (e.g. swift), the linker check here
may yield incorrect values.  Ensure that we are using lld before we
attempt to use `--color-diagnostics` for the linker.  Other linkers (i.e
bfd, gold) do not support this flag and the test can pass in some cases
and then fail subsequently when building.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330158 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[PDB] Correctly use the target machine when writing DBI stream.
Zachary Turner [Mon, 16 Apr 2018 20:42:06 +0000 (20:42 +0000)]
[PDB] Correctly use the target machine when writing DBI stream.

Using Config->is64() will treat ARM64 as Amd64, which is incorrect.
Furthermore, there are more esoteric architectures that could
theoretically be encountered.  Just set it directly to the machine
type, which we already know anyway.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330157 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[RISCV] Fix assert message operator
Mandeep Singh Grang [Mon, 16 Apr 2018 18:56:10 +0000 (18:56 +0000)]
[RISCV] Fix assert message operator

Summary:
Specifying assert message with an || operator makes the compiler interpret it
 as a bool. Changed it to &&.

Reviewers: asb, apazos

Reviewed By: asb

Subscribers: rbar, johnrusso, simoncook, jordy.potman.lists, sabuasal, niosHD, kito-cheng, shiva0217, zzheng, llvm-commits

Differential Revision: https://reviews.llvm.org/D45660

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330148 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoResubmit "Fix some incorrect fields in our generated PDBs."
Zachary Turner [Mon, 16 Apr 2018 18:17:13 +0000 (18:17 +0000)]
Resubmit "Fix some incorrect fields in our generated PDBs."

This fixes the failing tests.  They simply hadn't been updated
to match the new output resulting from this patch.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330145 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86] Remove unnecessary -mattr to enable avx512bw when the -mcpu already enabled...
Craig Topper [Mon, 16 Apr 2018 18:14:19 +0000 (18:14 +0000)]
[X86] Remove unnecessary -mattr to enable avx512bw when the -mcpu already enabled it. NFC

This makes the test similar to the arith-sub.ll and arith-mul.ll tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330144 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[SLP] Use getExtractWithExtendCost() to compute the scalar cost of extractelement...
Haicheng Wu [Mon, 16 Apr 2018 18:09:49 +0000 (18:09 +0000)]
[SLP] Use getExtractWithExtendCost() to compute the scalar cost of extractelement/ext pair

We use getExtractWithExtendCost to calculate the cost of extractelement and
s|zext together when computing the extract cost after vectorization, but we
calculate the cost of extractelement and s|zext separately when computing the
scalar cost which is larger than it should be.

Differential Revision: https://reviews.llvm.org/D45469

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330143 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[ORC] Add a MaterializationResponsibility class to track responsibility for
Lang Hames [Mon, 16 Apr 2018 18:05:24 +0000 (18:05 +0000)]
[ORC] Add a MaterializationResponsibility class to track responsibility for
materializing function definitions.

MaterializationUnit instances are responsible for resolving and finalizing
symbol definitions when their materialize method is called. By contract, the
MaterializationUnit must materialize all definitions it is responsible for and
no others. If it can not materialize all definitions (because of some error)
then it must notify the associated VSO about each definition that could not be
materialized. The MaterializationResponsibility class tracks this
responsibility, asserting that all required symbols are resolved and finalized,
and that no extraneous symbols are resolved or finalized. In the event of an
error it provides a convenience method for notifying the VSO about each
definition that could not be materialized.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330142 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[ORC] Merge VSO notifyResolutionFailed and notifyFinalizationFailed in to
Lang Hames [Mon, 16 Apr 2018 18:05:22 +0000 (18:05 +0000)]
[ORC] Merge VSO notifyResolutionFailed and notifyFinalizationFailed in to
notifyMaterializationFailed.

The notifyMaterializationFailed method can determine which error to raise by
looking at which queue the pending queries are in (resolution or finalization).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330141 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[Hexagon] Turn off flag enabling auto-vectorization
Krzysztof Parzyszek [Mon, 16 Apr 2018 17:35:30 +0000 (17:35 +0000)]
[Hexagon] Turn off flag enabling auto-vectorization

It was turned on for testing and was accidentally left on in the commit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330139 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[NFC] Move verificaiton check for f128 conversion into LowerINT_TO_FP()
Lei Huang [Mon, 16 Apr 2018 17:30:24 +0000 (17:30 +0000)]
[NFC] Move verificaiton check for f128 conversion into LowerINT_TO_FP()

Move veriication check for legal conversions to f128 into LowerINT_TO_FP()
and fix some indentations to match other sections of the code for readability.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330138 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[InstCombine] simplify code in SimplifyAssociativeOrCommutative; NFCI
Sanjay Patel [Mon, 16 Apr 2018 17:15:13 +0000 (17:15 +0000)]
[InstCombine] simplify code in SimplifyAssociativeOrCommutative; NFCI

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330137 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[Attributes] Fix a bug in AttributeList::get so it can handle a mix of FunctionIndex...
Craig Topper [Mon, 16 Apr 2018 17:05:01 +0000 (17:05 +0000)]
[Attributes] Fix a bug in AttributeList::get so it can handle a mix of FunctionIndex and ReturnIndex/arg indices at the same time

The code uses the index of the last element in the sorted array to determine the maximum size needed for the vector. But if the last index is a FunctionIndex(~0), attrIdxToArrayIdx will return 0 and the vector will have size 1. If there are any indices before FunctionIndex, those values would return a value larger than 0 from attrIdxToArrayIdx. So in this case we need to look in front of the FunctionIndex to get the true size needed.

Differential Revision: https://reviews.llvm.org/D45632

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330136 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoRemove faulty assertion in llvm-pdbutil
Adrian McCarthy [Mon, 16 Apr 2018 17:01:18 +0000 (17:01 +0000)]
Remove faulty assertion in llvm-pdbutil

If a class's first data member is an instance of an empty class, then an
assertion in the PrettyClassLayoutGraphicalDumper would fail. The
storage is reserved, but it's not marked as in use.

As far as I understand, it's the assertion that's faulty, so I removed it
and updated the nearby comment.

Found by running llvm-pdbutil against its own PDB, and this assertion would
fail on HashAdjusters, which is a HashTable whose first data member is a
TraitsT, which is a PdbHashTraits<T>, which is an empty struct. (The struct
has a specialization for uint32_t, but that specialization doesn't apply
here because the T is actually ulittle32_t.)

Differential Revision: https://reviews.llvm.org/D45645

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330135 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoRevert "Fix some incorrect fields in our generated PDBs."
Zachary Turner [Mon, 16 Apr 2018 16:55:41 +0000 (16:55 +0000)]
Revert "Fix some incorrect fields in our generated PDBs."

There are a couple of failing tests which slipped under my radar
so I'm reverting this while I attempt to fix.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330133 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[CodeView] Initial support for emitting S_THUNK32 symbols for compiler...
Brock Wyma [Mon, 16 Apr 2018 16:53:57 +0000 (16:53 +0000)]
[CodeView] Initial support for emitting S_THUNK32 symbols for compiler...

When emitting CodeView debug information, compiler-generated thunk routines
should be emitted using S_THUNK32 symbols instead of S_GPROC32_ID symbols so
Visual Studio can properly step into the user code.  This initial support only
handles standard thunk ordinals.

Differential Revision: https://reviews.llvm.org/D43838

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330132 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoFix some incorrect fields in our generated PDBs.
Zachary Turner [Mon, 16 Apr 2018 16:27:49 +0000 (16:27 +0000)]
Fix some incorrect fields in our generated PDBs.

Most of these are pretty trivial and obvious. Setting the toolchain
version to 14.11 is perhaps a little questionable, but we've been bitten
in the past where one of our version fields sidn't match MSVC's, and I
definitely don't want to go through that diagnosis again as it was
pretty time consuming and hard to track down.

I found all of these by using llvm-pdbutil export to dump the dbi and
pdb streams to a file, then using fc followed by llvm-pdbutil explain to
explain the mismatched bytes.

There are still some more, these are just the low hanging fruit.

Differential Revision: https://reviews.llvm.org/D45276

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330130 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[InstCombine] simplify getBinOpsForFactorization(); NFC
Sanjay Patel [Mon, 16 Apr 2018 15:19:24 +0000 (15:19 +0000)]
[InstCombine] simplify getBinOpsForFactorization(); NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330129 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoSmallVectorMemoryBuffer: Fix some comments
David Blaikie [Mon, 16 Apr 2018 14:23:15 +0000 (14:23 +0000)]
SmallVectorMemoryBuffer: Fix some comments

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330128 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[InstCombine] simplify fneg+fadd folds; NFC
Sanjay Patel [Mon, 16 Apr 2018 14:13:57 +0000 (14:13 +0000)]
[InstCombine] simplify fneg+fadd folds; NFC

Two cleanups:
1. As noted in D45453, we had tests that don't need FMF that were misplaced in the 'fast-math.ll' test file.
2. This removes the final uses of dyn_castFNegVal, so that can be deleted. We use 'match' now.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330126 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[InstCombine] fix formatting; NFC
Sanjay Patel [Mon, 16 Apr 2018 13:21:15 +0000 (13:21 +0000)]
[InstCombine] fix formatting; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330124 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[AMDGPU][MC][VI][GFX9] Added support of SDWA/DPP for v_cndmask_b32
Dmitry Preobrazhensky [Mon, 16 Apr 2018 12:41:38 +0000 (12:41 +0000)]
[AMDGPU][MC][VI][GFX9] Added support of SDWA/DPP for v_cndmask_b32

See bug 36356: https://bugs.llvm.org/show_bug.cgi?id=36356

Differential Revision: https://reviews.llvm.org/D45446

Reviewers: artem.tamazov, arsenm, timcorringham

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330123 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[test] Avoid spurious failure in debug-names-find.s. NFC.
Pavel Labath [Mon, 16 Apr 2018 11:16:41 +0000 (11:16 +0000)]
[test] Avoid spurious failure in debug-names-find.s. NFC.

Have llvm-dwarfdump take input from stdin to avoid leaking the host paths into
the tests, causing nondeterministic failures.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330121 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[AArch64][SVE] Asm: Support for structured LD4 (scalar+imm) load instructions.
Sander de Smalen [Mon, 16 Apr 2018 10:46:18 +0000 (10:46 +0000)]
[AArch64][SVE] Asm: Support for structured LD4 (scalar+imm) load instructions.

Reviewers: fhahn, rengolin, javed.absar, huntergr, SjoerdMeijer, t.p.northover, echristo, evandro

Reviewed By: rengolin

Subscribers: tschuett, llvm-commits, kristof.beyls

Differential Revision: https://reviews.llvm.org/D45624

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330120 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[LatencyPriorityQueue] Fix build: missing override
Roman Lebedev [Mon, 16 Apr 2018 10:40:56 +0000 (10:40 +0000)]
[LatencyPriorityQueue] Fix build: missing override

[10/260] Building CXX object lib/CodeGen/CMakeFiles/LLVMCodeGen.dir/PostRASchedulerList.cpp.o
FAILED: lib/CodeGen/CMakeFiles/LLVMCodeGen.dir/PostRASchedulerList.cpp.o
/usr/local/bin/clang++  -DGTEST_HAS_RTTI=0 -D_DEBUG -D_GNU_SOURCE -D__STDC_CONSTANT_MACROS -D__STDC_FORMAT_MACROS -D__STDC_LIMIT_MACROS -Ilib/CodeGen -I/build/llvm/lib/CodeGen -I/usr/include/libxml2 -Iinclude -I/build/llvm/include -g0 -fPIC -fvisibility-inlines-hidden -Werror -Werror=date-time -Werror=unguarded-availability-new -std=c++11 -Wall -W -Wno-unused-parameter -Wwrite-strings -Wcast-qual -Wmissing-field-initializers -pedantic -Wno-long-long -Wcovered-switch-default -Wnon-virtual-dtor -Wdelete-non-virtual-dtor -Wstring-conversion -fcolor-diagnostics -ffunction-sections -fdata-sections -O3 -g0  -fPIC   -UNDEBUG  -fno-exceptions -fno-rtti -MD -MT lib/CodeGen/CMakeFiles/LLVMCodeGen.dir/PostRASchedulerList.cpp.o -MF lib/CodeGen/CMakeFiles/LLVMCodeGen.dir/PostRASchedulerList.cpp.o.d -o lib/CodeGen/CMakeFiles/LLVMCodeGen.dir/PostRASchedulerList.cpp.o -c /build/llvm/lib/CodeGen/PostRASchedulerList.cpp
In file included from /build/llvm/lib/CodeGen/PostRASchedulerList.cpp:26:
/build/llvm/include/llvm/CodeGen/LatencyPriorityQueue.h:87:27: error: 'dump' overrides a member function but is not marked 'override' [-Werror,-Winconsistent-missing-override]
    LLVM_DUMP_METHOD void dump(ScheduleDAG *DAG) const {
                          ^
/build/llvm/include/llvm/CodeGen/ScheduleDAG.h:547:18: note: overridden virtual function is here
    virtual void dump(ScheduleDAG *) const {}
                 ^
1 error generated.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330119 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[LatencyPriorityQueue] The LatencyPriorityQueue class is missing the implementation...
Stefan Pintilie [Mon, 16 Apr 2018 10:20:56 +0000 (10:20 +0000)]
[LatencyPriorityQueue] The LatencyPriorityQueue class is missing the implementation for the dump function

Added implementation of the dump function for LatencyPriorityQueue.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330117 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[AArch64][SVE] Asm: Support for structured LD3 (scalar+imm) load instructions.
Sander de Smalen [Mon, 16 Apr 2018 10:10:48 +0000 (10:10 +0000)]
[AArch64][SVE] Asm: Support for structured LD3 (scalar+imm) load instructions.

Reviewers: fhahn, rengolin, javed.absar, huntergr, SjoerdMeijer, t.p.northover, echristo, evandro

Reviewed By: rengolin

Subscribers: tschuett, kristof.beyls, llvm-commits

Differential Revision: https://reviews.llvm.org/D45623

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330116 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[MIR-Canon] Fixing a test failure caused by COPY Folding.
Puyan Lotfi [Mon, 16 Apr 2018 09:31:49 +0000 (09:31 +0000)]
[MIR-Canon] Fixing a test failure caused by COPY Folding.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330115 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[mips] Restrict certain trap instructions for micromipsr6
Stefan Maksimovic [Mon, 16 Apr 2018 09:22:20 +0000 (09:22 +0000)]
[mips] Restrict certain trap instructions for micromipsr6

Instructions removed from micromipsr6:
teqi, tgei, tgeiu, tlti, tltiu, tnei

Differential Revision: https://reviews.llvm.org/D45318

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330114 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[MIR-Canon] Adding ISA-Agnostic COPY Folding.
Puyan Lotfi [Mon, 16 Apr 2018 09:03:03 +0000 (09:03 +0000)]
[MIR-Canon] Adding ISA-Agnostic COPY Folding.

Transforms the following:

    %vreg1234:gpr32 = COPY %42
    %vreg1235:gpr32 = COPY %vreg1234
    %vreg1236:gpr32 = COPY %vreg1235
    $w0 = COPY %vreg1236

into:

    $w0 = COPY %42

Assuming %42 is also a gpr32

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330113 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[NFC][MIR-Canon] clang-format cleanup of Mir Canonicalizer Pass.
Puyan Lotfi [Mon, 16 Apr 2018 08:12:15 +0000 (08:12 +0000)]
[NFC][MIR-Canon] clang-format cleanup of Mir Canonicalizer Pass.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330111 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86] Introduce archs: goldmont-plus & tremont
Gabor Buella [Mon, 16 Apr 2018 07:47:35 +0000 (07:47 +0000)]
[X86] Introduce archs: goldmont-plus & tremont

Using Goldmont's cost tables for these two upcoming
atom archs.

Reviewers: craig.topper

Reviewed By: craig.topper

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D45612

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330109 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[AArch64][SVE] Asm: Support for structured LD2 (scalar+imm) load instructions.
Sander de Smalen [Mon, 16 Apr 2018 07:09:29 +0000 (07:09 +0000)]
[AArch64][SVE] Asm: Support for structured LD2 (scalar+imm) load instructions.

Reviewers: fhahn, rengolin, javed.absar, huntergr, SjoerdMeijer, t.p.northover, echristo, evandro

Reviewed By: rengolin

Subscribers: tschuett, kristof.beyls, llvm-commits

Differential Revision: https://reviews.llvm.org/D45622

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330108 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoRename ObjectMemoryBuffer to SmallVectorMemoryBuffer; NFCI
Weiming Zhao [Mon, 16 Apr 2018 03:44:03 +0000 (03:44 +0000)]
Rename ObjectMemoryBuffer to SmallVectorMemoryBuffer; NFCI

Summary: As discussed in https://reviews.llvm.org/D45606, it makes more sense to name the class as SmallVectorMemoryBuffer

Reviewers: bkramer, dblaikie

Reviewed By: dblaikie

Subscribers: mehdi_amini, eraman, llvm-commits

Differential Revision: https://reviews.llvm.org/D45661

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330107 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[BasicAA] Return MayAlias for the pointer plus variable offset to
Shiva Chen [Mon, 16 Apr 2018 01:58:39 +0000 (01:58 +0000)]
[BasicAA] Return MayAlias for the pointer plus variable offset to
structure object member

Differential Revision: https://reviews.llvm.org/D45510

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330106 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86] Use APInt::isSubsetof instead of APInt::intersects to avoid a negation of an...
Craig Topper [Sun, 15 Apr 2018 19:11:25 +0000 (19:11 +0000)]
[X86] Use APInt::isSubsetof instead of APInt::intersects to avoid a negation of an APInt value. NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330105 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86] Use uint32_t instead of unsigned in GetLo32XForm for readability. NFC
Craig Topper [Sun, 15 Apr 2018 19:11:24 +0000 (19:11 +0000)]
[X86] Use uint32_t instead of unsigned in GetLo32XForm for readability. NFC

GetLo8XForm right next to it uses uint8_t so uint32_t is consistent.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330104 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[InstCombine] Simplify 'xor' to 'or' if no common bits are set.
Roman Lebedev [Sun, 15 Apr 2018 18:59:44 +0000 (18:59 +0000)]
[InstCombine] Simplify 'xor' to 'or' if no common bits are set.

Summary:
In order to get the whole fold as specified in [[ https://bugs.llvm.org/show_bug.cgi?id=6773 | PR6773 ]],
let's first handle the simple straight-forward things.
Let's start with the `and` -> `or` simplification.

The one obvious thing missing here: the constant mask is not handled.
I have an idea how to handle it, but it will require some thinking,
and is not strictly required here, so i've left that for later.

https://rise4fun.com/Alive/Pkmg

Reviewers: spatel, craig.topper, eli.friedman, jingyue

Reviewed By: spatel

Subscribers: llvm-commits

Was reviewed as part of https://reviews.llvm.org/D45631

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330103 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[SelectionDAG][NFC] haveNoCommonBitsSet(): add FIXME notes
Roman Lebedev [Sun, 15 Apr 2018 18:59:38 +0000 (18:59 +0000)]
[SelectionDAG][NFC] haveNoCommonBitsSet(): add FIXME notes

As suggested in https://reviews.llvm.org/D45631#1068338

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330102 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[InstCombine] Simplify 'add' to 'or' if no common bits are set.
Roman Lebedev [Sun, 15 Apr 2018 18:59:33 +0000 (18:59 +0000)]
[InstCombine] Simplify 'add' to 'or' if no common bits are set.

Summary:
In order to get the whole fold as specified in [[ https://bugs.llvm.org/show_bug.cgi?id=6773 | PR6773 ]],
let's first handle the simple straight-forward things.
Let's start with the `and` -> `or` simplification.

The one obvious thing missing here: the constant mask is not handled.
I have an idea how to handle it, but it will require some thinking,
and is not strictly required here, so i've left that for later.

https://rise4fun.com/Alive/Pkmg

Reviewers: spatel, craig.topper, eli.friedman, jingyue

Reviewed By: spatel

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D45631

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330101 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[NFC] ConstantOffsetExtractor::CanTraceInto(): add FIXME: no tests
Roman Lebedev [Sun, 15 Apr 2018 18:59:27 +0000 (18:59 +0000)]
[NFC] ConstantOffsetExtractor::CanTraceInto(): add FIXME: no tests

As suggested in https://reviews.llvm.org/D45631#1068338,
looking at haveNoCommonBitsSet() users, and *trying* to
show the change effect elsewhere.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330100 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[MC] Moved all the remaining logic that computed instruction latency and reciprocal...
Andrea Di Biagio [Sun, 15 Apr 2018 17:32:17 +0000 (17:32 +0000)]
[MC] Moved all the remaining logic that computed instruction latency and reciprocal throughput from TargetSchedModel to MCSchedModel.

TargetSchedModel now always delegates to MCSchedModel the computation of
instruction latency and reciprocal throughput.
No functional change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330099 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[DAGCombiner, PowerPC] allow X - (fpext(-Y) --> X + fpext(Y) with multiple uses
Sanjay Patel [Sun, 15 Apr 2018 16:43:48 +0000 (16:43 +0000)]
[DAGCombiner, PowerPC] allow X - (fpext(-Y) --> X + fpext(Y) with multiple uses

This is a transform that I limited in instcombine in rL329821 because it was
creating more instructions in IR when the cast has multiple uses.

But if the cast is free, then we can do the transform regardless of other
uses because it improves the potential throughput of the calculation by
removing a dependency on the fneg.

Differential Revision: https://reviews.llvm.org/D45598

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330098 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[InstCombine] simplify more code for distributive property; NFCI
Sanjay Patel [Sun, 15 Apr 2018 16:20:58 +0000 (16:20 +0000)]
[InstCombine] simplify more code for distributive property; NFCI

Also, fix capitalization to current style. Follow-up to:
rL330096

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330097 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[InstCombine] simplify code for distributive property; NFCI
Sanjay Patel [Sun, 15 Apr 2018 15:39:57 +0000 (15:39 +0000)]
[InstCombine] simplify code for distributive property; NFCI

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330096 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[Support] Extend WithColor helpers
Jonas Devlieghere [Sun, 15 Apr 2018 08:44:15 +0000 (08:44 +0000)]
[Support] Extend WithColor helpers

Although printing warnings and errors to stderr is by far the most
common case, this patch makes it possible to specify any stream.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330094 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoNFC: Move ObjectMemoryBuffer to support
Weiming Zhao [Sun, 15 Apr 2018 05:17:14 +0000 (05:17 +0000)]
NFC: Move ObjectMemoryBuffer to support

Summary:
Since the class is used by both MCJIT and LTO, it makes more sense to move it to Support lib.
This is a follow up patch to r329929 and https://reviews.llvm.org/D45244

Reviewers: bkramer, dblaikie

Reviewed By: bkramer

Subscribers: mehdi_amini, eraman, llvm-commits

Differential Revision: https://reviews.llvm.org/D45606

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330093 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[DebugInfo] Use WithColor to print errors/warnings
Jonas Devlieghere [Sat, 14 Apr 2018 22:07:23 +0000 (22:07 +0000)]
[DebugInfo] Use WithColor to print errors/warnings

Use the convenience methods from WithColor to consistently print errors
and warnings in libDebugInfo.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330092 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[Support] Add convenience functions to WithColor. NFC.
Jonas Devlieghere [Sat, 14 Apr 2018 21:36:42 +0000 (21:36 +0000)]
[Support] Add convenience functions to WithColor. NFC.

Create convenience functions for printing error, warning and note to
stdout. Previously we had similar functions being used in dsymutil, but
given that this pattern is so common it makes sense to make it available
globally.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330091 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86] Tests for unsigned saturation downconvert detection.
Artur Gainullin [Sat, 14 Apr 2018 20:10:17 +0000 (20:10 +0000)]
[X86] Tests for unsigned saturation downconvert detection.

One more test for smax(smin(x, C2), C1) pattern.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330090 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[InstCombine] Enable Add/Sub simplifications with only 'reassoc' FMF
Warren Ristow [Sat, 14 Apr 2018 19:18:28 +0000 (19:18 +0000)]
[InstCombine] Enable Add/Sub simplifications with only 'reassoc' FMF

These simplifications were previously enabled only with isFast(), but that
is more restrictive than required. Since r317488, FMF has 'reassoc' to
control these cases at a finer level.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330089 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86] Tests for unsigned saturation downconvert detection.
Artur Gainullin [Sat, 14 Apr 2018 19:09:02 +0000 (19:09 +0000)]
[X86] Tests for unsigned saturation downconvert detection.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330088 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[InstCombine] add shift+logic tests (PR37098); NFC
Sanjay Patel [Sat, 14 Apr 2018 13:39:02 +0000 (13:39 +0000)]
[InstCombine] add shift+logic tests (PR37098); NFC

It debateable whether instcombine should be in the business of
reassociation, but it is currently.

These tests and PR37098 demonstrate a missing ability to do a
simple reassociation that allows eliminating shifts.

If we decide that functionality belongs somewhere else, then we
should still have some tests to show that we've intentionally
limited instcombine to *not* include this ability.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330086 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86][MMX] Set PAVG/PHADD/PMIN/PMAX/PSIGN instructions to use same scheduler classes...
Simon Pilgrim [Sat, 14 Apr 2018 13:06:38 +0000 (13:06 +0000)]
[X86][MMX] Set PAVG/PHADD/PMIN/PMAX/PSIGN instructions to use same scheduler classes as SSE/AVX

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330085 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[NFC] fix trivial typos in document and comments
Hiroshi Inoue [Sat, 14 Apr 2018 08:59:00 +0000 (08:59 +0000)]
[NFC] fix trivial typos in document and comments

"not not" -> "not" etc

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330083 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[AMDGPU] Add gfx902 product names
Tony Tye [Sat, 14 Apr 2018 01:58:10 +0000 (01:58 +0000)]
[AMDGPU] Add gfx902 product names

Differential Revision: https://reviews.llvm.org/D45609

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330081 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[WebAssembly] Fix a bug in MachineBasicBlock::findDebugLoc() call
Heejin Ahn [Sat, 14 Apr 2018 00:12:12 +0000 (00:12 +0000)]
[WebAssembly] Fix a bug in MachineBasicBlock::findDebugLoc() call

Summary:
InsertPos is within the bacic block `Header`, so `findDebugLoc()` should
be called on not `MBB` but `Header` instead.

Reviewers: yurydelendik

Subscribers: jfb, dschuff, aprantl, sbc100, jgravelle-google, sunfish, JDevlieghere, llvm-commits

Differential Revision: https://reviews.llvm.org/D45648

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330079 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86] Add the bizarro movsww and movzww mnemonics for the disassembler.
Craig Topper [Fri, 13 Apr 2018 23:57:54 +0000 (23:57 +0000)]
[X86] Add the bizarro movsww and movzww mnemonics for the disassembler.

The destination size of the movzx/movsx instruction is controlled by the normal operand size mechanisms. Only the input type is fixed.

This means that a 0x66 prefix on the encoding for zext/sext 16->32 should really produce a 16->16 instruction. Functionally this is equivalent to a GR16->GR16 move since bits 16 and above will be preserved. So nothing is actually extended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330078 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoMachO: trap unreachable instructions
Tim Northover [Fri, 13 Apr 2018 22:25:20 +0000 (22:25 +0000)]
MachO: trap unreachable instructions

Debugability is more important than saving 4 bytes to let us to fall
through to nonense.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330073 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[InstCombine][NFC] masked-merge: add 'and' tests, too.
Roman Lebedev [Fri, 13 Apr 2018 21:57:01 +0000 (21:57 +0000)]
[InstCombine][NFC] masked-merge: add 'and' tests, too.

(and plain 'or', for completeness sake.)

After submitting D45631, i have realized that it will *already*
affect 'and' pattern, and it was obvious that there were no
good test patterns to show that.

Since the masked-merge.ll is getting kinda big,
unify naming schemes a bit, and split into 'xor'/'and'/'or'
testfiles, with the only difference being the last operation.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330072 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[DebugInfo][OPT] NFC follow-up on "Fixing a couple of DI duplication bugs of CloneModule"
Roman Tereshin [Fri, 13 Apr 2018 21:23:11 +0000 (21:23 +0000)]
[DebugInfo][OPT] NFC follow-up on "Fixing a couple of DI duplication bugs of CloneModule"

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330070 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[DebugInfo][OPT] Fixing a couple of DI duplication bugs of CloneModule
Roman Tereshin [Fri, 13 Apr 2018 21:22:24 +0000 (21:22 +0000)]
[DebugInfo][OPT] Fixing a couple of DI duplication bugs of CloneModule

As demonstrated by the regression tests added in this patch, the
following cases are valid cases:

1. A Function with no DISubprogram attached, but various debug info
  related to its instructions, coming, for instance, from an inlined
  function, also defined somewhere else in the same module;
2. ... or coming exclusively from the functions inlined and eliminated
  from the module entirely.

The ValueMap shared between CloneFunctionInto calls within CloneModule
needs to contain identity mappings for all of the DISubprogram's to
prevent them from being duplicated by MapMetadata / RemapInstruction
calls, this is achieved via DebugInfoFinder collecting all the
DISubprogram's. However, CloneFunctionInto was missing calls into
DebugInfoFinder for functions w/o DISubprogram's attached, but still
referring DISubprogram's from within (case 1). This patch fixes that.

The fix above, however, exposes another issue: if a module contains a
DISubprogram referenced only indirectly from other debug info
metadata, but not attached to any Function defined within the module
(case 2), cloning such a module causes a DICompileUnit duplication: it
will be moved in indirecty via a DISubprogram by DebugInfoFinder first
(because of the first bug fix described above), without being
self-mapped within the shared ValueMap, and then will be copied during
named metadata cloning. So this patch makes sure DebugInfoFinder
visits DICompileUnit's referenced from DISubprogram's as it goes w/o
re-processing llvm.dbg.cu list over and over again for every function
cloned, and makes sure that CloneFunctionInto self-maps
DICompileUnit's referenced from the entire function, not just its own
DISubprogram attached that may also be missing.

The most convenient way of tesing CloneModule I found is to rely on
CloneModule call from `opt -run-twice`, instead of writing tedious
unit tests. That feature has a couple of properties that makes it hard
to use for this purpose though:

1. CloneModule doesn't copy source filename, making `opt -run-twice`
  report it as a difference.
2. `opt -run-twice` does the second run on the original module, not
  its clone, making the result of cloning completely invisible in opt's
  actual output with and without `-run-twice` both, which directly
  contradicts `opt -run-twice`s own error message.

This patch fixes this as well.

Reviewed By: aprantl

Reviewers: loladiro, GorNishanov, espindola, echristo, dexonsmith

Subscribers: vsk, debug-info, JDevlieghere, llvm-commits

Differential Revision: https://reviews.llvm.org/D45593

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330069 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[Hexagon] Initial instruction cost model for auto-vectorization
Krzysztof Parzyszek [Fri, 13 Apr 2018 20:46:50 +0000 (20:46 +0000)]
[Hexagon] Initial instruction cost model for auto-vectorization

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330065 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoRevert r329956, "AArch64: Introduce a DAG combine for folding offsets into addresses."
Peter Collingbourne [Fri, 13 Apr 2018 20:21:00 +0000 (20:21 +0000)]
Revert r329956, "AArch64: Introduce a DAG combine for folding offsets into addresses."

Caused a hang and eventually an assertion failure in LTO builds
of 7zip-benchmark on aarch64 iOS targets.
http://green.lab.llvm.org/green/job/lnt-ctmark-aarch64-O3-flto/2024/

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330063 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[LV] Introduce TTI::getMinimumVF
Krzysztof Parzyszek [Fri, 13 Apr 2018 20:16:32 +0000 (20:16 +0000)]
[LV] Introduce TTI::getMinimumVF

The function getMinimumVF(ElemWidth) will return the minimum VF for
a vector with elements of size ElemWidth bits. This value will only
apply to targets for which TTI::shouldMaximizeVectorBandwidth returns
true. The value of 0 indicates that there is no minimum VF.

Differential Revision: https://reviews.llvm.org/D45271

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330062 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[DebugInfo] Change std::sort to llvm::sort in response to r327219
Mandeep Singh Grang [Fri, 13 Apr 2018 19:50:51 +0000 (19:50 +0000)]
[DebugInfo] Change std::sort to llvm::sort in response to r327219

r327219 added wrappers to std::sort which randomly shuffle the container before
sorting.  This will help in uncovering non-determinism caused due to undefined
sorting order of objects having the same key.

To make use of that infrastructure we need to invoke llvm::sort instead of
std::sort.

Note: This patch is one of a series of patches to replace *all* std::sort to
llvm::sort.  Refer the comments section in D44363 for a list of all the
required patches.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330061 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[Power9] Add the TLS store instructions to the Power 9 model
Stefan Pintilie [Fri, 13 Apr 2018 19:49:58 +0000 (19:49 +0000)]
[Power9] Add the TLS store instructions to the Power 9 model

The Power 9 scheduler model should now include the TLS instructions.
We can now, once again, mark the model as complete.
From now on, if instructions are added to Power 9 but are not
added to the model the build should produce an error. Hopefully
that will alert the developer who is adding new instructions
that they should also be added to the scheulder model.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330060 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[Transforms] Change std::sort to llvm::sort in response to r327219
Mandeep Singh Grang [Fri, 13 Apr 2018 19:47:57 +0000 (19:47 +0000)]
[Transforms] Change std::sort to llvm::sort in response to r327219

Summary:
r327219 added wrappers to std::sort which randomly shuffle the container before sorting.
This will help in uncovering non-determinism caused due to undefined sorting
order of objects having the same key.

To make use of that infrastructure we need to invoke llvm::sort instead of std::sort.

Note: This patch is one of a series of patches to replace *all* std::sort to llvm::sort.
Refer the comments section in D44363 for a list of all the required patches.

Reviewers: kcc, pcc, danielcdh, jmolloy, sanjoy, dberlin, ruiu

Reviewed By: ruiu

Subscribers: ruiu, llvm-commits

Differential Revision: https://reviews.llvm.org/D45142

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330059 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[MC] Change std::sort to llvm::sort in response to r327219
Mandeep Singh Grang [Fri, 13 Apr 2018 19:47:01 +0000 (19:47 +0000)]
[MC] Change std::sort to llvm::sort in response to r327219

Summary:
r327219 added wrappers to std::sort which randomly shuffle the container before sorting.
This will help in uncovering non-determinism caused due to undefined sorting
order of objects having the same key.

To make use of that infrastructure we need to invoke llvm::sort instead of std::sort.

Note: This patch is one of a series of patches to replace *all* std::sort to llvm::sort.
Refer the comments section in D44363 for a list of all the required patches.

Reviewers: grosbach, void, ruiu

Reviewed By: ruiu

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D45138

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330058 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[ProfileData] Change std::sort to llvm::sort in response to r327219
Mandeep Singh Grang [Fri, 13 Apr 2018 19:46:36 +0000 (19:46 +0000)]
[ProfileData] Change std::sort to llvm::sort in response to r327219

Summary:
r327219 added wrappers to std::sort which randomly shuffle the container before sorting.
This will help in uncovering non-determinism caused due to undefined sorting
order of objects having the same key.

To make use of that infrastructure we need to invoke llvm::sort instead of std::sort.

Note: This patch is one of a series of patches to replace *all* std::sort to llvm::sort.
Refer the comments section in D44363 for a list of all the required patches.

Reviewers: bogner, vsk, eraman, ruiu

Reviewed By: ruiu

Subscribers: ruiu, llvm-commits

Differential Revision: https://reviews.llvm.org/D45139

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330057 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[CostModel][X86] Add some specific cpu targets to the cost models
Simon Pilgrim [Fri, 13 Apr 2018 19:30:15 +0000 (19:30 +0000)]
[CostModel][X86] Add some specific cpu targets to the cost models

We're mostly testing with generic isa attributes, but PR36550 will require testing of specific target's scheduler models as well.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330056 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[CostModel][X86] Split fma arith costs tests from other fp tests
Simon Pilgrim [Fri, 13 Apr 2018 19:12:32 +0000 (19:12 +0000)]
[CostModel][X86] Split fma arith costs tests from other fp tests

Was proving cumbersome to test with/without fma

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330054 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[LTO] Change std::sort to llvm::sort in response to r327219
Mandeep Singh Grang [Fri, 13 Apr 2018 19:12:20 +0000 (19:12 +0000)]
[LTO] Change std::sort to llvm::sort in response to r327219

Summary:
r327219 added wrappers to std::sort which randomly shuffle the container before sorting.
This will help in uncovering non-determinism caused due to undefined sorting
order of objects having the same key.

To make use of that infrastructure we need to invoke llvm::sort instead of std::sort.

Note: This patch is one of a series of patches to replace *all* std::sort to llvm::sort.
Refer D44363 for a list of all the required patches.

Reviewers: pcc, mehdi_amini, ruiu

Reviewed By: ruiu

Subscribers: ruiu, inglorion, eraman, llvm-commits

Differential Revision: https://reviews.llvm.org/D45137

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330053 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[CostModel][X86] Regenerate latency/codesize cost tests
Simon Pilgrim [Fri, 13 Apr 2018 18:56:58 +0000 (18:56 +0000)]
[CostModel][X86] Regenerate latency/codesize cost tests

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330052 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[CostModel][X86] Regenerate cast conversion cost tests
Simon Pilgrim [Fri, 13 Apr 2018 18:56:05 +0000 (18:56 +0000)]
[CostModel][X86] Regenerate cast conversion cost tests

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330051 91177308-0d34-0410-b5e6-96231b3b80d8