OSDN Git Service
Andrew Kaylor [Mon, 29 Apr 2013 17:49:40 +0000 (17:49 +0000)]
Exposing MCJIT through C API
Re-submitting with fix for OCaml dependency problems (removing dependency on SectionMemoryManager when it isn't used).
Patch by Fili Pizlo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180720
91177308-0d34-0410-b5e6-
96231b3b80d8
Rafael Espindola [Mon, 29 Apr 2013 17:24:34 +0000 (17:24 +0000)]
Propagate relocation info to resolveRelocation.
This gets most of the MCJITs tests passing with MachO.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180716
91177308-0d34-0410-b5e6-
96231b3b80d8
Rafael Espindola [Mon, 29 Apr 2013 14:44:23 +0000 (14:44 +0000)]
Replace ObjRelocationInfo with relocation_iterator.
For MachO we need information that is not represented in ObjRelocationInfo.
Instead of copying the bits we think are needed from a relocation_iterator,
just pass the relocation_iterator down to the format specific functions.
No functionality change yet as we still drop the information once
processRelocationRef returns.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180711
91177308-0d34-0410-b5e6-
96231b3b80d8
Michael Gottesman [Mon, 29 Apr 2013 07:29:08 +0000 (07:29 +0000)]
Add in some conditional compilation in order to silence an unused variable warning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180700
91177308-0d34-0410-b5e6-
96231b3b80d8
Michael Gottesman [Mon, 29 Apr 2013 06:53:53 +0000 (06:53 +0000)]
[objc-arc] Apply the RV optimization to retains next to calls in ObjCARCContract instead of ObjCARCOpts.
Turning retains into retainRV calls disrupts the data flow analysis in
ObjCARCOpts. Thus we move it as late as we can by moving it into
ObjCARCContract.
We leave in the conversion from retainRV -> retain in ObjCARCOpt since
it enables the dataflow analysis.
rdar://
10813093
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180698
91177308-0d34-0410-b5e6-
96231b3b80d8
Michael Gottesman [Mon, 29 Apr 2013 06:16:57 +0000 (06:16 +0000)]
Added statistics to count the number of retains/releases before/after optimization.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180697
91177308-0d34-0410-b5e6-
96231b3b80d8
Michael Gottesman [Mon, 29 Apr 2013 06:16:55 +0000 (06:16 +0000)]
Removed trailing whitespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180696
91177308-0d34-0410-b5e6-
96231b3b80d8
Michael Gottesman [Mon, 29 Apr 2013 05:25:39 +0000 (05:25 +0000)]
Fix for r180693. = /.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180694
91177308-0d34-0410-b5e6-
96231b3b80d8
Michael Gottesman [Mon, 29 Apr 2013 05:13:13 +0000 (05:13 +0000)]
[objc-arc-annotations] Moved the disabling of call movement to ConnectTDBUTraversals so that I can prevent Changed = true from being set. This prevents an infinite loop.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180693
91177308-0d34-0410-b5e6-
96231b3b80d8
Benjamin Kramer [Sun, 28 Apr 2013 07:47:04 +0000 (07:47 +0000)]
Inline variable into the #ifdef block where it's used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180688
91177308-0d34-0410-b5e6-
96231b3b80d8
Jia Liu [Sun, 28 Apr 2013 01:45:11 +0000 (01:45 +0000)]
AArch64 InstrFormats:
delete blank.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180687
91177308-0d34-0410-b5e6-
96231b3b80d8
Joerg Sonnenberger [Sat, 27 Apr 2013 22:32:54 +0000 (22:32 +0000)]
Fix typo. Stupid me.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180686
91177308-0d34-0410-b5e6-
96231b3b80d8
Eric Christopher [Sat, 27 Apr 2013 22:23:16 +0000 (22:23 +0000)]
Regen.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180685
91177308-0d34-0410-b5e6-
96231b3b80d8
Joerg Sonnenberger [Sat, 27 Apr 2013 22:12:32 +0000 (22:12 +0000)]
Only use cxxabi.h's demangler, if it is actually available.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180684
91177308-0d34-0410-b5e6-
96231b3b80d8
Ulrich Weigand [Sat, 27 Apr 2013 18:48:23 +0000 (18:48 +0000)]
Handle tied sub-operands in AsmMatcherEmitter
The problem this patch addresses is the handling of register tie
constraints in AsmMatcherEmitter, where one operand is tied to a
sub-operand of another operand. The typical scenario for this to
happen is the tie between the "write-back" register of a pre-inc
instruction, and the base register sub-operand of the memory address
operand of that instruction.
The current AsmMatcherEmitter code attempts to handle tied
operands by emitting the operand as usual first, and emitting
a CVT_Tied node when handling the second (tied) operand. However,
this really only works correctly if the tied operand does not
have sub-operands (and isn't a sub-operand itself). Under those
circumstances, a wrong MC operand list is generated.
In discussions with Jim Grosbach, it turned out that the MC operand
list really ought not to contain tied operands in the first place;
instead, it ought to consist of exactly those operands that are
named in the AsmString. However, getting there requires significant
rework of (some) targets.
This patch fixes the immediate problem, and at the same time makes
one (small) step in the direction of the long-term solution, by
implementing two changes:
1. Restricts the AsmMatcherEmitter handling of tied operands to
apply solely to simple operands (not complex operands or
sub-operand of such).
This means that at least we don't get silently corrupt MC operand
lists as output. However, if we do have tied sub-operands, they
would now no longer be handled at all, except for:
2. If we have an operand that does not occur in the AsmString,
and also isn't handled as tied operand, simply emit a dummy
MC operand (constant 0).
This works as long as target code never attempts to access
MC operands that do no not occur in the AsmString (and are
not tied simple operands), which happens to be the case for
all targets where this situation can occur (ARM and PowerPC).
[ Note that this change means that many of the ARM custom
converters are now superfluous, since the implement the
same "hack" now performed already by common code. ]
Longer term, we ought to fix targets to never access *any*
MC operand that does not occur in the AsmString (including
tied simple operands), and then finally completely remove
all such operands from the MC operand list.
Patch approved by Jim Grosbach.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180677
91177308-0d34-0410-b5e6-
96231b3b80d8
Shuxin Yang [Sat, 27 Apr 2013 18:02:12 +0000 (18:02 +0000)]
Fix a XOR reassociation bug.
When Reassociator optimize "(x | C1)" ^ "(X & C2)", it may swap the two
subexpressions, however, it forgot to swap cached constants (of C1 and C2)
accordingly.
rdar://
13739160
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180676
91177308-0d34-0410-b5e6-
96231b3b80d8
Dmitri Gribenko [Sat, 27 Apr 2013 16:34:24 +0000 (16:34 +0000)]
Documentation: end option description with a period
Patch by Dimitry Andric.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180675
91177308-0d34-0410-b5e6-
96231b3b80d8
Tim Northover [Sat, 27 Apr 2013 11:56:14 +0000 (11:56 +0000)]
AArch64: convert MC-layer test to .s file
The CodeGen aspects of this test are already covered by cfi-frame.ll;
making it an assembly file reduces the risk of incidental changes
affecting the test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180671
91177308-0d34-0410-b5e6-
96231b3b80d8
Michael Gottesman [Sat, 27 Apr 2013 05:25:54 +0000 (05:25 +0000)]
[objc-arc] Test cleanups.
Mainly adding paranoid checks for the closing brace of a function to
help with FileCheck error readability. Also some other minor changes.
No actual CHECK changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180668
91177308-0d34-0410-b5e6-
96231b3b80d8
Andrew Trick [Sat, 27 Apr 2013 03:54:20 +0000 (03:54 +0000)]
Generalize the MachineTraceMetrics public API.
Naturally, we should be able to pass in extra instructions, not just
extra blocks.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180667
91177308-0d34-0410-b5e6-
96231b3b80d8
Andrew Trick [Sat, 27 Apr 2013 03:54:17 +0000 (03:54 +0000)]
Add target flags to MachineMemOperands.
This seems to me an obvious place to allow target passes to annotate
memory operations. There are plenty of bits, and I'm not aware of
another good way for early target passes to propagate hints along to
later passes. Target independent transforms can simply preserve them,
the way they preserve the other flags. Like MachineMemOperands in
general, if the target flags are lost we must still generate correct
code.
This has lots of uses, but I want this flexibility now to make it
easier to work with the new MachineTraceMetrics
analysis. MachineTraceMetrics can gather a lot of information about
instructions based on the surrounding code. This information can be
used to influence postRA machine passes that don't work on SSA form.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180666
91177308-0d34-0410-b5e6-
96231b3b80d8
Andrew Trick [Sat, 27 Apr 2013 03:54:14 +0000 (03:54 +0000)]
whitespace
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180665
91177308-0d34-0410-b5e6-
96231b3b80d8
Eric Christopher [Sat, 27 Apr 2013 01:07:52 +0000 (01:07 +0000)]
Use the target triple from the target machine rather than the module
to determine whether or not we're on a darwin platform for debug code
emitting.
Solves the problem of a module with no triple on the command line
and no triple in the module using non-gdb ok features on darwin. Fix
up the member-pointers test to check the correct things for cross
platform (DW_FORM_flag is a good prefix).
Unfortunately no testcase because I have no ideas how to test something
without a triple and without a triple in the module yet check
precisely on two platforms. Ideas welcome.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180660
91177308-0d34-0410-b5e6-
96231b3b80d8
Eric Christopher [Sat, 27 Apr 2013 01:07:22 +0000 (01:07 +0000)]
Move the XFAIL out of the middle of a comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180659
91177308-0d34-0410-b5e6-
96231b3b80d8
Rafael Espindola [Sat, 27 Apr 2013 00:43:16 +0000 (00:43 +0000)]
Make all darwin ppc stubs local.
This fixes pr15763.
Patch by David Fang.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180657
91177308-0d34-0410-b5e6-
96231b3b80d8
Manman Ren [Sat, 27 Apr 2013 00:26:11 +0000 (00:26 +0000)]
Struct-path aware TBAA: change the format of TBAAStructType node.
We switch the order of offset and field type to make TBAAStructType node
(name, parent node, offset) similar to scalar TBAA node (name, parent node).
TypeIsImmutable is added to TBAAStructTag node.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180654
91177308-0d34-0410-b5e6-
96231b3b80d8
Adrian Prantl [Fri, 26 Apr 2013 21:57:17 +0000 (21:57 +0000)]
Cleanup and document MachineLocation.
Clarify documentation and API to make the difference between register and
register-indirect addressed locations more explicit. Put in a comment
to point out that with the current implementation we cannot specify
a register-indirect location with offset 0 (a breg 0 in DWARF).
No functionality change intended.
rdar://problem/
13658587
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180641
91177308-0d34-0410-b5e6-
96231b3b80d8
Bill Wendling [Fri, 26 Apr 2013 21:15:08 +0000 (21:15 +0000)]
Micro-optimization
TLVs probably won't be as common as the other types of variables. Check for them
last before defaulting to "DATA".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180631
91177308-0d34-0410-b5e6-
96231b3b80d8
Benjamin Kramer [Fri, 26 Apr 2013 21:04:21 +0000 (21:04 +0000)]
Make CHECK lines a bit less strict so they also match code generated for win64.
Hopefully brings the windows buildbots back to life.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180630
91177308-0d34-0410-b5e6-
96231b3b80d8
Nadav Rotem [Fri, 26 Apr 2013 20:19:41 +0000 (20:19 +0000)]
Teach the interpreter to handle vector compares and additional vector arithmetic operations.
Patch by Yuri Veselov.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180626
91177308-0d34-0410-b5e6-
96231b3b80d8
Rafael Espindola [Fri, 26 Apr 2013 20:07:33 +0000 (20:07 +0000)]
Use llvm/Object/MachO.h in macho-dumper. Drop the old macho parser.
For Mach-O there were 2 implementations for parsing object files. A
standalone llvm/Object/MachOObject.h and llvm/Object/MachO.h which
implements the generic interface in llvm/Object/ObjectFile.h.
This patch adds the missing features to MachO.h, moves macho-dump to
use MachO.h and removes ObjectFile.h.
In addition to making sure that check-all is clean, I checked that the
new version produces exactly the same output in all Mach-O files in a
llvm+clang build directory (including executables and shared
libraries).
To test the performance, I ran macho-dump over all the files in a
llvm+clang build directory again, but this time redirecting the output
to /dev/null. Both the old and new versions take about 4.6 seconds
(2.5 user) to finish.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180624
91177308-0d34-0410-b5e6-
96231b3b80d8
Rafael Espindola [Fri, 26 Apr 2013 19:07:40 +0000 (19:07 +0000)]
The exception demo needs its symbols exported.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180622
91177308-0d34-0410-b5e6-
96231b3b80d8
Tom Stellard [Fri, 26 Apr 2013 18:32:24 +0000 (18:32 +0000)]
R600: Initialize AMDGPUMachineFunction::ShaderType to ShaderType::COMPUTE
We need to intialize this to something and since clang does not set
the shader type attribute and clang is used only for compute shaders,
initializing it to COMPUTE seems like the best choice.
Reviewed-by: Christian König <christian.koenig@amd.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180620
91177308-0d34-0410-b5e6-
96231b3b80d8
Adrian Prantl [Fri, 26 Apr 2013 18:10:54 +0000 (18:10 +0000)]
cleanup testcase some more
rdar://problem/
13056109
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180619
91177308-0d34-0410-b5e6-
96231b3b80d8
Adrian Prantl [Fri, 26 Apr 2013 18:10:50 +0000 (18:10 +0000)]
fix a typo that due to cu&paste quadrupled itself
rdar://problem/
13056109
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180618
91177308-0d34-0410-b5e6-
96231b3b80d8
Quentin Colombet [Fri, 26 Apr 2013 17:54:54 +0000 (17:54 +0000)]
ARM: Fix encoding of hint instruction for Thumb.
"hint" space for Thumb actually overlaps the encoding space of the CPS
instruction. In actuality, hints can be defined as CPS instructions where imod
and M bits are all nil.
Handle decoding of permitted nop-compatible hints (i.e. nop, yield, wfi, wfe,
sev) in DecodeT2CPSInstruction.
This commit adds a proper diagnostic message for Imm0_4 and updates all tests.
Patch by Mihail Popa <Mihail.Popa@arm.com>.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180617
91177308-0d34-0410-b5e6-
96231b3b80d8
Rafael Espindola [Fri, 26 Apr 2013 17:54:46 +0000 (17:54 +0000)]
Add missing ':'.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180616
91177308-0d34-0410-b5e6-
96231b3b80d8
Adrian Prantl [Fri, 26 Apr 2013 17:48:33 +0000 (17:48 +0000)]
Bugfix for the debug intrinsic handling in InstCombiner:
Since we can't guarantee that the original dbg.declare instrinsic
is removed by LowerDbgDeclare(), we need to make sure that we are
not inserting the same dbg.value intrinsic over and over.
This removes tons of redundant DIEs when compiling optimized code.
rdar://problem/
13056109
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180615
91177308-0d34-0410-b5e6-
96231b3b80d8
Ulrich Weigand [Fri, 26 Apr 2013 16:53:15 +0000 (16:53 +0000)]
PowerPC: Use RegisterOperand instead of RegisterClass operands
In the default PowerPC assembler syntax, registers are specified simply
by number, so they cannot be distinguished from immediate values (without
looking at the opcode). This means that the default operand matching logic
for the asm parser does not work, and we need to specify custom matchers.
Since those can only be specified with RegisterOperand classes and not
directly on the RegisterClass, all instructions patterns used by the asm
parser need to use a RegisterOperand (instead of a RegisterClass) for
all their register operands.
This patch adds one RegisterOperand for each RegisterClass, using the
same name as the class, just in lower case, and updates all instruction
patterns to use RegisterOperand instead of RegisterClass operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180611
91177308-0d34-0410-b5e6-
96231b3b80d8
Silviu Baranga [Fri, 26 Apr 2013 15:52:24 +0000 (15:52 +0000)]
Re-write the address propagation code for pre-indexed loads/stores to take into account some previously misssed cases (PRE_DEC addressing mode, the offset and base address are swapped, etc). This should fix PR15581.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180609
91177308-0d34-0410-b5e6-
96231b3b80d8
Ulrich Weigand [Fri, 26 Apr 2013 15:39:57 +0000 (15:39 +0000)]
PowerPC: Fix encoding of vsubcuw and vsum4sbs instructions
When testing the asm parser, I noticed wrong encodings for the
above instructions (wrong sub-opcodes).
Tests will be added together with the asm parser.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180608
91177308-0d34-0410-b5e6-
96231b3b80d8
Ulrich Weigand [Fri, 26 Apr 2013 15:39:40 +0000 (15:39 +0000)]
PowerPC: Fix encoding of stfsu and stfdu instructions
When testing the asm parser, I noticed wrong encodings for the
above instructions (wrong sub-opcodes). Note that apparently
the compiler currently never generates pre-inc instructions
for floating point types for some reason ...
Tests will be added together with the asm parser.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180607
91177308-0d34-0410-b5e6-
96231b3b80d8
Ulrich Weigand [Fri, 26 Apr 2013 15:39:12 +0000 (15:39 +0000)]
PowerPC: Fix encoding of rldimi and rldcl instructions
When testing the asm parser, I noticed wrong encodings for the
above instructions (wrong operand name in rldimi, wrong form
and sub-opcode for rldcl).
Tests will be added together with the asm parser.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180606
91177308-0d34-0410-b5e6-
96231b3b80d8
Ulrich Weigand [Fri, 26 Apr 2013 15:38:30 +0000 (15:38 +0000)]
PowerPC: Support PC-relative fixup_ppc_brcond14.
When testing the asm parser, I ran into an error when using a conditional
branch to an external symbol (this doesn't occur in compiler-generated
code) due to missing support in PPCELFObjectWriter::getRelocTypeInner.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180605
91177308-0d34-0410-b5e6-
96231b3b80d8
Benjamin Kramer [Fri, 26 Apr 2013 15:00:57 +0000 (15:00 +0000)]
ARM/NEON: Pattern match vector integer abs to vabs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180604
91177308-0d34-0410-b5e6-
96231b3b80d8
Benjamin Kramer [Fri, 26 Apr 2013 12:05:21 +0000 (12:05 +0000)]
X86: Now that we have a canonical form for vector integer abs, match it into pabs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180600
91177308-0d34-0410-b5e6-
96231b3b80d8
Benjamin Kramer [Fri, 26 Apr 2013 09:19:19 +0000 (09:19 +0000)]
DAGCombiner: Canonicalize vector integer abs in the same way we do it for scalars.
This already helps SSE2 x86 a lot because it lacks an efficient way to
represent a vector select. The long term goal is to enable the backend to match
a canonicalized pattern into a single instruction (e.g. vabs or pabs).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180597
91177308-0d34-0410-b5e6-
96231b3b80d8
Nadav Rotem [Fri, 26 Apr 2013 05:08:59 +0000 (05:08 +0000)]
LoopVectorizer: Calculate the number of pointers to disambiguate at runtime based on the numbers of reads and writes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180593
91177308-0d34-0410-b5e6-
96231b3b80d8
Michael Gottesman [Fri, 26 Apr 2013 03:27:39 +0000 (03:27 +0000)]
Use 'git svn find-rev' in git-svnrevert instead of shell script fu.
Thanks Chandler!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180592
91177308-0d34-0410-b5e6-
96231b3b80d8
Michael Gottesman [Fri, 26 Apr 2013 01:12:18 +0000 (01:12 +0000)]
Revert "[objc-arc] Added ImpreciseAutoreleaseSet to track autorelease calls that were once autoreleaseRV instructions."
This reverts commit r180222.
I think this might tie in with a different problem which will require a
different approach potentially. I am reverting this in the case I need to go
down that second path.
My apologies for the noise. = /.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180590
91177308-0d34-0410-b5e6-
96231b3b80d8
Michael Gottesman [Fri, 26 Apr 2013 01:04:45 +0000 (01:04 +0000)]
Updated GettingStarted.rst so that it references utils/git-svn for git-svnup instead of catting it into the documentation itself.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180589
91177308-0d34-0410-b5e6-
96231b3b80d8
Michael Gottesman [Fri, 26 Apr 2013 00:58:45 +0000 (00:58 +0000)]
Added the scripts git-svnup/git-svnrevert to utils/git-svn.
It makes more sense to have git-svnup here than catting said file in the
documentation (where we should rather point users to this directory).
I included git-svnrevert as an additional gift to the community. I will update
the documentation in a second commit later today.
git-svnrevert takes in a git hash for a commit, looks up the svn revision for
said commit and then creates the normal git revert commit message with the one
liner message, except instead of saying
Revert "<<<INSERT ONELINER HERE>>>"
This reverts commit <<<INSERT GITHASH HERE>>>
It says:
Revert "<<<INSERT ONELINER HERE>>>"
This reverts commit r<<<INSERT SVN REVISION HERE>>>
so git hashes will not escape into our svn logs (which just look unseemly).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180587
91177308-0d34-0410-b5e6-
96231b3b80d8
Jack Carter [Thu, 25 Apr 2013 23:31:35 +0000 (23:31 +0000)]
Mips assembler: .set reorder support
Mips have delayslots for certain instructions
like jumps and branches. These are instructions
that follow the branch or jump and are executed
before the jump or branch is completed.
Early Mips compilers could not cope with delayslots
and left them up to the assembler. The assembler would
fill the delayslots with the appropriate instruction,
usually just a nop to allow correct runtime behavior.
The default behavior for this is set with .set reorder.
To tell the assembler that you don't want it to mess with
the delayslot one used .set noreorder.
For backwards compatibility we need to support
.set reorder and have it be the default behavior in the
assembler.
Our support for it is to insert a NOP directly after an
instruction with a delayslot when in .set reorder mode.
Contributer: Vladimir Medic
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180584
91177308-0d34-0410-b5e6-
96231b3b80d8
Michael Liao [Thu, 25 Apr 2013 21:31:34 +0000 (21:31 +0000)]
Remove SMLoc paired with CHECK-NOT patterns. Not functionality change.
Pattern has source location by itself. After adding a trivial method to
retrieve it, it's unnecessary to pair a source location for CHECK-NOT patterns.
One thing revised after this is the diagnostic info is more accurate by
pointing to the start of the CHECK-NOT pattern instead of the end of the
CHECK-NOT pattern. E.g. diagnostic message previously looks like
<stdin>:1:1: error: CHECK-NOT: string occurred!
test
^
test.txt:1:16: note: CHECK-NOT: pattern specified here
CHECK-NOT: test
^
is changed to
<stdin>:1:1: error: CHECK-NOT: string occurred!
test
^
test.txt:1:12: note: CHECK-NOT: pattern specified here
CHECK-NOT: test
^
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180578
91177308-0d34-0410-b5e6-
96231b3b80d8
Preston Gurd [Thu, 25 Apr 2013 21:31:33 +0000 (21:31 +0000)]
Make function documentation conform to llvm standards.
Expunge all remaining traces and use of live variable information.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180577
91177308-0d34-0410-b5e6-
96231b3b80d8
Arnold Schwaighofer [Thu, 25 Apr 2013 21:16:18 +0000 (21:16 +0000)]
ARM cost model: Integer div and rem is lowered to a function call
Reflect this in the cost model. I observed this in MiBench/consumer-lame.
radar://
13354716
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180576
91177308-0d34-0410-b5e6-
96231b3b80d8
Andrew Kaylor [Thu, 25 Apr 2013 21:02:36 +0000 (21:02 +0000)]
Re-enabling MCJIT object caching with memory leak fixed
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180575
91177308-0d34-0410-b5e6-
96231b3b80d8
Chris Lattner [Thu, 25 Apr 2013 20:34:16 +0000 (20:34 +0000)]
revert r179735, it has no testcases, and doesn't really make sense.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180574
91177308-0d34-0410-b5e6-
96231b3b80d8
Preston Gurd [Thu, 25 Apr 2013 20:29:37 +0000 (20:29 +0000)]
This patch adds the X86FixupLEAs pass, which will reduce instruction
latency for certain models of the Intel Atom family, by converting
instructions into their equivalent LEA instructions, when it is both
useful and possible to do so.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180573
91177308-0d34-0410-b5e6-
96231b3b80d8
Nadav Rotem [Thu, 25 Apr 2013 19:55:03 +0000 (19:55 +0000)]
LoopVectorizer: No need to generate pointer disambiguation checks between readonly pointers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180570
91177308-0d34-0410-b5e6-
96231b3b80d8
Reid Kleckner [Thu, 25 Apr 2013 19:34:41 +0000 (19:34 +0000)]
[mc-coff] Forward Linker Option flags into the .drectve section
Summary:
This is modelled on the Mach-O linker options implementation and should
support a Clang implementation of #pragma comment(lib/linker).
Reviewers: rafael
CC: llvm-commits
Differential Revision: http://llvm-reviews.chandlerc.com/D724
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180569
91177308-0d34-0410-b5e6-
96231b3b80d8
Rafael Espindola [Thu, 25 Apr 2013 19:27:05 +0000 (19:27 +0000)]
Fix section relocation for SECTIONREL32 with immediate offset.
Patch by Kai Nacke. This matches the gnu as output.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180568
91177308-0d34-0410-b5e6-
96231b3b80d8
Michael Liao [Thu, 25 Apr 2013 18:54:02 +0000 (18:54 +0000)]
Remove tailing whitespaces
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180564
91177308-0d34-0410-b5e6-
96231b3b80d8
Chad Rosier [Thu, 25 Apr 2013 17:10:21 +0000 (17:10 +0000)]
[inline asm] Add a test case for r180226. The specific issue is that the inline
assembly is requesting a 64-bit register, which is invalid for i386.
rdar://
13731657
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180445
91177308-0d34-0410-b5e6-
96231b3b80d8
Rafael Espindola [Thu, 25 Apr 2013 12:45:46 +0000 (12:45 +0000)]
Use a pointer as the relocation iterator.
Since the relocation iterator walks only the relocations in one section, we
can just use a pointer and avoid fetching information about the section at
every reference.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180262
91177308-0d34-0410-b5e6-
96231b3b80d8
Rafael Espindola [Thu, 25 Apr 2013 12:28:45 +0000 (12:28 +0000)]
Clarify getRelocationAddress x getRelocationOffset a bit.
getRelocationAddress is for dynamic libraries and executables,
getRelocationOffset for relocatable objects.
Mark the getRelocationAddress of COFF and MachO as not implemented yet. Add a
test of ELF's. llvm-readobj -r now prints the same values as readelf -r.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180259
91177308-0d34-0410-b5e6-
96231b3b80d8
Silviu Baranga [Thu, 25 Apr 2013 09:32:33 +0000 (09:32 +0000)]
Fix constant folding for one lane vector types. Constant folding one lane vector types not returns a vector instead of a scalar.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180254
91177308-0d34-0410-b5e6-
96231b3b80d8
Rafael Espindola [Thu, 25 Apr 2013 03:47:41 +0000 (03:47 +0000)]
Revert "Adding object caching support to MCJIT"
This reverts commit
07f03923137a91e3cca5d7fc075a22f8c9baf33a.
Looks like it broke the valgrind bot:
http://lab.llvm.org:8011/builders/llvm-x86_64-linux-vg_leak/builds/649
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180249
91177308-0d34-0410-b5e6-
96231b3b80d8
Rafael Espindola [Thu, 25 Apr 2013 03:19:12 +0000 (03:19 +0000)]
Revert "Exposing MCJIT through C API"
This reverts commit
8c31b298149ca3c3f2bbd9e8aa9a01c4d91f3d74.
It looks like this commit broke some bots:
http://lab.llvm.org:8011/builders/llvm-ppc64-linux2/builds/5209
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180248
91177308-0d34-0410-b5e6-
96231b3b80d8
Rafael Espindola [Thu, 25 Apr 2013 03:07:42 +0000 (03:07 +0000)]
Don't compute a std::vector<uint8_t> just to write it out a stream.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180247
91177308-0d34-0410-b5e6-
96231b3b80d8
Akira Hatanaka [Thu, 25 Apr 2013 02:22:07 +0000 (02:22 +0000)]
Test case for r180241.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180246
91177308-0d34-0410-b5e6-
96231b3b80d8
Akira Hatanaka [Thu, 25 Apr 2013 02:21:09 +0000 (02:21 +0000)]
Test case for r180238.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180245
91177308-0d34-0410-b5e6-
96231b3b80d8
Akira Hatanaka [Thu, 25 Apr 2013 01:21:25 +0000 (01:21 +0000)]
[mips] Add definitions of micromips load and store instructions.
Patch by Zoran Jovanovic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180241
91177308-0d34-0410-b5e6-
96231b3b80d8
Filipe Cabecinhas [Thu, 25 Apr 2013 01:17:54 +0000 (01:17 +0000)]
Allow users to choose identity used to sign tools.
Summary:
No change if the identity isn't defined by the makefile.
Reviewers: echristo
Differential Revision: http://llvm-reviews.chandlerc.com/D632
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180240
91177308-0d34-0410-b5e6-
96231b3b80d8
Akira Hatanaka [Thu, 25 Apr 2013 01:11:15 +0000 (01:11 +0000)]
[mips] Add definitions of micromips shift instructions.
Patch by Zoran Jovanovic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180238
91177308-0d34-0410-b5e6-
96231b3b80d8
Andrew Kaylor [Thu, 25 Apr 2013 00:03:58 +0000 (00:03 +0000)]
Fixing OCAML bindings for MCJIT
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180232
91177308-0d34-0410-b5e6-
96231b3b80d8
Tom Stellard [Wed, 24 Apr 2013 23:56:18 +0000 (23:56 +0000)]
R600: Initialize BooleanVectorContents
Fixes test/CodeGen/R600/setcc.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180231
91177308-0d34-0410-b5e6-
96231b3b80d8
Tom Stellard [Wed, 24 Apr 2013 23:56:14 +0000 (23:56 +0000)]
R600: Use SHT_PROGBITS for the .AMDGPU.config section
The libelf implementation that is distributed here:
http://www.mr511.de/software/english.html
will not parse sections that are marked SHT_NULL.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180230
91177308-0d34-0410-b5e6-
96231b3b80d8
Andrew Kaylor [Wed, 24 Apr 2013 23:33:53 +0000 (23:33 +0000)]
Exposing MCJIT through C API
Patch by Filip Pizlo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180229
91177308-0d34-0410-b5e6-
96231b3b80d8
Andrew Trick [Wed, 24 Apr 2013 23:19:56 +0000 (23:19 +0000)]
Fix for r180193 - MI Sched: eliminate local vreg.
Fixes PR15838. Need to check for blocks with nothing but dbg.value.
I'm not sure how to force this situation with a unit test. I tried to
reduce the test case in PR15838 (1k lines of metadata) but gave up.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180227
91177308-0d34-0410-b5e6-
96231b3b80d8
Chad Rosier [Wed, 24 Apr 2013 22:53:10 +0000 (22:53 +0000)]
[inline asm] Fix a crasher for an invalid value type/register class.
rdar://
13731657
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180226
91177308-0d34-0410-b5e6-
96231b3b80d8
Andrew Kaylor [Wed, 24 Apr 2013 22:39:12 +0000 (22:39 +0000)]
Making invalidateInstructionCache automatic in SectionMemoryManager
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180225
91177308-0d34-0410-b5e6-
96231b3b80d8
Michael Gottesman [Wed, 24 Apr 2013 22:18:18 +0000 (22:18 +0000)]
[objc-arc] Added ImpreciseAutoreleaseSet to track autorelease calls that were once autoreleaseRV instructions.
Due to the semantics of ARC, we must be extremely conservative with autorelease
calls inserted by the frontend since ARC gaurantees that said object will be in
the autorelease pool after that point, an optimization invariant that the
optimizer must respect.
On the other hand, we are allowed significantly more flexibility with
autoreleaseRV instructions.
Often times though this flexibility is disrupted by early transformations which
transform objc_autoreleaseRV => objc_autorelease if said instruction is no
longer being used as part of an RV pair (generally due to inlining). Since we
can not tell the difference in between an autorelease put into place by the
frontend and one created through said ``strength reduction'' we can not perform
these optimizations.
The addition of this set gets around said issues by allowing us to differentiate
in between said two cases.
rdar://problem/
13697741.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180222
91177308-0d34-0410-b5e6-
96231b3b80d8
Michael Gottesman [Wed, 24 Apr 2013 22:18:15 +0000 (22:18 +0000)]
Fixed comment typo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180221
91177308-0d34-0410-b5e6-
96231b3b80d8
Jack Carter [Wed, 24 Apr 2013 21:52:42 +0000 (21:52 +0000)]
Mips assembler: Add 64 bit testing for JAL
Contributer: Vladimir Medic
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180220
91177308-0d34-0410-b5e6-
96231b3b80d8
Rafael Espindola [Wed, 24 Apr 2013 19:47:55 +0000 (19:47 +0000)]
Use pointers to iterate over symbols.
While here, don't report a dummy symbol for relocations that don't have symbols.
We used to says such relocations were for the first defined symbol, but now we
return end_symbols(). The llvm-readobj output change agrees with otool.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180214
91177308-0d34-0410-b5e6-
96231b3b80d8
Rafael Espindola [Wed, 24 Apr 2013 17:54:35 +0000 (17:54 +0000)]
Don't produce an empty llvm.compiler.used in LTO.
LTO was always creating an empty llvm.compiler.used. With this patch we
now first check if there is anything to be added first.
Unfortunately, there is no good way to test libLTO in isolation as it needs gold
or ld64, but there are bots doing LTO builds that found this problem.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180202
91177308-0d34-0410-b5e6-
96231b3b80d8
Reid Kleckner [Wed, 24 Apr 2013 17:50:30 +0000 (17:50 +0000)]
Don't forward declare environ on Windows
That seems to interact poorly with the environ and _environ macros
defined in MSVC's <stdlib.h>.
Also remove the incorrect comment about _NSGetEnviron().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180200
91177308-0d34-0410-b5e6-
96231b3b80d8
Arnold Schwaighofer [Wed, 24 Apr 2013 16:16:03 +0000 (16:16 +0000)]
LoopVectorizer: Change variable name Stride to ConsecutiveStride
This makes it easier to read the code.
No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180197
91177308-0d34-0410-b5e6-
96231b3b80d8
Arnold Schwaighofer [Wed, 24 Apr 2013 16:16:01 +0000 (16:16 +0000)]
LoopVectorize: Scalarize padded types
This patch disables memory-instruction vectorization for types that need padding
bytes, e.g., x86_fp80 has 10 bytes store size with 6 bytes padding in darwin on
x86_64. Because the load/store vectorization is performed by the bit casting to
a packed vector, which has incompatible memory layout due to the lack of padding
bytes, the present vectorizer produces inconsistent result for memory
instructions of those types.
This patch checks an equality of the AllocSize of a scalar type and allocated
size for each vector element, to ensure that there is no padding bytes and the
array can be read/written using vector operations.
Patch by Daisuke Takahashi!
Fixes PR15758.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180196
91177308-0d34-0410-b5e6-
96231b3b80d8
Arnold Schwaighofer [Wed, 24 Apr 2013 16:15:58 +0000 (16:15 +0000)]
LoopVectorizer: Bail out if we don't have datalayout we need it
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180195
91177308-0d34-0410-b5e6-
96231b3b80d8
Rafael Espindola [Wed, 24 Apr 2013 16:10:49 +0000 (16:10 +0000)]
Revert r180189.
This should bring the ppc bots back. I will try to write a test that would
have found the problem on a little endian system too.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180194
91177308-0d34-0410-b5e6-
96231b3b80d8
Andrew Trick [Wed, 24 Apr 2013 15:54:43 +0000 (15:54 +0000)]
MI Sched: eliminate local vreg copies.
For now, we just reschedule instructions that use the copied vregs and
let regalloc elliminate it. I would really like to eliminate the
copies on-the-fly during scheduling, but we need a complete
implementation of repairIntervalsInRange() first.
The general strategy is for the register coalescer to eliminate as
many global copies as possible and shrink live ranges to be
extended-basic-block local. The coalescer should not have to worry
about resolving local copies (e.g. it shouldn't attemp to reorder
instructions). The scheduler is a much better place to deal with local
interference. The coalescer side of this equation needs work.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180193
91177308-0d34-0410-b5e6-
96231b3b80d8
Andrew Trick [Wed, 24 Apr 2013 15:54:39 +0000 (15:54 +0000)]
Register Coalescing: add a flag to disable rescheduling.
When MachineScheduler is enabled, this functionality can be
removed. Until then, provide a way to disable it for test cases and
designing MachineScheduler heuristics.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180192
91177308-0d34-0410-b5e6-
96231b3b80d8
Andrew Trick [Wed, 24 Apr 2013 15:54:36 +0000 (15:54 +0000)]
MI Sched: regpressure tracing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180191
91177308-0d34-0410-b5e6-
96231b3b80d8
Rafael Espindola [Wed, 24 Apr 2013 15:14:22 +0000 (15:14 +0000)]
Formatting fixes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180190
91177308-0d34-0410-b5e6-
96231b3b80d8
Rafael Espindola [Wed, 24 Apr 2013 15:02:03 +0000 (15:02 +0000)]
Use a pointer as the relocation iterator.
Since the relocation iterator walks only the relocations in one section, we
can just use a pointer and avoid fetching information about the section at
every reference.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180189
91177308-0d34-0410-b5e6-
96231b3b80d8
Eric Christopher [Wed, 24 Apr 2013 14:49:26 +0000 (14:49 +0000)]
Add include guards.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180188
91177308-0d34-0410-b5e6-
96231b3b80d8
Eric Christopher [Wed, 24 Apr 2013 12:56:18 +0000 (12:56 +0000)]
Formatting.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180186
91177308-0d34-0410-b5e6-
96231b3b80d8
Bill Wendling [Wed, 24 Apr 2013 03:11:14 +0000 (03:11 +0000)]
Align the __LD,__compact_unwind section.
I know what would be cool! We should align the compact unwind section because
aligned data access is faster.
<rdar://problem/
13723271>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180171
91177308-0d34-0410-b5e6-
96231b3b80d8