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JF Bastien [Sat, 9 Apr 2016 20:25:02 +0000 (20:25 +0000)]
Fix hash_integer_value
Broken in D18938 because underlying_type only works for enums and not all stdlibs are sad when given a non-enum. Bots error out with 'only enumeration types have underlying types'.
There's probably a clever enable_if-ism that I can do with underlying_type and the actual integer value, but is_integral_or_enum also accepts implicit conversion so I need to ponder my life choices a bit before committing to template magic. A quick fix for now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265880
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JF Bastien [Sat, 9 Apr 2016 20:04:34 +0000 (20:04 +0000)]
is_integral_or_enum ❥ enum class ⇒ hashable enum class
Summary:
As discussed in D18775 making AtomicOrdering an enum class makes it non-hashable, which shouldn't be the case. Hashing.h defines hash_value for all is_integral_or_enum, but type_traits.h's definition of is_integral_or_enum only checks for *inplicit* conversion to integral types which leaves enum classes out and is very confusing because is_enum is true for enum classes.
This patch:
- Adds a check for is_enum when determining is_integral_or_enum.
- Explicitly converts the value parameter in hash_value to handle enum class hashing.
Note that the warning at the top of Hashing.h still applies: each execution of the program has a high probability of producing a different hash_code for a given input. Thus their values are not stable to save or persist, and should only be used during the execution for the construction of hashing datastructures.
Reviewers: dberlin, chandlerc
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D18938
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265879
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Adrian Prantl [Sat, 9 Apr 2016 18:10:22 +0000 (18:10 +0000)]
Drop debug info for DISubprograms that are not referenced by anything
This patch drops the debug info for all DISubprograms that are
(a) not attached to an llvm::Function and
(b) not indirectly reachable via inline scopes from any surviving Function and
(c) not reachable from a type (i.e.: member functions).
Background: I'm currently working on a patch to reverse the pointers
between DICompileUnit and DISubprogram (for more info check Duncan's RFC
on lazy-loading of debug info metadata
http://lists.llvm.org/pipermail/llvm-dev/2016-March/097419.html).
The idea is to remove the list of subprograms from DICompileUnit and
instead point to the owning compile unit from each DISubprogram.
After doing this all DISubprograms fulfilling the above criteria will be
implicitly dropped unless we go through an extra effort to preserve them.
http://reviews.llvm.org/D18477
<rdar://problem/
25256815>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265876
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Sanjay Patel [Sat, 9 Apr 2016 16:02:52 +0000 (16:02 +0000)]
[x86] use BMI 'andn' for logic + compare ops
With BMI, we can use 'andn' to save an instruction when the result is only used in a compare.
This is related to one of the potential sequences to check 'isfinite' in:
https://llvm.org/bugs/show_bug.cgi?id=27164
Differential Revision: http://reviews.llvm.org/D18910
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265875
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Simon Pilgrim [Sat, 9 Apr 2016 14:51:26 +0000 (14:51 +0000)]
[X86][XOP] Support for VPPERM 2-input shuffle mask decoding
This patch adds support for decoding XOP VPPERM instruction when it represents a basic shuffle.
The mask decoding required the existing MCInstrLowering code to be updated to support binary shuffles - the implementation now matches what is done in X86InstrComments.cpp.
Differential Revision: http://reviews.llvm.org/D18441
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265874
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Craig Topper [Sat, 9 Apr 2016 06:31:02 +0000 (06:31 +0000)]
[X86] Use for loops over types to reduce code for setting up operation actions. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265871
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Craig Topper [Sat, 9 Apr 2016 05:53:48 +0000 (05:53 +0000)]
[X86] Remove calls to setOperationAction that set CTLZ_ZERO_UNDEF for some vector types to Expand. Expand is already set for all operations for all vector types earlier so this is redundant. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265870
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Sanjoy Das [Sat, 9 Apr 2016 00:22:59 +0000 (00:22 +0000)]
Maintain calling convention when inling calls to llvm.deoptimize
The behavior here was buggy -- we'd forget the calling convention after
inlining a callsite calling llvm.deoptimize.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265867
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Mike Aizatsky [Fri, 8 Apr 2016 23:32:24 +0000 (23:32 +0000)]
[libfuzzer] defensive assert
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265866
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Chris Bieneman [Fri, 8 Apr 2016 22:46:04 +0000 (22:46 +0000)]
[CMake] Make llvm_ExternalProject always call the build action
This makes it so that when running 'ninja test-suite' from the top-level LLVM ninja build it *always* re-runs the ninja command in the test-suite directory.
This mechanism is required because the top-level ninja file doesn't have a view into the subdirectory dependency tree, so it can't know what, if anything, needs to be rebuilt.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265863
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Adrian Prantl [Fri, 8 Apr 2016 22:43:03 +0000 (22:43 +0000)]
Support the Nodebug emission kind for DICompileUnits.
Sample-based profiling and optimization remarks currently remove
DICompileUnits from llvm.dbg.cu to suppress the emission of debug info
from them. This is somewhat of a hack and only borderline legal IR.
This patch uses the recently introduced NoDebug emission kind in
DICompileUnit to achieve the same result without breaking the Verifier.
A nice side-effect of this change is that it is now possible to combine
NoDebug and regular compile units under LTO.
http://reviews.llvm.org/D18808
<rdar://problem/
25427165>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265861
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Sanjay Patel [Fri, 8 Apr 2016 21:42:43 +0000 (21:42 +0000)]
fix documentation comments; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265855
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Easwaran Raman [Fri, 8 Apr 2016 21:28:02 +0000 (21:28 +0000)]
Refactor Threshold computation. NFC.
This is part of changes reviewed in http://reviews.llvm.org/D17584.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265852
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Tim Shen [Fri, 8 Apr 2016 21:26:31 +0000 (21:26 +0000)]
[SSP] Remove llvm.stackprotectorcheck.
This is a cleanup patch for SSP support in LLVM. There is no functional change.
llvm.stackprotectorcheck is not needed, because SelectionDAG isn't
actually lowering it in SelectBasicBlock; rather, it adds check code in
FinishBasicBlock, ignoring the position where the intrinsic is inserted
(See FindSplitPointForStackProtector()).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265851
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Sanjay Patel [Fri, 8 Apr 2016 21:26:11 +0000 (21:26 +0000)]
[x86] show missed opportunities to use andn
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265850
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Hans Wennborg [Fri, 8 Apr 2016 20:46:09 +0000 (20:46 +0000)]
Rangeify a loop. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265846
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Hans Wennborg [Fri, 8 Apr 2016 20:46:00 +0000 (20:46 +0000)]
Remove some redundant variables from X86TargetLowering::LowerDYNAMIC_STACKALLOC
These are already defined, with the same values, a few lines up. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265845
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Kyle Butt [Fri, 8 Apr 2016 20:35:01 +0000 (20:35 +0000)]
Codegen: Factor tail duplication into a utility class. NFC
This is in preparation for tail duplication during block placement. See D18226.
This needs to be a utility class for 2 reasons. No passes may run after block
placement, and also, tail-duplication affects subsequent layout decisions, so
it must be interleaved with placement, and can't be separated out into its own
pass. The original pass is still useful, and now runs by delegating to the
utility class.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265842
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Sanjay Patel [Fri, 8 Apr 2016 20:29:39 +0000 (20:29 +0000)]
[x86] regenerate checks for BMI tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265841
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Evgeny Stupachenko [Fri, 8 Apr 2016 20:20:38 +0000 (20:20 +0000)]
test commit
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265840
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James Y Knight [Fri, 8 Apr 2016 19:49:03 +0000 (19:49 +0000)]
Add trailing colons to labels in a test.
This will avoid matching on the FILENAME if it happened to contain, say,
"f4" anywhere in the file path.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265837
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Nirav Dave [Fri, 8 Apr 2016 19:44:40 +0000 (19:44 +0000)]
Fix Load Control Dependence in MemCpy Generation
In Memcpy lowering we had missed a dependence from the load of the
operation to successor operations. This causes us to potentially
construct an in initial DAG with a memory dependence not fully
represented in the chain sub-DAG but rather require looking at the
entire DAG breaking alias analysis by allowing incorrect repositioning
of memory operations.
To work around this, r200033 changed DAGCombiner::GatherAllAliases to be
conservative if any possible issues to happen. Unfortunately this check
forbade many non-problematic situations as well. For example, it's
common for incoming argument lowering to add a non-aliasing load hanging
off of EntryNode. Then, if GatherAllAliases visited EntryNode, it would
find that other (unvisited) use of the EntryNode chain, and just give up
entirely. Furthermore, the check was incomplete: it would not actually
detect all such potentially problematic DAG constructions, because
GatherAllAliases did not guarantee to visit all chain nodes going up to
the root EntryNode. This is in general fine -- giving up early will just
miss a potential optimization, not generate incorrect results. But, for
this non-chain dependency detection code, it's possible that you could
have a load attached to a higher-up chain node than any which were
visited. If that load aliases your store, but the only dependency is
through the value operand of a non-aliasing store, it would've been
missed by this code, and potentially reordered.
With the dependence added, this check can be removed and Alias Analysis
can be much more aggressive. This fixes code quality regression in the
Consecutive Store Merge cleanup (D14834).
Test Change:
ppc64-align-long-double.ll now may see multiple serializations
of its stores
Differential Revision: http://reviews.llvm.org/D18062
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265836
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Duncan P. N. Exon Smith [Fri, 8 Apr 2016 19:26:32 +0000 (19:26 +0000)]
ValueMapper: Extract llvm::RemapFunction from IRMover.cpp, NFC
Strip out the remapping parts of IRLinker::linkFunctionBody and put them
in ValueMapper.cpp under the name Mapper::remapFunction (with a
top-level entry-point llvm::RemapFunction).
This is a nice cleanup on its own since it puts the remapping code
together and shares a single Mapper context for the entire
IRLinker::linkFunctionBody Call. Besides that, this will make it easier
to break the co-recursion between IRMover.cpp and ValueMapper.cpp in
follow ups.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265835
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Duncan P. N. Exon Smith [Fri, 8 Apr 2016 19:17:13 +0000 (19:17 +0000)]
ValueMapper: Always use Mapper::mapValue from remapInstruction, NFCI
Use Mapper::mapValue instead of llvm::MapValue from
Mapper::remapInstruction when mapping an incoming block for a PHINode
(follow-up to r265832). This will implicitly pass along the
Materializer argument, but when this code was added in r133513 there was
no Materializer argument. I suspect this call to MapValue was just
missed in r182776 since it's not observable (basic blocks can't be
materialized, and they don't reference other values).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265833
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Duncan P. N. Exon Smith [Fri, 8 Apr 2016 19:09:34 +0000 (19:09 +0000)]
ValueMapper: Roll RemapInstruction into Mapper, NFC
Add Mapper::remapInstruction, move the guts of llvm::RemapInstruction
into it, and use the same Mapper for most of the calls to MapValue and
MapMetadata. There should be no functionality change here.
I left off the call to MapValue that wasn't passing in a Materializer
argument (for basic blocks of PHINodes). It shouldn't change
functionality either, but I'm suspicious enough to commit separately.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265832
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Duncan P. N. Exon Smith [Fri, 8 Apr 2016 19:01:38 +0000 (19:01 +0000)]
Linker: Always pass RF_IgnoreMissingLocals; NFC
This is a cleanup after clarifying the meaning of RF_IgnoreMissingLocals
in r265628 and truly limiting it to locals in r265768.
This should have no functionality change, since the only context that
the flag has an effect is when we could hit function-local Value and
Metadata, and we were already passing it in those contexts.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265831
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Kevin B. Smith [Fri, 8 Apr 2016 18:58:29 +0000 (18:58 +0000)]
[X86] Fix PR23155 by turning on X86FixupBWInsts by default.
Differential Revision: http://reviews.llvm.org/D18866
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265830
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Duncan P. N. Exon Smith [Fri, 8 Apr 2016 18:49:36 +0000 (18:49 +0000)]
ValueMapper: Don't memoize metadata when RF_NoModuleLevelChanges
Prevent the Metadata side-table in ValueMap from growing unnecessarily
when RF_NoModuleLevelChanges. As a drive-by, make ValueMap::hasMD,
which apparently had no users until I used it here for testing, actually
compile.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265828
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Duncan P. N. Exon Smith [Fri, 8 Apr 2016 18:47:02 +0000 (18:47 +0000)]
ValueMapper: Stop memoizing MDStrings
Stop adding MDString to the Metadata section of the ValueMap in
MapMetadata. It blows up the size of the map for no benefit, since we
can always return quickly anyway.
There is a potential follow-up that I don't think I'll push on right
away, but maybe someone else is interested: stop checking for a
pre-mapped MDString, and move the `isa<MDString>()` checks in
Mapper::mapSimpleMetadata and MDNodeMapper::getMappedOp in front of the
`VM.getMappedMD()` calls. While this would preclude explicitly
remapping MDStrings it would probably be a little faster.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265827
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Sanjoy Das [Fri, 8 Apr 2016 18:21:11 +0000 (18:21 +0000)]
Propagate Undef in llvm.cos Intrinsic
Summary:
The llvm cos intrinsic currently does not propagate undef's. This change
transforms cos(undef) to null value or 0.
There are 2 test cases added as well.
Patch by Anna Thomas!
Reviewers: sanjoy
Subscribers: majnemer, llvm-commits
Differential Revision: http://reviews.llvm.org/D18863
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265825
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Colin LeMahieu [Fri, 8 Apr 2016 18:15:37 +0000 (18:15 +0000)]
Revert r265817
lld tests need to be addressed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265822
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Colin LeMahieu [Fri, 8 Apr 2016 17:55:03 +0000 (17:55 +0000)]
[llvm-objdump] Printing hex instead of dec by default
Differential Revision: http://reviews.llvm.org/D18770
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265817
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Lang Hames [Fri, 8 Apr 2016 17:38:51 +0000 (17:38 +0000)]
[Object] Report an error if .alt_entry is used with ELF or COFF.
I'm looking into a better way to do this long-term, but for now at least don't
crash.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265815
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Ulrich Weigand [Fri, 8 Apr 2016 17:22:19 +0000 (17:22 +0000)]
[SystemZ] Support conditional sibling calls via BRCL
This adds a conditional variant of CallJG instruction, CallBRCL.
It can be used for conditional sibling calls. Unfortunately, due
to IfCvt limitations, it only really works well for functions without
arguments.
Author: koriakin
Differential Revision: http://reviews.llvm.org/D18864
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265814
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Quentin Colombet [Fri, 8 Apr 2016 17:19:10 +0000 (17:19 +0000)]
[RegBankSelect] Use reverse post order traversal.
When assigning the register banks of an instruction, it is best to know
all the constraints of the input to have a good idea of how this will
impact the cost of the whole function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265812
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Quentin Colombet [Fri, 8 Apr 2016 17:11:51 +0000 (17:11 +0000)]
[AArch64] Add a test case for the default mapping of RegBankSelect.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265811
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Quentin Colombet [Fri, 8 Apr 2016 16:59:50 +0000 (16:59 +0000)]
[RegisterBankInfo] Change the implementation for the default mapping.
Do not give that much importance to the current register bank of an
operand. This is likely just a side effect of the current execution and
it is properly wise to prefer a register bank that can be extracted from
the information available statically (like encoding constraints and
type).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265810
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David Majnemer [Fri, 8 Apr 2016 16:51:49 +0000 (16:51 +0000)]
[InstCombine] Fix miscompile in FoldSPFofSPF
We had a select of a cast of a select but attempted to replace the outer
select with the inner select dispite their incompatible types.
Patch by Anton Korobeynikov!
This fixes PR27236.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265805
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Quentin Colombet [Fri, 8 Apr 2016 16:48:16 +0000 (16:48 +0000)]
[RegBankSelect] Improve debug output.
Add verbose information when checking if the current and the desired
register banks match.
Detail what happens when we assign a register bank.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265804
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Mehdi Amini [Fri, 8 Apr 2016 16:45:05 +0000 (16:45 +0000)]
Fix missing include on OpenBSD
From: Mehdi Amini <mehdi.amini@apple.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265803
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Quentin Colombet [Fri, 8 Apr 2016 16:40:43 +0000 (16:40 +0000)]
[MIR] Teach the parser how to deal with register banks.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265802
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David Majnemer [Fri, 8 Apr 2016 16:37:12 +0000 (16:37 +0000)]
[InstCombine] Add a peephole for redundant assumes
Two or more identical assumes are occasionally next to each other in a
basic block.
While our generic machinery will turn a redundant assume into a no-op,
it is not super cheap.
We can perform a simpler check to achieve the same result for this case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265801
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David Majnemer [Fri, 8 Apr 2016 16:37:10 +0000 (16:37 +0000)]
[LoopVectorize] Register cloned assumptions
InstCombine cannot effectively remove redundant assumptions without them
registered in the assumption cache. The vectorizer can create identical
assumptions but doesn't register them with the cache, resulting in
slower compile times because InstCombine tries to reason about a lot
more assumptions.
Fix this by registering the cloned assumptions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265800
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Quentin Colombet [Fri, 8 Apr 2016 16:35:22 +0000 (16:35 +0000)]
[MachineVerifier] Teach how to check some of the properties of generic
virtual registers.
Generic virtual registers:
- May not have a register class
- May not have a register bank
- If they do not have a register class they must have a size
- If they have a register bank, the size of the register bank must be
greater or equal to the size of the virtual register (basically check
that the virtual register will fit into that register class)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265798
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Quentin Colombet [Fri, 8 Apr 2016 16:26:22 +0000 (16:26 +0000)]
[MIR] Teach the mir printer how to print the register bank.
For now, we put the register bank in the Class field since a register
may only have one of those at a given time. The downside of that
representation is that if a register class and a register bank have the
same name, we will not be able to distinguish them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265796
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Sam Parker [Fri, 8 Apr 2016 16:02:53 +0000 (16:02 +0000)]
[ARM] Enable SMLAW[B|T] and SMLUW[B|T] instruction selection
Added ISelDAGToDAG functions to enable selection of the smlawb, smlawt,
smulwb and smulwt instructions for the ARM backend. Also updated the smul
CodeGen test and removed the smulw one.
Differential Revision: http://reviews.llvm.org/D18892
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265793
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Hans Wennborg [Fri, 8 Apr 2016 15:17:43 +0000 (15:17 +0000)]
Revert r265547 "Recommit r265309 after fixed an invalid memory reference bug happened"
It caused PR27275: "ARM: Bad machine code: Using an undefined physical register"
Also reverting the following commits that were landed on top:
r265610 "Fix the compare-clang diff error introduced by r265547."
r265639 "Fix the sanitizer bootstrap error in r265547."
r265657 "InlineSpiller.cpp: Escap \@ in r265547. [-Wdocumentation]"
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265790
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Simon Pilgrim [Fri, 8 Apr 2016 15:01:31 +0000 (15:01 +0000)]
[X86][SSE] Added 32-bit tests for vector lzcnt/tzcnt tests
v2i64 tests are particularly bad on 32-bit targets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265789
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Silviu Baranga [Fri, 8 Apr 2016 14:29:09 +0000 (14:29 +0000)]
Re-commit [SCEV] Introduce a guarded backedge taken count and use it in LAA and LV
This re-commits r265535 which was reverted in r265541 because it
broke the windows bots. The problem was that we had a PointerIntPair
which took a pointer to a struct allocated with new. The problem
was that new doesn't provide sufficient alignment guarantees.
This pattern was already present before r265535 and it just happened
to work. To fix this, we now separate the PointerToIntPair from the
ExitNotTakenInfo struct into a pointer and a bool.
Original commit message:
Summary:
When the backedge taken codition is computed from an icmp, SCEV can
deduce the backedge taken count only if one of the sides of the icmp
is an AddRecExpr. However, due to sign/zero extensions, we sometimes
end up with something that is not an AddRecExpr.
However, we can use SCEV predicates to produce a 'guarded' expression.
This change adds a method to SCEV to get this expression, and the
SCEV predicate associated with it.
In HowManyGreaterThans and HowManyLessThans we will now add a SCEV
predicate associated with the guarded backedge taken count when the
analyzed SCEV expression is not an AddRecExpr. Note that we only do
this as an alternative to returning a 'CouldNotCompute'.
We use new feature in Loop Access Analysis and LoopVectorize to analyze
and transform more loops.
Reviewers: anemet, mzolotukhin, hfinkel, sanjoy
Subscribers: flyingforyou, mcrosier, atrick, mssimpso, sanjoy, mzolotukhin, llvm-commits
Differential Revision: http://reviews.llvm.org/D17201
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265786
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Simon Pilgrim [Fri, 8 Apr 2016 14:17:07 +0000 (14:17 +0000)]
[X86] Tidied up shuffle decode function doxygen descriptions
As discussed on D18441 - auto brief is used so we don't need /brief, we don't need to include the function name and added some missing descriptions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265785
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Chuang-Yu Cheng [Fri, 8 Apr 2016 12:04:32 +0000 (12:04 +0000)]
CXX_FAST_TLS calling convention: performance improvement for PPC64
This is the same change on PPC64 as r255821 on AArch64. I have even borrowed
his commit message.
The access function has a short entry and a short exit, the initialization
block is only run the first time. To improve the performance, we want to
have a short frame at the entry and exit.
We explicitly handle most of the CSRs via copies. Only the CSRs that are not
handled via copies will be in CSR_SaveList.
Frame lowering and prologue/epilogue insertion will generate a short frame
in the entry and exit according to CSR_SaveList. The majority of the CSRs will
be handled by register allcoator. Register allocator will try to spill and
reload them in the initialization block.
We add CSRsViaCopy, it will be explicitly handled during lowering.
1> we first set FunctionLoweringInfo->SplitCSR if conditions are met (the target
supports it for the given machine function and the function has only return
exits). We also call TLI->initializeSplitCSR to perform initialization.
2> we call TLI->insertCopiesSplitCSR to insert copies from CSRsViaCopy to
virtual registers at beginning of the entry block and copies from virtual
registers to CSRsViaCopy at beginning of the exit blocks.
3> we also need to make sure the explicit copies will not be eliminated.
Author: Tom Jablin (tjablin)
Reviewers: hfinkel kbarton cycheng
http://reviews.llvm.org/D17533
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265781
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Vasileios Kalintiris [Fri, 8 Apr 2016 10:33:00 +0000 (10:33 +0000)]
[mips] Use range-based for loops. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265780
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Jeroen Ketema [Fri, 8 Apr 2016 09:19:02 +0000 (09:19 +0000)]
[llvm-c] Expose LLVMContextGetDiagnostic{Handler,Context}
Differential Revision: http://reviews.llvm.org/D18820
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265773
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Zlatko Buljan [Fri, 8 Apr 2016 07:27:26 +0000 (07:27 +0000)]
[mips][microMIPS] Add CodeGen support for ADD, ADDIU*, ADDU* and DADD* instructions
Differential Revision: http://reviews.llvm.org/D16454
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265772
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Craig Topper [Fri, 8 Apr 2016 07:10:46 +0000 (07:10 +0000)]
Use std::fill to simplify some code. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265771
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Dmitry Polukhin [Fri, 8 Apr 2016 06:45:19 +0000 (06:45 +0000)]
[IFUNC] Fix ifunc-asm.ll test
It seems that llc cannot be called used in assembler tests so test that
checks asm for particular target needs to be moved to codegen.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265770
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Valery Pykhtin [Fri, 8 Apr 2016 05:42:20 +0000 (05:42 +0000)]
[AMDGPU] Add some VI disassembler tests missing from previous autogeneration due to different filecheck prefix. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265769
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Duncan P. N. Exon Smith [Fri, 8 Apr 2016 03:13:22 +0000 (03:13 +0000)]
Reapply "ValueMapper: Treat LocalAsMetadata more like function-local Values"
This reverts commit r265765, reapplying r265759 after changing a call from
LocalAsMetadata::get to ValueAsMetadata::get (and adding a unit test). When a
local value is mapped to a constant (like "i32 %a" => "i32 7"), the new debug
intrinsic operand may no longer be pointing at a local.
http://lab.llvm.org:8080/green/job/clang-stage1-configure-RA_build/19020/
The previous coommit message follows:
--
This is a partial re-commit -- maybe more of a re-implementation -- of
r265631 (reverted in r265637).
This makes RF_IgnoreMissingLocals behave (almost) consistently between
the Value and the Metadata hierarchy. In particular:
- MapValue returns nullptr or "metadata !{}" for missing locals in
MetadataAsValue/LocalAsMetadata bridging paris, depending on
the RF_IgnoreMissingLocals flag.
- MapValue doesn't memoize LocalAsMetadata-related results.
- MapMetadata no longer deals with LocalAsMetadata or
RF_IgnoreMissingLocals at all. (This wasn't in r265631 at all, but
I realized during testing it would make the patch simpler with no
loss of generality.)
r265631 went too far, making both functions universally ignore
RF_IgnoreMissingLocals. This broke building (e.g.) compiler-rt.
Reassociate (and possibly other passes) don't currently maintain
dominates-use invariants for metadata operands, resulting in IR like
this:
define void @foo(i32 %arg) {
call void @llvm.some.intrinsic(metadata i32 %x)
%x = add i32 1, i32 %arg
}
If the inliner chooses to inline @foo into another function, then
RemapInstruction will call `MapValue(metadata i32 %x)` and assert that
the return is not nullptr.
I've filed PR27273 to add a Verifier check and fix the underlying
problem in the optimization passes.
As a workaround, return `!{}` instead of nullptr for unmapped
LocalAsMetadata when RF_IgnoreMissingLocals is unset. Otherwise, match
the behaviour of r265631.
Original commit message:
ValueMapper: Make LocalAsMetadata match function-local Values
Start treating LocalAsMetadata similarly to function-local members of
the Value hierarchy in MapValue and MapMetadata.
- Don't memoize them.
- Return nullptr if they are missing.
This also cleans up ConstantAsMetadata to stop listening to the
RF_IgnoreMissingLocals flag.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265768
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Duncan P. N. Exon Smith [Fri, 8 Apr 2016 00:56:21 +0000 (00:56 +0000)]
Revert "ValueMapper: Treat LocalAsMetadata more like function-local Values"
This reverts commit r265759, since even this limited version breaks some
bots:
http://lab.llvm.org:8011/builders/clang-ppc64be-linux/builds/3311
http://lab.llvm.org:8011/builders/sanitizer-x86_64-linux-autoconf/builds/17696
This also reverts r265761 "ValueMapper: Unduplicate
RF_NoModuleLevelChanges check, NFC", since I had trouble separating it
from r265759.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265765
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Quentin Colombet [Fri, 8 Apr 2016 00:51:00 +0000 (00:51 +0000)]
[TargetRegisterInfo] Re-apply r265734.
Original commit message:
[TargetRegisterInfo] Refactor the code to use BitMaskClassIterator.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265764
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Quentin Colombet [Fri, 8 Apr 2016 00:50:58 +0000 (00:50 +0000)]
[TargetRegisterInfo] Fix BitMaskClassIterator::moveToNextID implementation.
Make sure we do not read past the size of the mask. Although we were not using
the value read, this is bad and makes ASan complain.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265763
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Sanjoy Das [Fri, 8 Apr 2016 00:48:30 +0000 (00:48 +0000)]
Don't IPO over functions that can be de-refined
Summary:
Fixes PR26774.
If you're aware of the issue, feel free to skip the "Motivation"
section and jump directly to "This patch".
Motivation:
I define "refinement" as discarding behaviors from a program that the
optimizer has license to discard. So transforming:
```
void f(unsigned x) {
unsigned t = 5 / x;
(void)t;
}
```
to
```
void f(unsigned x) { }
```
is refinement, since the behavior went from "if x == 0 then undefined
else nothing" to "nothing" (the optimizer has license to discard
undefined behavior).
Refinement is a fundamental aspect of many mid-level optimizations done
by LLVM. For instance, transforming `x == (x + 1)` to `false` also
involves refinement since the expression's value went from "if x is
`undef` then { `true` or `false` } else { `false` }" to "`false`" (by
definition, the optimizer has license to fold `undef` to any non-`undef`
value).
Unfortunately, refinement implies that the optimizer cannot assume
that the implementation of a function it can see has all of the
behavior an unoptimized or a differently optimized version of the same
function can have. This is a problem for functions with comdat
linkage, where a function can be replaced by an unoptimized or a
differently optimized version of the same source level function.
For instance, FunctionAttrs cannot assume a comdat function is
actually `readnone` even if it does not have any loads or stores in
it; since there may have been loads and stores in the "original
function" that were refined out in the currently visible variant, and
at the link step the linker may in fact choose an implementation with
a load or a store. As an example, consider a function that does two
atomic loads from the same memory location, and writes to memory only
if the two values are not equal. The optimizer is allowed to refine
this function by first CSE'ing the two loads, and the folding the
comparision to always report that the two values are equal. Such a
refined variant will look like it is `readonly`. However, the
unoptimized version of the function can still write to memory (since
the two loads //can// result in different values), and selecting the
unoptimized version at link time will retroactively invalidate
transforms we may have done under the assumption that the function
does not write to memory.
Note: this is not just a problem with atomics or with linking
differently optimized object files. See PR26774 for more realistic
examples that involved neither.
This patch:
This change introduces a new set of linkage types, predicated as
`GlobalValue::mayBeDerefined` that returns true if the linkage type
allows a function to be replaced by a differently optimized variant at
link time. It then changes a set of IPO passes to bail out if they see
such a function.
Reviewers: chandlerc, hfinkel, dexonsmith, joker.eph, rnk
Subscribers: mcrosier, llvm-commits
Differential Revision: http://reviews.llvm.org/D18634
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265762
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Duncan P. N. Exon Smith [Fri, 8 Apr 2016 00:41:10 +0000 (00:41 +0000)]
ValueMapper: Unduplicate RF_NoModuleLevelChanges check, NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265761
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Adrian Prantl [Fri, 8 Apr 2016 00:38:37 +0000 (00:38 +0000)]
DwarfDebug: Support floating point constants in location lists.
This patch closes a gap in the DWARF backend that caused LLVM to drop
debug info for floating point variables that were constant for part of
their scope. Floating point constants are emitted as one or more
DW_OP_constu joined via DW_OP_piece.
This fixes a regression caught by the LLDB testsuite that I introduced
in r262247 when we stopped blindly expanding the range of singular
DBG_VALUEs to span the entire scope and started to emit location lists
with accurate ranges instead.
Also deletes a now-impossible testcase (debug-loc-empty-entries).
<rdar://problem/
25448338>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265760
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Duncan P. N. Exon Smith [Fri, 8 Apr 2016 00:33:44 +0000 (00:33 +0000)]
ValueMapper: Treat LocalAsMetadata more like function-local Values
This is a partial re-commit -- maybe more of a re-implementation -- of
r265631 (reverted in r265637).
This makes RF_IgnoreMissingLocals behave (almost) consistently between
the Value and the Metadata hierarchy. In particular:
- MapValue returns nullptr or "metadata !{}" for missing locals in
MetadataAsValue/LocalAsMetadata bridging paris, depending on
the RF_IgnoreMissingLocals flag.
- MapValue doesn't memoize LocalAsMetadata-related results.
- MapMetadata no longer deals with LocalAsMetadata or
RF_IgnoreMissingLocals at all. (This wasn't in r265631 at all, but
I realized during testing it would make the patch simpler with no
loss of generality.)
r265631 went too far, making both functions universally ignore
RF_IgnoreMissingLocals. This broke building (e.g.) compiler-rt.
Reassociate (and possibly other passes) don't currently maintain
dominates-use invariants for metadata operands, resulting in IR like
this:
define void @foo(i32 %arg) {
call void @llvm.some.intrinsic(metadata i32 %x)
%x = add i32 1, i32 %arg
}
If the inliner chooses to inline @foo into another function, then
RemapInstruction will call `MapValue(metadata i32 %x)` and assert that
the return is not nullptr.
I've filed PR27273 to add a Verifier check and fix the underlying
problem in the optimization passes.
As a workaround, return `!{}` instead of nullptr for unmapped
LocalAsMetadata when RF_IgnoreMissingLocals is unset. Otherwise, match
the behaviour of r265631.
Original commit message:
ValueMapper: Make LocalAsMetadata match function-local Values
Start treating LocalAsMetadata similarly to function-local members of
the Value hierarchy in MapValue and MapMetadata.
- Don't memoize them.
- Return nullptr if they are missing.
This also cleans up ConstantAsMetadata to stop listening to the
RF_IgnoreMissingLocals flag.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265759
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Quentin Colombet [Fri, 8 Apr 2016 00:03:51 +0000 (00:03 +0000)]
Revert "[TargetRegisterInfo] Refactor the code to use BitMaskClassIterator."
This reverts commit r265734.
Looks like ASan is not happy about it.
http://lab.llvm.org:8011/builders/sanitizer-x86_64-linux-fast/builds/11741
Looking.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265755
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Quentin Colombet [Fri, 8 Apr 2016 00:03:49 +0000 (00:03 +0000)]
[RegisterBankInfo] Make the debug output more compact.
Print the mask of the partial mapping as an hexadecimal instead of a
binary value.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265754
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Sunil Srivastava [Fri, 8 Apr 2016 00:02:14 +0000 (00:02 +0000)]
Fix formatting and wording of llvm-ranlib error message. NFC.
Patch by Douglas Yung!
Reviewed by Rafael Espindola
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265753
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Davide Italiano [Fri, 8 Apr 2016 00:01:32 +0000 (00:01 +0000)]
[IR/Verifier] Fix (yet another) crash.
We need to check that if we reference a retainedType from
DICompileUnit we're actually referencing a DICompositeType.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265752
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Quentin Colombet [Thu, 7 Apr 2016 23:53:55 +0000 (23:53 +0000)]
[RegBankSelect] Add a few debug statements.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265749
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Quentin Colombet [Thu, 7 Apr 2016 23:31:58 +0000 (23:31 +0000)]
[RegisterBankInfo] Add print and dump method to the InstructionMapping
helper class.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265747
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Quentin Colombet [Thu, 7 Apr 2016 23:25:43 +0000 (23:25 +0000)]
[RegisterBankInfo] Add print and dump method to the ValueMapping helper
class.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265746
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Quentin Colombet [Thu, 7 Apr 2016 23:18:11 +0000 (23:18 +0000)]
[MachineInstr] Teach the print method about RegisterBank.
Properly print either the register class or the register bank or a
virtual register.
Get rid of a few ifdefs in the process.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265745
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Quentin Colombet [Thu, 7 Apr 2016 23:10:14 +0000 (23:10 +0000)]
[AArch64] Fix a typo in the register class to register bank mapping.
For GPR family we want the GPR register bank, not FPR!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265743
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Quentin Colombet [Thu, 7 Apr 2016 23:08:52 +0000 (23:08 +0000)]
[RegisterBankInfo] Escap \@ in r265741. [-Wdocumentation]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265742
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Quentin Colombet [Thu, 7 Apr 2016 23:02:00 +0000 (23:02 +0000)]
[RegisterBankInfo] Change the semantic of recordRegBankForType.
Now, recordRegBankForType records only the first register bank that
covers a type instead of the last. This behavior can, nevertheless, be
override with the additional Force parameter to force the update.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265741
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David Blaikie [Thu, 7 Apr 2016 22:59:58 +0000 (22:59 +0000)]
llvm-dwarfdump: Use deque rather than vector to preserve object reference/pointer identity
TUs in each unit refer to the unit they are in, if the unit is moved
this reference is invalidated & things break.
No test case because UB isn't testable - ASan would likely catch this on
a large enough test case (just needs to have enough TUs that a
reallocation of the vector would occur) but didn't seem worthwhile. Up
for debate/revisiting if anyone feels strongly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265740
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Quentin Colombet [Thu, 7 Apr 2016 22:52:49 +0000 (22:52 +0000)]
[RegisterBankInfo] Strengthen getInstrMappingImpl.
Teach the target independent code how to take advantage of type
information to get the mapping of an instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265739
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Quentin Colombet [Thu, 7 Apr 2016 22:45:42 +0000 (22:45 +0000)]
[RegisterBankInfo] Add a way to record what register bank covers a
specific type.
This will be used to find the default mapping of the instruction.
Also, this information is recorded, instead of computed, because it is
expensive from a type to know which register bank maps it.
Indeed, we need to iterate through all the register classes of all the
register banks to find the one that maps the given type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265736
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Quentin Colombet [Thu, 7 Apr 2016 22:35:03 +0000 (22:35 +0000)]
[RegisterBankInfo] Introduce getRegBankFromConstraints as an helper
method.
NFC.
The refactoring intends to make the code more readable and expose
more features to potential derived classes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265735
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Quentin Colombet [Thu, 7 Apr 2016 22:16:56 +0000 (22:16 +0000)]
[TargetRegisterInfo] Refactor the code to use BitMaskClassIterator.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265734
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Quentin Colombet [Thu, 7 Apr 2016 22:08:56 +0000 (22:08 +0000)]
[RegisterBankInfo] Refactor the code to use BitMaskClassIterator.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265733
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Mehdi Amini [Thu, 7 Apr 2016 21:59:28 +0000 (21:59 +0000)]
Const correctness for BranchProbabilityInfo (NFC)
From: Mehdi Amini <mehdi.amini@apple.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265731
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Quentin Colombet [Thu, 7 Apr 2016 21:55:21 +0000 (21:55 +0000)]
[TargetRegisterInfo] Introduce a helper class, BitMaskClassIterator, to
iterate over register class bitmask.
Thanks to this helper class, it would not require for each user of the
register classes bitmask to actually know how they are represents.
Moreover, it will make the code much easier to read.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265730
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Mehdi Amini [Thu, 7 Apr 2016 21:49:31 +0000 (21:49 +0000)]
Rename parameter I to Index for WriteCombinedGlobalValueSummary() (NFC)
From: Mehdi Amini <mehdi.amini@apple.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265729
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Quentin Colombet [Thu, 7 Apr 2016 21:32:23 +0000 (21:32 +0000)]
[RegBankSelect] Reuse RegisterBankInfo logic to get to the register bank
from a register.
On top of duplicating the logic, it was buggy! It would assert on
physical registers, since MachineRegisterInfo does not have any
information regarding register classes/banks for them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265727
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Amaury Sechet [Thu, 7 Apr 2016 21:29:39 +0000 (21:29 +0000)]
Do not select EhPad BB in MachineBlockPlacement when there is regular BB to schedule
Summary:
EHPad BB are not entered the classic way and therefor do not need to be placed after their predecessors. This patch make sure EHPad BB are not chosen amongst successors to form chains, and are selected as last resort when selecting the best candidate.
EHPad are scheduled in reverse probability order in order to have them flow into each others naturally.
Reviewers: chandlerc, majnemer, rafael, MatzeB, escha, silvas
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D17625
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265726
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Quentin Colombet [Thu, 7 Apr 2016 21:24:40 +0000 (21:24 +0000)]
[AArch64] Get rid of some GlobalISel ifdefs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265725
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Quentin Colombet [Thu, 7 Apr 2016 21:04:30 +0000 (21:04 +0000)]
[TargetRegisterInfo] Fix the comment of SuperRegClassIterator::getMask.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265721
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Quentin Colombet [Thu, 7 Apr 2016 20:49:15 +0000 (20:49 +0000)]
[AArch64] gcc does not like litteral without quotes even on preprocessor macros.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265720
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Quentin Colombet [Thu, 7 Apr 2016 20:47:51 +0000 (20:47 +0000)]
[AArch64][CallLowering] Do not build the API if GlobalISel is not built.
This gets rid of some ifdefs and dummy implementations that were here
just to fill the blanks.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265719
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Quentin Colombet [Thu, 7 Apr 2016 20:27:33 +0000 (20:27 +0000)]
[GlobalISel] Add RegBankSelect hooks into the pass pipeline.
Now, RegBankSelect will happen after the IRTranslation and the target
may optionally add additional passes in between.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265716
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Jan Vesely [Thu, 7 Apr 2016 19:23:11 +0000 (19:23 +0000)]
AMDGPU/SI: Implement atomic load/store for i32 and i64
Standard load/store instructions with GLC bit set.
Reviewers: tstellardAMD, arsenm
Differential Revision: http://reviews.llvm.org/D18760
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265709
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Tom Stellard [Thu, 7 Apr 2016 18:30:05 +0000 (18:30 +0000)]
AMDGPU/SI: Add latency for export instructions
Reviewers: arsenm, nhaehnle
Subscribers: nhaehnle, arsenm, llvm-commits
Differential Revision: http://reviews.llvm.org/D18599
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265708
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Quentin Colombet [Thu, 7 Apr 2016 18:19:27 +0000 (18:19 +0000)]
[RegBankSelect] Initial implementation for non-optimized output.
The pass walk through the machine function and assign the register banks
using the default mapping. In other words, there is no attempt to reduce
cross register copies.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265707
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Quentin Colombet [Thu, 7 Apr 2016 18:07:07 +0000 (18:07 +0000)]
[RegisterBankInfo] Add more details on the expectation of
getInstrMapping.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265704
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Quentin Colombet [Thu, 7 Apr 2016 18:01:19 +0000 (18:01 +0000)]
[RegisterBankInfo] Provide a target independent helper function to guess
the mapping of an instruction on register bank.
For most instructions, it is possible to guess the mapping of the
instruciton by using the encoding constraints.
It remains instructions without encoding constraints.
For copy-like instructions, we try to propagate the information we get
from the other operands. Otherwise, the target has to give this
information.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265703
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Quentin Colombet [Thu, 7 Apr 2016 17:44:54 +0000 (17:44 +0000)]
[RegisterBankInfo] Change the signature of getSizeInBits to factor out
the access to MRI and TRI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265701
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Quentin Colombet [Thu, 7 Apr 2016 17:30:18 +0000 (17:30 +0000)]
[RegisterBankInfo] Provide a default constructor for InstructionMapping
helper class.
The default constructor creates invalid (isValid() == false) instances
and may be used to communicate that a mapping was not found.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265699
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Simon Pilgrim [Thu, 7 Apr 2016 17:23:55 +0000 (17:23 +0000)]
[X86][SSE] Added bitmask pattern shuffle tests
Based on OR(AND(MASK,V0),AND(~MASK,V1)) style patterns
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@265697
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