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Marek Olšák [Mon, 5 Jun 2017 17:51:38 +0000 (19:51 +0200)]
radeonsi: enable TC-compatible stencil compression on VI
Most things are in place. Ideally we won't see decompress blits for stencil
anymore.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Sun, 4 Jun 2017 23:22:45 +0000 (01:22 +0200)]
st/mesa: don't keep framebuffer state in st_context
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Sun, 4 Jun 2017 23:08:41 +0000 (01:08 +0200)]
st/mesa: cache pipe_surface for GL_FRAMEBUFFER_SRGB changes
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Sun, 4 Jun 2017 21:09:44 +0000 (23:09 +0200)]
st/mesa: use gl_driver_flags::NewFramebufferSRGB
also call st_init_driver_flags when st_context is initialized.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Sun, 4 Jun 2017 21:08:07 +0000 (23:08 +0200)]
mesa: add gl_driver_flags::NewFramebufferSRGB
_NEW_BUFFERS updates too much stuff.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Thu, 1 Jun 2017 17:02:16 +0000 (19:02 +0200)]
radeonsi/gfx9: prevent a race when the previous shader's main part is missing
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Thu, 1 Jun 2017 16:57:37 +0000 (18:57 +0200)]
radeonsi/gfx9: wait for main part compilation of 1st shaders of merged shaders
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Sat, 27 May 2017 16:49:11 +0000 (18:49 +0200)]
radeonsi/gfx9: fix LS scratch buffer support without TCS for GFX9
LS is merged into TCS. If there is no TCS, LS is merged into fixed-func
TCS. The problem is the fixed-func TCS was ignored by scratch update
functions, so LS didn't have the scratch buffer set up.
Note that Mesa 17.1 doesn't have merged shaders.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Sat, 27 May 2017 15:52:31 +0000 (17:52 +0200)]
radeonsi: move streamout state update out of si_update_shaders
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Wed, 31 May 2017 21:09:33 +0000 (23:09 +0200)]
radeonsi: remove dead code in declare_input_fs
Colors are interpolated in the PS prolog. This was never used.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Fri, 26 May 2017 23:22:25 +0000 (01:22 +0200)]
radeonsi: move handling of DBG_NO_OPT_VARIANT into si_shader_selector_key
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Wed, 31 May 2017 11:18:53 +0000 (13:18 +0200)]
radeonsi: use a compiler queue with a low priority for optimized shaders
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Wed, 31 May 2017 20:04:29 +0000 (22:04 +0200)]
util/u_queue: add an option to set the minimum thread priority
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Sat, 27 May 2017 10:13:34 +0000 (12:13 +0200)]
radeonsi: decrease the number of compiler threads to num CPUs - 1
Reserve one core for other things (like draw calls).
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Wed, 31 May 2017 16:02:54 +0000 (18:02 +0200)]
radeonsi: drop unfinished shader compilations when destroying shaders
If we enqueue too many jobs and destroy the GL context, it may take
several seconds before the jobs finish. Just drop them instead.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Wed, 31 May 2017 14:44:12 +0000 (16:44 +0200)]
util/u_queue: add a way to remove a job when we just want to destroy it
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Rob Clark [Tue, 6 Jun 2017 17:15:02 +0000 (13:15 -0400)]
freedreno/a5xx: set SP_BLEND_CONTROL properly
Signed-off-by: Rob Clark <robdclark@gmail.com>
Rob Clark [Sat, 3 Jun 2017 17:36:25 +0000 (13:36 -0400)]
freedreno/a5xx: LRZ support
Signed-off-by: Rob Clark <robdclark@gmail.com>
Rob Clark [Sat, 3 Jun 2017 16:53:15 +0000 (12:53 -0400)]
freedreno: drop timestamp field
unused.
Signed-off-by: Rob Clark <robdclark@gmail.com>
Rob Clark [Sat, 3 Jun 2017 16:42:35 +0000 (12:42 -0400)]
freedreno/a5xx: refactor out helper for LRZ flush
Signed-off-by: Rob Clark <robdclark@gmail.com>
Rob Clark [Sat, 3 Jun 2017 16:34:28 +0000 (12:34 -0400)]
freedreno: reshuffle FD_MESA_DEBUG bitmask
Signed-off-by: Rob Clark <robdclark@gmail.com>
Rob Clark [Sat, 3 Jun 2017 16:30:36 +0000 (12:30 -0400)]
freedreno: update generated headers
Signed-off-by: Rob Clark <robdclark@gmail.com>
Marek Olšák [Tue, 30 May 2017 21:52:07 +0000 (23:52 +0200)]
gallium/u_blitter: use 2D_ARRAY for cubemap blits if possible
so that we can use TXF.
The cubemap blit pixel shader code size: 148 -> 92 bytes
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Tue, 30 May 2017 20:18:40 +0000 (22:18 +0200)]
gallium/u_blitter: use TXF if possible
This fixes piglit:
arb_texture_view-rendering-r32ui
TEX (image_sample) flushes denorms to 0 with FP32 textures on GCN, but such
a texture can contain integer data written using an integer render view.
If we do a transfer blit with TEX, denorms are flushed to 0. Luckily,
TXF (image_load) doesn't do that.
TXF also doesn't need to load the sampler state, so blit shaders don't have
to do s_load_dwordx4.
TXF doesn't do CLAMP_TO_EDGE, so it can only be used if the src box is
in bounds, or if we clamp manually (this commit doesn't).
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Tue, 30 May 2017 15:07:47 +0000 (17:07 +0200)]
gallium/u_blitter: use TEX_LZ if it's supported
The sampler views always have first_level == last_level.
Now radeonsi doesn't have to use the WQM. (a few SALU removed)
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Tue, 30 May 2017 17:24:17 +0000 (19:24 +0200)]
gallium/util: add _LZ and TXF options to simple shaders
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Tue, 30 May 2017 14:48:47 +0000 (16:48 +0200)]
gallium/ureg: add TEX/TXF_LZ opcodes to ureg
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Jason Ekstrand [Tue, 6 Jun 2017 00:10:24 +0000 (17:10 -0700)]
i965: Use BLORP for all HiZ ops
BLORP has been capable of doing gen8-style HiZ ops for a while now. We
might as well start using it. The one downside is that this may cause a
bit more state emission since we still re-emit most things for BLORP.
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Jason Ekstrand [Tue, 6 Jun 2017 00:18:48 +0000 (17:18 -0700)]
blorp: Use FullSurfaceDepthandStencilClear for blorp_hiz_op
The blorp_hiz_op entrypoint always acts on a full subresource of a HiZ
buffer so we can just set the flag unconditionally.
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Jason Ekstrand [Tue, 6 Jun 2017 00:05:02 +0000 (17:05 -0700)]
i965: Move the post-HiZ-clear flush/stall to intel_hiz_exec
This also changes it to be predicated so we only do the flush/stall on
clears and HiZ resolves. The docs only say it's needed for clears but
empirical evidence says it's also needed for HiZ resolves.
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Jason Ekstrand [Mon, 5 Jun 2017 21:19:28 +0000 (14:19 -0700)]
intel/blorp: Plumb through access to the workaround BO
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=101283
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Nanley Chery [Thu, 27 Apr 2017 23:22:03 +0000 (16:22 -0700)]
anv/blorp: Move the depth cache flush outside of BLORP
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Jason Ekstrand [Mon, 5 Jun 2017 18:32:19 +0000 (11:32 -0700)]
intel/blorp: Refactor the HiZ op interface
This commit does a few things:
1) Now that BLORP can do HiZ ops on gen8+, drop the gen6 prefix.
2) Switch parameters to uint32_t to match the rest of blorp.
3) Take a range of layers and loop internally.
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Jason Ekstrand [Mon, 5 Jun 2017 18:30:14 +0000 (11:30 -0700)]
i965/blorp: Inline gen6_blorp_exec
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Jason Ekstrand [Mon, 5 Jun 2017 18:52:32 +0000 (11:52 -0700)]
i965: Perform HiZ flush/stall prior to HiZ resolves
Cc: "17.1" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Jason Ekstrand [Mon, 5 Jun 2017 18:49:24 +0000 (11:49 -0700)]
i965: Move the pre-depth-clear flush/stalls to intel_hiz_exec
Cc: "17.1" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Jason Ekstrand [Mon, 5 Jun 2017 18:46:22 +0000 (11:46 -0700)]
i965/blorp: Take a layer range in intel_hiz_exec
Cc: "17.1" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Jason Ekstrand [Sat, 20 May 2017 22:00:42 +0000 (15:00 -0700)]
i965/miptree: Store fast clear colors in an isl_color_value
This commit, out of necessity, makes a number of changes at once:
1) Changes intel_mipmap_tree to store the clear color for both color
and depth as an isl_color_value.
2) Changes the depth/stencil emit code to do the format conversion of
the depth clear value on Haswell and earlier instead of pulling a
uint32_t directly from the miptree.
3) Changes ISL's depth/stencil emit code to perform the format
conversion of the depth clear value on Haswell and earlier instead
of assuming that the depth value in the float is pre-converted.
4) Changes blorp to pass the depth value through as a float.
5) Changes the Vulkan driver to pass the depth value to blorp as a
float rather than a uint.
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Chad Versace <chadversary@chromium.org>
Thomas Hellstrom [Thu, 1 Jun 2017 10:04:05 +0000 (12:04 +0200)]
dri3/GLX: Fix drawable invalidation v2
A number of internal VMware apitrace traces image comparisons fail with
dri3 because the viewport transformation becomes incorrect after an X
drawable resize. The incorrect viewport transformation sometimes persist
until the second draw-call after a swapBuffer.
Comparing with the dri2 glx code there are a couple of places where dri2
invalidates the drawable in the absence of server-triggered invalidation,
where dri3 doesn't do that. When these invalidation points are added to
dri3, the image comparisons become correct.
v2:
Addressed review comment by Michel Dänzer.
Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
Reviewed-and-tested-by: Michel Dänzer <michel.daenzer@amd.com>
Kenneth Graunke [Tue, 30 May 2017 05:07:07 +0000 (22:07 -0700)]
i965: Fix alpha to one with dual color blending.
The BLEND_STATE documentation says that alpha to one must be disabled
when dual color blending is enabled. However, it appears that it simply
fails to override src1 alpha to one.
We can work around this by leaving alpha to one enabled, but overriding
SRC1_ALPHA to ONE and ONE_MINUS_SRC1_ALPHA to ZERO. This appears to be
what the other driver does, and it looks like it works despite the
documentation saying not to do it.
Fixes spec/ext_framebuffer_multisample/alpha-to-one-dual-src-blend *
Piglit tests.
v2: Add UNUSED to shut up warning on generations which don't use this.
Reviewed-by: Chris Forbes <chrisforbes@google.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Samuel Pitoiset [Thu, 1 Jun 2017 10:43:24 +0000 (12:43 +0200)]
mesa: add KHR_no_error support for glTexSubImage*D()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Samuel Pitoiset [Thu, 1 Jun 2017 10:36:06 +0000 (12:36 +0200)]
mesa: add texsubimage() helper
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Samuel Pitoiset [Mon, 5 Jun 2017 12:02:14 +0000 (14:02 +0200)]
mesa: make _mesa_texture_sub_image() static
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Samuel Pitoiset [Thu, 1 Jun 2017 10:35:34 +0000 (12:35 +0200)]
mesa: rename texsubimage() to texsubimage_err()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Samuel Pitoiset [Thu, 1 Jun 2017 09:46:24 +0000 (11:46 +0200)]
mesa: add KHR_no_error support for glCopyImageSubData()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Samuel Pitoiset [Thu, 1 Jun 2017 09:42:39 +0000 (11:42 +0200)]
mesa: add copy_image_subdata() helper
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Samuel Pitoiset [Thu, 1 Jun 2017 09:36:13 +0000 (11:36 +0200)]
mesa: add prepare_target() helper
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Samuel Pitoiset [Thu, 1 Jun 2017 09:35:25 +0000 (11:35 +0200)]
mesa: rename prepare_target() to prepare_target_err()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Samuel Pitoiset [Wed, 31 May 2017 13:57:45 +0000 (15:57 +0200)]
mesa: add KHR_no_error support for glBlitNamedFramebuffer()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Samuel Pitoiset [Mon, 5 Jun 2017 12:18:41 +0000 (14:18 +0200)]
mesa: add blit_named_framebuffer() helper
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Samuel Pitoiset [Wed, 31 May 2017 13:52:57 +0000 (15:52 +0200)]
mesa: add KHR_no_error support for glBlitFramebuffer()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Samuel Pitoiset [Mon, 5 Jun 2017 13:32:08 +0000 (15:32 +0200)]
mesa: add validate_depth_buffer() helper
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Samuel Pitoiset [Mon, 5 Jun 2017 13:29:37 +0000 (15:29 +0200)]
mesa: add validate_stencil_buffer() helper
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Samuel Pitoiset [Mon, 5 Jun 2017 13:12:36 +0000 (15:12 +0200)]
mesa: add validate_color_buffer() helper
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Samuel Pitoiset [Tue, 6 Jun 2017 12:32:08 +0000 (14:32 +0200)]
mesa: wrap blit_framebuffer() into blit_framebuffer_err()
Also add ALWAYS_INLINE to blit_framebuffer().
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Samuel Pitoiset [Mon, 5 Jun 2017 13:03:30 +0000 (15:03 +0200)]
mesa: add 'no_error' parameter to blit_framebuffer()
The whole GLES3 block has been moved before the buffer validation
checks.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Samuel Pitoiset [Wed, 31 May 2017 13:41:30 +0000 (15:41 +0200)]
mesa: make _mesa_blit_framebuffer() static
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Samuel Pitoiset [Wed, 31 May 2017 12:26:20 +0000 (14:26 +0200)]
mesa: add KHR_no_error support for glBindBuffer()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Samuel Pitoiset [Wed, 31 May 2017 12:18:00 +0000 (14:18 +0200)]
mesa: add KHR_no_error support for glInvalidateBufferData()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Samuel Pitoiset [Wed, 31 May 2017 12:15:37 +0000 (14:15 +0200)]
mesa: add KHR_no_error support for glInvalidateBufferSubData()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Samuel Pitoiset [Wed, 31 May 2017 12:14:55 +0000 (14:14 +0200)]
mesa: add invalidate_buffer_subdata() helper
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Samuel Pitoiset [Wed, 31 May 2017 10:42:39 +0000 (12:42 +0200)]
mesa: add KHR_no_error support for glBindVertexBuffers()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Samuel Pitoiset [Wed, 31 May 2017 10:39:44 +0000 (12:39 +0200)]
mesa: add KHR_no_error support for glVertexArrayVertexBuffers()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Samuel Pitoiset [Wed, 31 May 2017 10:35:25 +0000 (12:35 +0200)]
mesa: add vertex_array_vertex_buffers_err() helper
This also adds a 'no_error' parameter to vertex_array_vertex_buffer()
to be used in a following patch.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Samuel Pitoiset [Tue, 6 Jun 2017 19:58:29 +0000 (21:58 +0200)]
mesa: add KHR_no_error support for glScissor*()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Samuel Pitoiset [Tue, 6 Jun 2017 19:58:28 +0000 (21:58 +0200)]
mesa: add scissor() and scissor_array() helpers
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Samuel Pitoiset [Tue, 6 Jun 2017 19:58:27 +0000 (21:58 +0200)]
mesa: rename ScissorIndexed() to scissor_indexed_err()
And move GET_CURRENT_CONTEXT() into the APIENTRY calls
for consistency.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Samuel Pitoiset [Tue, 6 Jun 2017 19:58:26 +0000 (21:58 +0200)]
mesa: use _mesa_set_scissor() in ScissorIndexed()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Samuel Pitoiset [Tue, 6 Jun 2017 19:58:25 +0000 (21:58 +0200)]
mesa: make _mesa_scissor_bounding_box() static
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Samuel Pitoiset [Tue, 6 Jun 2017 20:58:13 +0000 (22:58 +0200)]
mesa: inline update_image_transfer_state() into _mesa_update_pixel()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Samuel Pitoiset [Tue, 6 Jun 2017 20:58:12 +0000 (22:58 +0200)]
mesa: remove useless check in _mesa_update_pixel()
The only caller is _mesa_update_state_locked() which already
checks if _NEW_PIXEL is set before calling _mesa_update_pixel().
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Iago Toral Quiroga [Tue, 30 May 2017 11:25:35 +0000 (13:25 +0200)]
glcpp: fix #undef to match latest spec update and GLSLang implementation
GLSL ES spec includes the following:
"It is an error to undefine or to redefine a built-in
(pre-defined) macro name."
But desktop GLSL doesn't. This has sparked some discussion
in Khronos, and the final conclusion was to update the
GLSL 4.50 spec to include the following:
"By convention, all macro names containing two consecutive
underscores ( __ ) are reserved for use by underlying
software layers. Defining or undefining such a name in a
shader does not itself result in an error, but may result
in unintended behaviors that stem from having multiple
definitions of the same name. All macro names prefixed
with “GL_” (“GL” followed by a single underscore) are also
reserved, and defining or undefining such a name results in
a compile-time error."
In other words, undefining GL_* names should be an error, but
undefining other names with a double underscore in them is
not strictly prohibited in desktop GLSL.
This patch fixes the preprocessor to apply these rules,
following exactly the implementation already present
in GLSLang. This fixes some tests in CTS.
Khronos bug:
https://cvs.khronos.org/bugzilla/show_bug.cgi?id=16003
Fixes:
KHR-GL45.shaders.preprocessor.definitions.undefine_core_profile_vertex
KHR-GL45.shaders.preprocessor.definitions.undefine_core_profile_fragment
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Dave Airlie [Mon, 5 Jun 2017 20:20:33 +0000 (21:20 +0100)]
ac/nir: move gpr counting inside argument handling.
This just moves this code in here to it's cleaner.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Mon, 5 Jun 2017 20:11:05 +0000 (21:11 +0100)]
ac/nir: assign argument param pointers in one place.
Instead of having the fragile code to do a second pass, just
give the pointers you want params in to the initial code,
then call a later pass to assign them.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Mon, 5 Jun 2017 06:51:07 +0000 (07:51 +0100)]
ac/nir: consolidate setting userdata location
Just pass a pointer and increment inside the function,
makes the code less error prone.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Timothy Arceri [Tue, 6 Jun 2017 05:08:16 +0000 (15:08 +1000)]
glthread: remove extra _mesa_glthread_finish() from generated code
The other user of print_sync_dispatch() was ending up with code that
looked like:
_mesa_glthread_finish(ctx);
_mesa_glthread_restore_dispatch(ctx);
_mesa_glthread_finish(ctx);
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Anuj Phogat [Tue, 6 Jun 2017 23:14:19 +0000 (16:14 -0700)]
intel: Fix broxton 2x6 way size computation
This patch is undoing the changes to way size computation
in broxton 2x6, made by below commit:
Commit:
0d576fbfbe912cf3fb9ab594bb31eb58bccf2138
Author: Anuj Phogat <anuj.phogat@gmail.com>
i965: Simplify l3 way size computations
By making use of l3_banks field in gen_device_info struct
l3_way_size for gen7+ = 2 * l3_banks.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=101306
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Tested-by: Mark Janes <mark.a.janes@intel.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Dave Airlie [Tue, 6 Jun 2017 23:34:28 +0000 (09:34 +1000)]
radv: move chip_class extraction down further.
This seems to matter here in a profile, without this we spend a lot
more time exiting this function with no flush bits.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Tue, 6 Jun 2017 23:14:54 +0000 (09:14 +1000)]
radv: move lots of index related things into the bind.
This just moves lots of stuff to the bind stage rather than
dealing with it in the draw stage.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Tue, 6 Jun 2017 23:04:30 +0000 (09:04 +1000)]
radv: move calculating the vertex sgpr to the pipeline.
There is no need to calculate this at draw time.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Tue, 6 Jun 2017 23:01:38 +0000 (09:01 +1000)]
radv: rename and make global some functions.
I want to use these in the pipeline setup stage.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Eric Engestrom [Thu, 1 Jun 2017 13:48:06 +0000 (14:48 +0100)]
tree-wide: remove trailing backslash
Simple search for a backslash followed by two newlines.
If one of the newlines were to be removed, this would cause issues, so
let's just remove these trailing backslashes.
Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Dave Airlie [Tue, 6 Jun 2017 22:09:03 +0000 (08:09 +1000)]
radv/gfx9: use correct register setting for uconfig regs
Thanks to Marek for pointing this out.
Signed-off-by: Dave Airlie <airlied@redhat.com>
Bas Nieuwenhuizen [Tue, 6 Jun 2017 20:03:49 +0000 (22:03 +0200)]
radv: Remove SI num RB override for occlusion queries.
radeonsi doesn't have it anymore either.
Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Fixes:
f4e499ec791 "radv: add initial non-conformant radv vulkan driver"
Reviewed-by: Dave Airlie <airlied@redhat.com>
Bas Nieuwenhuizen [Tue, 6 Jun 2017 19:52:15 +0000 (21:52 +0200)]
radv: Split out updating the vertex descriptors.
Simple refactor.
Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Bas Nieuwenhuizen [Tue, 6 Jun 2017 19:39:42 +0000 (21:39 +0200)]
radv: Move pipeline stuff from flush_state to emit_graphics_pipeline.
No functional changes.
Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Bas Nieuwenhuizen [Tue, 6 Jun 2017 17:15:47 +0000 (19:15 +0200)]
radv: Add early exit for cache flushes.
No sense checking each bit separately in the common case of none
being set.
Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Bas Nieuwenhuizen [Tue, 6 Jun 2017 16:43:38 +0000 (18:43 +0200)]
radv: Remove vertex_descriptors_dirty.
Redundant.
Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Bas Nieuwenhuizen [Tue, 6 Jun 2017 16:22:23 +0000 (18:22 +0200)]
radv: Don't use a divide by index_size.
Divides are pretty slow, and this is in the hot path of a draw.
Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Chris Wilson [Fri, 17 Mar 2017 07:58:13 +0000 (00:58 -0700)]
i965: Explicitly disallow tiled memcpy path on Gen4 with swizzling.
The manual detiling paths are not prepared to handle Gen4-G45 with
swizzling enabled, so explicitly disable them. (They're already
disabled because these platforms don't have LLC but a future patch could
enable this path).
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Matt Turner [Thu, 1 Jun 2017 04:18:38 +0000 (21:18 -0700)]
i965: Remove brw_bo_map_unsynchronized()
Call brw_bo_map() directly.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Matt Turner [Mon, 5 Jun 2017 16:54:06 +0000 (09:54 -0700)]
i965: Use unsynchronized mappings for BufferSubData on non-LLC
Now that unsynchronized maps actually work, we can use them, like we do
on LLC platforms.
On Broxton, the performance of Unigine Valley 1.1-rc1 is improved by
37.6656% +/- 0.401389% (n=20) at 1280x720/QUALITY_LOW, and by
20.862% +/- 2.20901% (n=3) at 1920x1080/QUALITY_LOW.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Matt Turner [Thu, 1 Jun 2017 04:14:15 +0000 (21:14 -0700)]
i965: Make unsynchronized maps unsynchronized on non-LLC
On Broxton, the performance of Unigine Valley 1.0 is improved by
13.3067% +/- 0.144322% (n=40) at 1280x720/QUALITY_LOW, and by
1.68478% +/- 0.484226% (n=3) at 1920x1080/QUALITY_LOW.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Matt Turner [Thu, 1 Jun 2017 04:12:01 +0000 (21:12 -0700)]
i965: Implement brw_bo_map_unsynchronized() with MAP_ASYNC
This way we can let brw_bo_map() choose the best mapping type.
Part of the patch inlines map_gtt() into brw_bo_map_gtt() (and removes
map_gtt()). brw_bo_map_gtt() just wrapped map_gtt() with locking and a
call to set_domain(). map_gtt() is called by brw_bo_map_unsynchronized()
to avoid the call to set_domain(). With the MAP_ASYNC flag, we now have
the same behavior previously provided by brw_bo_map_unsynchronized().
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Matt Turner [Thu, 1 Jun 2017 04:06:18 +0000 (21:06 -0700)]
i965: Elide call to set_domain() if MAP_ASYNC
No functional change (no callers currently pass MAP_ASYNC)
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Matt Turner [Thu, 18 May 2017 18:26:08 +0000 (11:26 -0700)]
i965: Add and use brw_bo_map()
We can encapsulate the logic for choosing the mapping type. This will
also help when we add WC mappings.
A few functional changes are made in this patch. On non-LLC, what were
previously WB mappings are now GTT mappings (in the prefilling debug
code in brw_performance_query.c; the shader_time code in brw_program.c;
and in the case of an RW mapping in intel_buffer_objects.c).
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Matt Turner [Thu, 18 May 2017 18:29:00 +0000 (11:29 -0700)]
i965: Drop MAP_READ from some write-only mappings
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Matt Turner [Thu, 18 May 2017 17:59:23 +0000 (10:59 -0700)]
i965: Pass flags to brw_bo_map_*
brw_bo_map_cpu() took a write_enable arg, but it wasn't always clear
whether we were also planning to read from the buffer. I kept everything
semantically identical by passing only MAP_READ or MAP_READ | MAP_WRITE
depending on the write_enable argument.
The other flags are not used yet, but MAP_ASYNC for instance, will be
used in a later patch to remove the need for a separate
brw_bo_map_unsynchronized() function.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Matt Turner [Wed, 17 May 2017 22:44:30 +0000 (15:44 -0700)]
i965: Rename brw_bo_map() -> brw_bo_map_cpu()
I'm going to make a new function named brw_bo_map() in a later patch
that is responsible for choosing the mapping type, so this patch clears
the way.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Matt Turner [Wed, 17 May 2017 18:41:40 +0000 (11:41 -0700)]
i965: Rename *_virtual -> map_*
I think these are better names, and it reduces the delta between
upstream and Chris Wilson's brw-batch branch.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>