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Alex Deucher [Wed, 14 Oct 2015 21:17:15 +0000 (17:17 -0400)]
drm/amdgpu: add ELM/BAF DCE11 configs (v2)
Add support for the display configuration on elm/baf.
v2: add missing Stoney case
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Alex Deucher [Wed, 14 Oct 2015 21:14:16 +0000 (17:14 -0400)]
drm/amdgpu: add ELM/BAF asic types
New asic types for ellesmere and baffin.
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Alex Deucher [Fri, 11 Mar 2016 19:46:46 +0000 (14:46 -0500)]
drm/amd: add DCE 11.2 register headers
Add register headers for DCE (Display and Composition Engine)
11.2.
Reviewed-by: Ken Wang <Qingqing.Wang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Bas Nieuwenhuizen [Fri, 15 Apr 2016 00:47:49 +0000 (02:47 +0200)]
drm/radeon: Allow setting shader registers using DMA/COPY packet3 on SI.
Mesa uses a COPY_DATA packet to copy the grid size for indirect dispatches
into COMPUTE_USER_DATA_*.
Setting those registers with a SET_SH_REG packet is allowed, not allowing
them with other packets seems like an oversight.
v2: Clarify commit message.
Signed-off-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Fri, 15 Apr 2016 15:19:17 +0000 (17:19 +0200)]
drm/amdgpu: remove sorting of CS BOs
Not needed any more.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Fri, 15 Apr 2016 15:19:16 +0000 (17:19 +0200)]
drm/amdgpu: group BOs by log2 of the size on the LRU v2
This allows us to have small BOs on the LRU before big ones.
v2: fix of by one and list corruption bug
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Dave Airlie [Wed, 13 Apr 2016 23:49:16 +0000 (09:49 +1000)]
drm/amdgpu: drop apply quirks for now.
This isn't being used so drop it.
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Chunming Zhou [Thu, 14 Apr 2016 07:53:55 +0000 (15:53 +0800)]
drm/amdgpu: fix error checking when reuse vmid on same ring
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Chunming Zhou [Thu, 14 Apr 2016 05:42:32 +0000 (13:42 +0800)]
drm/amdgpu: only update last_flush when vmid doesn't have other new owner
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Chunming Zhou [Thu, 14 Apr 2016 02:27:28 +0000 (10:27 +0800)]
drm/amdgpu: double fence slot
we introduced vmid fence, so one hw submission could produce two fences.
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Fri, 8 Apr 2016 04:40:49 +0000 (00:40 -0400)]
drm/amdgpu: enable sdma clockgating on ST
Acked-by: Tom St Denis <tom.stdenis@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Fri, 8 Apr 2016 04:39:54 +0000 (00:39 -0400)]
drm/amdgpu: enable sdma clockgating on CZ
Acked-by: Tom St Denis <tom.stdenis@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Fri, 8 Apr 2016 04:19:39 +0000 (00:19 -0400)]
drm/amdgpu/sdma: rename fiji cg functions
They care common for all sdma 3.0 parts
Acked-by: Tom St Denis <tom.stdenis@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Wed, 13 Apr 2016 16:41:50 +0000 (12:41 -0400)]
drm/amdgpu: enable gmc clockgating for ST
Acked-by: Tom St Denis <tom.stdenis@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Fri, 8 Apr 2016 04:26:46 +0000 (00:26 -0400)]
drm/amdgpu: enable gmc clockgating for CZ
Acked-by: Tom St Denis <tom.stdenis@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Fri, 8 Apr 2016 05:37:44 +0000 (01:37 -0400)]
drm/amdgpu/vi: rename fiji cg functions
They can be used for other VI parts.
Acked-by: Tom St Denis <tom.stdenis@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Fri, 8 Apr 2016 03:17:15 +0000 (23:17 -0400)]
drm/amdgpu: enable gfx clockgating for ST (v2)
v2: just enable MGCG for now since CGCG causes hangs
Acked-by: Tom St Denis <tom.stdenis@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Fri, 8 Apr 2016 03:01:48 +0000 (23:01 -0400)]
drm/amdgpu: enable gfx clockgating for CZ
Acked-by: Tom St Denis <tom.stdenis@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Fri, 8 Apr 2016 02:57:39 +0000 (22:57 -0400)]
drm/amdgpu/gfx: rework fiji cg functions so they can be shared
They can be shared with other asics with minor modifications.
Acked-by: Tom St Denis <tom.stdenis@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Fri, 8 Apr 2016 19:45:13 +0000 (15:45 -0400)]
drm/amdgpu: add a new set of rlc function pointers
Different asics tend to have different ways to interact
with the RLC. This just covers enter/exit of safe mode
for updating CG and PG state, but could be extended to
cover other RLC operations in the future if necessary.
Acked-by: Tom St Denis <tom.stdenis@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Fri, 8 Apr 2016 03:16:00 +0000 (23:16 -0400)]
drm/amdgpu/gfx: adjust gfx_v8_0_send_serdes_cmd for ST
Acked-by: Tom St Denis <tom.stdenis@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Fri, 8 Apr 2016 05:12:20 +0000 (01:12 -0400)]
drm/amdgpu/gfx8: rename send_serdes_cmd
So it can be shared with CZ/ST.
Acked-by: Tom St Denis <tom.stdenis@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Fri, 8 Apr 2016 05:01:18 +0000 (01:01 -0400)]
drm/amdgpu/gmc: add proper CG flags for fiji
We were already enabling these CG features, this uses
the standard interface for doing so.
Acked-by: Tom St Denis <tom.stdenis@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Fri, 8 Apr 2016 04:52:58 +0000 (00:52 -0400)]
drm/amdgpu/common: add proper CG flags for fiji
We were already enabling these CG features, this uses
the standard interface for doing so.
Acked-by: Tom St Denis <tom.stdenis@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Fri, 8 Apr 2016 04:42:51 +0000 (00:42 -0400)]
drm/amdgpu/sdma: add proper CG flags for fiji
We were already enabling these CG features, this uses
the standard interface for doing so.
Acked-by: Tom St Denis <tom.stdenis@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Thu, 7 Apr 2016 22:38:00 +0000 (18:38 -0400)]
drm/amdgpu/gfx: add proper CG flags for fiji
We were already enabling these CG features, this uses
the standard interface for doing so.
Acked-by: Tom St Denis <tom.stdenis@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Fri, 8 Apr 2016 04:52:24 +0000 (00:52 -0400)]
drm/amdgpu: add new CG flag for ROM clockgating
Acked-by: Tom St Denis <tom.stdenis@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Wed, 6 Apr 2016 09:12:07 +0000 (11:12 +0200)]
drm/ttm: implement LRU add callbacks v2
This allows fine grained control for the driver where to add a BO into the LRU.
v2: fix typo in comment
Reviewed-by: Sinclair Yeh <syeh@vmware.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Wed, 6 Apr 2016 09:12:06 +0000 (11:12 +0200)]
drm/ttm: add optional LRU removal callback v2
Useful for driver specific LRU handling.
v2: fix typo in comment
Reviewed-by: Sinclair Yeh <syeh@vmware.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Wed, 6 Apr 2016 09:12:05 +0000 (11:12 +0200)]
drm/ttm: remove unused validation sequence
Not used any more.
Reviewed-by: Sinclair Yeh <syeh@vmware.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Wed, 6 Apr 2016 09:12:04 +0000 (11:12 +0200)]
drm/ttm: remove lazy parameter from ttm_bo_wait
Not used any more.
Reviewed-by: Sinclair Yeh <syeh@vmware.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Wed, 6 Apr 2016 09:12:03 +0000 (11:12 +0200)]
drm/ttm: remove use_ticket parameter from ttm_bo_reserve
Not used any more.
Reviewed-by: Sinclair Yeh <syeh@vmware.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Wed, 6 Apr 2016 09:12:02 +0000 (11:12 +0200)]
drm/ttm: don't wait for BO on initial allocation
When we use an extern reservation object that otherwise waits for every
fence registered with it.
Reviewed-by: Sinclair Yeh <syeh@vmware.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Wed, 13 Apr 2016 09:36:00 +0000 (11:36 +0200)]
drm/amdgpu: fix the coding style in amdgpu_ring.c
No functional change.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Wed, 13 Apr 2016 09:34:44 +0000 (11:34 +0200)]
drm/amdgpu: use the ring name for debugfs (v2)
Instead of hard coding just another name in the ring code.
v2: squash in Tom's rebase fix
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Wed, 13 Apr 2016 08:30:13 +0000 (10:30 +0200)]
drm/amdgpu: reduce the ring size for SDMA
Those are way too large.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Wed, 13 Apr 2016 08:27:35 +0000 (10:27 +0200)]
drm/amdgpu: reduce the ring size for GFX
Those are way too large.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Tue, 12 Apr 2016 14:26:34 +0000 (16:26 +0200)]
drm/amdgpu: use max_dw in ring_init
Instead of specifying the total ring size calculate that from the maximum
number of dw a submission can have and the number of concurrent submissions.
This fixes UVD with 8 concurrent submissions or more.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Eric Huang [Mon, 11 Apr 2016 18:28:55 +0000 (14:28 -0400)]
drm/amd/powerplay: fix fan speed percent setting error on Fiji
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Eric Huang [Mon, 11 Apr 2016 18:27:51 +0000 (14:27 -0400)]
drm/amd/powerplay: fix fan speed percent setting error on Tonga
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Felix Kuehling [Fri, 8 Apr 2016 01:42:17 +0000 (21:42 -0400)]
drm/ttm: Fix TTM BO accounting
TTM BO accounting is out of sync with how memory is really allocated
in ttm[_dma]_tt_alloc_page_directory. This resulted in excessive
estimated overhead with many small allocations.
ttm_dma_tt_alloc_page_directory makes a single allocation for three
arrays: pages, DMA and CPU addresses. It uses drm_calloc_large, which
uses kmalloc internally for allocations smaller than PAGE_SIZE.
ttm_round_pot should be a good approximation of its memory usage both
above and below PAGE_SIZE.
Reviewed-by: Thomas Hellstrom <thellstrom@vmware.com>
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Monk Liu <monk.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Dave Airlie [Tue, 12 Apr 2016 03:25:48 +0000 (13:25 +1000)]
drm/amd: make a type-safe cgs_device struct. (v2)
This is just a type-safety things to avoid everyone taking void *,
it doesn't change anything.
v2: agd5f: split out the dal changes into a separate patch.
Signed-off-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Arindam Nath [Tue, 12 Apr 2016 11:46:15 +0000 (13:46 +0200)]
drm/amdgpu: handle more than 10 UVD sessions (v2)
Change History
--------------
v2:
- Make firmware version check correctly. Firmware
versions >= 1.80 should all support 40 UVD
instances.
- Replace AMDGPU_MAX_UVD_HANDLES with max_handles
variable.
v1:
- The firmware can handle upto 40 UVD sessions.
Signed-off-by: Arindam Nath <arindam.nath@amd.com>
Signed-off-by: Ayyappa Chandolu <ayyappa.chandolu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Nils Wallménius [Sun, 10 Apr 2016 14:30:04 +0000 (16:30 +0200)]
drm/amd: make some function-local tables static const
These tables were initialized on stack on each call, avoid that
and save a little bit of text size.
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Nils Wallménius <nils.wallmenius@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Nils Wallménius [Sun, 10 Apr 2016 14:30:03 +0000 (16:30 +0200)]
drm/amd/powerplay: mark phm_master_table_* structs as const
Also adjust phm_construct_table to take a const pointer
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Nils Wallménius <nils.wallmenius@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Nils Wallménius [Sun, 10 Apr 2016 14:30:02 +0000 (16:30 +0200)]
drm/amd/powerplay: Mark pem_event_action chains as const
As these arrays were of pointer to pointer type, they were
pointer to pointer to const. Make them pointer to const
pointer to const.
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Nils Wallménius <nils.wallmenius@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Nils Wallménius [Mon, 2 May 2016 16:46:15 +0000 (12:46 -0400)]
drm/amdgpu: Mark all instances of struct drm_info_list as const
All these are compile time constand and the
drm_debugfs_create/remove_files functions take a const
pointer argument.
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Nils Wallménius <nils.wallmenius@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Nils Wallménius [Sun, 10 Apr 2016 14:30:00 +0000 (16:30 +0200)]
drm/amd/scheduler: Mark amdgpu_sched_ops const
This marks the struct amdgpu_sched_ops const and
adjusts amd_sched_init to take a const pointer
for the ops param. The ops member of
struct amd_gpu_scheduler is also changed to const.
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Nils Wallménius <nils.wallmenius@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Nils Wallménius [Sun, 10 Apr 2016 14:29:59 +0000 (16:29 +0200)]
drm/amd: Mark some tables as const
This patch marks some compile-time constant tables 'const'.
The tables marked in this patch are the low hanging fruit
where little other changes were necesary to avoid casting
away constness etc. Also mark some tables that are private
to a file as static.
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Nils Wallménius <nils.wallmenius@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Fri, 8 Apr 2016 20:42:38 +0000 (16:42 -0400)]
drm/amd/powerplay: fix stutter setup in mclk level init
Stale ifdef.
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Dave Airlie [Wed, 6 Apr 2016 20:50:25 +0000 (06:50 +1000)]
drm/radeon: add support for SET_APPEND_CNT packet3 (v2)
This adds support to the command parser for the set append counter
packet3, this is required to support atomic counters on
evergreen/cayman GPUs.
v2: fixup some of the hardcoded numbers with real register names
(Christian)
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Arindam Nath [Wed, 6 Apr 2016 19:33:52 +0000 (15:33 -0400)]
drm/radeon: handle more than 10 UVD sessions
Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Arindam Nath <arindam.nath@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Arindam Nath [Wed, 6 Apr 2016 19:33:51 +0000 (15:33 -0400)]
drm/radeon: add support for loading new UVD fw
Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Arindam Nath <arindam.nath@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Wed, 9 Mar 2016 21:11:53 +0000 (22:11 +0100)]
drm/amdgpu: reuse VMIDs already assigned to a process
If we don't need to flush we can easily use another VMID
already assigned to the process.
Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Tue, 1 Mar 2016 15:46:18 +0000 (16:46 +0100)]
drm/amdgpu: add a fence after the VM flush
This way we can track when the flush is done.
Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Mon, 15 Feb 2016 11:33:02 +0000 (12:33 +0100)]
drm/amdgpu: use a sync object for VMID fences v2
v2: rebase & cleanup
This way we can store more than one fence as user for each VMID.
Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com> (v1)
Reviewed-by: Chunming Zhou <david1.zhou@amd.com> (v1)
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Tue, 8 Mar 2016 14:40:11 +0000 (15:40 +0100)]
drm/amdgpu: merge VM manager and VM context ID structure
No need to have two of them any more.
Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Andrey Grodzovsky [Wed, 30 Mar 2016 21:34:27 +0000 (17:34 -0400)]
drm/amdgpu: Set PFLIP_SUBMITTED for crtc after address update
Also add some pflip debug prints.
This change allows us to wait on pflip status until the new surface address
is actually submitted to the register.
This reverts
ed3020e923240829dcdfd3343f6e91dc02c63775
drm/amdgpu: Move MMIO flip out of spinlocked region
The original change assumed DAL will aquire locks inside DAL
implemetion of page_flip callback which eventaully didn't happen.
This moves the flip before status update which makes sense for the
non-DAL code pathes as well.
Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Michel Dänzer [Fri, 1 Apr 2016 09:51:34 +0000 (18:51 +0900)]
drm/radeon: Support DRM_MODE_PAGE_FLIP_ASYNC
When this flag is set, we program the hardware to execute the flip
during horizontal blank (i.e. for the next scanline) instead of during
vertical blank (i.e. for the next frame).
Currently this is only supported on ASICs which have a page flip
completion interrupt (>= R600), and only if the use_pflipirq parameter
has value 2 (the default).
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Eric Huang [Wed, 30 Mar 2016 20:30:12 +0000 (16:30 -0400)]
drm/amd/powerplay: add deep sleep divider id into DPM table on Tonga
Add a proper implementation for setting the deep sleep divider.
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Wed, 30 Mar 2016 12:42:57 +0000 (14:42 +0200)]
drm/amdgpu: optionally enable GART debugfs file
Keeping the pages array around can use a lot of system memory
when you want a large GART.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Wed, 30 Mar 2016 08:54:16 +0000 (10:54 +0200)]
drm/amdgpu: remove GART page addr array
Not needed any more.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Wed, 30 Mar 2016 08:50:25 +0000 (10:50 +0200)]
drm/amdgpu: use BO pages instead of GART array
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Fri, 18 Mar 2016 20:00:35 +0000 (21:00 +0100)]
drm/amdgpu: change parameter passing in the VM code
Make it more flexible by passing src and page addresses
directly instead of the structures they contain.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Thu, 17 Mar 2016 15:25:15 +0000 (16:25 +0100)]
drm/amdgpu: drop the GTT power of two limit
As far as I can see that isn't neccessary any more.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rex Zhu [Tue, 29 Mar 2016 11:32:37 +0000 (19:32 +0800)]
drm/amd/powerplay: use min_clock_in_sr for deep sleep feature.
This comes from the display handling code.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tom St Denis [Wed, 23 Mar 2016 17:17:04 +0000 (13:17 -0400)]
drm/amd/amdgpu: Enable clockgating in UVD6 for Stoney
This patch enables clockgating for the UVD6 block in Stoney.
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tom St Denis [Wed, 23 Mar 2016 17:16:13 +0000 (13:16 -0400)]
drm/amd/amdgpu: Enable clockgating for UVD5 on Tonga
This patch enables clock gating for the UVD5 block with
Tonga.
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tom St Denis [Wed, 23 Mar 2016 17:14:31 +0000 (13:14 -0400)]
drm/amd/amdgpu: Add SW clock gating support to UVD 5 and 6
This patch adds support for software clock gating to UVD 5
and UVD 6 blocks with a preliminary commented out hardware
gating routine.
Currently hardware gating does not work so it's not activated.
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Nicolai Stange [Tue, 22 Mar 2016 21:05:27 +0000 (22:05 +0100)]
drm/radeon: don't include RADEON_HPD_NONE in HPD IRQ enable bitsets
The values of all but the RADEON_HPD_NONE members of the radeon_hpd_id
enum transform 1:1 into bit positions within the 'enabled' bitset as
assembled by evergreen_hpd_init():
enabled |= 1 << radeon_connector->hpd.hpd;
However, if ->hpd.hpd happens to equal RADEON_HPD_NONE == 0xff, UBSAN
reports
UBSAN: Undefined behaviour in drivers/gpu/drm/radeon/evergreen.c:1867:16
shift exponent 255 is too large for 32-bit type 'int'
[...]
Call Trace:
[<
ffffffff818c4d35>] dump_stack+0xbc/0x117
[<
ffffffff818c4c79>] ? _atomic_dec_and_lock+0x169/0x169
[<
ffffffff819411bb>] ubsan_epilogue+0xd/0x4e
[<
ffffffff81941cbc>] __ubsan_handle_shift_out_of_bounds+0x1fb/0x254
[<
ffffffffa0ba7f2e>] ? atom_execute_table+0x3e/0x50 [radeon]
[<
ffffffff81941ac1>] ? __ubsan_handle_load_invalid_value+0x158/0x158
[<
ffffffffa0b87700>] ? radeon_get_pll_use_mask+0x130/0x130 [radeon]
[<
ffffffff81219930>] ? wake_up_klogd_work_func+0x60/0x60
[<
ffffffff8121a35e>] ? vprintk_default+0x3e/0x60
[<
ffffffffa0c603c4>] evergreen_hpd_init+0x274/0x2d0 [radeon]
[<
ffffffffa0c603c4>] ? evergreen_hpd_init+0x274/0x2d0 [radeon]
[<
ffffffffa0bd196e>] radeon_modeset_init+0x8ce/0x18d0 [radeon]
[<
ffffffffa0b71d86>] radeon_driver_load_kms+0x186/0x350 [radeon]
[<
ffffffffa03b6b16>] drm_dev_register+0xc6/0x100 [drm]
[<
ffffffffa03bc8c4>] drm_get_pci_dev+0xe4/0x490 [drm]
[<
ffffffff814b83f0>] ? kfree+0x220/0x370
[<
ffffffffa0b687c2>] radeon_pci_probe+0x112/0x140 [radeon]
[...]
=====================================================================
radeon 0000:01:00.0: No connectors reported connected with modes
At least on x86, there should be no user-visible impact as there
1 << 0xff == 1 << (0xff & 31) == 1 << 31
holds and 31 > RADEON_MAX_HPD_PINS. Thus, this patch is a cosmetic one.
All of the above applies analogously to evergreen_hpd_fini(),
r100_hpd_init(), r100_hpd_fini(), r600_hpd_init(), r600_hpd_fini(),
rs600_hpd_init() and rs600_hpd_fini()
Silence UBSAN by checking ->hpd.hpd for RADEON_HPD_NONE before oring it
into the 'enabled' bitset in the *_init()- or the 'disabled' bitset in
the *_fini()-functions respectively.
Signed-off-by: Nicolai Stange <nicstange@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rex Zhu [Wed, 16 Mar 2016 07:17:18 +0000 (15:17 +0800)]
drm/amdgpu: refine code for code style.
White space fix.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rex Zhu [Wed, 16 Mar 2016 06:48:18 +0000 (14:48 +0800)]
drm/amdgpu: No need to stop hw init although vce's state was not true.
This is not a fatal error.
v2: add comment why ignore the error here.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rex Zhu [Wed, 16 Mar 2016 06:45:40 +0000 (14:45 +0800)]
drm/amdgpu: fix issue that can't set vce clock gate.
Need to soft reset VCE as part of the clockgating
sequence.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Monk Liu [Thu, 10 Mar 2016 04:14:44 +0000 (12:14 +0800)]
drm/amdgpu: use ref to keep job alive
this is to fix fatal page fault error that occured if:
job is signaled/released after its timeout work is already
put to the global queue (in this case the cancel_delayed_work
will return false), which will lead to NX-protection error
page fault during job_timeout_func.
Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Monk Liu [Fri, 4 Mar 2016 10:51:02 +0000 (18:51 +0800)]
drm/amdgpu: rework TDR in scheduler (v2)
Add two callbacks to scheduler to maintain jobs, and invoked for
job timeout calculations. Now TDR measures time gap from
job is processed by hw.
v2:
fix typo
Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Monk Liu [Fri, 4 Mar 2016 06:42:26 +0000 (14:42 +0800)]
drm/amdgpu: get rid of incorrect TDR
original time out detect routine is incorrect, cuz it measures
the gap from job scheduled, but we should only measure the
gap from processed by hw.
Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Monk Liu [Fri, 4 Mar 2016 06:33:44 +0000 (14:33 +0800)]
drm/amdgpu: put job to list before done
the mirror_list will be used for later time out detect
feature. This is needed to properly detect a GPU
timeout with the scheduler.
Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Monk Liu [Thu, 3 Mar 2016 11:00:50 +0000 (19:00 +0800)]
drm/amdgpu: delay job free to when it's finished (v2)
for those jobs submitted through scheduler, do not
free it immediately after scheduled, instead free it
in global workqueue by its sched fence signaling
callback function.
v2:
call uf's bo_undef after job_run()
call job's sync free after job_run()
no static inline __amdgpu_job_free() anymore, just use
kfree(job) to replace it.
Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Vitaly Prosyak [Fri, 18 Mar 2016 19:49:41 +0000 (15:49 -0400)]
drm/amdgpu/dce11: fix vertical bars appear on monitor
Fixed mc stop and resume hardware programming sequence.
Signed-off-by: Vitaly Prosyak <vitaly.prosyak@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Monk Liu [Mon, 7 Mar 2016 04:49:55 +0000 (12:49 +0800)]
drm/amdgpu: use sched_job_init to initialize sched_job
Consolidate job initialization in one place rather than
duplicating it in multiple places.
Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Monk Liu [Thu, 14 Jan 2016 11:07:38 +0000 (19:07 +0800)]
drm/amdgpu: patch cond exec for SDMA
More ground work for conditional execution on SDMA
necessary for preemption.
Signed-off-by: Monk Liu <monk.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Monk Liu [Thu, 14 Jan 2016 10:08:16 +0000 (18:08 +0800)]
drm/amdgpu: support cond exec
This adds the groundwork for conditional execution on
SDMA which is necessary for preemption.
Signed-off-by: Monk Liu <monk.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Chunming Zhou [Thu, 17 Mar 2016 03:41:37 +0000 (11:41 +0800)]
drm/amdgpu: improve vmid assigment V2
V2: the signaled items on the LRU maintain their order
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Nils Wallménius [Sat, 19 Mar 2016 15:12:17 +0000 (16:12 +0100)]
drm/amdgpu: mark amdgpu_allowed_register_entry tables as 'const'
Signed-off-by: Nils Wallménius <nils.wallmenius@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Nils Wallménius [Sat, 19 Mar 2016 15:12:13 +0000 (16:12 +0100)]
drm/amdgpu: do not store bios_header_start in amdgpu_device
It is only used locally in amdgpu_get_bios
Signed-off-by: Nils Wallménius <nils.wallmenius@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Nils Wallménius [Sat, 19 Mar 2016 15:12:12 +0000 (16:12 +0100)]
drm/radeon: delete unused struct member suspend from radeon_device
Signed-off-by: Nils Wallménius <nils.wallmenius@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Nils Wallménius [Sat, 19 Mar 2016 15:12:11 +0000 (16:12 +0100)]
drm/amdgpu: delete unused struct member suspend from amdgpu_device
Signed-off-by: Nils Wallménius <nils.wallmenius@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Jérome Glisse [Fri, 18 Mar 2016 15:58:39 +0000 (16:58 +0100)]
drm/radeon: hard reset r600 and newer GPU when hibernating.
Some GPU block like UVD and VCE require hard reset to be properly
resume if there is no real powerdown of the asic like during various
hibernation step. This patch perform such hard reset.
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Jérôme Glisse <jglisse@redhat.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Jérome Glisse [Fri, 18 Mar 2016 15:58:38 +0000 (16:58 +0100)]
drm/radeon: allow to force hard GPU reset.
In some cases, like when freezing for hibernation, we need to be
able to force hard reset even if no engine are stuck. This patch
add a bool option to current asic reset callback to allow to force
hard reset on asic that supports it.
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Jérôme Glisse <jglisse@redhat.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Jérome Glisse [Fri, 18 Mar 2016 15:58:37 +0000 (16:58 +0100)]
drm/radeon: add driver option to disable vce block.
Quite few suspend/hibernation bugs are related to this block. Add
an option to disable those as a work around.
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Jérôme Glisse <jglisse@redhat.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Jérome Glisse [Fri, 18 Mar 2016 15:58:36 +0000 (16:58 +0100)]
drm/radeon: add driver option to disable uvd block.
Quite few suspend/hibernation bugs are related to this block. Add
an option to disable those as a work around.
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Jérôme Glisse <jglisse@redhat.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Jérome Glisse [Fri, 18 Mar 2016 15:58:35 +0000 (16:58 +0100)]
drm/radeon: consolidate cik vce initialization and startup code.
This match the exact same control flow as existing code. It just
use goto instead of multiple levels of if/else. It also clarify
early initialization failures by clearing rdev->has_vce doing so
does not change end result from hardware point of view, it only
avoids printing more error messages down the line and thus only
the original error is reported.
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Jérôme Glisse <jglisse@redhat.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Jérome Glisse [Fri, 18 Mar 2016 15:58:34 +0000 (16:58 +0100)]
drm/radeon: consolidate si vce initialization and startup code.
This match the exact same control flow as existing code. It just
use goto instead of multiple levels of if/else. It also clarify
early initialization failures by clearing rdev->has_vce doing so
does not change end result from hardware point of view, it only
avoids printing more error messages down the line and thus only
the original error is reported.
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Jérôme Glisse <jglisse@redhat.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Jérome Glisse [Fri, 18 Mar 2016 15:58:33 +0000 (16:58 +0100)]
drm/radeon: consolidate ni vce initialization and startup code.
This match the exact same control flow as existing code. It just
use goto instead of multiple levels of if/else. It also clarify
early initialization failures by clearing rdev->has_vce doing so
does not change end result from hardware point of view, it only
avoids printing more error messages down the line and thus only
the original error is reported.
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Jérôme Glisse <jglisse@redhat.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Jérome Glisse [Fri, 18 Mar 2016 15:58:32 +0000 (16:58 +0100)]
drm/radeon: add a vce flag to know if need to initialize vce or not.
This will later on serve for module option to disable vce.
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Jérôme Glisse <jglisse@redhat.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Jérome Glisse [Fri, 18 Mar 2016 15:58:31 +0000 (16:58 +0100)]
drm/radeon: consolidate cik uvd initialization and startup code.
This match the exact same control flow as existing code. It just
use goto instead of multiple levels of if/else. It also clarify
early initialization failures by clearing rdev->has_uvd doing so
does not change end result from hardware point of view, it only
avoids printing more error messages down the line and thus only
the original error is reported.
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Jérôme Glisse <jglisse@redhat.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Jérome Glisse [Fri, 18 Mar 2016 15:58:30 +0000 (16:58 +0100)]
drm/radeon: consolidate si uvd initialization and startup code.
This match the exact same control flow as existing code. It just
use goto instead of multiple levels of if/else. It also clarify
early initialization failures by clearing rdev->has_uvd doing so
does not change end result from hardware point of view, it only
avoids printing more error messages down the line and thus only
the original error is reported.
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Jérôme Glisse <jglisse@redhat.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Jérome Glisse [Fri, 18 Mar 2016 15:58:29 +0000 (16:58 +0100)]
drm/radeon: consolidate ni uvd initialization and startup code.
This match the exact same control flow as existing code. It just
use goto instead of multiple levels of if/else. It also clarify
early initialization failures by clearing rdev->has_uvd doing so
does not change end result from hardware point of view, it only
avoids printing more error messages down the line and thus only
the original error is reported.
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Jérôme Glisse <jglisse@redhat.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Jérome Glisse [Fri, 18 Mar 2016 15:58:28 +0000 (16:58 +0100)]
drm/radeon: consolidate evergreen uvd initialization and startup code.
This match the exact same control flow as existing code. It just
use goto instead of multiple levels of if/else. It also clarify
early initialization failures by clearing rdev->has_uvd doing so
does not change end result from hardware point of view, it only
avoids printing more error messages down the line and thus only
the original error is reported.
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Jérôme Glisse <jglisse@redhat.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Jérome Glisse [Fri, 18 Mar 2016 15:58:27 +0000 (16:58 +0100)]
drm/radeon: consolidate rv770 uvd initialization and startup code.
This match the exact same control flow as existing code. It just
use goto instead of multiple levels of if/else. It also clarify
early initialization failures by clearing rdev->has_uvd doing so
does not change end result from hardware point of view, it only
avoids printing more error messages down the line and thus only
the original error is reported.
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Jérôme Glisse <jglisse@redhat.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>