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Dmitri Gribenko [Thu, 3 Apr 2014 16:29:11 +0000 (16:29 +0000)]
ArrayRef: use std::vector::data() now that we are building in C++11 mode
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205542
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Saleem Abdulrasool [Thu, 3 Apr 2014 16:01:44 +0000 (16:01 +0000)]
ARM: fixup more tests to specify the target more explicitly
This changes the tests that were targeting ARM EABI to explicitly specify the
environment rather than relying on the default. This breaks with the new
Windows on ARM support when running the tests on Windows where the default
environment is no longer EABI.
Take the opportunity to avoid a pointless redirect (helps when trying to debug
with providing a command line invocation which can be copy and pasted) and
removing a few greps in favour of FileCheck.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205541
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Tim Northover [Thu, 3 Apr 2014 15:10:35 +0000 (15:10 +0000)]
ARM: tell LLVM about zext properties of ldrexb/ldrexh
Implementing this via ComputeMaskedBits has two advantages:
+ It actually works. DAGISel doesn't deal with the chains properly
in the previous pattern-based solution, so they never trigger.
+ The information can be used in other DAG combines, as well as the
trivial "get rid of truncs". For example if the trunc is in a
different basic block.
rdar://problem/
16227836
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205540
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Daniel Sanders [Thu, 3 Apr 2014 14:14:22 +0000 (14:14 +0000)]
[mips] Add negative tests confirm that supported ISA's don't allow instructions added in later ISA's
Summary:
test/MC/Mips/<isa1>/invalid-<isa2>.s
Test that <isa1> does not support <isa2>'s instructions.
test/MC/Mips/<isa1>/invalid-<isa2>-xfail.s
Things that should be invalid but currently aren't. Will XPASS if any
become invalid.
Reviewers: matheusalmeida
Reviewed By: matheusalmeida
Differential Revision: http://llvm-reviews.chandlerc.com/D3262
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205538
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Daniel Sanders [Thu, 3 Apr 2014 13:21:51 +0000 (13:21 +0000)]
[mips] Implement ehb, ssnop, and pause in assembler
Summary: Add negative tests for pause
Reviewers: matheusalmeida
Reviewed By: matheusalmeida
Differential Revision: http://llvm-reviews.chandlerc.com/D3246
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205537
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Tim Northover [Thu, 3 Apr 2014 13:06:54 +0000 (13:06 +0000)]
ARM: skip cmpxchg failure barrier if ordering is monotonic.
The terminal barrier of a cmpxchg expansion will be either Acquire or
SequentiallyConsistent. In either case it can be skipped if the
operation has Monotonic requirements on failure.
rdar://problem/
15996804
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205535
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Zoran Jovanovic [Thu, 3 Apr 2014 12:47:34 +0000 (12:47 +0000)]
Implementation of 16-bit microMIPS instructions MFHI and MFLO.
Differential Revision: http://llvm-reviews.chandlerc.com/D3141
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205532
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Daniel Sanders [Thu, 3 Apr 2014 12:13:36 +0000 (12:13 +0000)]
[mips] Add initial (experimental) MIPS-IV support.
Summary:
Adds the 'mips4' processor and a simple test of the ELF e_flags.
Patch by David Chisnall
His work was sponsored by: DARPA, AFRL
I made one small change to the testcase so that it uses
mips64-unknown-linux instead of mips4-unknown-linux.
This patch indirectly adds FeatureCondMov to FeatureMips64. This is ok
because it's supposed to be there anyway and it turns out that
FeatureCondMov is not a predicate of any instructions at the moment
(this is a bug that hasn't been noticed because there are no targets
without the conditional move instructions yet).
CC: theraven
Differential Revision: http://llvm-reviews.chandlerc.com/D3244
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205530
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Eric Christopher [Thu, 3 Apr 2014 12:11:51 +0000 (12:11 +0000)]
Fix for PR 19261:
llc doesn't generate nodes for unconditional fall-through branches for targets
without FastISel implementation (X86 has it, but can be disabled by
"-fast-isel=false") in SelectionDAGBuilder::visitBr().
So for line 4 in the following testcase
1: void foo(int i){
2: switch(i){
3: default:
4: break;
5: }
6: return;
7: }
there is no corresponding line in .debug_line section, and a debugger
cannot set a breakpoint at line 4.
Fix this by always emitting a branch when we're not optimizing and add a
testcase to ensure that there's code on every line we'd want to break.
Patch by Daniil Fukalov.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205529
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Zoran Jovanovic [Thu, 3 Apr 2014 12:01:01 +0000 (12:01 +0000)]
MicroMIPS specific little endian fixup data byte ordering.
Differential Revision: http://llvm-reviews.chandlerc.com/D3245
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205528
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Tim Northover [Thu, 3 Apr 2014 11:44:58 +0000 (11:44 +0000)]
ARM: expand atomic ldrex/strex loops in IR
The previous situation where ATOMIC_LOAD_WHATEVER nodes were expanded
at MachineInstr emission time had grown to be extremely large and
involved, to account for the subtly different code needed for the
various flavours (8/16/32/64 bit, cmpxchg/add/minmax).
Moving this transformation into the IR clears up the code
substantially, and makes future optimisations much easier:
1. an atomicrmw followed by using the *new* value can be more
efficient. As an IR pass, simple CSE could handle this
efficiently.
2. Making use of cmpxchg success/failure orderings only has to be done
in one (simpler) place.
3. The common "cmpxchg; did we store?" idiom can be exposed to
optimisation.
I intend to gradually improve this situation within the ARM backend
and make sure there are no hidden issues before moving the code out
into CodeGen to be shared with (at least ARM64/AArch64, though I think
PPC & Mips could benefit too).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205525
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Stepan Dyatkovskiy [Thu, 3 Apr 2014 11:29:15 +0000 (11:29 +0000)]
PR19320:
The trouble as in ARMAsmParser, in ParseInstruction method. It assumes that ARM::R12 + 1 == ARM::SP.
It is wrong, since ARM::<Register> codes are generated by tablegen and actually could be any random numbers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205524
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Silviu Baranga [Thu, 3 Apr 2014 10:44:27 +0000 (10:44 +0000)]
[ARM] When generating a vpaddl node the input lane type is not always the type of the
add operation since extract_vector_elt can perform an extend operation. Get the input lane
type from the vector on which we're performing the vpaddl operation on and extend or
truncate it to the output type of the original add node.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205523
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Sasa Stankovic [Thu, 3 Apr 2014 10:37:45 +0000 (10:37 +0000)]
[mips] Extend MipsMCExpr class to handle %higher(sym1 - sym2 + const) and
%highest(sym1 - sym2 + const) relocations. Remove "ABS_" from VK_Mips_HI
and VK_Mips_LO enums in MipsMCExpr, to be consistent with VK_Mips_HIGHER
and VK_Mips_HIGHEST.
This change also deletes test file test/MC/Mips/higher_highest.ll and moves
its CHECK's to the new test file test/MC/Mips/higher-highest-addressing.s.
The deleted file tests that R_MIPS_HIGHER and R_MIPS_HIGHEST relocations are
emitted in the .o file. Since it uses -force-mips-long-branch option, it was
created when MipsLongBranch's implementation was emitting R_MIPS_HIGHER and
R_MIPS_HIGHEST relocations in the .o file. It was disabled when MipsLongBranch
started to directly calculate offsets.
Differential Revision: http://llvm-reviews.chandlerc.com/D3230
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205522
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Tim Northover [Thu, 3 Apr 2014 09:36:05 +0000 (09:36 +0000)]
ARM64: add regression test for r205519.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205520
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Tim Northover [Thu, 3 Apr 2014 09:26:16 +0000 (09:26 +0000)]
ARM64: always use i64 for the RHS of shift operations
Switching between i32 and i64 based on the LHS type is a good idea in
theory, but pre-legalisation uses i64 regardless of our choice,
leading to potential ISel errors.
Should fix PR19294.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205519
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Oliver Stannard [Thu, 3 Apr 2014 08:45:16 +0000 (08:45 +0000)]
ARM: Use __STACK_LIMIT symbol for segmented stacks
We cannot use STACK_LIMIT, as it is not reserved for the compiler
by the C spec.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205516
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Andrew Trick [Thu, 3 Apr 2014 07:08:21 +0000 (07:08 +0000)]
Stack map docs. Remove some stray markup.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205515
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Tim Northover [Thu, 3 Apr 2014 07:06:13 +0000 (07:06 +0000)]
ARM64: don't generate __sincos_stret calls unless on MachO
This should fix PR19314.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205514
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Andrew Trick [Thu, 3 Apr 2014 07:03:28 +0000 (07:03 +0000)]
Minor update to the stack map documentation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205513
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David Blaikie [Thu, 3 Apr 2014 06:28:20 +0000 (06:28 +0000)]
DebugInfo: Use a 64 bit type for the subrange
While we were encoding 64 bit values (data8) in the subrange itself,
using a 32 bit type for the subrange was still confusing the gdb. Oh,
and make it unsigned too.
As the comment points out, this could be pushed into the frontend so
that it would be 32 or 64 bit as appropriate, etc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205512
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Lang Hames [Thu, 3 Apr 2014 05:03:20 +0000 (05:03 +0000)]
[CodeGen] Fix peephole optimizer bug introduced in r205481. Fixes PR19318.
I should have read that comment a little more carefully. ;)
Regression test in the works, committing in the mean time to un-break people.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205511
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Rafael Espindola [Thu, 3 Apr 2014 03:57:03 +0000 (03:57 +0000)]
Handle getting UnknownAddressOrSize or section_end().
These should probably be error conditions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205509
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Rafael Espindola [Thu, 3 Apr 2014 03:13:33 +0000 (03:13 +0000)]
Implement get getSymbolFileOffset with getSymbolAddress.
This has the following advantages:
* Less code.
* The old ELF implementation was wrong for non-relocatable objects.
* The old ELF implementation (and I think MachO) was wrong for thumb.
No current testcase since this is only used from MCJIT and it only uses
relocatable objects and I don't think it supports thumb yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205508
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Rafael Espindola [Thu, 3 Apr 2014 02:32:47 +0000 (02:32 +0000)]
Remove getSymbolValue.
All existing users explicitly ask for an address or a file offset.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205503
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Rafael Espindola [Thu, 3 Apr 2014 02:27:00 +0000 (02:27 +0000)]
Add support for the R_ARM_ABS32 relocation.
This should bring the arm buildbots back.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205502
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Rafael Espindola [Thu, 3 Apr 2014 02:20:43 +0000 (02:20 +0000)]
Only clear the thumb bit from function addresses.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205500
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Rafael Espindola [Thu, 3 Apr 2014 01:51:15 +0000 (01:51 +0000)]
Simplify ELFObjectFile<ELFT>::getSymbolAddress.
In particular, we only need to fetch the section if this is a relocatable
object.
No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205499
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Juergen Ributzka [Thu, 3 Apr 2014 01:38:47 +0000 (01:38 +0000)]
Revert "[Constant Hoisting] Lazily compute the idom and cache the result."
This code is no longer usefull, because we only compute and use the
IDom once. There is no benefit in caching it anymore.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205498
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Hal Finkel [Thu, 3 Apr 2014 00:53:59 +0000 (00:53 +0000)]
Account for scalarization costs in BasicTTI::getMemoryOpCost for extending vector loads
When a vector type legalizes to a larger vector type, and the target does not
support the associated extending load (or truncating store), then legalization
will scalarize the load (or store) resulting in an associated scalarization
cost. BasicTTI::getMemoryOpCost needs to account for this.
Between this, and r205487, PowerPC on the P7 with VSX enabled shows:
MultiSource/Benchmarks/PAQ8p/paq8p: 43% speedup
SingleSource/Benchmarks/BenchmarkGame/puzzle: 51% speedup
SingleSource/UnitTests/Vectorizer/gcc-loops 28% speedup
(some of these are new; some of these, such as PAQ8p, just reverse regressions
that VSX support would trigger)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205495
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Rafael Espindola [Thu, 3 Apr 2014 00:19:35 +0000 (00:19 +0000)]
Revert "Fix a nomenclature error in llvm-nm."
This reverts commit r205479.
It turns out that nm does use addresses, it is just that every reasonable
relocatable ELF object has sections with address 0. I have no idea if those
exist in reality, but it at least it shows that llvm-nm should use the name
address.
The added test was includes an unusual .o file with non 0 section addresses. I
created it by hacking ELFObjectWriter.cpp.
Really sorry for the churn.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205493
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Richard Trieu [Thu, 3 Apr 2014 00:14:18 +0000 (00:14 +0000)]
Fix test case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205492
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Lang Hames [Wed, 2 Apr 2014 23:57:49 +0000 (23:57 +0000)]
[X86] As per suggestion from Craig Topper and Hal Finkel, override
TargetInstrInfo::findCommutedOpIndices to enable VFMA*231 commutation, rather
than abusing commuteInstruction.
Thanks very much for the suggestion guys!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205489
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Hal Finkel [Wed, 2 Apr 2014 23:18:54 +0000 (23:18 +0000)]
Fix multi-register costs in BasicTTI::getCastInstrCost
For an cast (extension, etc.), the currently logic predicts a low cost if the
associated operation (keyed on the destination type) is legal (or promoted).
This is not true when the number of values required to legalize the type is
changing. For example, <8 x i16> being sign extended by <8 x i32> is not
generically cheap on PPC with VSX, even though sign extension to v4i32 is
legal, because two output v4i32 values are required compared to the single
v8i16 input value, and without custom logic in the target, this conversion will
scalarize.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205487
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Juergen Ributzka [Wed, 2 Apr 2014 23:06:22 +0000 (23:06 +0000)]
Add test case for [Constant Hoisting] Erase dead cast instructions (r204538).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205484
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Renato Golin [Wed, 2 Apr 2014 23:03:28 +0000 (23:03 +0000)]
ARM Linux support
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205483
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Lang Hames [Wed, 2 Apr 2014 22:59:58 +0000 (22:59 +0000)]
[CodeGen] Teach the peephole optimizer to remember (and exploit) all folding
opportunities in the current basic block, rather than just the last one seen.
<rdar://problem/
16478629>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205481
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Rafael Espindola [Wed, 2 Apr 2014 22:52:46 +0000 (22:52 +0000)]
Fix a nomenclature error in llvm-nm.
What llvm-nm prints depends on the file format. On ELF for example, if the
file is relocatable, it prints offsets. If it is not, it prints addresses.
Since it doesn't really need to care what it is that it is printing, use the
generic term value.
Fix or implement getSymbolValue to keep llvm-nm working.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205479
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Pete Cooper [Wed, 2 Apr 2014 22:49:58 +0000 (22:49 +0000)]
Add ability to disable building LLVM utils
Patch by Chris Bieneman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205478
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Hal Finkel [Wed, 2 Apr 2014 22:43:49 +0000 (22:43 +0000)]
[PowerPC] Make PPCTTI::getMemoryOpCost call BasicTTI::getMemoryOpCost
PPCTTI::getMemoryOpCost will now make use of BasicTTI::getMemoryOpCost to
calculate the base cost of the memory access, and then adjust on top of that.
There is no functionality change from this modification, but it will become
important so that PPCTTI can take advantage of scalarization information for which
BasicTTI::getMemoryOpCost will account in the near future.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205476
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Juergen Ributzka [Wed, 2 Apr 2014 22:21:01 +0000 (22:21 +0000)]
Add comments and test case for [DAG] Keep the opaque constant flag when performing unary constant folding operations (r204737).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205474
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Adrian Prantl [Wed, 2 Apr 2014 22:17:30 +0000 (22:17 +0000)]
typo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205473
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Lang Hames [Wed, 2 Apr 2014 22:06:16 +0000 (22:06 +0000)]
[X86] Make the VFMA*231 variants commutable and relax the alignment restrictions
on FMA3 memory operands. FMA3 instructions are VEX encoded, so they can load
from unaligned memory.
Testcase to follow, along with related patch.
<rdar://problem/
16478629>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205472
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Duncan P. N. Exon Smith [Wed, 2 Apr 2014 22:05:57 +0000 (22:05 +0000)]
Revert "Reapply "LTO: add API to set strategy for -internalize""
This reverts commit r199244.
Conflicts:
include/llvm-c/lto.h
include/llvm/LTO/LTOCodeGenerator.h
lib/LTO/LTOCodeGenerator.cpp
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205471
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Juergen Ributzka [Wed, 2 Apr 2014 21:45:36 +0000 (21:45 +0000)]
Add comments and test case for [X86TTI] Make constant base pointers for GetElementPtr opaque (r204739).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205468
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Saleem Abdulrasool [Wed, 2 Apr 2014 21:22:03 +0000 (21:22 +0000)]
ARM: fixup tests to specify the target more explicitly
This changes the tests that were targeting ARM EABI to explicitly specify the
environment rather than relying on the default. This breaks with the new
Windows on ARM support when running the tests on Windows where the default
environment is no longer EABI.
Take the opportunity to avoid a pointless redirect (helps when trying to debug
with providing a command line invocation which can be copy and pasted) and
removing a few greps in favour of FileCheck.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205465
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Juergen Ributzka [Wed, 2 Apr 2014 21:15:36 +0000 (21:15 +0000)]
Add test case for [Stackmaps][X86TTI] Fix think-o in getIntImmCost calculation (r204738).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205464
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Saleem Abdulrasool [Wed, 2 Apr 2014 20:32:05 +0000 (20:32 +0000)]
ARM: update subtarget information for Windows on ARM
Update the subtarget information for Windows on ARM. This enables using the MC
layer to target Windows on ARM.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205459
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Jim Grosbach [Wed, 2 Apr 2014 20:21:22 +0000 (20:21 +0000)]
Make a few more range-based loops use explicit types.
No functional change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205458
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Rafael Espindola [Wed, 2 Apr 2014 20:00:33 +0000 (20:00 +0000)]
Add back an assert that was lost in the ELFObjectFile.h split.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205456
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Tom Stellard [Wed, 2 Apr 2014 19:53:29 +0000 (19:53 +0000)]
TargetLibraryInfo: Disable memcpy and memset on R600
There are no implementations of these for R600.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205455
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Jim Grosbach [Wed, 2 Apr 2014 19:28:18 +0000 (19:28 +0000)]
Simplify resolveFrameIndex() signature.
Just pass a MachineInstr reference rather than an MBB iterator.
Creating a MachineInstr& is the first thing every implementation did
anyway.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205453
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Jim Grosbach [Wed, 2 Apr 2014 19:28:13 +0000 (19:28 +0000)]
ARM: cortex-m0 doesn't support unaligned memory access.
Unlike other v6+ processors, cortex-m0 never supports unaligned accesses.
From the v6m ARM ARM:
"A3.2 Alignment support: ARMv6-M always generates a fault when an unaligned
access occurs."
rdar://
16491560
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205452
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Jim Grosbach [Wed, 2 Apr 2014 19:28:08 +0000 (19:28 +0000)]
Make some range based loop types more explicit.
No functional change, but more readable code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205451
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Kai Nacke [Wed, 2 Apr 2014 18:40:43 +0000 (18:40 +0000)]
[mips] Add more Octeon cnMips instructions
Adds the instructions ext/ext32/cins/cins32.
It also changes pop/dpop to accept the two operand version and
adds a simple pattern to generate baddu.
Tests for the two operand versions (including baddu/dmul/dpop/pop)
and the code generation pattern for baddu are included.
Reviewed by: Daniel.Sanders@imgtec.com
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205449
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Jim Grosbach [Wed, 2 Apr 2014 18:00:59 +0000 (18:00 +0000)]
[C++11,ARM64] Range based for and explicit 'override' in STP cleanup.
No functional change intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205446
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Jim Grosbach [Wed, 2 Apr 2014 18:00:56 +0000 (18:00 +0000)]
[C++11,ARM64] Range based for loops in constant promotion.
No functional change intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205445
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Jim Grosbach [Wed, 2 Apr 2014 18:00:53 +0000 (18:00 +0000)]
[C++11,ARM64] Range based for loops in load/store pair optimizer.
No functional change intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205444
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Jim Grosbach [Wed, 2 Apr 2014 18:00:51 +0000 (18:00 +0000)]
[C++11,ARM64] Range based for loops in target lowering.
No functional change intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205443
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Jim Grosbach [Wed, 2 Apr 2014 18:00:49 +0000 (18:00 +0000)]
[C++11,ARM64] Range based for loops in frame lowering.
No functional change intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205442
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Jim Grosbach [Wed, 2 Apr 2014 18:00:46 +0000 (18:00 +0000)]
[C++11,ARM64] Range based for loops in pseudo expansion.
No functional change intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205441
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Jim Grosbach [Wed, 2 Apr 2014 18:00:44 +0000 (18:00 +0000)]
[C++11,ARM64] Range based for loops for LOH
No functional change intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205440
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Jim Grosbach [Wed, 2 Apr 2014 18:00:41 +0000 (18:00 +0000)]
[C++11,ARM64] Range based for loops TLS cleanup.
No functional change intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205439
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Jim Grosbach [Wed, 2 Apr 2014 18:00:39 +0000 (18:00 +0000)]
[C++11,ARM64] Range based for loops in branch relaxation.
No functional change intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205438
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Jim Grosbach [Wed, 2 Apr 2014 18:00:36 +0000 (18:00 +0000)]
[C++11,ARM64] Range based for loops in address type promotion.
No functional change intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205437
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Quentin Colombet [Wed, 2 Apr 2014 16:40:49 +0000 (16:40 +0000)]
[ARM64][CollectLOH] Remove the link to the radar from the comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205435
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Simon Atanasyan [Wed, 2 Apr 2014 16:34:54 +0000 (16:34 +0000)]
[yaml2obj][ELF] Convert some static functions into class members to
reduce number of arguments.
No functional changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205434
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Simon Atanasyan [Wed, 2 Apr 2014 16:34:48 +0000 (16:34 +0000)]
[yaml2obj][ELF] Remove unused typedef.
No functional changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205433
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Simon Atanasyan [Wed, 2 Apr 2014 16:34:40 +0000 (16:34 +0000)]
[yaml2obj][ELF] Move section index to the ELFState class.
No functional changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205432
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Simon Atanasyan [Wed, 2 Apr 2014 16:34:34 +0000 (16:34 +0000)]
[yaml2obj][ELF] Remove relationship between ELFState
and ContiguousBlobAccumulator classes. Pass ContiguousBlobAccumulator to
the handleSymtabSectionHeader function directly.
No functional changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205431
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Oliver Stannard [Wed, 2 Apr 2014 16:10:33 +0000 (16:10 +0000)]
ARM: Add support for segmented stacks
Patch by Alex Crichton, ILyoan, Luqman Aden and Svetoslav.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205430
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Adrian Prantl [Wed, 2 Apr 2014 15:49:45 +0000 (15:49 +0000)]
clarify comment
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205429
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Adrian Prantl [Wed, 2 Apr 2014 15:49:37 +0000 (15:49 +0000)]
fix a comment to use ASCII aprostrophes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205428
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Tim Northover [Wed, 2 Apr 2014 14:39:11 +0000 (14:39 +0000)]
ARM64: use GOT for weak symbols & PIC.
Weak symbols cannot use the small code model's usual ADRP sequences since the
instruction simply may not be able to encode a value of 0.
This redirects them to use the GOT, which hopefully linkers are able to cope
with even in the static relocation model.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205426
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Tim Northover [Wed, 2 Apr 2014 14:39:07 +0000 (14:39 +0000)]
ARM64: fix lowering of fp128 fptosi/fptoui
We were creating libcall nodes that returned an MVT::f128, when these
particular operations actually return an int of some stripe.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205425
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Tim Northover [Wed, 2 Apr 2014 14:39:02 +0000 (14:39 +0000)]
SLPVectorizer: compare entire intrinsic for SLP compatibility.
Some Intrinsics are overloaded to the extent that return type equality (all
that's been checked up to now) does not guarantee that the arguments are the
same. In these cases SLP vectorizer should not recurse into the operands, which
can be achieved by comparing them as "Function *" rather than simply the ID.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205424
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Tim Northover [Wed, 2 Apr 2014 14:38:58 +0000 (14:38 +0000)]
ARM64: make sure first argument to INSERT_SUBVECTOR has right type.
Again, coalescing and other optimisations swiftly made the MachineInstrs
consistent again, but when compiled at -O0 a bad INSERT_SUBREGISTER was
produced.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205423
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Tim Northover [Wed, 2 Apr 2014 14:38:54 +0000 (14:38 +0000)]
ARM64: convert fp16 narrowing ISel to pseudo-instruction
The previous attempt was fine with optimisations, but was actually rather
cavalier with its types. When compiled at -O0, it produced invalid COPY
MachineInstrs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205422
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Job Noorman [Wed, 2 Apr 2014 13:13:56 +0000 (13:13 +0000)]
Mark FPB as a reserved register when needed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205421
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Rafael Espindola [Wed, 2 Apr 2014 12:15:20 +0000 (12:15 +0000)]
Work around gold bug sourceware.org/PR16794.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205416
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Renato Golin [Wed, 2 Apr 2014 09:03:43 +0000 (09:03 +0000)]
Remove duplicated DMB instructions
ARM specific optimiztion, finding places in ARM machine code where 2 dmbs
follow one another, and eliminating one of them.
Patch by Reinoud Elhorst.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205409
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Yaron Keren [Wed, 2 Apr 2014 04:27:51 +0000 (04:27 +0000)]
Added isTargetWindowsMSVC(), renamed isTargetMingw() to isTargetWindowsGNU()
and isTargetCygwin() to isTargetWindowsCygwin() to be consistent with the
four Windows environments in Triple.h.
Suggestion by Saleem Abdulrasool!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205393
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Hal Finkel [Wed, 2 Apr 2014 02:34:49 +0000 (02:34 +0000)]
[LoopVectorizer] Count dependencies of consecutive pointers as uniforms
For the purpose of calculating the cost of the loop at various vectorization
factors, we need to count dependencies of consecutive pointers as uniforms
(which means that the VF = 1 cost is used for all overall VF values).
For example, the TSVC benchmark function s173 has:
...
%3 = add nsw i64 %indvars.iv, 16000
%arrayidx8 = getelementptr inbounds %struct.GlobalData* @global_data, i64 0, i32 0, i64 %3
...
and we must realize that the add will be a scalar in order to correctly deduce
it to be profitable to vectorize this on PowerPC with VSX enabled. In fact, all
dependencies of a consecutive pointer must be a scalar (uniform), and so we
simply need to add all consecutive pointers to the worklist that currently
detects collects uniforms.
Fixes PR19296.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205387
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David Blaikie [Wed, 2 Apr 2014 02:04:51 +0000 (02:04 +0000)]
Adjust comments regarding non-relocated abbrev offset in debug_info.dwo
I'm not sure the comment in the implementation really adds a lot of
value (it's clear that we emit zero when no symbol is provided, but it
doesn't explain why we would do that). Happy to iterate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205386
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David Blaikie [Wed, 2 Apr 2014 01:50:20 +0000 (01:50 +0000)]
Split debug_loc and debug_loc.dwo emission into two separate functions
Based on code review feedback from Eric Christopher on r204697
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205385
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David Blaikie [Wed, 2 Apr 2014 01:43:18 +0000 (01:43 +0000)]
DebugInfo: Introduce DebugLocList to encapsulate a list of DebugLocEntries and an MC Label to refer to them
This removes the magic-number-esque code creating/retrieving the same
label for a debug_loc entry from two places and removes the last small
piece of reusable logic from emitDebugLoc so that there will be less
duplication when refactoring it into two functions (one for debug_loc,
the other for debug_loc.dwo).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205382
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Quentin Colombet [Wed, 2 Apr 2014 01:02:28 +0000 (01:02 +0000)]
[ARM64][CollectLOH] Add some comments to explain how the LOHs
framework works (for the compiler part), since the design
document is not available.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205379
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Adrian Prantl [Tue, 1 Apr 2014 23:34:45 +0000 (23:34 +0000)]
Add a doxygen comment to DebugLocEntry::Merge.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205374
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David Blaikie [Tue, 1 Apr 2014 23:19:23 +0000 (23:19 +0000)]
DebugLocEntry: Actually merge the loc entry when returning true.
Seems we didn't have any test coverage for merging... awesome. So I
added some - but hit an llvm-objdump bug while I was there. I'm choosing
not to shave that yak right now.
Code review feedback/bug catch by Adrian Prantl in r205360.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205373
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David Blaikie [Tue, 1 Apr 2014 22:25:09 +0000 (22:25 +0000)]
Fix accidental fallthrough in DebugLocEntry::hasSameValueOrLocation
No test case (this would invoke UB by examining uninitialized members,
etc, at best - and this code is apparently untested anyway - I'm about
to fix that)
Code review feedback from Adrian Prantl on r205360.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205367
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David Blaikie [Tue, 1 Apr 2014 22:06:18 +0000 (22:06 +0000)]
Remove unused function DebugLocEntry::isEmpty
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205365
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David Blaikie [Tue, 1 Apr 2014 22:04:07 +0000 (22:04 +0000)]
Refactor out the comparison of the location/value in a DebugLocEntry
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205364
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David Blaikie [Tue, 1 Apr 2014 21:54:52 +0000 (21:54 +0000)]
Add inequality operator for MachineLocation.
Fixes the build I broke in r205360
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205361
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David Blaikie [Tue, 1 Apr 2014 21:49:04 +0000 (21:49 +0000)]
DebugInfo: Split DebugLocEntry into its own file.
It seems big enough that it deserves its own file - but it is header
only, so there's no need for another cpp file, etc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205360
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Adrian Prantl [Tue, 1 Apr 2014 21:04:24 +0000 (21:04 +0000)]
Add a comment about the DIDescriptor class hierarchy.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205358
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Adrian Prantl [Tue, 1 Apr 2014 21:04:18 +0000 (21:04 +0000)]
DwarfDebug: Prevent DebugLocEntry merging from coalescing two different
constants into only the first one.
rdar://
14874886.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205357
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Hal Finkel [Tue, 1 Apr 2014 19:24:27 +0000 (19:24 +0000)]
[PowerPC] Add some missing VSX bitcast patterns
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205352
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Yaron Keren [Tue, 1 Apr 2014 18:52:55 +0000 (18:52 +0000)]
If isKnownWindowsMSVCEnvironment then getOS == Triple::Win32 and
Environment == Triple::MSVC so it will never be MinGW or Cygwin.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205349
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Hal Finkel [Tue, 1 Apr 2014 18:50:34 +0000 (18:50 +0000)]
Implement X86TTI::getUnrollingPreferences
This provides an initial implementation of getUnrollingPreferences for x86.
getUnrollingPreferences is used by the generic (concatenation) unroller, which
is distinct from the unrolling done by the loop vectorizer. Many modern x86
cores have some kind of uop cache and loop-stream detector (LSD) used to
efficiently dispatch small loops, and taking full advantage of this requires
unrolling small loops (small here means 10s of uops).
These caches also have limits on the number of taken branches in the loop, and
so we also cap the loop unrolling factor based on the maximum "depth" of the
loop. This is currently calculated with a partial DFS traversal (partial
because it will stop early if the path length grows too much). This is still an
approximation, and one that is both conservative (because it does not account
for branches eliminated via block placement) and optimistic (because it is only
recording the maximum depth over minimum paths). Nevertheless, because the
loops that fit in these uop caches are so small, it is not clear how much the
details matter.
The original set of patches posted for review produced the following test-suite
performance results (from the TSVC benchmark) at that time:
ControlLoops-dbl - 13% speedup
ControlLoops-flt - 15% speedup
Reductions-dbl - 7.5% speedup
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205348
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Hal Finkel [Tue, 1 Apr 2014 18:50:30 +0000 (18:50 +0000)]
Add some additional fields to TTI::UnrollingPreferences
In preparation for an upcoming commit implementing unrolling preferences for
x86, this adds additional fields to the UnrollingPreferences structure:
- PartialThreshold and PartialOptSizeThreshold - Like Threshold and
OptSizeThreshold, but used when not fully unrolling. These are necessary
because we need different thresholds for full unrolling from those used when
partially unrolling (the full unrolling thresholds are generally going to be
larger).
- MaxCount - A cap on the unrolling factor when partially unrolling. This can
be used by a target to prevent the unrolled loop from exceeding some
resource limit independent of the loop size (such as number of branches).
There should be no functionality change for any in-tree targets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205347
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