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Ian Rogers [Fri, 18 Jul 2014 02:12:18 +0000 (02:12 +0000)]
Merge "Avoid race in single thread suspension."
Ian Rogers [Fri, 18 Jul 2014 01:52:42 +0000 (18:52 -0700)]
Avoid race in single thread suspension.
Don't allow more than one concurrent single thread suspension to avoid
potential cycles and deadlocks where threads try to suspend each other.
Bug:
16364458,
16354227
Change-Id: I907f1d5591a6aa5c241d37d6b4a34f968f98df77
Andreas Gampe [Fri, 18 Jul 2014 01:32:01 +0000 (01:32 +0000)]
Merge "ART: Make a soft failure in method verifier hard, add check"
Andreas Gampe [Thu, 17 Jul 2014 23:13:35 +0000 (16:13 -0700)]
ART: Make a soft failure in method verifier hard, add check
Make the soft error of using a primitive type in an instanceof a
hard verifier error.
Add a check when doing check_cast peep-hole optimization to check
whether the cast type is valid.
Bug:
16020300
Change-Id: Icaea560d17804f24a13dc09c115e9ec7039cb472
Andreas Gampe [Fri, 18 Jul 2014 01:31:36 +0000 (01:31 +0000)]
Merge "ART: Use array-inl.h in reference_table_test"
Hiroshi Yamauchi [Fri, 18 Jul 2014 00:16:30 +0000 (00:16 +0000)]
Merge "Fix two read barrier bugs introduced in CL 97882."
Hiroshi Yamauchi [Thu, 17 Jul 2014 23:16:31 +0000 (16:16 -0700)]
Fix two read barrier bugs introduced in CL 97882.
Bug:
12687968
Change-Id: Ib28da4c33977cc58b09913ef5b738dec75365714
Andreas Gampe [Thu, 17 Jul 2014 21:52:06 +0000 (14:52 -0700)]
ART: Use array-inl.h in reference_table_test
The test allocates arrays, which is an inline definition.
Change-Id: I1423c5419949d7c352ed0e614d4f9c5920831deb
Calin Juravle [Thu, 17 Jul 2014 20:08:08 +0000 (20:08 +0000)]
Merge "Fix identifier size in the heap dump."
Calin Juravle [Fri, 4 Jul 2014 15:24:03 +0000 (16:24 +0100)]
Fix identifier size in the heap dump.
We're using addresses as IDs and previously we would have written
sizeof(void*) as the identifier size in the header. Heap references
are actually uint32_t so writting 4 bytes should be enough.
Bug:
16016862
Change-Id: I785abf5030681b6009370b7b2d7552e8b4b54e67
Ian Rogers [Thu, 17 Jul 2014 18:49:18 +0000 (18:49 +0000)]
Merge "Avoid direct use of QuasiAtomic by using Atomic."
Ian Rogers [Thu, 17 Jul 2014 18:25:30 +0000 (11:25 -0700)]
Avoid direct use of QuasiAtomic by using Atomic.
Change-Id: I92d0f822cddb2085de7cbb4c44c3a429081892a2
Andreas Gampe [Thu, 17 Jul 2014 17:03:43 +0000 (17:03 +0000)]
Merge "ART: Refactor GenSelect, refactor gen_common accordingly"
Andreas Gampe [Wed, 16 Jul 2014 06:02:11 +0000 (23:02 -0700)]
ART: Refactor GenSelect, refactor gen_common accordingly
This adds a GenSelect method meant for selection of constants. The
general-purpose GenInstanceof code is refactored to take advantage of
this. This cleans up code and squashes a branch-over on ARM64 to a
cset.
Also add a slow-path for type initialization in GenInstanceof.
Change-Id: Ie4494858bb8c26d386cf2e628172b81bba911ae5
Andreas Gampe [Thu, 17 Jul 2014 15:25:04 +0000 (15:25 +0000)]
Merge "ART: Lock an arg reg in GenInlinedGet"
Andreas Gampe [Thu, 17 Jul 2014 07:12:32 +0000 (00:12 -0700)]
ART: Lock an arg reg in GenInlinedGet
Must lock an explicit target register so that it doesn't get used
for a temp and clobbered.
Bug:
16352802
Change-Id: I9e4ac76f92460cdbe59392989d12f8d0321cc624
Nicolas Geoffray [Thu, 17 Jul 2014 08:17:12 +0000 (08:17 +0000)]
Merge "Fix lint errors."
Nicolas Geoffray [Thu, 17 Jul 2014 08:16:19 +0000 (09:16 +0100)]
Fix lint errors.
Change-Id: I7bbaad590d84db97acfa7f8c4d093bc40e64684a
Nicolas Geoffray [Thu, 17 Jul 2014 08:00:17 +0000 (08:00 +0000)]
Merge "Use the thumb2 assembler for the optimizing compiler."
Ian Rogers [Thu, 17 Jul 2014 16:03:17 +0000 (16:03 +0000)]
Merge "Remove some to-done TODOs."
Ian Rogers [Thu, 17 Jul 2014 15:34:21 +0000 (08:34 -0700)]
Remove some to-done TODOs.
Change-Id: I976d35b1aa79f4dded86502a18bc679ba232d664
Stephen Hines [Wed, 16 Jul 2014 23:50:39 +0000 (23:50 +0000)]
Merge "Add back a deleted check related to verification."
Ian Rogers [Thu, 17 Jul 2014 05:49:49 +0000 (05:49 +0000)]
Merge "Fix test 304-method-tracing failure for Mips."
Douglas Leung [Thu, 17 Jul 2014 00:32:41 +0000 (17:32 -0700)]
Fix test 304-method-tracing failure for Mips.
Change-Id: Id5ce9fd3c880dd568b11a1deea7e42ea587934ba
Signed-off-by: Douglas Leung <douglas@mips.com>
Stephen Hines [Wed, 16 Jul 2014 23:50:34 +0000 (23:50 +0000)]
Merge "Remove errors/warnings from tautological comparisons."
Stephen Hines [Wed, 16 Jul 2014 18:03:43 +0000 (11:03 -0700)]
Add back a deleted check related to verification.
Change-Id: Ib939d1a7395a4b6cc9a7256cfb0a3498ba296744
Nicolas Geoffray [Wed, 16 Jul 2014 15:23:40 +0000 (16:23 +0100)]
Use the thumb2 assembler for the optimizing compiler.
Change-Id: I2b058f4433504dc3299c06f5cb0b5ab12f34aa82
Jeff Hao [Wed, 16 Jul 2014 23:28:05 +0000 (23:28 +0000)]
Merge "Fix art test failures for Mips."
Dave Allison [Wed, 16 Jul 2014 22:00:14 +0000 (22:00 +0000)]
Merge "Revert "Revert "Revert "Revert "Add implicit null and stack checks for x86"""""
Dave Allison [Fri, 11 Jul 2014 17:11:58 +0000 (17:11 +0000)]
Revert "Revert "Revert "Revert "Add implicit null and stack checks for x86""""
This reverts commit
0025a86411145eb7cd4971f9234fc21c7b4aced1.
Bug:
16256184
Change-Id: Ie0760a0c293aa3b62e2885398a8c512b7a946a73
Mathieu Chartier [Wed, 16 Jul 2014 19:55:08 +0000 (19:55 +0000)]
Merge "Disable adding main and non moving spaces to immune region in GSS"
Mathieu Chartier [Mon, 14 Jul 2014 21:57:16 +0000 (14:57 -0700)]
Disable adding main and non moving spaces to immune region in GSS
Disabled adding the main and non moving space to the immune region.
This will enable us to recycle bump pointer spaces for malloc space
-> malloc space compaction as well as collector transitions.
Also added logic for falling back to the non moving space, we may
copy objects there.
Refactored mod union table logic into MarkReachableObjects.
No measurable performance benefit or regression.
Bug:
14059466
Bug:
16291259
Change-Id: If663d9fdbde943b988173b7f6ac844e5f78a0327
Stephen Hines [Wed, 16 Jul 2014 04:41:06 +0000 (21:41 -0700)]
Remove errors/warnings from tautological comparisons.
Change-Id: I2728b08d55abccd14c111c6c9da93068d4e14275
Ian Rogers [Wed, 16 Jul 2014 21:51:58 +0000 (21:51 +0000)]
Merge "Add another test to the trace test black list."
Ian Rogers [Wed, 16 Jul 2014 21:49:34 +0000 (14:49 -0700)]
Add another test to the trace test black list.
Change-Id: Ib2266b4fa2684e477791fe317a598c22d79e3400
Douglas Leung [Wed, 9 Jul 2014 21:28:35 +0000 (14:28 -0700)]
Fix art test failures for Mips.
This patch fixes the following art test failures for Mips:
003-omnibus-opcodes
030-bad-finalizer
041-narrowing
059-finalizer-throw
Change-Id: I4e0e9ff75f949c92059dd6b8d579450dc15f4467
Signed-off-by: Douglas Leung <douglas@mips.com>
Ian Rogers [Wed, 16 Jul 2014 18:23:06 +0000 (18:23 +0000)]
Merge "Add --trace variants of the run-test testing rules."
Ian Rogers [Wed, 16 Jul 2014 18:18:03 +0000 (11:18 -0700)]
Add --trace variants of the run-test testing rules.
Only for host and the default compiler at the moment.
Also, fix test-art-host32 and test-art-host64.
Change-Id: Ic13190e766aca522de95d2b5b12926c906ba8fb8
Mathieu Chartier [Wed, 16 Jul 2014 01:44:49 +0000 (01:44 +0000)]
Merge "Use sched_yield in Monitor::MonitorEnter."
Mathieu Chartier [Wed, 16 Jul 2014 01:10:25 +0000 (18:10 -0700)]
Use sched_yield in Monitor::MonitorEnter.
Previously we used NanoSleep(1000), but this was unreliable. It could
result in waiting for >= 40ms instead of 1us. Since this was in a loop
it was especially bad if the GC was trying to suspend all the
threads when we were sleeping. This resulted in thread suspension
occasionally taking longer than a second.
Results on the provided picasso-sample app on Nexus 5:
Longest GC pause before: ~1.5s.
Longest GC pause after: <5ms.
Also added a warning if thread suspension takes longer than a
threshold (currently 5ms).
Bug:
16307460
External bug: https://code.google.com/p/android-developer-preview/issues/detail?id=367
Change-Id: I3c2a9636357e255f38634615101eff8ca84e632f
Ian Rogers [Wed, 16 Jul 2014 19:12:11 +0000 (19:12 +0000)]
Merge "Fix x86 build."
Ian Rogers [Wed, 16 Jul 2014 19:06:35 +0000 (12:06 -0700)]
Fix x86 build.
Also fix attributes/annotalysis on entrypoint_utils functions now we have
clang that is smarter wrt warnings than GCC.
Change-Id: I69257b4ad9a27d07acbc973d21a1cfa4260a8ed6
Sebastien Hertz [Wed, 16 Jul 2014 19:03:36 +0000 (19:03 +0000)]
Merge "Fix class initialization checks in interpreter"
Sebastien Hertz [Wed, 16 Jul 2014 18:00:11 +0000 (20:00 +0200)]
Fix class initialization checks in interpreter
Check field's class initialization after handling null pointer exception.
Bug:
16324235
Change-Id: I33d537168e068b7fb51ddf97bc5aadee9dd65f67
Ian Rogers [Wed, 16 Jul 2014 15:27:47 +0000 (15:27 +0000)]
Merge "Remove object_utils.h."
Ian Rogers [Wed, 16 Jul 2014 05:23:51 +0000 (22:23 -0700)]
Remove object_utils.h.
Break into object_lock, field_helper and method_helper.
Clean up header files following this.
Also tidy some of the Handle code in response to compiler errors when resolving
the changes in this CL.
Change-Id: I73e63015a0f02a754d0866bfaf58208aebcaa295
Calin Juravle [Wed, 16 Jul 2014 15:04:20 +0000 (15:04 +0000)]
Merge "Make ART fail gracefully when it can't update the desired code."
Calin Juravle [Wed, 16 Jul 2014 13:45:03 +0000 (14:45 +0100)]
Make ART fail gracefully when it can't update the desired code.
ART was exiting with a fatal error when it couldn't clean an obsolete
file. Relaxing this and failing gracefully preserves the behaviour that
Dalvik had.
Bug:
15313272
Change-Id: I8d0d6d374c90d2a434909dd4ae56f0799f30134d
Andreas Gampe [Tue, 15 Jul 2014 17:44:31 +0000 (17:44 +0000)]
Merge "ART: Squash a cmp w/ zero and b.ls to cbz (ARM/ARM64)"
Andreas Gampe [Tue, 15 Jul 2014 03:16:59 +0000 (20:16 -0700)]
ART: Squash a cmp w/ zero and b.ls to cbz (ARM/ARM64)
In case of array bounds checks at constant index 0 we generate a
compare and a branch. Squash into a cbz.
Change-Id: I1c6a6e37a7a2356b2c4580a3387cedb55436e251
Mathieu Chartier [Wed, 16 Jul 2014 00:59:09 +0000 (00:59 +0000)]
Merge "Revert "Revert "Revert "Revert "Add intrinsic for Reference.get()"""""
Fred Shih [Fri, 11 Jul 2014 16:59:27 +0000 (09:59 -0700)]
Revert "Revert "Revert "Revert "Add intrinsic for Reference.get()""""
Fixed TargetReg issue causing build failure for x86.
This reverts commit
9e82bd3f0ce9e5f5777bea2f752ff3e251d32f9f.
Change-Id: I7e6a526954467aaf68deeed999880dfe9aa5f06e
Andreas Gampe [Tue, 15 Jul 2014 18:52:36 +0000 (18:52 +0000)]
Merge "AArch64: improve usage of TargetReg() and friends."
Matteo Franchin [Tue, 10 Jun 2014 18:23:45 +0000 (19:23 +0100)]
AArch64: improve usage of TargetReg() and friends.
TargetReg(arg1) does now always return a 32-bit register. We also avoid
using this function directly and rather use the two-arguments overload
or TargetPtrReg().
Change-Id: I746b3c29a2a2553b399b5c3e7ee3887c7e7c52c3
Ian Rogers [Wed, 16 Jul 2014 00:11:29 +0000 (00:11 +0000)]
Merge "Break apart header files."
Ian Rogers [Tue, 15 Jul 2014 22:36:11 +0000 (15:36 -0700)]
Break apart header files.
Create libart-gtest for common runtime and compiler gtest routines.
Rename CompilerCallbacksImpl that is quick compiler specific.
Rename trace clock source constants to not use the overloaded profiler term.
Change-Id: I4aac4bdc7e7850c68335f81e59a390133b54e933
Nicolas Geoffray [Tue, 15 Jul 2014 12:40:27 +0000 (12:40 +0000)]
Merge "Fix a braino in the stack layout."
Nicolas Geoffray [Tue, 15 Jul 2014 11:55:21 +0000 (12:55 +0100)]
Fix a braino in the stack layout.
Also do some refactoring to have this code be just in CodeGenerator.
Change-Id: I88de109889138af8d60027973c12a64bee813cb7
Hiroshi Yamauchi [Mon, 14 Jul 2014 21:29:23 +0000 (21:29 +0000)]
Merge "Add read barriers for the roots in Runtime."
Hiroshi Yamauchi [Mon, 14 Jul 2014 20:00:14 +0000 (13:00 -0700)]
Add read barriers for the roots in Runtime.
Bug:
12687968
Change-Id: If26518a8251702cfe4d5cd7d1f50e80e342704cf
Mathieu Chartier [Mon, 14 Jul 2014 19:15:11 +0000 (19:15 +0000)]
Merge "Fix infinite loop when calling SetStatus after OOM."
Mathieu Chartier [Mon, 14 Jul 2014 17:16:05 +0000 (10:16 -0700)]
Fix infinite loop when calling SetStatus after OOM.
There was a problem where we would call SetStatus when we had an OOM
error. This results in attempting to find the ExceptionInInitializer
class which if not loaded does more allocations resulting in an
infinite loop.
Also some cleanup addressing other comments.
Bug:
16082350
Change-Id: I5c1e638a03ddf700ab4e9cad9a3077d2b1b26c43
Nicolas Geoffray [Mon, 14 Jul 2014 16:48:34 +0000 (16:48 +0000)]
Merge "x86 needs a bit more stack to handle stack overflows."
Nicolas Geoffray [Mon, 14 Jul 2014 15:39:07 +0000 (16:39 +0100)]
x86 needs a bit more stack to handle stack overflows.
With the interpreter, 018-stack-overflow fails when being run
command line. Through make, we're not seeing any failure because
make gives a 2GB stack space. However, running run-test in the
shell, the stack space is 8MB, and the reserved space is not enough.
Change-Id: I0da12402cdfe5ad090f34c16aa6cb8d5fbc7a3ea
Ian Rogers [Mon, 14 Jul 2014 15:36:50 +0000 (15:36 +0000)]
Merge "Make generate-operator-out.py compatible with Python 3.x"
Bernhard Rosenkränzer [Mon, 14 Jul 2014 11:30:58 +0000 (13:30 +0200)]
Make generate-operator-out.py compatible with Python 3.x
Adapt generate-operator-out.py to work with both Python 2.x (x >= 6)
and 3.x
Change-Id: I20f1b212069f368f3cf289dfd6b2aaee393cac68
Signed-off-by: Bernhard Rosenkränzer <Bernhard.Rosenkranzer@linaro.org>
Andreas Gampe [Sat, 12 Jul 2014 21:03:53 +0000 (21:03 +0000)]
Merge "ART: Add another special case to GenSelect for ARM64"
Andreas Gampe [Sat, 12 Jul 2014 11:26:03 +0000 (04:26 -0700)]
ART: Add another special case to GenSelect for ARM64
This adds a special case for a select of two constants that have a
difference of exactly one.
Change-Id: I6e8bea791cb25af1b855d62e2333fd7fe6ac4e3a
Andreas Gampe [Sat, 12 Jul 2014 20:35:31 +0000 (20:35 +0000)]
Merge "ART: Rework TargetReg(symbolic_reg, wide)"
Andreas Gampe [Sat, 5 Jul 2014 01:02:38 +0000 (18:02 -0700)]
ART: Rework TargetReg(symbolic_reg, wide)
Make the standard implementation in Mir2Lir and the specialized one
in the x86 backend return a pair when wide = "true". Introduce
WideKind enumeration to improve code readability. Simplify generic
code based on this implementation.
Change-Id: I670d45aa2572eedfdc77ac763e6486c83f8e26b4
Andreas Gampe [Sat, 12 Jul 2014 03:16:32 +0000 (03:16 +0000)]
Merge "AArch64: Fix def use."
Zheng Xu [Fri, 11 Jul 2014 09:33:59 +0000 (17:33 +0800)]
AArch64: Fix def use.
Add comment to GenPCUseDefEncoding(). Fix def-use flags for several
instruction encodings.
Change-Id: Ifc5a2484395486c01a64307a4acddc794026d46a
Andreas Gampe [Sat, 12 Jul 2014 03:08:24 +0000 (03:08 +0000)]
Merge "Revert "Revert "ART: Key-Value Store in Oat header"""
Andreas Gampe [Wed, 9 Jul 2014 18:38:21 +0000 (11:38 -0700)]
Revert "Revert "ART: Key-Value Store in Oat header""
This reverts commit
452bee5da9811f62123978e142bd67b385e9ff82.
Heap-allocate a couple of objects in dex2oat to avoid large frame
size.
Includes fixes originally in 100596 and 100605.
Change-Id: Id51a44198c973c91f0a3f87b9d992a5dc110c6f8
Mathieu Chartier [Sat, 12 Jul 2014 01:32:58 +0000 (01:32 +0000)]
Merge "ART: Compacting ROS/DlMalloc spaces with semispace copy GC"
Zuo Wang [Thu, 10 Jul 2014 11:26:41 +0000 (04:26 -0700)]
ART: Compacting ROS/DlMalloc spaces with semispace copy GC
Current semispace copy GC is mainly associated with bump pointer
spaces. Though it squeezes fragmentation most aggressively, an extra
copy is required to re-establish the data in the ROS/DlMalloc space to allow
CMS GCs to happen afterwards. As semispace copy GC is still stop-the-world,
this not only introduces unnecessary overheads but also longer response time.
Response time indicates the time duration between the start of transition
request and the start of transition animation, which may impact the user
experience.
Using semispace copy GC to compact the data in a ROS space to another ROS(or
DlMalloc space to another DlMalloc) space solves this problem. Although it
squeezes less fragmentation, CMS GCs can run immediately after the compaction.
We apply this algorithm in two cases:
1) Right before throwing an OOM if -XX:EnableHSpaceCompactForOOM is passed in
as true.
2) When app is switched to background if the -XX:BackgroundGC option has value
HSpaceCompact.
For case 1), OOMs are significantly delayed in the harmony GC stress test,
with compaction ratio up to 0.87. For case 2), compaction ratio around 0.5 is
observed in both built-in SMS and browser. Similar results have been obtained
on other apps as well.
Change-Id: Iad9eabc6d046659fda3535ae20f21bc31f89ded3
Signed-off-by: Wang, Zuo <zuo.wang@intel.com>
Signed-off-by: Chang, Yang <yang.chang@intel.com>
Signed-off-by: Lei Li <lei.l.li@intel.com>
Signed-off-by: Lin Zang <lin.zang@intel.com>
Hans Boehm [Sat, 12 Jul 2014 01:07:25 +0000 (01:07 +0000)]
Merge "Call strong CAS from unsafe. Add more CAS versions."
Hans Boehm [Fri, 11 Jul 2014 16:56:07 +0000 (09:56 -0700)]
Call strong CAS from unsafe. Add more CAS versions.
Adds a number of additional CAS versions. Calls the correct
one from sun.misc.unsafe, fixing a recently introduced bug.
Avoid unnecessary ordering constraint when installing hash code.
Change-Id: I7c09d0c95ceb2a549ec28ee34084198ab3107946
Andreas Gampe [Fri, 11 Jul 2014 23:48:20 +0000 (23:48 +0000)]
Merge "ART: Change GenPCUseDefEncoding(), turn on Load Hoisting for ARM64"
Andreas Gampe [Fri, 11 Jul 2014 23:40:54 +0000 (16:40 -0700)]
ART: Change GenPCUseDefEncoding(), turn on Load Hoisting for ARM64
This defines the PC resource mask as empty, as the PC is not
accessible on ARM64.
Unify code paths with x86 in LoadStoreElimination and LoadHoisting.
Change-Id: Iea8b9e666f306c7a6ff52b6c5bf7e05b35346b2c
Ian Rogers [Sat, 12 Jul 2014 00:43:18 +0000 (00:43 +0000)]
Merge "Improve performance of invokevirtual/invokeinterface with embedded imt/vtable"
Mingyao Yang [Fri, 16 May 2014 00:02:16 +0000 (17:02 -0700)]
Improve performance of invokevirtual/invokeinterface with embedded imt/vtable
Add an embedded version of imt/vtable into class object. Both tables start at
fixed offset within class object so method/entry point can be loaded directly
from class object for invokeinterface/invokevirtual.
Bug:
8142917
Change-Id: I4240d58cfbe9250107c95c0708c036854c455968
Hans Boehm [Fri, 11 Jul 2014 23:08:14 +0000 (23:08 +0000)]
Merge "Replace memory barriers to better reflect Java needs."
Hans Boehm [Fri, 27 Jun 2014 21:50:10 +0000 (14:50 -0700)]
Replace memory barriers to better reflect Java needs.
Replaces barriers that enforce ordering of one access type
(e.g. Load) with respect to another (e.g. store) with more general
ones that better reflect both Java requirements and actual hardware
barrier/fence instructions. The old code was inconsistent and
unclear about which barriers implied which others. Sometimes
multiple barriers were generated and then eliminated;
sometimes it was assumed that certain barriers implied others.
The new barriers closely parallel those in C++11, though, for now,
we use something closer to the old naming.
Bug:
14685856
Change-Id: Ie1c80afe3470057fc6f2b693a9831dfe83add831
Mathieu Chartier [Fri, 11 Jul 2014 22:31:50 +0000 (22:31 +0000)]
Merge "Faster TLAB allocator."
Mathieu Chartier [Fri, 11 Jul 2014 17:26:37 +0000 (10:26 -0700)]
Faster TLAB allocator.
New TLAB allocator doesn't increment bytes allocated until we allocate
a new TLAB. This increases allocation performance by avoiding a CAS.
MemAllocTest:
Before GSS TLAB: 3400ms.
After GSS TLAB: 2750ms.
Bug:
9986565
Change-Id: I1673c27555330ee90d353b98498fa0e67bd57fad
Christopher Ferris [Fri, 11 Jul 2014 20:07:45 +0000 (20:07 +0000)]
Merge "Make jemalloc the default choice."
Christopher Ferris [Fri, 11 Jul 2014 01:53:22 +0000 (18:53 -0700)]
Make jemalloc the default choice.
Change-Id: Iadf29d28758bc17904098b4eeb9bc14a0a51299e
Christopher Ferris [Fri, 11 Jul 2014 21:26:01 +0000 (21:26 +0000)]
Merge "Fix mac build."
Christopher Ferris [Fri, 11 Jul 2014 20:08:40 +0000 (13:08 -0700)]
Fix mac build.
Change-Id: I34a330ee038c7216eb3c4bcecbff2eb0cfa08589
Andreas Gampe [Sat, 12 Jul 2014 07:58:26 +0000 (07:58 +0000)]
Merge "ART: Fuse compare-with-0-and-branch in Arm64 utils-assembler"
Serban Constantinescu [Thu, 8 May 2014 13:31:41 +0000 (14:31 +0100)]
ART: Fuse compare-with-0-and-branch in Arm64 utils-assembler
This patch squashes the use of cmp + b to cbz.
Change-Id: I3d146a9921c471f08ba7304f1ca1b427d8e7dcf9
Signed-off-by: Serban Constantinescu <serban.constantinescu@arm.com>
Ian Rogers [Sat, 12 Jul 2014 19:38:07 +0000 (19:38 +0000)]
Merge "ART: Correct disassembling of regs from opcodes"
Andreas Gampe [Sat, 12 Jul 2014 10:24:26 +0000 (10:24 +0000)]
Merge "AArch64: Fix and enable reverseBytes intrinsic."
Andreas Gampe [Fri, 11 Jul 2014 18:14:53 +0000 (18:14 +0000)]
Merge "ART: Fix GenSelect for ARM64"
Stuart Monteith [Fri, 11 Jul 2014 15:31:28 +0000 (16:31 +0100)]
ART: Fix GenSelect for ARM64
Add CSINV and replace CSNEG in GenSelect.
Some tests were failing in 083-complier-regression as CSNEG
was used instead of CSINV. CSNEG on xzr yields 0, whereas
CSINV negates the bits and yields -1, which was the intention.
Change-Id: I60557e34483f98310f7d33f18d8db203fba6e78f
Signed-off-by: Stuart Monteith <stuart.monteith@arm.com>
Andreas Gampe [Sat, 12 Jul 2014 06:47:30 +0000 (06:47 +0000)]
Merge "Update counting VR for promotion"
Serguei Katkov [Fri, 4 Jul 2014 17:55:46 +0000 (00:55 +0700)]
Update counting VR for promotion
For 64-bit it makes sense to compute VR uses together for
int and long because core reg is shared.
Change-Id: Ie8676ece12c928d090da2465dfb4de4e91411920
Signed-off-by: Serguei Katkov <serguei.i.katkov@intel.com>
Andreas Gampe [Sat, 12 Jul 2014 08:47:46 +0000 (08:47 +0000)]
Merge "Aarch64: easy division and remainder for long ints."
Matteo Franchin [Tue, 1 Jul 2014 17:03:08 +0000 (18:03 +0100)]
Aarch64: easy division and remainder for long ints.
Also adding test 701 to test easy division and remainder for int and
long integers.
Change-Id: I8212c84e4d9eb3e9f3f4f1f1c3418537bb13dc55