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Alex Brachet [Fri, 14 Jun 2019 02:04:02 +0000 (02:04 +0000)]
[llvm-objcopy] Changed command line parsing errors
Summary: Tidied up errors during command line parsing to be more consistent with the rest of llvm-objcopy errors.
Reviewers: jhenderson, rupprecht, espindola, alexshap
Reviewed By: jhenderson, rupprecht
Subscribers: emaste, arichardson, MaskRay, llvm-commits, jakehehrlich
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D62973
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363350
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David Blaikie [Fri, 14 Jun 2019 01:58:56 +0000 (01:58 +0000)]
DebugInfo: Include enumerators in pubnames
This is consistent with GCC's behavior (which is the defacto standard
for pubnames). Though I find the presence of enumerators from enum
classes to be a bit confusing, possibly a bug on GCC's end (since they
can't be named unqualified, unlike the other names - and names nested in
classes don't go in pubnames, for instance - presumably because one must
name the class first & that's enough to limit the scope of the search)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363349
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Tim Shen [Fri, 14 Jun 2019 01:41:04 +0000 (01:41 +0000)]
[X86] Add target triple for live-debug-values-fragments.mir
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363348
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Douglas Yung [Fri, 14 Jun 2019 01:08:50 +0000 (01:08 +0000)]
Add REQUIRES: zlib to test added in r363325 as the profile uses zlib compression.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363347
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Stanislav Mekhanoshin [Fri, 14 Jun 2019 00:33:31 +0000 (00:33 +0000)]
[AMDGPU] gfx1011/gfx1012 targets
Differential Revision: https://reviews.llvm.org/D63307
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363344
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Francis Visoiu Mistrih [Fri, 14 Jun 2019 00:05:56 +0000 (00:05 +0000)]
Revert "[Remarks] Refactor optimization remarks setup"
This reverts commit
6e6e3af55bb97e1a4c97375c15a2b0099120c5a7.
This breaks greendragon.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363343
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Vedant Kumar [Fri, 14 Jun 2019 00:03:22 +0000 (00:03 +0000)]
[Coverage] Speculative fix for r363325 for an older compiler
It looks like an older version of gcc can't figure out that it needs to
move a unique_ptr while implicitly constructing an Expected object.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363342
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Stanislav Mekhanoshin [Thu, 13 Jun 2019 23:47:36 +0000 (23:47 +0000)]
[AMDGPU] gfx1010 wave32 icmp/fcmp intrinsic changes for wave32
Differential Revision: https://reviews.llvm.org/D63301
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363339
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Seiya Nuta [Thu, 13 Jun 2019 23:24:12 +0000 (23:24 +0000)]
[llvm-objcopy] Fix sparc target endianness
Summary: AFAIK, the "sparc" target is big endian and the target for 32-bit little-endian SPARC is denoted as "sparcel". This patch fixes the endianness of "sparc" target and adds "sparcel" target for 32-bit little-endian SPARC.
Reviewers: espindola, alexshap, rupprecht, jhenderson
Reviewed By: jhenderson
Subscribers: jyknight, emaste, arichardson, fedor.sergeev, jakehehrlich, MaskRay, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D63251
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363336
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Amy Huang [Thu, 13 Jun 2019 22:53:43 +0000 (22:53 +0000)]
Use fully qualified name when printing S_CONSTANT records
Summary:
Before it was using the fully qualified name only for static data members.
Now it does for all variable names to match MSVC.
Reviewers: rnk
Subscribers: hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D63012
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363335
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Peter Collingbourne [Thu, 13 Jun 2019 22:49:34 +0000 (22:49 +0000)]
Symbolize: Remove dead code. NFCI.
The only caller of SymbolizableObjectFile::create passes a non-null
DebugInfoContext and asserts that they do so. Move the assert into
SymbolizableObjectFile::create and remove null checks.
Differential Revision: https://reviews.llvm.org/D63298
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363334
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Stanislav Mekhanoshin [Thu, 13 Jun 2019 22:18:47 +0000 (22:18 +0000)]
[AMDGPU] gfx10 documentation update. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363332
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Amara Emerson [Thu, 13 Jun 2019 22:15:35 +0000 (22:15 +0000)]
[GlobalISel][IRTranslator] Add debug loc with line 0 to constants emitted into the entry block.
Constants, including G_GLOBAL_VALUE, are all emitted into the entry block which
lets us use the vreg def assuming it dominates all other users. However, it can
cause jumpy debug behaviour since the DebugLoc attached to these MIs are from
a user instruction that could be in a different block.
Fixes PR40887.
Differential Revision: https://reviews.llvm.org/D63286
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363331
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Craig Topper [Thu, 13 Jun 2019 22:15:25 +0000 (22:15 +0000)]
[X86Disassembler] Unify the EVEX and VEX code in emitContextTable. Merge the ATTR_VEXL/ATTR_EVEXL bits. NFCI
Merging the two bits shrinks the context table from 16384 bytes to 8192 bytes.
Remove the ATTRIBUTE_BITS macro and just create an enum directly. Then fix the ATTR_max define to be 8192 to reflect the table size so we stop hardcoding it separately.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363330
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Jinsong Ji [Thu, 13 Jun 2019 21:51:12 +0000 (21:51 +0000)]
[MachinePiepliner] Don't check boundary node in checkValidNodeOrder
This was exposed by PowerPC target enablement.
In ScheduleDAG, if we haven't seen any uses in this scheduling region,
we will create a dependence edge to ExitSU to model the live-out latency.
This is required for vreg defs with no in-region use, and prefetches with
no vreg def.
When we build NodeOrder in Scheduler, we ignore these boundary nodes.
However, when we check Succs in checkValidNodeOrder, we did not skip
them, so we still assume all the nodes have been sorted and in order in
Indices array. So when we call lower_bound() for ExitSU, it will return
Indices.end(), causing memory issues in following Node access.
Differential Revision: https://reviews.llvm.org/D63282
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363329
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Francis Visoiu Mistrih [Thu, 13 Jun 2019 21:46:57 +0000 (21:46 +0000)]
[Remarks] Refactor optimization remarks setup
* Add a common function to setup opt-remarks
* Rename common options to the same names
* Add error types to distinguish between file errors and regex errors
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363328
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Vedant Kumar [Thu, 13 Jun 2019 20:48:57 +0000 (20:48 +0000)]
[Coverage] Load code coverage data from archives
Support loading code coverage data from regular archives, thin archives,
and from MachO universal binaries which contain archives.
Testing: check-llvm, check-profile (with {A,UB}San enabled)
rdar://
51538999
Differential Revision: https://reviews.llvm.org/D63232
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363325
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Nico Weber [Thu, 13 Jun 2019 20:25:18 +0000 (20:25 +0000)]
gn build: Merge r363242
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363324
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Stanislav Mekhanoshin [Thu, 13 Jun 2019 20:23:02 +0000 (20:23 +0000)]
[AMDGPU] gfx1010 AMDGPUSetCCOp definition
It was missing from D63293 and breaks in a debug tablegen w/o
this part.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363323
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Lang Hames [Thu, 13 Jun 2019 20:11:23 +0000 (20:11 +0000)]
[ORC] Rename MaterializationResponsibility resolve and emit methods to
notifyResolved/notifyEmitted.
The 'notify' prefix better describes what these methods do: they update the JIT
symbol states and notify any pending queries that the 'resolved' and 'emitted'
states have been reached (rather than actually performing the resolution or
emission themselves). Since new states are going to be introduced in the near
future (to track symbol registration/initialization) it's worth changing the
convention pre-emptively to avoid further confusion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363322
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Nikita Popov [Thu, 13 Jun 2019 19:45:36 +0000 (19:45 +0000)]
[LangRef] Clarify poison semantics
I find the current documentation of poison somewhat confusing,
mainly because its use of "undefined behavior" doesn't seem to
align with our usual interpretation (of immediate UB). Especially
the sentence "any instruction that has a dependence on a poison
value has undefined behavior" is very confusing.
Clarify poison semantics by:
* Replacing the introductory paragraph with the standard rationale
for having poison values.
* Spelling out that instructions depending on poison return poison.
* Spelling out how we go from a poison value to immediate undefined
behavior and give the two examples we currently use in ValueTracking.
* Spelling out that side effects depending on poison are UB.
Differential Revision: https://reviews.llvm.org/D63044
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363320
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Shawn Landden [Thu, 13 Jun 2019 19:36:38 +0000 (19:36 +0000)]
[SimplifyCFG] NFC, update Switch tests as a baseline.
Also add baseline tests to show effect of later patches.
There were a couple of regressions here that were never caught,
but my patch set that this is a preparation to will fix them.
This is the third attempt to land this patch.
Differential Revision: https://reviews.llvm.org/D61150
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363319
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Philip Reames [Thu, 13 Jun 2019 19:27:56 +0000 (19:27 +0000)]
Add a clarifying comment about branching on poison
I recently got this wrong (again), and I'm sure I'm not the only one. Put a comment in the logical place someone would look to "fix" the obvious "missed optimization" which arrises based on the common misunderstanding. Hopefully, this will save others time. :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363318
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Cameron McInally [Thu, 13 Jun 2019 19:25:16 +0000 (19:25 +0000)]
Revert "[NFC][CodeGen] Add unary fneg tests to fp-fast.ll fp-fold.ll fp-in-intregs.ll fp-stack-compare-cmov.ll fp-stack-compare.ll fsxor-alignment.ll"
This reverts commit
1d85a7518c6b660a85caabd580b632f9abd5a8ab.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363317
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Cameron McInally [Thu, 13 Jun 2019 19:25:12 +0000 (19:25 +0000)]
Revert "[NFC][CodeGen] Add unary fneg tests to fmul-combines.ll fnabs.ll"
This reverts commit
5c0114058126757ce21e546997121afffc8119cd.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363316
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Cameron McInally [Thu, 13 Jun 2019 19:25:09 +0000 (19:25 +0000)]
Revert "[NFC][CodeGen] Add unary fneg tests to X86/fma_patterns_wide.ll"
This reverts commit
f1b8c6ac4f9d31899a2bc128f8a37b5a1c3e1f77.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363315
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Cameron McInally [Thu, 13 Jun 2019 19:25:06 +0000 (19:25 +0000)]
Revert "[NFC][CodeGen] Add unary fneg tests to X86/fma_patterns.ll"
This reverts commit
06de52674da73f30751f3ff19fdf457f87077c65.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363314
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Cameron McInally [Thu, 13 Jun 2019 19:25:03 +0000 (19:25 +0000)]
Revert "[NFC][CodeGen] Add unary fneg tests to X86/fma4-fneg-combine.ll"
This reverts commit
f288a0685f874d2b965db25a16b9c44f78c55b12.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363313
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Cameron McInally [Thu, 13 Jun 2019 19:25:00 +0000 (19:25 +0000)]
Revert "[NFC][CodeGen] Add unary fneg tests to X86/fma-scalar-combine.ll"
This reverts commit
3d2ee0053aa2576fd19cd169798c496199f0a29b.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363312
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Cameron McInally [Thu, 13 Jun 2019 19:24:57 +0000 (19:24 +0000)]
Revert "[NFC][CodeGen] Add unary fneg tests to X86/fma-intrinsics-x86.ll"
This reverts commit
169fc2b0209d5574fca0927a707706ea2d5f5a09.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363311
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Cameron McInally [Thu, 13 Jun 2019 19:24:54 +0000 (19:24 +0000)]
Revert "[NFC][CodeGen] Add unary fneg tests to X86/fma4-intrinsics-x86.ll"
This reverts commit
66f286845cad73a280617a606e29c9009bb4da87.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363310
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Cameron McInally [Thu, 13 Jun 2019 19:24:51 +0000 (19:24 +0000)]
Revert "[NFC][CodeGen] Add unary FNeg tests to some X86/ and XCore/ tests."
This reverts commit
4f3cf3853e1145e3e08fb42ace79ba3e4e268540.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363309
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Cameron McInally [Thu, 13 Jun 2019 19:24:47 +0000 (19:24 +0000)]
Revert "[NFC][CodeGen] Add unary FNeg tests to X86/fma-intrinsics-canonical.ll"
This reverts commit
ee5881a88cbe148bb64d14b8a5b31a314ee22343.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363308
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Cameron McInally [Thu, 13 Jun 2019 19:24:44 +0000 (19:24 +0000)]
Revert "[NFC][CodeGen] Forgot 2 unary FNeg tests in X86/fma-intrinsics-canonical.ll"
This reverts commit
5f39a3096f8e7b09bd1645f4e4ca66343066a6e1.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363307
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Cameron McInally [Thu, 13 Jun 2019 19:24:41 +0000 (19:24 +0000)]
Revert "[NFC][CodeGen] Add unary fneg tests to X86/fma-fneg-combine.ll"
This reverts commit
10c085554215e84831d272f2e6a93b7c70d143bf.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363306
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Cameron McInally [Thu, 13 Jun 2019 19:24:38 +0000 (19:24 +0000)]
Revert "[NFC][CodeGen] Add unary FNeg tests to X86/combine-fcopysign.ll X86/dag-fmf-cse.ll X86/fast-isel-fneg.ll X86/fdiv.ll"
This reverts commit
e04c4b6af81d6142c4ff8dd9d00f44a27e9a66eb.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363305
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Cameron McInally [Thu, 13 Jun 2019 19:24:34 +0000 (19:24 +0000)]
Revert "[NFC][CodeGen] Add unary FNeg tests to X86/avx512vl-intrinsics-fast-isel.ll X86/combine-fabs.ll"
This reverts commit
6fe46ec25d849a9fd5be25acf0ee77e3c06c0786.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363304
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Cameron McInally [Thu, 13 Jun 2019 19:24:31 +0000 (19:24 +0000)]
Revert "[NFC][CodeGen] Add unary FNeg tests to X86/avx512vl-intrinsics-fast-isel.ll"
This reverts commit
2aa5ada267d268fec2b1e90efeae1ddee24617be.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363303
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Cameron McInally [Thu, 13 Jun 2019 19:24:28 +0000 (19:24 +0000)]
Revert "[NFC][CodeGen] Add unary FNeg tests to X86/avx512vl-intrinsics-fast-isel.ll"
This reverts commit
27a5db9de57d13d44c7a7704e06d8ba69ec8b4af.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363302
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Cameron McInally [Thu, 13 Jun 2019 19:24:24 +0000 (19:24 +0000)]
Revert "[NFC][CodeGen] Add unary FNeg tests to X86/avx512-intrinsics-fast-isel.ll"
This reverts commit
41e0b9f2803089155536bdec7cbea6b82680a727.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363301
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Cameron McInally [Thu, 13 Jun 2019 19:24:21 +0000 (19:24 +0000)]
Revert "[NFC][CodeGen] Add unary FNeg tests to X86/avx512-intrinsics-fast-isel.ll"
This reverts commit
aeb89f8b33d8fca4e819ba41267093699a7e4885.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363300
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Stanislav Mekhanoshin [Thu, 13 Jun 2019 19:18:29 +0000 (19:18 +0000)]
[AMDGPU] gfx1010 base changes for wave32
Differential Revision: https://reviews.llvm.org/D63293
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363299
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Don Hinton [Thu, 13 Jun 2019 19:08:49 +0000 (19:08 +0000)]
[lit] Disable test on darwin when building shared libs.
Summary:
This test fails to link shared libraries because tries to run
a copied version of clang-check to see if the mock version of libcxx
in the same directory can be loaded dynamically. Since the test is
specifically designed not to look in the default just-built lib
directory, it must be disabled when building with
BUILD_SHARED_LIBS=ON.
Currently only disabling it on Darwin and basing it on the
enable_shared flag.
Reviewed By: ilya-biryukov
Tags: #clang, #llvm
Differential Revision: https://reviews.llvm.org/D61697
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363298
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Stanislav Mekhanoshin [Thu, 13 Jun 2019 19:05:04 +0000 (19:05 +0000)]
[AMDGPU] gfx1010: small test change for wave32. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363297
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Jordan Rupprecht [Thu, 13 Jun 2019 18:42:30 +0000 (18:42 +0000)]
[docs] Fix TableGen/LangRef typos
This fixes:
- `Pred` -> `Prep`
- `IfDef` -> `Ifdef` (rst is case sensitive here)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363294
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Philip Reames [Thu, 13 Jun 2019 18:40:15 +0000 (18:40 +0000)]
[LFTR] Rename variable to minimize confusion [NFC]
As pointed out by Nikita in D62625, BackedgeTakenCount is generally used to refer to the backedge taken count of the loop. A conditional backedge taken count - one which only applies if a particular exit is taken - is called a ExitCount in SCEV code, so be consistent here.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363293
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Philip Reames [Thu, 13 Jun 2019 18:32:55 +0000 (18:32 +0000)]
[LFTR] Stylistic cleanup as suggested in last review comment of D62939 [NFC]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363292
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Sanjay Patel [Thu, 13 Jun 2019 18:26:10 +0000 (18:26 +0000)]
[InstCombine] add test for failed libfunction prototype matching; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363291
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Philip Reames [Thu, 13 Jun 2019 18:23:13 +0000 (18:23 +0000)]
Fix a bug w/inbounds invalidation in LFTR
This contains fixes for two cases where we might invalidate inbounds and leave it stale in the IR (a miscompile). Case 1 is when switching to an IV with no dynamically live uses, and case 2 is when doing pre-to-post conversion on the same pointer type IV.
The basic scheme used is to prove that using the given IV (pre or post increment forms) would have to already trigger UB on the path to the test we're modifying. As such, our potential UB triggering use does not change the semantics of the original program.
As was pointed out in the review thread by Nikita, this is defending against a separate issue from the hasConcreteDef case. This is about poison, that's about undef. Unfortunately, the two are different, see Nikita's comment for a fuller explanation, he explains it well.
(Note: I'm going to address Nikita's last style comment in a separate commit just to minimize chance of subtle bugs being introduced due to typos.)
Differential Revision: https://reviews.llvm.org/D62939
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363289
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Leonard Chan [Thu, 13 Jun 2019 18:18:40 +0000 (18:18 +0000)]
[clang][NewPM] Fix broken -O0 test from missing assumptions
Add an AssumptionCache callback to the InlineFuntionInfo used for the
AlwaysInlinerPass to match codegen of the AlwaysInlinerLegacyPass to generate
llvm.assume. This fixes CodeGen/builtin-movdir.c when new PM is enabled by
default.
Differential Revision: https://reviews.llvm.org/D63170
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363287
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Sanjay Patel [Thu, 13 Jun 2019 18:14:49 +0000 (18:14 +0000)]
[InstCombine] auto-generate complete test checks; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363286
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David Bolvansky [Thu, 13 Jun 2019 18:13:03 +0000 (18:13 +0000)]
[NFC] Updated testcase for D54411/rL363284
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363285
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David Bolvansky [Thu, 13 Jun 2019 18:11:32 +0000 (18:11 +0000)]
[Codegen] Merge tail blocks with no successors after block placement
Summary:
I found the following case having tail blocks with no successors merging opportunities after block placement.
Before block placement:
bb0:
...
bne a0, 0, bb2:
bb1:
mv a0, 1
ret
bb2:
...
bb3:
mv a0, 1
ret
bb4:
mv a0, -1
ret
The conditional branch bne in bb0 is opposite to beq.
After block placement:
bb0:
...
beq a0, 0, bb1
bb2:
...
bb4:
mv a0, -1
ret
bb1:
mv a0, 1
ret
bb3:
mv a0, 1
ret
After block placement, that appears new tail merging opportunity, bb1 and bb3 can be merged as one block. So the conditional constraint for merging tail blocks with no successors should be removed. In my experiment for RISC-V, it decreases code size.
Author of original patch: Jim Lin
Reviewers: haicheng, aheejin, craig.topper, rnk, RKSimon, Jim, dmgreen
Reviewed By: Jim, dmgreen
Subscribers: xbolva00, dschuff, javed.absar, sbc100, jgravelle-google, aheejin, kito-cheng, dmgreen, PkmX, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D54411
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363284
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Stanislav Mekhanoshin [Thu, 13 Jun 2019 16:31:51 +0000 (16:31 +0000)]
[AMDGPU] ImmArg and SourceOfDivergence for permlane/dpp
Added missing ImmArg and SourceOfDivergence to the crosslane
intrinsics.
Differential Revision: https://reviews.llvm.org/D63216
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363276
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Cameron McInally [Thu, 13 Jun 2019 15:54:20 +0000 (15:54 +0000)]
[NFC][CodeGen] Add unary FNeg tests to X86/avx512-intrinsics-fast-isel.ll
Patch 2 of n.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363275
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Joseph Tremoulet [Thu, 13 Jun 2019 15:24:11 +0000 (15:24 +0000)]
[EarlyCSE] Ensure equal keys have the same hash value
Summary:
The logic in EarlyCSE that looks through 'not' operations in the
predicate recognizes e.g. that `select (not (cmp sgt X, Y)), X, Y` is
equivalent to `select (cmp sgt X, Y), Y, X`. Without this change,
however, only the latter is recognized as a form of `smin X, Y`, so the
two expressions receive different hash codes. This leads to missed
optimization opportunities when the quadratic probing for the two hashes
doesn't happen to collide, and assertion failures when probing doesn't
collide on insertion but does collide on a subsequent table grow
operation.
This change inverts the order of some of the pattern matching, checking
first for the optional `not` and then for the min/max/abs patterns, so
that e.g. both expressions above are recognized as a form of `smin X, Y`.
It also adds an assertion to isEqual verifying that it implies equal
hash codes; this fires when there's a collision during insertion, not
just grow, and so will make it easier to notice if these functions fall
out of sync again. A new flag --earlycse-debug-hash is added which can
be used when changing the hash function; it forces hash collisions so
that any pair of values inserted which compare as equal but hash
differently will be caught by the isEqual assertion.
Reviewers: spatel, nikic
Reviewed By: spatel, nikic
Subscribers: lebedev.ri, arsenm, craig.topper, efriedma, hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D62644
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363274
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Michael Liao [Thu, 13 Jun 2019 14:11:09 +0000 (14:11 +0000)]
Fix GCC compiler warning. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363269
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Simon Pilgrim [Thu, 13 Jun 2019 14:05:37 +0000 (14:05 +0000)]
[X86] Use fresh MemOps when emitting VAARG64
Previously it copied over MachineMemOperands verbatim which caused MOV32rm to have store flags set, and MOV32mr to have load flags set. This fixes some assertions being thrown with EXPENSIVE_CHECKS on.
Committed on behalf of @luke (Luke Lau)
Differential Revision: https://reviews.llvm.org/D62726
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363268
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David Stenberg [Thu, 13 Jun 2019 14:02:55 +0000 (14:02 +0000)]
Remove ';' after namespace's closing bracket [NFC]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363267
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James Henderson [Thu, 13 Jun 2019 13:58:44 +0000 (13:58 +0000)]
[docs][llvm-symbolizer] Fix formatting issue with --functions
Reviewed by: rupprecht
Differential Revision: https://reviews.llvm.org/D63195
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363266
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Diogo N. Sampaio [Thu, 13 Jun 2019 13:56:19 +0000 (13:56 +0000)]
[FIX] Forces shrink wrapping to consider any memory access as aliasing with the stack
Summary:
Relate bug: https://bugs.llvm.org/show_bug.cgi?id=37472
The shrink wrapping pass prematurally restores the stack, at a point where the stack might still be accessed.
Taking an exception can cause the stack to be corrupted.
As a first approach, this patch is overly conservative, assuming that any instruction that may load or store could access
the stack.
Reviewers: dmgreen, qcolombet
Reviewed By: qcolombet
Subscribers: simpal01, efriedma, eli.friedman, javed.absar, llvm-commits, eugenis, chill, carwil, thegameg
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D63152
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363265
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James Henderson [Thu, 13 Jun 2019 13:53:16 +0000 (13:53 +0000)]
[docs][llvm-dwarfdump] Add missing options and behaviour to documentation
This fixes https://bugs.llvm.org/show_bug.cgi?id=42185.
llvm-dwarfdump's documentation was missing a number of options and other
behaviours. This change tries to fix up the documentation by adding
these missing items.
Reviewed by: JDevlieghere
Differential Revision: https://reviews.llvm.org/D63217
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363264
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Eugene Leviant [Thu, 13 Jun 2019 13:25:20 +0000 (13:25 +0000)]
Extra error checking to ARMAttributeParser
The patch checks for subsection length as discussed in D63191
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363260
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Jeremy Morse [Thu, 13 Jun 2019 13:11:57 +0000 (13:11 +0000)]
[NFC] Sink a function call into LiveDebugValues::process
This was requested in D62904, which I successfully missed. This is just
a refactor and shouldn't change any behaviour.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363259
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Simon Tatham [Thu, 13 Jun 2019 13:11:13 +0000 (13:11 +0000)]
[ARM] Set up infrastructure for MVE vector instructions.
This commit prepares the way to start adding the main collection of
MVE instructions, which operate on the 128-bit vector registers.
The most obvious thing that's needed, and the simplest, is to add the
MQPR register class, which is like the existing QPR except that it has
fewer registers in it.
The more complicated part: MVE defines a system of vector predication,
in which instructions operating on 128-bit vector registers can be
constrained to operate on only a subset of the lanes, using a system
of prefix instructions similar to the existing Thumb IT, in that you
have one prefix instruction which designates up to 4 following
instructions as subject to predication, and within that sequence, the
predicate can be inverted by means of T/E suffixes ('Then' / 'Else').
To support instructions of this type, we've added two new Tablegen
classes `vpred_n` and `vpred_r` for standard clusters of MC operands
to add to a predicated instruction. Both include a flag indicating how
the instruction is predicated at all (options are T, E and 'not
predicated'), and an input register field for the register controlling
the set of active lanes. They differ from each other in that `vpred_r`
also includes an input operand for the previous value of the output
register, for instructions that leave inactive lanes unchanged.
`vpred_n` lacks that extra operand; it will be used for instructions
that don't preserve inactive lanes in their output register (either
because inactive lanes are zeroed, as the MVE load instructions do, or
because the output register isn't a vector at all).
This commit also adds the family of prefix instructions themselves
(VPT / VPST), and all the machinery needed to work with them in
assembly and disassembly (e.g. generating the 't' and 'e' mnemonic
suffixes on disassembled instructions within a predicated block)
I've added a couple of demo instructions that derive from the new
Tablegen base classes and use those two operand clusters. The bulk of
the vector instructions will come in followup commits small enough to
be manageable. (One exception is that I've added the full version of
`isMnemonicVPTPredicable` in the AsmParser, because it seemed
pointless to carefully split it up.)
Reviewers: dmgreen, samparker, SjoerdMeijer, t.p.northover
Subscribers: javed.absar, kristof.beyls, hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D62669
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363258
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Simon Pilgrim [Thu, 13 Jun 2019 12:58:55 +0000 (12:58 +0000)]
[CodeGen] Add getMachineMemOperand + MachineMemOperand::Flags allocator helper wrapper. NFCI.
Pre-commit for D62726 on behalf of @luke (Luke Lau)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363257
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Jeremy Morse [Thu, 13 Jun 2019 12:51:57 +0000 (12:51 +0000)]
[DebugInfo] Honour variable fragments in LiveDebugValues
This patch makes the LiveDebugValues pass consider fragments when propagating
DBG_VALUE insts between blocks, fixing PR41979. Fragment info for a variable
location is added to the open-ranges key, which allows distinct fragments to be
tracked separately. To handle overlapping fragments things become slightly
funkier. To avoid excessive searching for overlaps in the data-flow part of
LiveDebugValues, this patch:
* Pre-computes pairings of fragments that overlap, for each DILocalVariable
* During data-flow, whenever something happens that causes an open range to
be terminated (via erase), any fragments pre-determined to overlap are
also terminated.
The effect of which is that when encountering a DBG_VALUE fragment that
overlaps others, the overlapped fragments do not get propagated to other
blocks. We still rely on later location-list building to correctly handle
overlapping fragments within blocks.
It's unclear whether a mixture of DBG_VALUEs with and without fragmented
expressions are legitimate. To avoid suprises, this patch interprets a
DBG_VALUE with no fragment as overlapping any DBG_VALUE _with_ a fragment.
Differential Revision: https://reviews.llvm.org/D62904
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363256
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Dmitry Preobrazhensky [Thu, 13 Jun 2019 12:46:37 +0000 (12:46 +0000)]
[AMDGPU][MC] Enabled constant expressions as operands of s_getreg/s_setreg
See bug 40820: https://bugs.llvm.org/show_bug.cgi?id=40820
Reviewers: artem.tamazov, arsenm
Differential Revision: https://reviews.llvm.org/D61125
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363255
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Eugene Leviant [Thu, 13 Jun 2019 12:33:26 +0000 (12:33 +0000)]
[ThinLTO][Bitcode] Add 'entrycount' to FS_COMBINED_PROFILE. NFC
Differential revision: https://reviews.llvm.org/D63078
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363254
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Simon Pilgrim [Thu, 13 Jun 2019 11:42:32 +0000 (11:42 +0000)]
[X86][AVX] Add broadcast(v4f64 hadd) test
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363252
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Simon Pilgrim [Thu, 13 Jun 2019 11:26:21 +0000 (11:26 +0000)]
[X86][SSE] Avoid assert for broadcast(horiz-op()) cases for non-f64 cases.
Based on fuzz test from @craig.topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363251
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Simon Pilgrim [Thu, 13 Jun 2019 10:41:56 +0000 (10:41 +0000)]
[X86][SSE] Add tests for underaligned nt stores
Test both 'unaligned' (which we should scalarize) and 'subvector aligned' (which we should split)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363249
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Chris Jackson [Thu, 13 Jun 2019 10:39:36 +0000 (10:39 +0000)]
[llvm-nm] Additional lit tests for command line options
Differential Revision: https://reviews.llvm.org/D62955
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363248
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Simon Pilgrim [Thu, 13 Jun 2019 10:30:12 +0000 (10:30 +0000)]
[X86][SSE] Add SSE4A nt store tests on X86 as well as X64
We should be able to use MOVNTSD (f64) instead of MOVNTI (i32) to reduce the number of ops 32-bit targets
Pulled out of D63246
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363247
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Nikola Prica [Thu, 13 Jun 2019 10:23:26 +0000 (10:23 +0000)]
[DebugInfo] Move Value struct out of DebugLocEntry as DbgValueLoc (NFC)
Since the DebugLocEntry::Value is used as part of DwarfDebug and
DebugLocEntry make it as the separate class.
Reviewers: aprantl, dstenb
Reviewed By: aprantl
Differential Revision: https://reviews.llvm.org/D63213
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363246
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Jeremy Morse [Thu, 13 Jun 2019 10:03:17 +0000 (10:03 +0000)]
[DebugInfo] Use FrameDestroy to extend stack locations to end-of-function
We aim to ignore changes in variable locations during the prologue and
epilogue of functions, to avoid using space documenting location changes
that aren't visible. However in D61940 / r362951 this got ripped out as
the previous implementation was unsound.
Instead, use the FrameDestroy flag to identify when we're in the epilogue
of a function, and ignore variable location changes accordingly. This fits
in with existing code that examines the FrameSetup flag.
Some variable locations get shuffled in modified tests as they now cover
greater ranges, which is what would be expected. Some additional
single-location variables are generated too. Two tests are un-xfailed,
they were only xfailed due to r362951 deleting functionality they depended
on.
Apparently some out-of-tree backends don't accurately maintain FrameDestroy
flags -- if you're an out-of-tree maintainer and see changes in variable
locations disappear due to a faulty FrameDestroy flag, it's safe to back
this change out. The impact is just slightly more debug info than necessary.
Differential Revision: https://reviews.llvm.org/D62314
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363245
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Simon Tatham [Thu, 13 Jun 2019 10:01:52 +0000 (10:01 +0000)]
[ARM] Refactor handling of IT mask operands.
During assembly, the mask operand to an IT instruction (storing the
sequence of T/E for 'Then' and 'Else') is parsed out of the mnemonic
into a representation that encodes 'Then' and 'Else' in the same way
regardless of the condition code. At some point during encoding it has
to be converted into the instruction encoding used in the
architecture, in which the mask encodes a sequence of replacement
low-order bits for the condition code, so that which bit value means
'then' and which 'else' depends on whether the original condition code
had its low bit set.
Previously, that transformation was done by processInstruction(), half
way through assembly. So an MCOperand storing an IT mask would
sometimes store it in one format, and sometimes in the other,
depending on where in the assembly pipeline you were. You can see this
in diagnostics from `llvm-mc -debug -triple=thumbv8a -show-inst`, for
example: if you give it an instruction such as `itete eq`, you'd see
an `<MCOperand Imm:5>` in a diagnostic become `<MCOperand Imm:11>` in
the final output.
Having the same data structure store values with time-dependent
semantics is confusing already, and it will get more confusing when we
introduce the MVE VPT instruction which reuses the Then/Else bitmask
idea in a different context. So I'm refactoring: now, all `ARMOperand`
and `MCOperand` representations of an IT mask work exactly the same
way, namely, 0 means 'Then' and 1 means 'Else', regardless of what
original predicate is being referred to. The architectural encoding of
IT that depends on the original condition is now constructed at the
point when we turn the `MCOperand` into the final instruction bit
pattern, and decoded similarly in the disassembler.
The previous condition-independent parse-time format used 0 for Else
and 1 for Then. I've taken the opportunity to flip the sense of it
while I'm changing all of this anyway, because it seems to me more
natural to use 0 for 'leave the starting condition unchanged' and 1
for 'invert it', as if those bits were an XOR mask.
Reviewers: ostannard
Subscribers: javed.absar, kristof.beyls, hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D63219
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363244
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Eugene Leviant [Thu, 13 Jun 2019 09:56:14 +0000 (09:56 +0000)]
[llvm-objcopy] Implement IHEX reader
This is the final part of IHEX format support in llvm-objcopy
Differential revision: https://reviews.llvm.org/D62583
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363243
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Sander de Smalen [Thu, 13 Jun 2019 09:37:38 +0000 (09:37 +0000)]
Improve reduction intrinsics by overloading result value.
This patch uses the mechanism from D62995 to strengthen the
definitions of the reduction intrinsics by letting the scalar
result/accumulator type be overloaded from the vector element type.
For example:
; The LLVM LangRef specifies that the scalar result must equal the
; vector element type, but this is not checked/enforced by LLVM.
declare i32 @llvm.experimental.vector.reduce.or.i32.v4i32(<4 x i32> %a)
This patch changes that into:
declare i32 @llvm.experimental.vector.reduce.or.v4i32(<4 x i32> %a)
Which has the type-constraint more explicit and causes LLVM to check
the result type with the vector element type.
Reviewers: RKSimon, arsenm, rnk, greened, aemerson
Reviewed By: arsenm
Differential Revision: https://reviews.llvm.org/D62996
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363240
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Owen Reynolds [Thu, 13 Jun 2019 09:02:33 +0000 (09:02 +0000)]
Revert [llvm-ar][test] Add to MRI test coverage
This reverts 363232 due to mru-utf8.test buildbot test failure
Differential Revision: https://reviews.llvm.org/D63197
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363239
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Sam Parker [Thu, 13 Jun 2019 08:32:56 +0000 (08:32 +0000)]
[NFC] Simplify Call query
Use getIntrinsicID() directly from IntrinsicInst.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363235
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Sam Parker [Thu, 13 Jun 2019 08:28:46 +0000 (08:28 +0000)]
[ARM][TTI] Scan for existing loop intrinsics
TTI should report that it's not profitable to generate a hardware loop
if it, or one of its child loops, has already been converted.
Differential Revision: https://reviews.llvm.org/D63212
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363234
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Sander de Smalen [Thu, 13 Jun 2019 08:19:33 +0000 (08:19 +0000)]
[IntrinsicEmitter] Extend argument overloading with forward references.
Extend the mechanism to overload intrinsic arguments by using either
backward or forward references to the overloadable arguments.
In for example:
def int_something : Intrinsic<[LLVMPointerToElt<0>],
[llvm_anyvector_ty], []>;
LLVMPointerToElt<0> is a forward reference to the overloadable operand
of type 'llvm_anyvector_ty' and would allow intrinsics such as:
declare i32* @llvm.something.v4i32(<4 x i32>);
declare i64* @llvm.something.v2i64(<2 x i64>);
where the result pointer type is deduced from the element type of the
first argument.
If the returned pointer is not a pointer to the element type, LLVM will
give an error:
Intrinsic has incorrect return type!
i64* (<4 x i32>)* @llvm.something.v4i32
Reviewers: RKSimon, arsenm, rnk, greened
Reviewed By: arsenm
Differential Revision: https://reviews.llvm.org/D62995
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363233
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Owen Reynolds [Thu, 13 Jun 2019 07:45:12 +0000 (07:45 +0000)]
[llvm-ar][test] Add to MRI test coverage
This change adds tests to cover existing MRI script functionality.
Differential Revision: https://reviews.llvm.org/D63197
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363232
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Craig Topper [Thu, 13 Jun 2019 07:11:02 +0000 (07:11 +0000)]
[X86] Correct instruction operands in evex-to-vex-compress.mir to be closer to real instructions.
$noreg was being used way more than it should have. We also had
xmm registers in addressing modes.
Mostly found by hacking the machine verifier to do some stricter
checking that happened to work for this test, but not sure if
generally applicable for other tests or other targets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363231
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Shawn Landden [Thu, 13 Jun 2019 05:26:17 +0000 (05:26 +0000)]
[SimplifyCFG] reverting preliminary Switch patches again
This reverts 363226 and 363227, both NFC intended
I swear I fixed the test case that is failing, and ran
the tests, but I will look into it again.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363229
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Shawn Landden [Thu, 13 Jun 2019 05:01:44 +0000 (05:01 +0000)]
[SimpligyCFG] NFC intended, remove GCD that was only used for powers of two
and replace with an equilivent countTrailingZeros.
GCD is much more expensive than this, with repeated division.
This depends on D60823
Differential Revision: https://reviews.llvm.org/D61151
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363227
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Shawn Landden [Thu, 13 Jun 2019 04:51:35 +0000 (04:51 +0000)]
[SimplifyCFG] NFC, update Switch tests to better examine successive patches
Also add baseline tests to show effect of later patches.
There were a couple of regressions here that were never caught,
but my patch set that this is a preparation to will fix them.
Differential Revision: https://reviews.llvm.org/D61150
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363226
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Craig Topper [Thu, 13 Jun 2019 04:10:08 +0000 (04:10 +0000)]
[X86] Add tests for some the special cases in EVEX to VEX to the evex-to-vex-compress.mir test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363224
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Shawn Landden [Thu, 13 Jun 2019 02:47:47 +0000 (02:47 +0000)]
[SimplifyCFG] revert the last commit.
I ran ALL the test suite locally, so I will look into this...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363223
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Shawn Landden [Thu, 13 Jun 2019 02:24:24 +0000 (02:24 +0000)]
[SimplifyCFG] NFC, update Switch tests to HEAD so I can
see if my changes change anything
Also add baseline tests to show effect of later patches.
Differential Revision: https://reviews.llvm.org/D61150
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363222
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Tom Stellard [Thu, 13 Jun 2019 02:09:32 +0000 (02:09 +0000)]
X86: Clean up pass initialization
Summary:
- Remove redundant initializations from pass constructors that were
already being initialized by LLVMInitializeX86Target().
- Add initialization function for the FPS pass.
Reviewers: craig.topper
Reviewed By: craig.topper
Subscribers: hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D63218
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363221
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David L. Jones [Thu, 13 Jun 2019 02:04:45 +0000 (02:04 +0000)]
Revert r361811: 'Re-commit r357452 (take 2): "SimplifyCFG SinkCommonCodeFromPredecessors ...'
We have observed some failures with internal builds with this revision.
- Performance regressions:
- llvm's SingleSource/Misc evalloop shows performance regressions (although these may be red herrings).
- Benchmarks for Abseil's SwissTable.
- Correctness:
- Failures for particular libicu tests when building the Google AppEngine SDK (for PHP).
hwennborg has already been notified, and is aware of reproducer failures.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363220
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Dinar Temirbulatov [Thu, 13 Jun 2019 00:19:50 +0000 (00:19 +0000)]
[SLP] Update propagate_ir_flags.ll test to check that we do retain the common subset, NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363218
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Philip Reames [Wed, 12 Jun 2019 23:39:49 +0000 (23:39 +0000)]
[Tests] Highlight impact of multiple exit LFTR (D62625) as requested by reviewer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363217
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Cameron McInally [Wed, 12 Jun 2019 22:50:44 +0000 (22:50 +0000)]
[NFC][CodeGen] Add unary FNeg tests to X86/avx512-intrinsics-fast-isel.ll
Patch 1 of n.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363215
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Mircea Trofin [Wed, 12 Jun 2019 22:02:07 +0000 (22:02 +0000)]
[llvm] Expose DWARFDebugLine::LineTable::getFileNameEntry
Summary:
This is useful for scenarios where Prologue was directly used and DWARF
5 awareness is required. The current alternative would be to either
duplicate the logic in getFileNameEntry, or to use getFileNameByIndex.
The latter isn't quite an in-place replacement - it performs some
processing, and it produces a string instead of a StringRef, meaning
the caller needs to handle its lifetime.
Reviewers: tamur, dblaikie, JDevlieghere
Reviewed By: tamur, JDevlieghere
Subscribers: aprantl, llvm-commits
Tags: #llvm, #debug-info
Differential Revision: https://reviews.llvm.org/D63228
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363210
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Sanjay Patel [Wed, 12 Jun 2019 21:30:06 +0000 (21:30 +0000)]
[x86] add tests for vector shifts; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363203
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Serge Guelton [Wed, 12 Jun 2019 21:08:19 +0000 (21:08 +0000)]
Sanitize llvm-extract -help output
Filter out irrelevant options
New output:
OVERVIEW: llvm extractor
USAGE: llvm-extract [options] <input bitcode file>
OPTIONS:
Generic Options:
--help - Display available options (--help-hidden for more)
--help-list - Display list of available options (--help-list-hidden for more)
--version - Display the version of this program
llvm-extract Options:
--alias=<alias> - Specify alias to extract
--bb=<function:bb> - Specify <function, basic block> pairs to extract
--delete - Delete specified Globals from Module
-f - Enable binary output on terminals
--func=<function> - Specify function to extract
--glob=<global> - Specify global to extract
-o=<filename> - Specify output filename
--ralias=<ralias> - Specify alias(es) to extract using a regular expression
--recursive - Recursively extract all called functions
--rfunc=<rfunction> - Specify function(s) to extract using a regular expression
--rglob=<rglobal> - Specify global(s) to extract using a regular expression
Differential Revision: https://reviews.llvm.org/D62511
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363201
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Cameron McInally [Wed, 12 Jun 2019 20:56:59 +0000 (20:56 +0000)]
[NFC][CodeGen] Add unary FNeg tests to X86/avx512vl-intrinsics-fast-isel.ll
Patch 3 of 3 for X86/avx512vl-intrinsics-fast-isel.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363200
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