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6 years ago[PDB] Correctly link S_FILESTATIC records.
Zachary Turner [Fri, 5 Jan 2018 19:12:40 +0000 (19:12 +0000)]
[PDB] Correctly link S_FILESTATIC records.

This is not a record type that clang currently generates,
but it is a record that is encountered in object files generated
by cl.  This record is unusual in that it refers directly to
the string table instead of indirectly to the string table via
the FileChecksums table.  Because of this, it was previously
overlooked and we weren't remapping the string indices at all.
This would lead to crashes in MSVC when trying to display a
variable whose debug info involved an S_FILESTATIC.

Original bug report by Alexander Ganea

Differential Revision: https://reviews.llvm.org/D41718

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321883 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[InstCombine] add folds for min(~a, b) --> ~max(a, b)
Sanjay Patel [Fri, 5 Jan 2018 19:01:17 +0000 (19:01 +0000)]
[InstCombine] add folds for min(~a, b) --> ~max(a, b)

Besides the bug of omitting the inverse transform of max(~a, ~b) --> ~min(a, b),
the use checking and operand creation were off. We were potentially creating
repeated identical instructions of existing values. This led to infinite
looping after I added the extra folds.

By using the simpler m_Not matcher and not creating new 'not' ops for a and b,
we avoid that problem. It's possible that not using IsFreeToInvert() here is
more limiting than the simpler matcher, but there are no tests for anything
more exotic. It's also possible that we should relax the use checking further
to handle a case like PR35834:
https://bugs.llvm.org/show_bug.cgi?id=35834
...but we can make that a follow-up if it is needed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321882 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[llvm-mt] Remove platform-specific path in test
Brian Gesiak [Fri, 5 Jan 2018 18:23:22 +0000 (18:23 +0000)]
[llvm-mt] Remove platform-specific path in test

Summary:
Remove a platform-specific path separator added to the llvm-mt help text test
in https://reviews.llvm.org/D41732.

Test Plan: `check-llvm`

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321881 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[MSF] Fix FPM interval calcluation
Zachary Turner [Fri, 5 Jan 2018 18:12:14 +0000 (18:12 +0000)]
[MSF] Fix FPM interval calcluation

We have some code to try to determine how many pieces an MSF
Free Page Map is split into, and this code had an off by one
error which would cause the calculation to be incorrect when
there were exactly 4096*k + 1 blocks in an MSF file.

Original investigation and patch outline by Colden Cullen.

Differential Revision: https://reviews.llvm.org/D41742

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321880 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoRegionInfo: Use report_fatal_error instead of llvm_unreachable
Matt Arsenault [Fri, 5 Jan 2018 17:51:36 +0000 (17:51 +0000)]
RegionInfo: Use report_fatal_error instead of llvm_unreachable

Otherwise when using -verify-region-info in a release build the
error won't be emitted.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321878 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[Option] Add 'findNearest' method to catch typos
Brian Gesiak [Fri, 5 Jan 2018 17:10:39 +0000 (17:10 +0000)]
[Option] Add 'findNearest' method to catch typos

Summary:
Add a method `OptTable::findNearest`, which allows users of OptTable to
check user input for misspelled options. In addition, have llvm-mt
check for misspelled options. For example, if a user invokes
`llvm-mt /oyt:foo`, the error message will indicate that while an
option named `/oyt:` does not exist, `/out:` does.

The method ports the functionality of the `LookupNearestOption` method
from LLVM CommandLine to libLLVMOption. This allows tools like Clang
and Swift, which do not use CommandLine, to use this functionality to
suggest similarly spelled options.

As room for future improvement, the new method as-is cannot yet properly suggest
nearby "joined" options -- that is, for an option string "-FozBar", where
"-Foo" is the correct option name and "Bar" is the value being passed along
with the misspelled option, this method will calculate an edit distance of 4,
by deleting "Bar" and changing "z" to "o". It should instead calculate an edit
distance of just 1, by changing "z" to "o" and recognizing "Bar" as a
value. This commit includes a disabled test that expresses this limitation.

Test Plan: `check-llvm`

Reviewers: yamaguchi, v.g.vassilev, teemperor, ruiu, jroelofs

Reviewed By: jroelofs

Subscribers: jroelofs, llvm-commits

Differential Revision: https://reviews.llvm.org/D41732

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321877 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[llvm-cov] Temporarily disable multithreaded-report.test on Windows.
Max Moroz [Fri, 5 Jan 2018 16:43:24 +0000 (16:43 +0000)]
[llvm-cov] Temporarily disable multithreaded-report.test on Windows.

Summary: The test is failing because Windows do not support "diff -r".

Reviewers: Dor1s

Reviewed By: Dor1s

Differential Revision: https://reviews.llvm.org/D41768

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321876 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoadd 'REQUIRES: object-emission' to test
Adrian Prantl [Fri, 5 Jan 2018 16:31:22 +0000 (16:31 +0000)]
add 'REQUIRES: object-emission' to test

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321875 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoremove unnecessary target triple from generic test
Adrian Prantl [Fri, 5 Jan 2018 16:29:24 +0000 (16:29 +0000)]
remove unnecessary target triple from generic test

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321874 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[BasicAA] Fix linearization of shifts beyond the bitwidth.
Davide Italiano [Fri, 5 Jan 2018 16:18:47 +0000 (16:18 +0000)]
[BasicAA] Fix linearization of shifts beyond the bitwidth.

Thanks to Simon Pilgrim for the reduced testcase.
Fixes PR35821.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321873 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[SLP] Update more test checks, NFC.
Alexey Bataev [Fri, 5 Jan 2018 16:15:17 +0000 (16:15 +0000)]
[SLP] Update more test checks, NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321872 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[llvm-cov] Multi-threaded implementation of prepareFileReports method.
Max Moroz [Fri, 5 Jan 2018 16:15:07 +0000 (16:15 +0000)]
[llvm-cov] Multi-threaded implementation of prepareFileReports method.

Summary:
Local testing has demonstrated a great speed improvement, compare the following:

1) Existing version:
```
$ time llvm-cov show -format=html -output-dir=report -instr-profile=... ...
The tool has been launched:                            00:00:00
Loading coverage data:                                 00:00:00
Get unique source files:                               00:00:33
Creating an index out of the source files:             00:00:34
Going into prepareFileReports:                         00:00:34
Going to emit summary information for each file:       00:28:55 <-- 28:21 min!
Going to emit links to files with no function:         00:28:55
Launching 32 threads for generating HTML files:        00:28:55

real  37m43.651s
user  112m5.540s
sys   7m39.872s
```

2) Multi-threaded version with 32 CPUs:
```
$ time llvm-cov show -format=html -output-dir=report -instr-profile=... ...
The tool has been launched:                            00:00:00
Loading coverage data:                                 00:00:00
Get unique source files:                               00:00:38
Creating an index out of the source files:             00:00:40
Going into prepareFileReports:                         00:00:40
Preparing file reports using 32 threads:               00:00:40
# Creating thread tasks for the following number of files: 16422
Going to emit summary information for each file:       00:01:57 <-- 1:17 min!
Going to emit links to files with no function:         00:01:58
Launching 32 threads for generating HTML files:        00:01:58

real  11m2.044s
user  134m48.124s
sys   7m53.388s
```

Reviewers: vsk, morehouse

Reviewed By: vsk

Subscribers: Dor1s, llvm-commits, kcc

Differential Revision: https://reviews.llvm.org/D41206

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321871 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[SLP] Update test checks, NFC.
Alexey Bataev [Fri, 5 Jan 2018 15:20:40 +0000 (15:20 +0000)]
[SLP] Update test checks, NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321870 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[SLP] Update tests checks, NFC.
Alexey Bataev [Fri, 5 Jan 2018 14:40:04 +0000 (14:40 +0000)]
[SLP] Update tests checks, NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321869 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86] Regenerate illegal move test
Simon Pilgrim [Fri, 5 Jan 2018 14:24:03 +0000 (14:24 +0000)]
[X86] Regenerate illegal move test

Recommitting after fixing case-sensitive issue in the RUN command

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321868 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[ARM] Issue an erorr when non-general-purpose registers are used in address operands
Momchil Velikov [Fri, 5 Jan 2018 13:28:10 +0000 (13:28 +0000)]
[ARM] Issue an erorr when non-general-purpose registers are used in address operands

Currently the assembler would accept, e.g. `ldr r0, [s0, #12]` and similar.
This patch add checks that only general-purpose registers are used in address
operands, shifted registers, and shift amounts.

Differential revision: https://reviews.llvm.org/D39910

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321866 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[AArch64] Fix -mcpu option in aarch64-combine-fmul-fsub.mir (NFC)
Florian Hahn [Fri, 5 Jan 2018 11:17:48 +0000 (11:17 +0000)]
[AArch64] Fix -mcpu option in aarch64-combine-fmul-fsub.mir (NFC)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321865 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[DebugInfo] Don't crash when given invalid DWARFv5 line table prologue.
Jonas Devlieghere [Fri, 5 Jan 2018 10:03:02 +0000 (10:03 +0000)]
[DebugInfo] Don't crash when given invalid DWARFv5 line table prologue.

This patch replaces an assertion with an explicit check for the validity
of the FORM parameters. The assertion was triggered when the DWARFv5
line table contained a zero address size.

This fixes OSS-Fuzz Issue 4644
https://bugs.chromium.org/p/oss-fuzz/issues/detail?id=4644

Differential revision: https://reviews.llvm.org/D41615

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321863 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[DAGCombine] Fix for PR37563
Sam Parker [Fri, 5 Jan 2018 08:47:23 +0000 (08:47 +0000)]
[DAGCombine] Fix for PR37563

While searching for loads to be narrowed, equal sized loads were not
added to the list, resulting in anyext loads not being converted to
zext loads.

https://bugs.llvm.org/show_bug.cgi?id=35763

Differential Revision: https://reviews.llvm.org/D41628

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321862 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[ORC] Re-revert r321838: Tests are still failing.
Lang Hames [Fri, 5 Jan 2018 03:10:15 +0000 (03:10 +0000)]
[ORC] Re-revert r321838: Tests are still failing.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321858 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[GISel]: Don't create G_MUL with 1 during translation of GEP
Aditya Nandakumar [Fri, 5 Jan 2018 02:56:28 +0000 (02:56 +0000)]
[GISel]: Don't create G_MUL with 1 during translation of GEP

When element size is 1, it's just wasteful to create MUL with 1.
https://reviews.llvm.org/D41738

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321857 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[ORC] Re-apply r321838 - Addition of new ORC core APIs.
Lang Hames [Fri, 5 Jan 2018 02:21:02 +0000 (02:21 +0000)]
[ORC] Re-apply r321838 - Addition of new ORC core APIs.

The original commit broke the builders due to a think-o in an assertion:
AsynchronousSymbolQuery's constructor needs to check the callback member
variables, not the constructor arguments.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321853 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoDebug Info: Support DW_AT_calling_convention on composite types.
Adrian Prantl [Fri, 5 Jan 2018 01:13:37 +0000 (01:13 +0000)]
Debug Info: Support DW_AT_calling_convention on composite types.

This implements the DWARF 5 feature described at
http://www.dwarfstd.org/ShowIssue.php?issue=141215.1

This allows a consumer to understand whether a composite data type is
trivially copyable and thus should be passed by value instead of by
reference. The canonical example is being able to distinguish the
following two types:

  // S is not trivially copyable because of the explicit destructor.
  struct S {
     ~S() {}
  };

  // T is a POD type.
  struct T {
     ~T() = default;
  };

This patch adds two new (DI)flags to LLVM metadata: TypePassByValue
and TypePassByReference.

<rdar://problem/36034922>
Differential Revision: https://reviews.llvm.org/D41743

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321844 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoRevert r321838 -- It broke some of the builders.
Lang Hames [Fri, 5 Jan 2018 00:29:37 +0000 (00:29 +0000)]
Revert r321838 -- It broke some of the builders.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321842 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoWholeProgramDevirt: Simplify ORE getter mechanism for old PM. NFCI.
Peter Collingbourne [Fri, 5 Jan 2018 00:27:51 +0000 (00:27 +0000)]
WholeProgramDevirt: Simplify ORE getter mechanism for old PM. NFCI.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321841 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoremove unreferenced footnotes
Tim Hammerquist [Fri, 5 Jan 2018 00:24:55 +0000 (00:24 +0000)]
remove unreferenced footnotes

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321840 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agofix invalid footnote syntax
Tim Hammerquist [Fri, 5 Jan 2018 00:24:54 +0000 (00:24 +0000)]
fix invalid footnote syntax

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321839 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[ORC] Add new core ORC APIs (Core.h/Core.cpp): VSO, AsynchronousSymbolQuery and
Lang Hames [Fri, 5 Jan 2018 00:04:16 +0000 (00:04 +0000)]
[ORC] Add new core ORC APIs (Core.h/Core.cpp): VSO, AsynchronousSymbolQuery and
SymbolSource.

These new APIs are a first stab at tackling some current shortcomings of ORC,
especially in performance and threading support.

VSO (Virtual Shared Object) is a symbol table representing the symbol
definitions of a set of modules that behave as if they had been statically
linked together into a shared object or dylib. Symbol definitions, either
pre-defined addresses or lazy definitions, can be added and queries for symbol
addresses made. The table applies the same linkage strength rules that static
linkers do when constructing a dylib or shared object: duplicate definitions
result in errors, strong definitions override weak or common ones. This class
should improve symbol lookup speed by providing centralized symbol tables (as
compared to the findSymbol implementation in the in-tree ORC layers, which
maintain one symbol table per object file / module added).

AsynchronousSymbolQuery is a query for the addresses of a set of symbols.
Query results are returned via a callback once they become available. Querying
for a set of symbols, rather than one symbol at a time (as the current lookup
scheme does) the JIT has the opportunity to make better use of available
resources (e.g. by spawning multiple jobs to materialize the requested symbols
if possible). Returning results via a callback makes queries asynchronous, so
queries from multiple threads of JIT'd code can proceed simultaneously.

SymbolSource represents a source of symbol definitions. It is used when
adding lazy symbol definitions to a VSO. Symbol definitions can be materialized
when needed or discarded if a stronger definition is found. Materializing on
demand via SymbolSources should (eventually) allow us to remove the lazy
materializers from JITSymbol, which will in turn allow the removal of many
current error checks and reduce the number of RPC round-trips involved in
materializing remote symbols. Adding a discard function allows sources to
discard symbol definitions (or mark them as available_externally), reducing the
amount of redundant code generated by the JIT for ODR symbols.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321838 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[ORC] Actually compare pointer values as advertised (rather than comparing ref
Lang Hames [Fri, 5 Jan 2018 00:04:15 +0000 (00:04 +0000)]
[ORC] Actually compare pointer values as advertised (rather than comparing ref
counts). Oops.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321837 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[ORC] Add dereference operator to SymbolStringPtr.
Lang Hames [Fri, 5 Jan 2018 00:04:13 +0000 (00:04 +0000)]
[ORC] Add dereference operator to SymbolStringPtr.

Dereference yields a StringRef.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321836 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[DEBUG] Fix debug info test for NVPTX, NFC.
Alexey Bataev [Thu, 4 Jan 2018 23:50:24 +0000 (23:50 +0000)]
[DEBUG] Fix debug info test for NVPTX, NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321835 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoRevert "[JumpThreading] Preservation of DT and LVI across the pass"
Reid Kleckner [Thu, 4 Jan 2018 23:23:46 +0000 (23:23 +0000)]
Revert "[JumpThreading] Preservation of DT and LVI across the pass"

This reverts r321825, it causes crashes in Chromium. Reproducer
forthcoming.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321832 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[DEBUG] Fix the test for NVPTX, NFC.
Alexey Bataev [Thu, 4 Jan 2018 23:01:42 +0000 (23:01 +0000)]
[DEBUG] Fix the test for NVPTX, NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321829 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86] Add srem/udiv/urem by one combine tests
Simon Pilgrim [Thu, 4 Jan 2018 22:08:36 +0000 (22:08 +0000)]
[X86] Add srem/udiv/urem by one combine tests

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321826 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[JumpThreading] Preservation of DT and LVI across the pass
Brian M. Rzycki [Thu, 4 Jan 2018 21:57:32 +0000 (21:57 +0000)]
[JumpThreading] Preservation of DT and LVI across the pass

Summary:
See D37528 for a previous (non-deferred) version of this
patch and its description.

Preserves dominance in a deferred manner using a new class
DeferredDominance. This reduces the performance impact of
updating the DominatorTree at every edge insertion and
deletion. A user may call DDT->flush() within JumpThreading
for an up-to-date DT. This patch currently has one flush()
at the end of runImpl() to ensure DT is preserved across
the pass.

LVI is also preserved to help subsequent passes such as
CorrelatedValuePropagation. LVI is simpler to maintain and
is done immediately (not deferred). The code to perfom the
preversation was minimally altered and was simply marked
as preserved for the PassManager to be informed.

This extends the analysis available to JumpThreading for
future enhancements. One example is loop boundary threading.

Reviewers: dberlin, kuhar, sebpop

Reviewed By: kuhar, sebpop

Subscribers: hiraditya, llvm-commits

Differential Revision: https://reviews.llvm.org/D40146

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321825 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[AArch64] Improve code generation of vector build
Evandro Menezes [Thu, 4 Jan 2018 21:43:12 +0000 (21:43 +0000)]
[AArch64] Improve code generation of vector build

Instead of using, for example, `dup v0.4s, wzr`, which transfers between
register files, use the more efficient `movi v0.4s, #0` instead.

Differential revision: https://reviews.llvm.org/D41515

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321824 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86] Add scalar undef sdiv/srem/udiv/urem combine tests
Simon Pilgrim [Thu, 4 Jan 2018 21:33:19 +0000 (21:33 +0000)]
[X86] Add scalar undef sdiv/srem/udiv/urem combine tests

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321823 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[DEBUG] Add initial tests for debug info for NVPTX target, NFC.
Alexey Bataev [Thu, 4 Jan 2018 21:07:07 +0000 (21:07 +0000)]
[DEBUG] Add initial tests for debug info for NVPTX target, NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321822 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86] Correct the execution domain for AVX1 VBROADCASTF128 to be FP instead of integer.
Craig Topper [Thu, 4 Jan 2018 20:56:21 +0000 (20:56 +0000)]
[X86] Correct the execution domain for AVX1 VBROADCASTF128 to be FP instead of integer.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321821 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoRevert "[X86] Regenerate test"
Amara Emerson [Thu, 4 Jan 2018 20:20:44 +0000 (20:20 +0000)]
Revert "[X86] Regenerate test"

This reverts r321814 as it was failing make check.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321819 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[llvm-cov] Refactor "export" command implementation and add support for SOURCES.
Max Moroz [Thu, 4 Jan 2018 19:33:29 +0000 (19:33 +0000)]
[llvm-cov] Refactor "export" command implementation and add support for SOURCES.

Summary: Define an interface for Exporter + split JSON exporter into .h and .cpp.

Reviewers: vsk, morehouse

Reviewed By: vsk

Subscribers: llvm-commits, Dor1s, kcc

Differential Revision: https://reviews.llvm.org/D41600

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321815 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86] Regenerate test
Simon Pilgrim [Thu, 4 Jan 2018 18:48:42 +0000 (18:48 +0000)]
[X86] Regenerate test

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321814 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[DAGCombine] Ensure SDNode use iterator is incremented properly.
Amara Emerson [Thu, 4 Jan 2018 18:38:45 +0000 (18:38 +0000)]
[DAGCombine] Ensure SDNode use iterator is incremented properly.

Fixes an ASAN bug found by oss-fuzz.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321813 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[docs] Update Scudo documentation
Kostya Kortchinsky [Thu, 4 Jan 2018 18:31:22 +0000 (18:31 +0000)]
[docs] Update Scudo documentation

Summary:
The documentation has fallen a bit behind, update it with the latest evolution
of the allocator:
- clarify a couple of expectations regarding what is meant to be achieved;
- update the header format;
- document `-fsanitize=scudo`.

Reviewers: alekseyshl, flowerhack

Reviewed By: alekseyshl

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D41670

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321811 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86] Add common CHECK prefix for tests without SSE/AVX codegen
Simon Pilgrim [Thu, 4 Jan 2018 18:23:46 +0000 (18:23 +0000)]
[X86] Add common CHECK prefix for tests without SSE/AVX codegen

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321810 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoTeach InlineCost about address spaces
Bjorn Pettersson [Thu, 4 Jan 2018 18:23:40 +0000 (18:23 +0000)]
Teach InlineCost about address spaces

Summary:
I basically copied this patch from here:
  https://reviews.llvm.org/D1251
But I skipped some of the refactoring to make the patch more clean.

The new outer3/inner3 test case in ptr-diff.ll triggers the
following assert without this patch:
lib/IR/Constants.cpp:1834: static llvm::Constant *llvm::ConstantExpr::getCompare(unsigned short, llvm::Constant *, llvm::Constant *, bool): Assertion `C1->getType() == C2->getType() && "Op types should be identical!"' failed.

The other new test cases makes sure that there is code coverage
for all modifications in InlineCost.cpp (getting different values
due to not fetching sizes for address space zero). I only guarantee
code coverage for those tests. The tests are not written in a way
that they would break if not having the corrections in
InlineCost.cpp. I found it quite hard to fine tune the tests into
getting different results based on the pointer sizes (except for
the test case where we hit an assert if not teaching InlineCost
about address spaces).

Reviewers: chandlerc, arsenm, haicheng

Reviewed By: arsenm

Subscribers: wdng, eraman, llvm-commits, haicheng

Differential Revision: https://reviews.llvm.org/D40455

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321809 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoRegenerate broadcast constant comment
Simon Pilgrim [Thu, 4 Jan 2018 18:21:33 +0000 (18:21 +0000)]
Regenerate broadcast constant comment

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321808 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86] Show missed combine for X/X for SDIV/UDIV and X%X for SREM/UREM
Simon Pilgrim [Thu, 4 Jan 2018 18:20:46 +0000 (18:20 +0000)]
[X86] Show missed combine for X/X for SDIV/UDIV and X%X for SREM/UREM

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321807 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoStructurizeCFG: xfail one of the testcases from r321751
Matt Arsenault [Thu, 4 Jan 2018 17:23:24 +0000 (17:23 +0000)]
StructurizeCFG: xfail one of the testcases from r321751

It fails with -verify-region-info. This seems to be a issue
with RegionInfo itself which existed before.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321806 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoAdd assertion on DT availability during LI update in UpdateAnalysisInformation
Anna Thomas [Thu, 4 Jan 2018 17:21:15 +0000 (17:21 +0000)]
Add assertion on DT availability during LI update in UpdateAnalysisInformation

This came up during discussions in llvm-commits for
rL321653: Check for unreachable preds before updating LI in
UpdateAnalysisInformation

The assert provides hints to passes to require both DT and LI if we plan on
updating LI through this function.

Tests run: make check

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321805 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[Docs] Add Contributing page.
Florian Hahn [Thu, 4 Jan 2018 17:12:21 +0000 (17:12 +0000)]
[Docs] Add Contributing page.

This new page acts as an entry point for (new) contributors to LLVM and
provides information about

* What to contribute
* How to submit a patch
* Where to start to learn more about LLVM's architecture and internals.

This version of the page duplicates some information from the
DeveloperPolicy and Phabricator pages. Subsequent changes should work
towards moving information for new developers to this page, where it
makes sense.

Reviewers: reames, probinson, kristof.beyls, silvas, rengolin, asb

Reviewed By: silvas

Differential Revision: https://reviews.llvm.org/D41665

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321804 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[InstCombine] safely create a constant of the right type (PR35794)
Sanjay Patel [Thu, 4 Jan 2018 14:31:56 +0000 (14:31 +0000)]
[InstCombine] safely create a constant of the right type (PR35794)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321801 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[ARM] Fix endianness of Thumb .inst.w directive
Oliver Stannard [Thu, 4 Jan 2018 13:56:40 +0000 (13:56 +0000)]
[ARM] Fix endianness of Thumb .inst.w directive

Wide Thumb2 instructions should be emitted into the object file as pairs of
16-bit words of the appropriate endianness, not one 32-bit word.

Differential revision: https://reviews.llvm.org/D41185

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321799 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[Hexagon] Replace INSERTRP/EXTRACTRP with INSERT/EXTRACT in HexagonISD
Krzysztof Parzyszek [Thu, 4 Jan 2018 13:56:04 +0000 (13:56 +0000)]
[Hexagon] Replace INSERTRP/EXTRACTRP with INSERT/EXTRACT in HexagonISD

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321798 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[ARM GlobalISel] Select G_PHI
Diana Picus [Thu, 4 Jan 2018 13:09:25 +0000 (13:09 +0000)]
[ARM GlobalISel] Select G_PHI

Select G_PHI to PHI and manually constrain the result register. This is
very similar to how COPY is handled, so extract and reuse some of that
code.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321797 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[ARM GlobalISel] Add RegBankSelect tests for G_PHI
Diana Picus [Thu, 4 Jan 2018 13:09:20 +0000 (13:09 +0000)]
[ARM GlobalISel] Add RegBankSelect tests for G_PHI

RegBankSelect already handles G_PHI with some generic code. Add a couple
of tests for it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321796 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[ARM GlobalISel] Legalize scalar G_PHI
Diana Picus [Thu, 4 Jan 2018 13:09:14 +0000 (13:09 +0000)]
[ARM GlobalISel] Legalize scalar G_PHI

Mark G_PHI as Legal for s32 and p0, and also for s64 if we have hard
float. Widen any smaller types.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321795 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[ARM GlobalISel] Fix selection of pointer constants
Diana Picus [Thu, 4 Jan 2018 10:54:57 +0000 (10:54 +0000)]
[ARM GlobalISel] Fix selection of pointer constants

We used to handle G_CONSTANT with pointer type by forcing the type of
the result register to s32 and then letting TableGen handle it.
Unfortunately, setting the type only works for generic virtual
registers, that haven't yet been constrained to a register class (e.g.
those used only by a COPY later on). If the result register has already
been constrained as a use of a previously selected instruction, then
setting the type will assert.

It would be nice to be able to teach TableGen to select pointer
constants the same as integer constants, but since it's such an edge
case (at the moment the only pointer constant that we're generally
interested in is 0, and that is mostly used for comparisons and selects,
which are also not supported by TableGen) it's probably not worth the
effort right now. Instead, handle pointer constants with some trivial
handwritten code.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321793 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[ValueTracking] Adding missed lit-test for commit r316208
Nikolai Bozhenov [Thu, 4 Jan 2018 10:02:50 +0000 (10:02 +0000)]
[ValueTracking] Adding missed lit-test for commit r316208

Reviewers: reames, hfinkel

Differential Revision: https://reviews.llvm.org/D34101

Patch by: Olga Chupina <olga.chupina@intel.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321792 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86] Codegen test for PR37563
Sam Parker [Thu, 4 Jan 2018 09:42:27 +0000 (09:42 +0000)]
[X86] Codegen test for PR37563

Adding test to ease review of D41628.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321791 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[GVNHoist] Fix: PR35222 gvn-hoist incorrectly erases load in case of a loop
Aditya Kumar [Thu, 4 Jan 2018 07:47:24 +0000 (07:47 +0000)]
[GVNHoist] Fix: PR35222 gvn-hoist incorrectly erases load in case of a loop

Reviewers:
    dberlin
    sebpop
    eli.friedman

Differential Revision: https://reviews.llvm.org/D41453

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321789 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoChanges in the branch relaxation algorithm.
Elena Demikhovsky [Thu, 4 Jan 2018 07:08:45 +0000 (07:08 +0000)]
Changes in the branch relaxation algorithm.
The existing version worked incorrectly when inversion of a branch condintion is impossible.
Changed the "fixupConditionalBranch()" function - a new BB (a trampoline) is created to keep the original branch condition.

Differential Revision: https://reviews.llvm.org/D41634

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321785 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoRemove the unit test from r321783.
Bob Wilson [Thu, 4 Jan 2018 05:04:41 +0000 (05:04 +0000)]
Remove the unit test from r321783.

This test fails when run on the sanitizer bot, and I do not see a good
way to fix it. The existing bogus target in MachineInstrTest.cpp is only
good enough to create instructions but not sufficient to insert them into
basic blocks. The addNodeToList ilist callback dereferences the pointer
to the MachineRegisterInfo. Adding MachineRegisterInfo would also require
TargetRegisterInfo, even a minimal implementation of that would be quite
complicated. I would be glad to add this back if someone can suggest a
better way to do it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321784 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agosupport phi ranges for machine-level IR
Bob Wilson [Thu, 4 Jan 2018 02:58:15 +0000 (02:58 +0000)]
support phi ranges for machine-level IR

Add iterator ranges for machine instruction phis, similar to the IR-level
phi ranges added in r303964. I updated a few places to use this. Besides
general code simplification, this change will allow removing a non-upstream
change from Swift's copy of LLVM (in a better way than my previous attempt
in http://reviews.llvm.org/D19080).

https://reviews.llvm.org/D41672

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321783 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoDo not look up symbol names when n_strx == 0
Michael Trent [Wed, 3 Jan 2018 23:28:32 +0000 (23:28 +0000)]
Do not look up symbol names when n_strx == 0

Summary:
Historical tools for working with mach-o binaries verify the nlist field
n_strx has a non-zero value before using that value to retrieve symbol names.
Under some cirumstances, llvm-nm will attempt to display the symbol name at
position 0, even though symbol names at that position are not well defined.
This change addresses this problem by returning an empty string when n_strx
is zero.

rdar://problem/35750548

Reviewers: enderby, davide

Reviewed By: enderby, davide

Subscribers: davide, llvm-commits, JDevlieghere

Differential Revision: https://reviews.llvm.org/D41657

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321773 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[DAGCombine] Handle out of range EXTRACT_VECTOR_ELT indices
Simon Pilgrim [Wed, 3 Jan 2018 22:42:33 +0000 (22:42 +0000)]
[DAGCombine] Handle out of range EXTRACT_VECTOR_ELT indices

Handle this in DAGCombiner::visitEXTRACT_VECTOR_ELT the same as we already do in SelectionDAG::getNode and use APInt instead of getZExtValue.

This should also fix oss-fuzz #4910

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321767 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[PRE] Add a bunch of test cases for LICM-like PRE patterns
Philip Reames [Wed, 3 Jan 2018 22:28:26 +0000 (22:28 +0000)]
[PRE] Add a bunch of test cases for LICM-like PRE patterns

These were inspired by a very old review I'm about to abandon (https://reviews.llvm.org/D7061).  Several of the test cases from that worked without modification and expanding test coverage of such cases is always worthwhile.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321764 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[CodeGen][NFC] Remove unused function declaration
Francis Visoiu Mistrih [Wed, 3 Jan 2018 20:56:29 +0000 (20:56 +0000)]
[CodeGen][NFC] Remove unused function declaration

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321758 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[ExpandMemcmp] rename variables and add hook to override pref for number of loads...
Sanjay Patel [Wed, 3 Jan 2018 20:02:39 +0000 (20:02 +0000)]
[ExpandMemcmp] rename variables and add hook to override pref for number of loads per block; NFC

The preference only applies to 'memcmp() == 0' expansion, so try to make that clearer.
x86 will likely benefit by increasing the default value from '1' to '2' as seen in PR33325:
https://bugs.llvm.org/show_bug.cgi?id=33325
...so that is the planned follow-up to this clean-up step.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321756 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86] Remove 'else' after 'return' I forgot to cleanup before committing D41691.
Craig Topper [Wed, 3 Jan 2018 19:15:43 +0000 (19:15 +0000)]
[X86] Remove 'else' after 'return' I forgot to cleanup before committing D41691.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321755 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoFix missing release metabug in merge-request.sh
Matt Arsenault [Wed, 3 Jan 2018 18:51:22 +0000 (18:51 +0000)]
Fix missing release metabug in merge-request.sh

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321753 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoAMDGPU: Remove dead file
Matt Arsenault [Wed, 3 Jan 2018 18:45:42 +0000 (18:45 +0000)]
AMDGPU: Remove dead file

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321752 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoStructurizeCFG: Fix broken backedge detection
Matt Arsenault [Wed, 3 Jan 2018 18:45:37 +0000 (18:45 +0000)]
StructurizeCFG: Fix broken backedge detection

The work order was changed in r228186 from SCC order
to RPO with an arbitrary sorting function. The sorting
function attempted to move inner loop nodes earlier. This
was was apparently relying on an assumption that every block
in a given loop / the same loop depth would be seen before
visiting another loop. In the broken testcase, a block
outside of the loop was encountered before moving onto
another block in the same loop. The testcase would then
structurize such that one blocks unconditional successor
could never be reached.

Revert to plain RPO for the analysis phase. This fixes
detecting edges as backedges that aren't really.

The processing phase does use another visited set, and
I'm unclear on whether the order there is as important.
An arbitrary order doesn't work, and triggers some infinite
loops. The reversed RPO list seems to work and is closer
to the order that was used before, minus the arbitary
custom sorting.

A few of the changed tests now produce smaller code,
and a few are slightly worse looking.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321751 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[InstCombine] Check for out of range shift values using APInt before calling getZExtValue
Simon Pilgrim [Wed, 3 Jan 2018 18:28:20 +0000 (18:28 +0000)]
[InstCombine] Check for out of range shift values using APInt before calling getZExtValue

Reduced from oss-fuzz #4871 test case

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321748 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86] Remove useless custom inserter for 64-bit TAILJMP and TCRETURN opcodes
Craig Topper [Wed, 3 Jan 2018 18:20:36 +0000 (18:20 +0000)]
[X86] Remove useless custom inserter for 64-bit TAILJMP and TCRETURN opcodes

This custom inserter was added in r124272 at which time it added about bunch of Defs for Win64. In r150708, those defs were removed leaving only the "return BB". So I think this means the custom inserter is a NOP these days.

This patch removes the remaining code and stops tagging the instructions for custom insertion

Differential Revision: https://reviews.llvm.org/D41671

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321747 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86] Use ANY_EXTEND instead of SIGN_EXTEND in lowerMasksToReg
Craig Topper [Wed, 3 Jan 2018 18:11:01 +0000 (18:11 +0000)]
[X86] Use ANY_EXTEND instead of SIGN_EXTEND in lowerMasksToReg

Currently we use SIGN_EXTEND in lowerMasksToReg as part of calling convention setup, but we don't require a specific value for the upper bits.

This patch changes it to ANY_EXTEND which will be lowered as SIGN_EXTEND if it ends up sticking around.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321746 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[lit] Bump version number
Tom Stellard [Wed, 3 Jan 2018 16:35:51 +0000 (16:35 +0000)]
[lit] Bump version number

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321735 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoClear release notes for 7.0.0
Hans Wennborg [Wed, 3 Jan 2018 15:45:32 +0000 (15:45 +0000)]
Clear release notes for 7.0.0

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321727 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoThe trunk version is now 7.0.0svn
Hans Wennborg [Wed, 3 Jan 2018 14:52:54 +0000 (14:52 +0000)]
The trunk version is now 7.0.0svn

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321712 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoRemove left-over debug printout from r321692
Hans Wennborg [Wed, 3 Jan 2018 14:48:19 +0000 (14:48 +0000)]
Remove left-over debug printout from r321692

Besides the unsightly print-out, it was causing some buildbots to fail,
e.g. http://lab.llvm.org:8011/builders/clang-x86-windows-msvc2015/builds/9311

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321711 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[InstSimplify] Missed optimization in math expression: squashing exp(log), log(exp)
Dmitry Venikov [Wed, 3 Jan 2018 14:37:42 +0000 (14:37 +0000)]
[InstSimplify] Missed optimization in math expression: squashing exp(log), log(exp)

Summary: This patch enables folding following expressions under -ffast-math flag: exp(log(x)) -> x, exp2(log2(x)) -> x, log(exp(x)) -> x, log2(exp2(x)) -> x

Reviewers: spatel, hfinkel, davide

Reviewed By: spatel, hfinkel, davide

Subscribers: scanon, llvm-commits

Differential Revision: https://reviews.llvm.org/D41381

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321710 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[ARM][NFC] Avoid recreating MCSubtargetInfo in ARMAsmBackend
Alex Bradbury [Wed, 3 Jan 2018 13:46:21 +0000 (13:46 +0000)]
[ARM][NFC] Avoid recreating MCSubtargetInfo in ARMAsmBackend

After D41349, we can now directly access MCSubtargetInfo from
createARM*AsmBackend. This patch makes use of this, avoiding the need to
create a fresh MCSubtargetInfo (which was previously always done with a blank
CPU and feature string). Given the total size of the change remains pretty
tiny and we're removing the old explicit destructor, I changed the STI field
to a reference rather than a pointer.

Differential Revision: https://reviews.llvm.org/D41693

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321707 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[InstCombine] Add test to remove VarArg casts (NFC)
Florian Hahn [Wed, 3 Jan 2018 13:35:43 +0000 (13:35 +0000)]
[InstCombine] Add test to remove VarArg casts (NFC)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321706 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[TableGen] Add support of Intrinsics with multiple returns
Hal Finkel [Wed, 3 Jan 2018 11:35:09 +0000 (11:35 +0000)]
[TableGen] Add support of Intrinsics with multiple returns

This change deals with intrinsics with multiple outputs, for example load
instrinsic with address updated.

DAG selection for Instrinsics could be done either through source code or
tablegen. Handling all intrinsics in source code would introduce a huge chunk
of repetitive code if we have a large number of intrinsic that return multiple
values (see NVPTX as an example). While intrinsic class in tablegen supports
multiple outputs, tablegen only supports Intrinsics with zero or one output on
TreePattern. This appears to be a simple bug in tablegen that is fixed by this
change.

For Intrinsics defined as:

  def int_xxx_load_addr_updated: Intrinsic<[llvm_i32_ty, llvm_ptr_ty], [llvm_ptr_ty, llvm_i32_ty], []>;

Instruction will be defined as:

  def L32_X: Inst<(outs reg:$d1, reg:$d2), (ins reg:$s1, reg:$s2), "ld32_x $d1, $d2, $s2", [(set i32:$d1, i32:$d2, (int_xxx_load_addr_updated i32:$s1, i32:$s2))]>;

Patch by Wenbo Sun, thanks!

Differential Revision: https://reviews.llvm.org/D32888

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321704 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[AArch64][SVE] Asm: Add restricted register classes for SVE predicate vectors.
Sander de Smalen [Wed, 3 Jan 2018 10:15:46 +0000 (10:15 +0000)]
[AArch64][SVE] Asm: Add restricted register classes for SVE predicate vectors.

Summary:
Add a register class for SVE predicate operands that can only be p0-p7 (as opposed to p0-p15)

Patch [1/3] in a series to add predicated ADD/SUB instructions for SVE.

Reviewers: rengolin, mcrosier, evandro, fhahn, echristo, olista01, SjoerdMeijer, javed.absar

Reviewed By: fhahn

Subscribers: aemerson, javed.absar, tschuett, kristof.beyls, llvm-commits

Differential Revision: https://reviews.llvm.org/D41441

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321699 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoFix build of WebAssembly and AVR backends after r321692
Alex Bradbury [Wed, 3 Jan 2018 09:30:39 +0000 (09:30 +0000)]
Fix build of WebAssembly and AVR backends after r321692

As experimental backends, I didn't have them configured to build in my local
build config.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321696 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoFix incorrect documentation comment left after r321692
Alex Bradbury [Wed, 3 Jan 2018 09:14:02 +0000 (09:14 +0000)]
Fix incorrect documentation comment left after r321692

TargetRegistryInfo::createMCAsmBackend no longer takes a TheTriple parameter.
The majory of the TargetRegistryInfo::create* functions have no or very
limitied per-parameter doc comments, and adding a comment for the
MCSubtargetInfo, MCRegisterInfo and MCTargetOptions parameters seems like it
would add no real value beyond reading the function signature. As such, I've
just deleted the doc comment for TheTriple.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321694 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoThread MCSubtargetInfo through Target::createMCAsmBackend
Alex Bradbury [Wed, 3 Jan 2018 08:53:05 +0000 (08:53 +0000)]
Thread MCSubtargetInfo through Target::createMCAsmBackend

Currently it's not possible to access MCSubtargetInfo from a TgtMCAsmBackend.
D20830 threaded an MCSubtargetInfo reference through
MCAsmBackend::relaxInstruction, but this isn't the only function that would
benefit from access. This patch removes the Triple and CPUString arguments
from createMCAsmBackend and replaces them with MCSubtargetInfo.

This patch just changes the interface without making any intentional
functional changes. Once in, several cleanups are possible:
* Get rid of the awkward MCSubtargetInfo handling in ARMAsmBackend
* Support 16-bit instructions when valid in MipsAsmBackend::writeNopData
* Get rid of the CPU string parsing in X86AsmBackend and just use a SubtargetFeature for HasNopl
* Emit 16-bit nops in RISCVAsmBackend::writeNopData if the compressed instruction set extension is enabled (see D41221)

This change initially exposed PR35686, which has since been resolved in r321026.

Differential Revision: https://reviews.llvm.org/D41349

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321692 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[GlobalISel][Legalizer] Fix legalization of llvm.smul.with.overflow
Amara Emerson [Wed, 3 Jan 2018 04:56:56 +0000 (04:56 +0000)]
[GlobalISel][Legalizer] Fix legalization of llvm.smul.with.overflow

Previously the code for handling G_SMULO didn't properly check for the signed
multiply overflow, instead treating it the same as the unsigned G_UMULO.

Fixes PR35800.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321690 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[llvm-objcopy] Add support for visibility
Jake Ehrlich [Tue, 2 Jan 2018 23:01:24 +0000 (23:01 +0000)]
[llvm-objcopy] Add support for visibility

I have no clue how this was missed when symbol table support was added. This
change ensures that the visibility of symbols is preserved by default.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321681 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoHandle the case of live 16-bit subregisters in X86FixupBWInsts
Andrew Kaylor [Tue, 2 Jan 2018 21:04:38 +0000 (21:04 +0000)]
Handle the case of live 16-bit subregisters in X86FixupBWInsts

Differential Revision: https://reviews.llvm.org/D40524

Change-Id: Ie3a405b28503ceae999f5f3ba07a68fa733a2400

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321674 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[AArch64] fix typos in comments; NFC
Sanjay Patel [Tue, 2 Jan 2018 21:04:08 +0000 (21:04 +0000)]
[AArch64] fix typos in comments; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321673 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[ValueTracking] recognize min/max of min/max patterns
Sanjay Patel [Tue, 2 Jan 2018 20:56:45 +0000 (20:56 +0000)]
[ValueTracking] recognize min/max of min/max patterns

This is part of solving PR35717:
https://bugs.llvm.org/show_bug.cgi?id=35717

The larger IR optimization is proposed in D41603, but we can show
the improvement in ValueTracking using codegen tests because
SelectionDAG creates min/max nodes based on ValueTracking.

Any target with min/max ops should show wins here. I chose AArch64
vector ops because they're clean and uniform.

Some Alive proofs for the tests (can't put more than 2 tests in 1
page currently because the web app says it's too long):
https://rise4fun.com/Alive/WRN
https://rise4fun.com/Alive/iPm
https://rise4fun.com/Alive/HmY
https://rise4fun.com/Alive/CNm
https://rise4fun.com/Alive/LYf

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321672 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[AArch64] add tests for min/max of min/max (PR35717); NFC
Sanjay Patel [Tue, 2 Jan 2018 20:16:45 +0000 (20:16 +0000)]
[AArch64] add tests for min/max of min/max (PR35717); NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321668 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[AArch64][GlobalISel] Fix assert fail with unknown intrinsic.
Amara Emerson [Tue, 2 Jan 2018 18:56:39 +0000 (18:56 +0000)]
[AArch64][GlobalISel] Fix assert fail with unknown intrinsic.

A call may have an intrinsic name but not have a valid intrinsic ID,
for example with llvm.invariant.group.barrier. If so, treat it as a
normal call like FastISel does.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321662 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[opt-viewer] Check for pygments.lexer.c_cpp
Jonas Hahnfeld [Tue, 2 Jan 2018 17:53:08 +0000 (17:53 +0000)]
[opt-viewer] Check for pygments.lexer.c_cpp

Some systems still don't have this module which was introduced in
version 2.0 (CentOS 7, sigh).

Differential Revision: https://reviews.llvm.org/D41611

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321659 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[x86] allow pairs of PCMPEQ for vector-sized integer equality comparisons (PR33325)
Sanjay Patel [Tue, 2 Jan 2018 16:38:29 +0000 (16:38 +0000)]
[x86] allow pairs of PCMPEQ for vector-sized integer equality comparisons (PR33325)

This is an extension of D31156 with the goal that we'll allow memcmp() == 0 expansion
for x86 to use 2 pairs of loads per block.

The memcmp expansion pass (formerly part of CGP) will generate this kind of pattern
with oversized integer compares, so we want to transform these into x86-specific vector
nodes before legalization splits things into scalar chunks.

See PR33325 for more details:
https://bugs.llvm.org/show_bug.cgi?id=33325

Differential Revision: https://reviews.llvm.org/D41618

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321656 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[AArch64][GlobalISel] Enable GlobalISel at -O0 by default
Amara Emerson [Tue, 2 Jan 2018 16:30:47 +0000 (16:30 +0000)]
[AArch64][GlobalISel] Enable GlobalISel at -O0 by default

Tests updated to explicitly use fast-isel at -O0 instead of implicitly.

This change also allows an explicit -fast-isel option to override an
implicitly enabled global-isel. Otherwise -fast-isel would have no effect at -O0.

Differential Revision: https://reviews.llvm.org/D41362

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321655 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[BasicBlockUtils] Check for unreachable preds before updating LI in UpdateAnalysisInf...
Anna Thomas [Tue, 2 Jan 2018 16:25:50 +0000 (16:25 +0000)]
[BasicBlockUtils] Check for unreachable preds before updating LI in UpdateAnalysisInformation

Summary:
We are incorrectly updating the LI when loop-simplify generates
dedicated exit blocks for a loop. The issue is that there's an implicit
assumption that the Preds passed into UpdateAnalysisInformation are
reachable. However, this is not true and breaks LI by incorrectly
updating the header of a loop.

One such case is when we generate dedicated exits when the exit block is
a landing pad (through SplitLandingPadPredecessors). There maybe other
cases as well, since we do not guarantee that Preds passed in are
reachable basic blocks.

The added test case shows how loop-simplify breaks LI for the outer loop (and DT in turn)
after we try to generate the LoopSimplifyForm.

Reviewers: davide, chandlerc, sanjoy

Reviewed By: davide

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D41519

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321653 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[Hexagon] Fix generation of vector sign extensions
Krzysztof Parzyszek [Tue, 2 Jan 2018 15:28:49 +0000 (15:28 +0000)]
[Hexagon] Fix generation of vector sign extensions

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@321650 91177308-0d34-0410-b5e6-96231b3b80d8