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6 years ago[NFC] Zero initialize local variables
Hiroshi Inoue [Fri, 1 Jun 2018 14:23:15 +0000 (14:23 +0000)]
[NFC] Zero initialize local variables

This patch makes local variables zero initialized to avoid broken values in debug output.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333754 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[llvm-exegesis] Analysis: Display idealized sched class port pressure.
Clement Courbet [Fri, 1 Jun 2018 14:18:02 +0000 (14:18 +0000)]
[llvm-exegesis] Analysis: Display idealized sched class port pressure.

Summary: Screenshot in phabricator diff.

Reviewers: gchatelet

Subscribers: mgorny, tschuett, mgrang, llvm-commits

Differential Revision: https://reviews.llvm.org/D47329

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333753 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[SelectionDAG] Expand UADDO/USUBO into ADD/SUBCARRY if legal for target
Krzysztof Parzyszek [Fri, 1 Jun 2018 14:00:32 +0000 (14:00 +0000)]
[SelectionDAG] Expand UADDO/USUBO into ADD/SUBCARRY if legal for target

Additionally, implement handling of ADD/SUBCARRY on Hexagon, utilizing
the UADDO/USUBO expansion.

Differential Revision: https://reviews.llvm.org/D47559

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333751 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[x86] NFC. Reautogenerate test/CodeGen/X86/vector-half-conversions.ll
Alexander Ivchenko [Fri, 1 Jun 2018 13:51:53 +0000 (13:51 +0000)]
[x86] NFC. Reautogenerate test/CodeGen/X86/vector-half-conversions.ll

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333750 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[Utils][X86] Help update_llc_test_checks.py to recognise retl/retq to reduce CHECK...
Simon Pilgrim [Fri, 1 Jun 2018 13:37:01 +0000 (13:37 +0000)]
[Utils][X86] Help update_llc_test_checks.py to recognise retl/retq to reduce CHECK duplication (PR35003)

This patch replaces the --x86_extra_scrub command line argument to automatically support a second level of regex-scrubbing if it improves the matching of nearly-identical code patterns. The argument '--extra_scrub' is there now to force extra matching if required.

This is mostly useful to help us share 32-bit/64-bit x86 vector tests which only differs by retl/retq instructions, but any scrubber can now technically support this, meaning test checks don't have to be needlessly obfuscated.

I've updated some of the existing checks that had been manually run with --x86_extra_scrub, to demonstrate the extra "ret{{[l|q]}}" scrub now only happens when useful, and re-run the sse42-intrinsics file to show extra matches - most sse/avx intrinsics files should be able to now share 32/64 checks.

Tested with the opt/analysis scripts as well which share common code - AFAICT the other update scripts use their own versions.

Differential Revision: https://reviews.llvm.org/D47485

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333749 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoSet ADDE/ADDC/SUBE/SUBC to expand by default
Amaury Sechet [Fri, 1 Jun 2018 13:21:33 +0000 (13:21 +0000)]
Set ADDE/ADDC/SUBE/SUBC to expand by default

Summary:
They've been deprecated in favor of UADDO/ADDCARRY or USUBO/SUBCARRY for a while.

Target that uses these opcodes are changed in order to ensure their behavior doesn't change.

Reviewers: efriedma, craig.topper, dblaikie, bkramer

Subscribers: jholewinski, arsenm, jyknight, sdardis, nemanjai, nhaehnle, kbarton, fedor.sergeev, asb, rbar, johnrusso, simoncook, jordy.potman.lists, apazos, sabuasal, niosHD, jrtc27, zzheng, edward-jones, mgrang, atanasyan, llvm-commits

Differential Revision: https://reviews.llvm.org/D47422

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333748 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[AArch64][GlobalISel] Zero-extend s1 values when returning.
Amara Emerson [Fri, 1 Jun 2018 13:20:32 +0000 (13:20 +0000)]
[AArch64][GlobalISel] Zero-extend s1 values when returning.

Before we were relying on the any extend of the s1 to s32, but
for AAPCS we need to zero-extend it to at least s8.

Fixes PR36719

Differential Revision: https://reviews.llvm.org/D47425

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333747 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoRevert r333740: IPSCCP] Use PredicateInfo to propagate facts from cmp.
Florian Hahn [Fri, 1 Jun 2018 12:58:43 +0000 (12:58 +0000)]
Revert r333740: IPSCCP] Use PredicateInfo to propagate facts from cmp.

This is breaking the clang-with-thin-lto-ubuntu bot.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333745 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[AArch64][SVE] Asm: Support for FDUP_ZI (copy fp immediate) instruction.
Sander de Smalen [Fri, 1 Jun 2018 12:54:46 +0000 (12:54 +0000)]
[AArch64][SVE] Asm: Support for FDUP_ZI (copy fp immediate) instruction.

Unpredicated copy of floating-point immediate value into SVE vector,
along with MOV-aliases.

Reviewers: rengolin, fhahn, samparker, SjoerdMeijer, javed.absar

Reviewed By: fhahn

Differential Revision: https://reviews.llvm.org/D47482

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333744 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[mips] Guard more aliases correctly.
Simon Dardis [Fri, 1 Jun 2018 10:57:13 +0000 (10:57 +0000)]
[mips] Guard more aliases correctly.

Also, duplicate an alias for microMIPS.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333741 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoRecommit r333268: [IPSCCP] Use PredicateInfo to propagate facts from cmp instructions.
Florian Hahn [Fri, 1 Jun 2018 10:48:54 +0000 (10:48 +0000)]
Recommit r333268: [IPSCCP] Use PredicateInfo to propagate facts from cmp instructions.

This patch updates IPSCCP to use PredicateInfo to propagate
facts to true branches predicated by EQ and to false branches
predicated by NE.

As a follow up, we should be able to extend it to also propagate additional
facts about nonnull.

Reviewers: davide, mssimpso, dberlin, efriedma

Reviewed By: davide, dberlin

Differential Revision: https://reviews.llvm.org/D45330

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333740 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[mips] Guard 'nop' properly and add mips16's nop instruction
Simon Dardis [Fri, 1 Jun 2018 10:46:00 +0000 (10:46 +0000)]
[mips] Guard 'nop' properly and add mips16's nop instruction

Reviewers: smaksimovic, atanasyan, abeserminji

Differential Revision: https://reviews.llvm.org/D47583

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333739 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoDWARFAcceleratorTable: Add an iterator-based api for accessing names in the index
Pavel Labath [Fri, 1 Jun 2018 10:33:11 +0000 (10:33 +0000)]
DWARFAcceleratorTable: Add an iterator-based api for accessing names in the index

Summary:
Back when we were introducing the DWARF v5 name index, there was a
short discussion whether we shouldn't have a nicer api for iterating
over the index. At that time, I did not find it necessary since the
iteration over names was done only from within the index itself (and I
figured the internal implementation can deal with a slightly rough
interface).

However, now I ran into a use for this kind of API in LLDB (for finding
all names matching a regular expression), so it looked like a nice
opportunity to introduce one. To make the API more useful, I've made the
NameTableEntry class a bit smarter: it now stores the string section
reference (so it can return its name) and its position in the name index
(mainly useful for dumping/logging).

I also convert the internal users to use the new API, which also gives
test coverage for the added code.

Reviewers: JDevlieghere, aprantl, dblaikie

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D47590

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333738 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[mips] Select the correct instruction for computing frameindexes
Simon Dardis [Fri, 1 Jun 2018 10:07:10 +0000 (10:07 +0000)]
[mips] Select the correct instruction for computing frameindexes

Reviewers: smaksimovic, atanasyan, abeserminji

Differential Revision: https://reviews.llvm.org/D47582

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333736 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoNFC Avoid a warning in WasmEHPrepare.cpp
Gabor Buella [Fri, 1 Jun 2018 07:47:46 +0000 (07:47 +0000)]
NFC Avoid a warning in WasmEHPrepare.cpp

```
../lib/CodeGen/WasmEHPrepare.cpp:166:30: warning: extra ‘;’ [-Wpedantic]
                 false, false);
                              ^
```

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333732 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[AArch64][SVE] Asm: Support for DUPM (masked immediate) instruction.
Sander de Smalen [Fri, 1 Jun 2018 07:25:46 +0000 (07:25 +0000)]
[AArch64][SVE] Asm: Support for DUPM (masked immediate) instruction.

Unpredicated copy of repeating immediate pattern to SVE vector, along
with MOV-aliases.

Reviewers: rengolin, fhahn, samparker, SjoerdMeijer, javed.absar

Reviewed By: SjoerdMeijer

Differential Revision: https://reviews.llvm.org/D47328

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333731 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoAMDGPU: Switch some half using-tests to use amdhsa
Matt Arsenault [Fri, 1 Jun 2018 07:06:03 +0000 (07:06 +0000)]
AMDGPU: Switch some half using-tests to use amdhsa

The default clover ABI weirdly promotes half to float,
which should probably be fixed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333730 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86][Disassembler] Make it an error to set EVEX.R' to 0 when modrm.reg encodes a...
Craig Topper [Fri, 1 Jun 2018 06:11:29 +0000 (06:11 +0000)]
[X86][Disassembler] Make it an error to set EVEX.R' to 0 when modrm.reg encodes a GPR.

This is different than the behavior of EVEX.X extending modrm.rm to 5 bits.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333728 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86][Disassembler] Ignore EVEX.X extension of modrm.rm to 5-bits when modrm.rm encod...
Craig Topper [Fri, 1 Jun 2018 05:36:08 +0000 (05:36 +0000)]
[X86][Disassembler] Ignore EVEX.X extension of modrm.rm to 5-bits when modrm.rm encodes a k-register.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333727 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoImplemented sane default for llvm-objdump's relocation Value format
Daniel Cederman [Fri, 1 Jun 2018 05:31:58 +0000 (05:31 +0000)]
Implemented sane default for llvm-objdump's relocation Value format

Summary:
"Unknown" for platforms that were not manually added into the switch
did not make sense at all. Now it prints Target + addend for all
elf-machines that were not explicitly mentioned.

Addresses PR21059 and PR25124.

Original author: fedor.sergeev

Reviewers: jyknight, espindola, fedor.sergeev

Reviewed By: jyknight

Subscribers: eraman, dcederman, jfb, dschuff, aheejin, llvm-commits

Differential Revision: https://reviews.llvm.org/D36464

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333726 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86][Disassembler] Clamp index to 4-bits when decoding GPR registers.
Craig Topper [Fri, 1 Jun 2018 05:12:44 +0000 (05:12 +0000)]
[X86][Disassembler] Clamp index to 4-bits when decoding GPR registers.

A 5-bit value can occur when EVEX.X is 0 due to it being used to extend modrm.rm to encode XMM16-31. But if modrm.rm instead encodes a GPR, the Intel documentation says EVEX.X should be ignored so just mask it to 4 bits once we know its a GPR.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333725 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86] Add a test case showing a bad disassembling of an EVEX instruction with EVEX...
Craig Topper [Fri, 1 Jun 2018 05:12:43 +0000 (05:12 +0000)]
[X86] Add a test case showing a bad disassembling of an EVEX instruction with EVEX.X=0 and a GPR encoded in modrm.rm.

EVEX.X is used to extended modrm.rm when the instruction encodes a XMM/YMM/ZMM register. But we aren't properly ignoring it when it encodes a GPR and we end up printing whatever registers exist in X86 register enum after the GPRs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333724 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86][Disassembler] Make sure EVEX.X is not used to extend base registers of memory...
Craig Topper [Fri, 1 Jun 2018 04:29:34 +0000 (04:29 +0000)]
[X86][Disassembler] Make sure EVEX.X is not used to extend base registers of memory operations.

This was an accidental side effect of EVEX.X being used to encode XMM16-XMM31 using modrm.rm with modrm.mod==0x3.

I think there are still more bugs related to this.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333722 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86][Disassembler] Use a local variable instead of using a field in the instruction...
Craig Topper [Fri, 1 Jun 2018 04:29:30 +0000 (04:29 +0000)]
[X86][Disassembler] Use a local variable instead of using a field in the instruction object. NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333721 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoAMDGPU/R600: Move intrinsics to IntrinsicsAMDGPU.td
Tom Stellard [Fri, 1 Jun 2018 02:19:46 +0000 (02:19 +0000)]
AMDGPU/R600: Move intrinsics to IntrinsicsAMDGPU.td

Reviewers: arsenm, nhaehnle, jvesely

Reviewed By: arsenm

Subscribers: kzhuravl, wdng, yaxunl, dstuttard, tpr, llvm-commits, t-tye

Differential Revision: https://reviews.llvm.org/D47487

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333720 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86] Make sure the check for VEX.vvvv being all ones on instructions that don't...
Craig Topper [Fri, 1 Jun 2018 01:23:52 +0000 (01:23 +0000)]
[X86] Make sure the check for VEX.vvvv being all ones on instructions that don't use it doesn't ignore a bit in 32-bit mode.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333717 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86][Disassembler] Suppress reading of EVEX.V' and EVEX.R' in 32-bit mode.
Craig Topper [Fri, 1 Jun 2018 00:10:36 +0000 (00:10 +0000)]
[X86][Disassembler] Suppress reading of EVEX.V' and EVEX.R' in 32-bit mode.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333714 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86] Add test cases showing the disassembler producing an xmm16-xmm31 register in...
Craig Topper [Fri, 1 Jun 2018 00:10:32 +0000 (00:10 +0000)]
[X86] Add test cases showing the disassembler producing an xmm16-xmm31 register in 32-bit mode.

We aren't properly suppressing the reading of VEX.R' and VEX.V' in 32-bit mode.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333713 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoChange ambiguous uses of term 'funclet' to 'EH scopes'. NFC.
Heejin Ahn [Fri, 1 Jun 2018 00:03:21 +0000 (00:03 +0000)]
Change ambiguous uses of term 'funclet' to 'EH scopes'. NFC.

Summary:
`getEHScopeMembership()` function is used not only for funclet-based
EHs; they apply to all EH schemes that use the scoped IR
(catchpad/cleanuppad/...). D47005 (rL333045) changed some of the uses of
the term 'funclet' to 'EH scopes' in case they apply to all scoped EH,
and this fixes more of them. For `FuncletLayout` pass, I left it as is
because the pass is only used for funclet-based EH.

Reviewers: majnemer

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D47611

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333711 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[WebAssembly] Update to the new names for the memory intrinsics.
Dan Gohman [Thu, 31 May 2018 22:35:25 +0000 (22:35 +0000)]
[WebAssembly] Update to the new names for the memory intrinsics.

The WebAssembly committee has decided on the names `memory.size` and
`memory.grow` for the memory intrinsics, so update the LLVM intrinsics to
follow those names, keeping both sets of old names in place for
compatibility.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333708 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[LoopVectorize, x86] add tests to show missing SVML transforms; NFC
Sanjay Patel [Thu, 31 May 2018 22:31:02 +0000 (22:31 +0000)]
[LoopVectorize, x86] add tests to show missing SVML transforms; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333707 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[WebAssembly] Fix the signatures for the __mulo* libcalls.
Dan Gohman [Thu, 31 May 2018 22:27:24 +0000 (22:27 +0000)]
[WebAssembly] Fix the signatures for the __mulo* libcalls.

The __mulo* libcalls have an extra i32* to return the overflow value.

Fixes PR37401.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333706 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[WebAssembly] Support instruction selection for catching exceptions
Heejin Ahn [Thu, 31 May 2018 22:25:54 +0000 (22:25 +0000)]
[WebAssembly] Support instruction selection for catching exceptions

Summary:
This lowers exception catching-related instructions:
1. Lowers `wasm.catch` intrinsic to `catch` instruction
2. Removes `catchpad` and `cleanuppad` instructions; they are not
necessary after isel phase. (`MachineBasicBlock::isEHFuncletEntry()` or
`MachineBasicBlock::isEHPad()` can be used instead.)
3. Lowers `catchret` and `cleanupret` instructions to pseudo `catchret`
and `cleanupret` instructions in isel, which will be replaced with other
instructions in `WebAssemblyExceptionPrepare` pass.
4. Adds 'WebAssemblyExceptionPrepare` pass, which is for running various
transformation for EH. Currently this pass only replaces `catchret` and
`cleanupret` instructions into appropriate wasm instructions to make
this patch successfully run until the end.

Currently this does not handle lowering of intrinsics related to LSDA
info generation (`wasm.landingpad.index` and `wasm.lsda`), because they
cannot be tested without implementing `EHStreamer`'s wasm-specific
handlers. They are marked as TODO, which is needed to make isel pass.
Also this does not generate `try` and `end_try` markers yet, which will
be handled in later patches.

This patch is based on the first wasm EH proposal.
(https://github.com/WebAssembly/exception-handling/blob/master/proposals/Exceptions.md)

Reviewers: dschuff, majnemer

Subscribers: jfb, sbc100, jgravelle-google, sunfish, llvm-commits

Differential Revision: https://reviews.llvm.org/D44090

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333705 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[LoopIdiomRecognize] Only convert loops to ctlz if we can prove that the input is...
Craig Topper [Thu, 31 May 2018 22:16:55 +0000 (22:16 +0000)]
[LoopIdiomRecognize] Only convert loops to ctlz if we can prove that the input is non-negative.

Summary:
Loop idiom recognize tries to convert loops like

```
int foo(int x) {
  int cnt = 0;
  while (x) {
    x >>= 1;
    ++cnt;
  }
  return cnt;
}
```

into calls to ctlz, but if x is initially negative this loop should be infinite.

It happens that the cases that motivated this change have an absolute value of x before the loop. So this patch restricts the transform to cases where we know x is positive. Note: We are relying on the absolute value of INT_MIN to be undefined so we can assume that the result is always positive.

Fixes PR37479

Reviewers: spatel, hfinkel, efriedma, javed.absar

Reviewed By: efriedma

Subscribers: dmgreen, llvm-commits

Differential Revision: https://reviews.llvm.org/D47348

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333702 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[WebAssembly] Add Wasm exception handling prepare pass
Heejin Ahn [Thu, 31 May 2018 22:02:34 +0000 (22:02 +0000)]
[WebAssembly] Add Wasm exception handling prepare pass

Summary:
This adds a pass that transforms a program to be prepared for Wasm
exception handling. This is using Windows EH instructions and based on
the previous Wasm EH proposal.
(https://github.com/WebAssembly/exception-handling/blob/master/proposals/Exceptions.md)

Reviewers: dschuff, majnemer

Subscribers: jfb, mgorny, sbc100, jgravelle-google, JDevlieghere, sunfish, llvm-commits

Differential Revision: https://reviews.llvm.org/D43746

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333696 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[LoopVectorize, x86] regenerate checks; NFC
Sanjay Patel [Thu, 31 May 2018 21:30:36 +0000 (21:30 +0000)]
[LoopVectorize, x86] regenerate checks; NFC

I removed the 'fast' flag from the calls because that's not required.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333695 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[llvm-strip] Add -o option to llvm-strip
Alexander Shaposhnikov [Thu, 31 May 2018 20:42:13 +0000 (20:42 +0000)]
[llvm-strip] Add -o option to llvm-strip

This diff implements the option -o
for specifying a file to write the output to.

Test plan: make check-all

Differential revision: https://reviews.llvm.org/D47505

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333693 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[llvm-mca] Fixed a problem caused by an invalid use of a processor resource mask...
Andrea Di Biagio [Thu, 31 May 2018 20:27:46 +0000 (20:27 +0000)]
[llvm-mca] Fixed a problem caused by an invalid use of a processor resource mask in the Scheduler.

The lambda functions used by method ResourceManager::mustIssueImmediately() was
incorrectly truncating masks of buffered processor resources to 32-bit quantities.
The invalid mask values were then used to access a map of processor
resource descriptors.

Fixes PR37643.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333692 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[AMDGPU] Construct memory clauses before RA
Stanislav Mekhanoshin [Thu, 31 May 2018 20:13:51 +0000 (20:13 +0000)]
[AMDGPU] Construct memory clauses before RA

Memory clauses are formed into bundles in presence of xnack.
Their source operands are marked as early-clobber.

This allows to allocate distinct source and destination registers
within a clause and prevent breaking the clause with s_nop in the
hazard recognizer.

Clauses are undone before post-RA scheduler to allow some rescheduling,
which will not break the clause since artificial edges are created in
the dag to keep memory operations together. Yet this allows a better
ILP in some cases.

Differential Revision: https://reviews.llvm.org/D47511

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333691 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[InstCombine] narrow select to match condition operands' size
Sanjay Patel [Thu, 31 May 2018 19:55:27 +0000 (19:55 +0000)]
[InstCombine] narrow select to match condition operands' size

This is the planned enhancement to D47163 / rL333611.
We want to match cmp/select sizes because that will be recognized
as min/max more easily and lead to better codegen (especially for
vector types).

As mentioned in D47163, this improves some of the tests that would
also be folded by D46380, so we may want to adjust that patch to
match the new patterns where the extend op occurs after the select.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333689 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[AMDGPU] Fixed incorrect -mcpu=gfx800 in xnor.ll test. NFC.
Stanislav Mekhanoshin [Thu, 31 May 2018 19:39:54 +0000 (19:39 +0000)]
[AMDGPU] Fixed incorrect -mcpu=gfx800 in xnor.ll test. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333687 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[GISel]: Pattern matchers for GFSUB, GFNEG
Aditya Nandakumar [Thu, 31 May 2018 19:30:01 +0000 (19:30 +0000)]
[GISel]: Pattern matchers for GFSUB, GFNEG

https://reviews.llvm.org/D47547

Add matching templates for G_FSUB, and G_FNEG.

Reviewed by: aemerson.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333685 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[ORC] Add a getRequestedSymbols method to MaterializationResponsibility.
Lang Hames [Thu, 31 May 2018 19:29:03 +0000 (19:29 +0000)]
[ORC] Add a getRequestedSymbols method to MaterializationResponsibility.

This method returns the set of symbols in the target VSO that have queries
waiting on them. This can be used to make decisions about which symbols to
delegate to another MaterializationUnit (typically this will involve
delegating all symbols that have *not* been requested to another
MaterializationUnit so that materialization of those symbols can be
deferred until they are requested).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333684 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[ORC] Rename IRMaterializationUnit's Discardable member to SymbolToDefinition,
Lang Hames [Thu, 31 May 2018 19:29:01 +0000 (19:29 +0000)]
[ORC] Rename IRMaterializationUnit's Discardable member to SymbolToDefinition,
and make it protected rather than private.

The new name reflects the actual information in the map, and this information
can be useful to derived classes (for example, to quickly look up the IR
definition of a requested symbol).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333683 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[InstCombine] regenerate checks; NFC
Sanjay Patel [Thu, 31 May 2018 19:25:02 +0000 (19:25 +0000)]
[InstCombine] regenerate checks; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333682 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoIRGen: Write .dwo files when -split-dwarf-file is used together with -fthinlto-index.
Peter Collingbourne [Thu, 31 May 2018 18:25:59 +0000 (18:25 +0000)]
IRGen: Write .dwo files when -split-dwarf-file is used together with -fthinlto-index.

Differential Revision: https://reviews.llvm.org/D47597

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333677 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoRelax GOTPCREL relocations for tail jmp instructions.
Sriraman Tallam [Thu, 31 May 2018 18:12:33 +0000 (18:12 +0000)]
Relax GOTPCREL relocations for tail jmp instructions.

Differential Revision: https://reviews.llvm.org/D47563

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333676 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[JumpThreading] Fix some strange formatting of code inside LLVM_DEBUG. NFC
Craig Topper [Thu, 31 May 2018 18:08:11 +0000 (18:08 +0000)]
[JumpThreading] Fix some strange formatting of code inside LLVM_DEBUG. NFC

I don't know if clang-format got confused here or what.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333675 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[ADT] Annotate immutable list/set/map update methods with LLVM_NODISCARD.
Artem Dergachev [Thu, 31 May 2018 17:32:29 +0000 (17:32 +0000)]
[ADT] Annotate immutable list/set/map update methods with LLVM_NODISCARD.

Because immutable data structures are, well, immutable, methods like "append",
"add", "set" create a copy of the list (set, map) instead of mutating the
existing map. If the updated object is discarded, it clearly indicates a bug.
Such bugs are introduced frequently, hence the warn_unused_result annotation.

Differential Revision: https://reviews.llvm.org/D47496

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333672 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[ADT] Make escaping fn conform to coding guidelines
Jonas Devlieghere [Thu, 31 May 2018 17:01:42 +0000 (17:01 +0000)]
[ADT] Make escaping fn conform to coding guidelines

As noted by Adrian on llvm-commits, PrintHTMLEscaped and PrintEscaped in
StringExtras did not conform to the LLVM coding guidelines. This commit
rectifies that.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333669 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[SimplifyLibcalls] [NFC] Cleanup, improvements
David Bolvansky [Thu, 31 May 2018 16:39:27 +0000 (16:39 +0000)]
[SimplifyLibcalls] [NFC] Cleanup, improvements

Summary:
* Use "find('%')" instead of loop to find '%' char (we already uses find('%') in optimizePrintFString..)
* Convert getParent() chains to getModule()/getFunction()

Reviewers: lebedev.ri, spatel

Reviewed By: spatel

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D47397

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333668 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[MC] Fallback on DWARF when generating compact unwind on AArch64
Francis Visoiu Mistrih [Thu, 31 May 2018 16:33:26 +0000 (16:33 +0000)]
[MC] Fallback on DWARF when generating compact unwind on AArch64

Instead of asserting when using the def_cfa directive with a register
different from fp, fallback on DWARF.

Easily triggered with:

.cfi_def_cfa x1, 32;

rdar://40249694

Differential Revision: https://reviews.llvm.org/D47593

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333667 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[GlobalISel][Mips] LegalizerInfo verifier: Adding LegalizerInfo::verify(...) call...
Roman Tereshin [Thu, 31 May 2018 16:16:49 +0000 (16:16 +0000)]
[GlobalISel][Mips] LegalizerInfo verifier: Adding LegalizerInfo::verify(...) call for Mips

Reviewers: aemerson, qcolombet

Reviewed By: qcolombet

Differential Revision: https://reviews.llvm.org/D46339

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333665 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[GlobalISel][AMDGPU] LegalizerInfo verifier: Adding LegalizerInfo::verify(...) call...
Roman Tereshin [Thu, 31 May 2018 16:16:48 +0000 (16:16 +0000)]
[GlobalISel][AMDGPU] LegalizerInfo verifier: Adding LegalizerInfo::verify(...) call for AMDGPU

Reviewers: aemerson, qcolombet

Reviewed By: qcolombet

Differential Revision: https://reviews.llvm.org/D46339

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333664 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[GlobalISel][ARM] LegalizerInfo verifier: Adding LegalizerInfo::verify(...) call...
Roman Tereshin [Thu, 31 May 2018 16:16:48 +0000 (16:16 +0000)]
[GlobalISel][ARM] LegalizerInfo verifier:  Adding LegalizerInfo::verify(...) call and fixing bugs exposed

Reviewers: aemerson, qcolombet

Reviewed By: qcolombet

Differential Revision: https://reviews.llvm.org/D46339

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333663 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[GlobalISel][X86] LegalizerInfo verifier: Adding LegalizerInfo::verify(...) call...
Roman Tereshin [Thu, 31 May 2018 16:16:47 +0000 (16:16 +0000)]
[GlobalISel][X86] LegalizerInfo verifier: Adding LegalizerInfo::verify(...) call and fixing bugs exposed

Reviewers: aemerson, qcolombet

Reviewed By: qcolombet

Differential Revision: https://reviews.llvm.org/D46339

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333662 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86][SSE] Recognise splat rotations and expand back to shift ops.
Simon Pilgrim [Thu, 31 May 2018 15:47:17 +0000 (15:47 +0000)]
[X86][SSE] Recognise splat rotations and expand back to shift ops.

Noticed while fixing PR37426, for splat rotations (rotation by an uniform value) its better to just expand back to shift ops than performing as a general non-uniform rotation.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333661 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86][AVX] Add peekThroughEXTRACT_SUBVECTORs helper (NFCI)
Simon Pilgrim [Thu, 31 May 2018 15:15:49 +0000 (15:15 +0000)]
[X86][AVX] Add peekThroughEXTRACT_SUBVECTORs helper (NFCI)

We often need this for AVX1 128-bit integer ops as they may have been split from a 256-bit source.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333660 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agomake GlobalValueSummary::getOriginalName() a const function
Aditya Kumar [Thu, 31 May 2018 15:15:33 +0000 (15:15 +0000)]
make GlobalValueSummary::getOriginalName() a const function

Differential Revision: https://reviews.llvm.org/D46962
Reviewers: craig.topper

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333659 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[DA] Fix direction vectors for weakZeroSrcSIV
David Green [Thu, 31 May 2018 14:55:29 +0000 (14:55 +0000)]
[DA] Fix direction vectors for weakZeroSrcSIV

Both weakZeroSrcSIV and weakZeroDstSIV are currently giving the same
direction vectors. Fix weakZeroSrcSIVtest by flipping the directions
it gives.

Differential Revision: https://reviews.llvm.org/D46678

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333658 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86] Introduce WriteFLDC for x87 constant loads.
Clement Courbet [Thu, 31 May 2018 14:22:01 +0000 (14:22 +0000)]
[X86] Introduce WriteFLDC for x87 constant loads.

Summary:
{FLDL2E, FLDL2T, FLDLG2, FLDLN2, FLDPI} were using WriteMicrocoded.

 - I've measured the values for Broadwell, Haswell, SandyBridge, Skylake.
 - For ZnVer1 and Atom, values were transferred form InstRWs.
 - For SLM and BtVer2, I've guessed some values :(

Reviewers: RKSimon, craig.topper, andreadb

Subscribers: gbedwell, llvm-commits

Differential Revision: https://reviews.llvm.org/D47585

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333656 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoUse -Wextra spelling instead of -W
Nico Weber [Thu, 31 May 2018 13:41:04 +0000 (13:41 +0000)]
Use -Wextra spelling instead of -W

No difference in behavior, but a bit easier to search for.
https://reviews.llvm.org/D47490

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333651 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[MCSchedule] Add the ability to compute the latency and throughput information for...
Andrea Di Biagio [Thu, 31 May 2018 13:30:42 +0000 (13:30 +0000)]
[MCSchedule] Add the ability to compute the latency and throughput information for MCInst.

This patch extends the MCSchedModel API with new methods that can be used to
obtain the latency and reciprocal througput information for an MCInst.

Scheduling models have recently gained the ability to resolve variant scheduling
classes associated with MCInst objects. Before, models were only able to resolve
a variant scheduling class from a MachineInstr object.

This patch is mainly required by D47374 to avoid regressing a pair of x86
specific -print-schedule tests for btver2. Patch D47374 introduces a new variant
class to teach the btver scheduling model (x86 target) how to correctly compute
the latency profile for some zero-idioms using the new scheduling predicates.

The new methods added by this patch would be mainly used by llc when flag
-print-schedule is specified. In particular, tests that contain inline assembly
require that code is parsed at code emission stage into a sequence of MCInst.
That forces the print-schedule functionality to query the latency/rthroughput
information for MCInst instructions too. If we don't expose this new API, then
we lose "-print-schedule" test coverage as soon as variant scheduling classes
are added to the x86 models.

The tablegen SubtargetEmitter changes teaches how to query latency profile
information using a object that derives from TargetSubtargetInfo. Note that this
should really have been part of r333286. To avoid code duplication, the logic
that "resolves" variant scheduling classes for MCInst, has been moved to a
common place in MC. That logic is used by the "resolveVariantSchedClass" methods
redefined in override by the tablegen'd GenSubtargetInfo classes.

Differential Revision: https://reviews.llvm.org/D47536

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333650 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoExtend the GlobalObject metadata interface
Benjamin Kramer [Thu, 31 May 2018 13:29:58 +0000 (13:29 +0000)]
Extend the GlobalObject metadata interface

- Make eraseMetadata return whether it changed something
- Wire getMetadata for a single MDNode efficiently into the attachment
map
- Add hasMetadata, which is less weird than checking getMetadata ==
nullptr on a multimap.

Use it to simplify code.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333649 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[mips] Guard all short instructions correctly.
Simon Dardis [Thu, 31 May 2018 12:47:01 +0000 (12:47 +0000)]
[mips] Guard all short instructions correctly.

Reviewers: smaksimovic, atanasyan, abeserminji

Differential Revision: https://reviews.llvm.org/D47533

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333645 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[InstCombine, ARM] Convert vld1 to llvm load
Alexandros Lamprineas [Thu, 31 May 2018 12:19:18 +0000 (12:19 +0000)]
[InstCombine, ARM] Convert vld1 to llvm load

Convert a vector load intrinsic into an llvm load instruction.
This is beneficial when the underlying object being addressed
comes from a constant, since we get constant-folding for free.

Differential Revision: https://reviews.llvm.org/D46273

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333643 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86] Extract latency of fldz/fld1 in separate classes.
Clement Courbet [Thu, 31 May 2018 11:41:27 +0000 (11:41 +0000)]
[X86] Extract latency of fldz/fld1 in separate classes.

Summary:
 - I've measured the values for Broadwell, Haswell, SandyBridge, Skylake.
 - For ZnVer1 and Atom, values were transferred form `InstRW`s.
 - For SLM and BtVer2, values are from Agner.

This is split off from https://reviews.llvm.org/D47377

Reviewers: RKSimon, andreadb

Subscribers: gbedwell, llvm-commits

Differential Revision: https://reviews.llvm.org/D47523

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333642 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86][SSE] Add support for detecting SUB(SPLAT_BV, SPLAT) cases for shift-rotate...
Simon Pilgrim [Thu, 31 May 2018 11:25:16 +0000 (11:25 +0000)]
[X86][SSE] Add support for detecting SUB(SPLAT_BV, SPLAT) cases for shift-rotate patterns.

This improves splat rotations (rotation by an uniform value), to avoid having to use the generic non-uniform shift code (extension to PR37426).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333641 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoDWARFAcceleratorTable: fix equal_range iterators
Pavel Labath [Thu, 31 May 2018 08:47:00 +0000 (08:47 +0000)]
DWARFAcceleratorTable: fix equal_range iterators

Summary:
Both (Apple and DWARF5) implementations of the iterators had bugs which
resulted in crashes if one attempted to iterate through the accelerator
tables all the way.

For the Apple tables, the issue was that we did not clear the DataOffset
field when we reached the end, which made our iterator compare unequal
to the "end" iterator. For the Dwarf5 tables, the problem was that we
incremented the CurrentIndex pointer and then used the incremented
(possibly invalid) pointer to check whether we have reached the end of
the index list.

The reason these bugs went undetected is because their only user
(dwarfdump) only ever searched for the first match. Besides allowing us
to test this fix, changing llvm-dwarfdump --find to display all matches
seems like a good improvement (it makes the behavior consistent with the
--name option), so I change llvm-dwarfdump to do that.

The existing tests would be sufficient to test this fix with the new
llvm-dwarfdump behavior, but I add a special test that demonstrates that
the tool indeed displays multiple results. The find.test test needed to
be tweaked a bit as the tool now does not print the ".debug_info
contents" header (also consistent with how --name works).

Reviewers: JDevlieghere, aprantl, dblaikie

Subscribers: mgrang, llvm-commits

Differential Revision: https://reviews.llvm.org/D47543

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333635 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[AArch64] Reverted rL333427 fixing Clang UnitTest Failure
Luke Geeson [Thu, 31 May 2018 08:27:53 +0000 (08:27 +0000)]
[AArch64] Reverted rL333427 fixing Clang UnitTest Failure

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333634 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[NFC] Factor out a method for further extension
Max Kazantsev [Thu, 31 May 2018 08:08:34 +0000 (08:08 +0000)]
[NFC] Factor out a method for further extension

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333633 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[llvm-exegesis][NFCI] Counter::Counter(): more useful msg on event open error
Roman Lebedev [Thu, 31 May 2018 07:08:26 +0000 (07:08 +0000)]
[llvm-exegesis][NFCI] Counter::Counter(): more useful msg on event open error

Summary:
I'm slowly looking into a new X86 scheduler model,
for AMD Bulldozer CPU, model 2 (bdver2, Piledriver).

And naturally, i have hit that assert :)
I happened to know what it meant, and how to fix it,
but that is not too common knowledge.

Reviewers: courbet, RKSimon

Reviewed By: courbet

Subscribers: tschuett, llvm-commits, craig.topper

Differential Revision: https://reviews.llvm.org/D47572

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333632 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoRevert rL333106 / D46814: [InstCombine] Fold unfolded masked merge pattern with varia...
Roman Lebedev [Thu, 31 May 2018 06:00:36 +0000 (06:00 +0000)]
Revert rL333106 / D46814: [InstCombine] Fold unfolded masked merge pattern with variable mask!

In post-commit review, Eric Christopher notes that many
new MSan warnings are being observed with this patch.

The probable reason is: if 'y' is undef here and we could
evaluate it twice and get different results.
We can't increase the number of uses of a value.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333631 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[lit] Fix windows cmd.exe test config for r333620
Joel E. Denny [Thu, 31 May 2018 05:48:33 +0000 (05:48 +0000)]
[lit] Fix windows cmd.exe test config for r333620

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333630 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[AMDGPU] Track occupancy in MFI
Stanislav Mekhanoshin [Thu, 31 May 2018 05:36:04 +0000 (05:36 +0000)]
[AMDGPU] Track occupancy in MFI

Keep track of achieved occupancy in SIMachineFunctionInfo.
At the moment we have a lot of duplicated or even missed code to
query and maintain occupancy info. Record it in the MFI and
query in a single call. Interfaces:

- getOccupancy() - returns current recorded achieved occupancy.
- getMinAllowedOccupancy() - returns lesser of the achieved occupancy
and the lowest occupancy we are ready to tolerate. For example if
a kernel is memory bound we are ready to tolerate 4 waves.
- limitOccupancy() - record occupancy level if we have to lower it.
- increaseOccupancy() - record occupancy if scheduler managed to
increase the occupancy.

MFI takes care of integrating different checks affecting occupancy,
including LDS use and waves-per-eu attribute. Note that scheduler
starts with not yet known register pressure, so has to record either
limit or increase in occupancy after it is done. Later passes can
just query a resulting value.

New interface is used in the active scheduler and NFC wrt its work.
Changes are also made to experimental schedulers to use it and record
an occupancy after they are done. Before the change waves-per-eu was
ignored by experimental schedulers and tolerance window for memory
bound kernels was not used.

Differential Revision: https://reviews.llvm.org/D47509

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333629 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoAMDGPU/R600: Make sure functions are cacheline aligned
Jan Vesely [Thu, 31 May 2018 04:08:08 +0000 (04:08 +0000)]
AMDGPU/R600: Make sure functions are cacheline aligned

v2: use "ensureAlignment"
    make functions cache line aligned
Fixes GPU hangs since r333219:
"AMDGPU: Split R600 AsmPrinter code into its own class"

Differential Revision: https://reviews.llvm.org/D47516

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333622 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[lit] Terminate ": RUN at line N" with ";" not "&&"
Joel E. Denny [Thu, 31 May 2018 03:40:37 +0000 (03:40 +0000)]
[lit] Terminate ": RUN at line N" with ";" not "&&"

This fixes projects/compiler-rt/test/fuzzer/sigusr.test, which was
broken by r333614.  The trouble was that "&&" changes the command for
which "$!" gives the pid.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333620 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[GlobalISel][Legalizer] LegalizerInfo verifier: Making LegalizerInfo::verify(......
Roman Tereshin [Thu, 31 May 2018 01:56:07 +0000 (01:56 +0000)]
[GlobalISel][Legalizer] LegalizerInfo verifier: Making LegalizerInfo::verify(...) errors fatal

Reviewers: aemerson, qcolombet

Reviewed By: qcolombet

Differential Revision: https://reviews.llvm.org/D46339

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333619 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[GlobalISel][AArch64] LegalizerInfo verifier: Fixing bugs exposed by LegalizerInfo...
Roman Tereshin [Thu, 31 May 2018 01:56:05 +0000 (01:56 +0000)]
[GlobalISel][AArch64] LegalizerInfo verifier: Fixing bugs exposed by LegalizerInfo::verify(...)

Reviewers: aemerson, qcolombet

Reviewed By: qcolombet

Differential Revision: https://reviews.llvm.org/D46339

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333618 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[lit] Report line number for failed RUN command
Joel E. Denny [Thu, 31 May 2018 00:55:32 +0000 (00:55 +0000)]
[lit] Report line number for failed RUN command

(Relands r333584, reverted in 333592.)

When debugging test failures with -vv (or -v in the case of the
internal shell), this makes it easier to locate the RUN line that
failed.  For example, clang's test/Driver/linux-ld.c has 892 total RUN
lines, and clang's test/Driver/arm-cortex-cpus.c has 424 RUN lines
after concatenation for line continuations.

When reading the generated shell script, this also makes it easier to
locate the RUN line that produced each command.

To support reporting RUN line numbers in the case of the internal
shell, this patch extends the internal shell to support the null
command, ":", except pipelines are not supported.

To support reporting RUN line numbers in the case of windows cmd.exe
as the external shell, this patch extends -vv to set "echo on" instead
of "echo off" in bat files.  (Support for windows cmd.exe as a lit
external shell will likely be dropped later, but I found out too
late.)

Reviewed By: delcypher, asmith, stella.stamenova, jmorse, lebedev.ri, rnk

Differential Revision: https://reviews.llvm.org/D44598

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333614 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[InstCombine] don't change the size of a select if it would mismatch its condition...
Sanjay Patel [Thu, 31 May 2018 00:16:58 +0000 (00:16 +0000)]
[InstCombine] don't change the size of a select if it would mismatch its condition operands' sizes

Don't always:
cast (select (cmp x, y), z, C) --> select (cmp x, y), (cast z), C'

This is something that came up as far back as D26556, and I lost track of it.
I suspect that this transform is part of the underlying problem that is
inspiring some of the recent proposals that seek to match larger patterns
that include a cast op. Even if that's not true, this transform causes
problems for codegen (particularly with vector types).

A transform to actively match the size of cmp and select operand sizes should
follow. This patch just removes the harmful canonicalization in the other
direction.

Differential Revision: https://reviews.llvm.org/D47163

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333611 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[InstCombine] don't negate constant expression with fsub (PR37605)
Sanjay Patel [Wed, 30 May 2018 23:55:12 +0000 (23:55 +0000)]
[InstCombine] don't negate constant expression with fsub (PR37605)

X + (-C) would be transformed back into X - C, so infinite loop:
https://bugs.llvm.org/show_bug.cgi?id=37605

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333610 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[llvm-cov] Use the new PrintHTMLEscaped utility
Vedant Kumar [Wed, 30 May 2018 23:35:14 +0000 (23:35 +0000)]
[llvm-cov] Use the new PrintHTMLEscaped utility

This removes some duplicate logic to escape characters in HTML output.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333608 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoAMDGPU: Split AMDGPUTTI into GCNTTI and R600TTI
Tom Stellard [Wed, 30 May 2018 22:55:35 +0000 (22:55 +0000)]
AMDGPU: Split AMDGPUTTI into GCNTTI and R600TTI

Reviewers: arsenm, nhaehnle

Reviewed By: arsenm

Subscribers: kzhuravl, wdng, yaxunl, dstuttard, tpr, llvm-commits, t-tye

Differential Revision: https://reviews.llvm.org/D47359

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333605 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[LowerTypeTests] Discard extern_weak linkage for definitions
Vlad Tsyrklevich [Wed, 30 May 2018 22:39:52 +0000 (22:39 +0000)]
[LowerTypeTests] Discard extern_weak linkage for definitions

Summary:
Fix PR37625. It's possible for an extern_weak declaration to be emitted
to the merged module when a definition exists in the ThinLTO portion of
the build; discard the linkage on the declaration in that case.
(otherwise we copy the linkage to the alias to the jumptable and fail)

Reviewers: pcc

Reviewed By: pcc

Subscribers: mehdi_amini, llvm-commits, kcc

Differential Revision: https://reviews.llvm.org/D47494

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333604 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[NewGVN] Fix set comparison; reflow comment
George Burgess IV [Wed, 30 May 2018 22:24:08 +0000 (22:24 +0000)]
[NewGVN] Fix set comparison; reflow comment

Looks like we intended to compare this->Members with Other->Members
here, but ended up comparing this->Members with this->Members. Oops. :)

Since CongruenceClass::Members is a SmallPtrSet anyway, we can probably
skip building std::sets if we're willing to write a bit more code.

This appears to be no functional change (for sufficiently lax values of
"no"): this equality check was only being called inside of an assert.
So, worst case, we'll catch more bugs in the form of assertion failures.

Thanks to d0k for noting this!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333601 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[GlobalISel][AArch64] LegalizerInfo verifier: Adding LegalizerInfo::verify(...) call...
Roman Tereshin [Wed, 30 May 2018 22:10:04 +0000 (22:10 +0000)]
[GlobalISel][AArch64] LegalizerInfo verifier: Adding LegalizerInfo::verify(...) call w/o fixing bugs

This is to make it clear what kind of bugs the LegalizerInfo::verifier
is able to catch and test its output

Reviewers: aemerson, qcolombet

Reviewed By: aemerson

Differential Revision: https://reviews.llvm.org/D46338

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333597 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoRevert r333584: [lit] Report line number for failed RUN command
Joel E. Denny [Wed, 30 May 2018 21:07:27 +0000 (21:07 +0000)]
Revert r333584: [lit] Report line number for failed RUN command

It breaks test-suite.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333592 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[TableGen] Avoid leaking TreePatternNodes by using shared_ptr.
Florian Hahn [Wed, 30 May 2018 21:00:18 +0000 (21:00 +0000)]
[TableGen] Avoid leaking TreePatternNodes by using shared_ptr.

By using std::shared_ptr for TreePatternNode, we can avoid leaking them.

Reviewers: craig.topper, dsanders, stoklund, tstellar, zturner

Reviewed By: dsanders

Differential Revision: https://reviews.llvm.org/D47463

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333591 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[ADT] Add unit test for PrintHTMLEscaped
Jonas Devlieghere [Wed, 30 May 2018 20:47:18 +0000 (20:47 +0000)]
[ADT] Add unit test for PrintHTMLEscaped

Add unit tests for PrintHTMLEscaped which was added in r333565.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333590 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[IRBuilder] Add APIs for creating calls to atomic memmove and memset intrinsics....
Daniel Neilson [Wed, 30 May 2018 20:02:56 +0000 (20:02 +0000)]
[IRBuilder] Add APIs for creating calls to atomic memmove and memset intrinsics. (NFC)

Summary:
Creating the IRBuilder methods:
 CreateElementUnorderedAtomicMemSet
 CreateElementUnorderedAtomicMemMove

These mirror the methods that create calls to the regular (non-atomic) memmove and
memset intrinsics.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333588 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoFix Wdocumentation warning. NFCI.
Simon Pilgrim [Wed, 30 May 2018 19:50:26 +0000 (19:50 +0000)]
Fix Wdocumentation warning. NFCI.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333586 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[lit] Report line number for failed RUN command
Joel E. Denny [Wed, 30 May 2018 19:42:27 +0000 (19:42 +0000)]
[lit] Report line number for failed RUN command

(Relands r330755 (reverted in r330848) with fix for PR37239.)

When debugging test failures with -vv (or -v in the case of the
internal shell), this makes it easier to locate the RUN line that
failed.  For example, clang's test/Driver/linux-ld.c has 892 total RUN
lines, and clang's test/Driver/arm-cortex-cpus.c has 424 RUN lines
after concatenation for line continuations.

When reading the generated shell script, this also makes it easier to
locate the RUN line that produced each command.

To support reporting RUN line numbers in the case of the internal
shell, this patch extends the internal shell to support the null
command, ":", except pipelines are not supported.

To support reporting RUN line numbers in the case of windows cmd.exe
as the external shell, this patch extends -vv to set "echo on" instead
of "echo off" in bat files.  (Support for windows cmd.exe as a lit
external shell will likely be dropped later, but I found out too
late.)

Reviewed By: delcypher, asmith, stella.stamenova, jmorse, lebedev.ri, rnk

Differential Revision: https://reviews.llvm.org/D44598

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333584 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[CalledValuePropagation] Just use a sorted vector instead of a set.
Benjamin Kramer [Wed, 30 May 2018 19:31:11 +0000 (19:31 +0000)]
[CalledValuePropagation] Just use a sorted vector instead of a set.

The set properties are never used, so a vector is enough. No
functionality change intended.

While there add some std::moves to SparseSolver.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333582 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agollvm-objcopy: Set sh_link to 0 on unrecognized symtab-linked sections.
Peter Collingbourne [Wed, 30 May 2018 19:30:39 +0000 (19:30 +0000)]
llvm-objcopy: Set sh_link to 0 on unrecognized symtab-linked sections.

Per discussion on the generic-abi mailing list:
https://groups.google.com/forum/#!topic/generic-abi/MPr8TVtnVn4

An object file manipulation tool must either write out a symbol
table with the same number of entries as the original symbol table
and in the same order, or if this is impossible, refuse to operate
on the object file if it has unrecognized sections that are linked
to the symtab section. However, existing tools (namely GNU strip,
GNU objcopy and ld.{bfd,gold,lld} -r) do not comply with this at
present: they change symbol table indexes and set sh_link to 0 on
the unrecognized symtab-linked sections.

We intend to use the latter as a (temporary) signal that a tool has
operated on a proposed new symtab-linked section and invalidated the
symbol table indexes. However, llvm-objcopy currently keeps sh_link
pointing to the new symtab section. This patch changes llvm-objcopy
to set sh_link to 0 to match the behaviour of the other tools.

Differential Revision: https://reviews.llvm.org/D47404

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333581 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86][SSE] Pulled out splat detection helper from LowerScalarVariableShift (NFCI)
Simon Pilgrim [Wed, 30 May 2018 19:16:59 +0000 (19:16 +0000)]
[X86][SSE] Pulled out splat detection helper from LowerScalarVariableShift (NFCI)

Created the IsSplatValue helper from the splat detection code in LowerScalarVariableShift as a first NFC step towards improving support for splat rotations, which is an extension of PR37426.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333580 91177308-0d34-0410-b5e6-96231b3b80d8

6 years agoReverted r333424 as it broke multiple build bots and left unfixed for a long time
Galina Kistanova [Wed, 30 May 2018 18:51:08 +0000 (18:51 +0000)]
Reverted r333424 as it broke multiple build bots and left unfixed for a long time

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333578 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[GlobalISel][Legalizer] LegalizerInfo verifier: check rules cover type indices
Roman Tereshin [Wed, 30 May 2018 18:45:32 +0000 (18:45 +0000)]
[GlobalISel][Legalizer] LegalizerInfo verifier: check rules cover type indices

This commit adds a simple verifier that tracks type indices being
touched by legalization rules' builders.

Every target will now have an opportunity to call
LegalizerInfo::verify(...) at the end of its derived LegalizerInfo's
constructor and check there are no obvious mistakes like checking only
first type for an opcode that has more than one type index and therefore
implicitly declaring any type for the second (and higher) type index
legal.

The check is only ran in assert builds and should have very minor
performance impact in assert builds and none in release builds.

This commit does not add LegalizerInfo::verify(...) calls to
target-specific legalizers, look for separate commits for that.

This commit also doesn't make the verification errors fatal, only
produces an error message, look for a later commit that does.

Reviewers: aemerson, qcolombet

Reviewed By: aemerson

Differential Revision: https://reviews.llvm.org/D46338

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333576 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[X86] Update the fast-isel tests for _mm_rcp_ss, _mm_rsqrt_ss, and _mm_sqrt_ss to...
Craig Topper [Wed, 30 May 2018 18:30:44 +0000 (18:30 +0000)]
[X86] Update the fast-isel tests for _mm_rcp_ss, _mm_rsqrt_ss, and _mm_sqrt_ss to match clang codegen after r333572.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333573 91177308-0d34-0410-b5e6-96231b3b80d8

6 years ago[dsymutil] Escape HTML special characters in plist.
Jonas Devlieghere [Wed, 30 May 2018 17:47:11 +0000 (17:47 +0000)]
[dsymutil] Escape HTML special characters in plist.

When printing string in the Plist, we weren't escaping the characters
which lead to invalid XML. This patch adds the escape logic to
StringExtras.

rdar://39785334

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333565 91177308-0d34-0410-b5e6-96231b3b80d8