OSDN Git Service
Dmitry Preobrazhensky [Mon, 12 Mar 2018 17:29:24 +0000 (17:29 +0000)]
[AMDGPU][MC][GFX8] Added BUFFER_STORE_LDS_DWORD Instruction
See bug 36558: https://bugs.llvm.org/show_bug.cgi?id=36558
Differential Revision: https://reviews.llvm.org/D43950
Reviewers: artem.tamazov, arsenm
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327299
91177308-0d34-0410-b5e6-
96231b3b80d8
Craig Topper [Mon, 12 Mar 2018 17:24:50 +0000 (17:24 +0000)]
[X86] Add all of the MRM_C0-MRM_FF forms to the switch in RecognizableInstr::emitInstructionSpecifier. NFC
Remove the special casing for MRM_F8 by using HANDLE_OPTIONAL.
This should be NFC as the forms that were missing aren't used by any instructions today. They exist in the enum so that we didn't have to put them in one at a time when instructions are added. But looks like we failed here.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327298
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Mon, 12 Mar 2018 17:07:08 +0000 (17:07 +0000)]
[X86][Btver2] Prefix all scheduler defs. NFCI.
These are all global, so prefix with 'J' to help prevent accidental name clashes with other models.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327296
91177308-0d34-0410-b5e6-
96231b3b80d8
Craig Topper [Mon, 12 Mar 2018 16:43:11 +0000 (16:43 +0000)]
[X86] Remove use of MVT class from the ShuffleDecode library.
MVT belongs to the CodeGen layer, but ShuffleDecode is used by the X86 InstPrinter which is part of the MC layer. This only worked because MVT is completely implemented in a header file with no other library dependencies.
Differential Revision: https://reviews.llvm.org/D44353
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327292
91177308-0d34-0410-b5e6-
96231b3b80d8
Yaxun Liu [Mon, 12 Mar 2018 16:34:06 +0000 (16:34 +0000)]
[AMDGPU] Fix lowering enqueue kernel when kernel has no name
Since the enqueued kernels have internal linkage, their names may be dropped.
In this case, give them unique names __amdgpu_enqueued_kernel or
__amdgpu_enqueued_kernel.n where n is a sequential number starting from 1.
Differential Revision: https://reviews.llvm.org/D44322
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327291
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Mon, 12 Mar 2018 16:02:56 +0000 (16:02 +0000)]
[X86][Btver2] Extend JWriteResFpuPair to accept resource/uop counts. NFCI.
This allows the single resource classes (VarBlend, MPSAD, VarVecShift) to use the JWriteResFpuPair macro.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327289
91177308-0d34-0410-b5e6-
96231b3b80d8
Dmitry Preobrazhensky [Mon, 12 Mar 2018 15:55:08 +0000 (15:55 +0000)]
[AMDGPU][MC][DOC] Updated AMD GPU assembler description
See bug 36572: https://bugs.llvm.org/show_bug.cgi?id=36572
Differential Revision: https://reviews.llvm.org/D44020
Reviewers: artem.tamazov, vpykhtin
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327288
91177308-0d34-0410-b5e6-
96231b3b80d8
Sanjay Patel [Mon, 12 Mar 2018 15:47:32 +0000 (15:47 +0000)]
[InstSimplify] add test for m_NegZero with undef elt; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327287
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Mon, 12 Mar 2018 15:29:00 +0000 (15:29 +0000)]
[X86][Btver2] Use JWriteResFpuPair wrapper for AES/CLMUL/HADD scheduler cases. NFCI.
These are single pipe and have the default resource/uop counts like JWriteResFpuPair so there's no need to handle them separately.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327283
91177308-0d34-0410-b5e6-
96231b3b80d8
Krzysztof Parzyszek [Mon, 12 Mar 2018 15:20:36 +0000 (15:20 +0000)]
[Hexagon] Add REQUIRES: asserts to testcases that use -stats
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327281
91177308-0d34-0410-b5e6-
96231b3b80d8
Krzysztof Parzyszek [Mon, 12 Mar 2018 15:11:16 +0000 (15:11 +0000)]
[Hexagon] Add REQUIRES: asserts to testcases that use -debug-only
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327279
91177308-0d34-0410-b5e6-
96231b3b80d8
Dmitry Preobrazhensky [Mon, 12 Mar 2018 15:03:34 +0000 (15:03 +0000)]
[AMDGPU][MC] Corrected GATHER4 opcodes
See bug 36252: https://bugs.llvm.org/show_bug.cgi?id=36252
Differential Revision: https://reviews.llvm.org/D43874
Reviewers: artem.tamazov, arsenm
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327278
91177308-0d34-0410-b5e6-
96231b3b80d8
Benjamin Kramer [Mon, 12 Mar 2018 15:02:59 +0000 (15:02 +0000)]
[llvm-readobj] Make header self-contained
Patch by Dean Sturtevant!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327277
91177308-0d34-0410-b5e6-
96231b3b80d8
Puyan Lotfi [Mon, 12 Mar 2018 14:51:19 +0000 (14:51 +0000)]
Updating MIR Language Reference to include new syntax for symbols and physregs.
External symbols now get the sigil '&' while physical registers get the sigil
'$' for their prefix.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327276
91177308-0d34-0410-b5e6-
96231b3b80d8
Jonas Devlieghere [Mon, 12 Mar 2018 14:45:08 +0000 (14:45 +0000)]
[DebugInfo] Replace unreachable with None
Invalid user input should not trigger assertions and unreachables. We
already return an Option so we should just return None here.
Fixes https://bugs.chromium.org/p/oss-fuzz/issues/detail?id=5532
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327274
91177308-0d34-0410-b5e6-
96231b3b80d8
Sam McCall [Mon, 12 Mar 2018 14:40:48 +0000 (14:40 +0000)]
[Hexagon] fix 'must explicitly initialize the const member' error which clang 3.8 emits
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327273
91177308-0d34-0410-b5e6-
96231b3b80d8
Krzysztof Parzyszek [Mon, 12 Mar 2018 14:01:28 +0000 (14:01 +0000)]
[Hexagon] Add more lit tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327271
91177308-0d34-0410-b5e6-
96231b3b80d8
Matt Arsenault [Mon, 12 Mar 2018 13:35:53 +0000 (13:35 +0000)]
AMDGPU/GlobalISel: Legality and RegBankInfo for G_{INSERT|EXTRACT}_VECTOR_ELT
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327269
91177308-0d34-0410-b5e6-
96231b3b80d8
Matt Arsenault [Mon, 12 Mar 2018 13:35:49 +0000 (13:35 +0000)]
AMDGPU/GlobalISel: InstrMapping for G_MERGE_VALUES
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327268
91177308-0d34-0410-b5e6-
96231b3b80d8
Matt Arsenault [Mon, 12 Mar 2018 13:35:43 +0000 (13:35 +0000)]
AMDGPU/GlobalISel: Make some G_MERGE_VALUEs legal
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327267
91177308-0d34-0410-b5e6-
96231b3b80d8
Hans Wennborg [Mon, 12 Mar 2018 13:22:12 +0000 (13:22 +0000)]
Revert r326710 "Fuzzer: remove temporary files after we're done with them."
This broke some Windows buildbots; see llvm-commits thread.
> These were just copies of the relevant fuzzer binary with (presumably)
> meaningful suffixes, but accounted for more than 10% of my build
> directory (> 8GB). Hard drive space is cheap, but not that cheap.
(Also reverts follow-up r326710 which didn't help.)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327266
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Dardis [Mon, 12 Mar 2018 13:16:12 +0000 (13:16 +0000)]
[mips] Split out ASEPredicate from InsnPredicates (NFC)
This simplifies tagging instructions with the correct ISA and ASE, albeit making
instruction definitions a bit more verbose.
Reviewers: atanasyan, abeserminji
Differential Revision: https://reviews.llvm.org/D44299
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327265
91177308-0d34-0410-b5e6-
96231b3b80d8
Nico Weber [Mon, 12 Mar 2018 12:47:27 +0000 (12:47 +0000)]
MC intel asm parser: Allow @ at the start of function names.
Ports parts of r193000 to the intel parser. Fixes part of PR36676.
https://reviews.llvm.org/D44359
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327262
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Mon, 12 Mar 2018 12:30:04 +0000 (12:30 +0000)]
[X86][SSE] createVariablePermute - PSHUFB requires SSSE3 not just SSE3
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327259
91177308-0d34-0410-b5e6-
96231b3b80d8
Jonas Devlieghere [Mon, 12 Mar 2018 11:01:05 +0000 (11:01 +0000)]
Fix compilation on Darwin with expensive checks.
After r327219 was landed, the bot with expensive checks on GreenDragon
started failing. The problem was missing symbols `regex_t` and
`regmatch_t` in `xlocale/_regex.h`. The latter was included because
after the change in r327219, `random` is needed, which transitively
includes `xlocale.h.` which in turn conditionally includes
`xlocale/_regex.h` when _REGEX_H_ is defined. Because this is the header
guard in `regex_impl.h` and because `regex_impl.h` was included before
the other LLVM includes, `xlocale/_regex.h` was included without the
necessary types being available.
This commit fixes this by moving the include of `regex_impl.h` all the
way down. I also added a comment to stress the significance of its
position.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327256
91177308-0d34-0410-b5e6-
96231b3b80d8
Eugene Leviant [Mon, 12 Mar 2018 10:30:50 +0000 (10:30 +0000)]
[ThinLTO] Recommit of import global variables
This wasreverted in r326638 due to link problems and fixed
afterwards
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327254
91177308-0d34-0410-b5e6-
96231b3b80d8
Justin Lebar [Mon, 12 Mar 2018 09:26:09 +0000 (09:26 +0000)]
Back out "Re-land: Teach CorrelatedValuePropagation to reduce the width of udiv/urem instructions."
This reverts r326908, originally landed as D44102.
Reverted for causing performance regressions on x86. (These regressions
are not yet understood.)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327252
91177308-0d34-0410-b5e6-
96231b3b80d8
Craig Topper [Mon, 12 Mar 2018 05:35:02 +0000 (05:35 +0000)]
[X86] Don't compute known bits twice for the same SDValue in LowerMUL.
We called MaskedValueIsZero with two different masks, but underneath that calls computeKnownBits before applying the mask. This means we compute the same known bits twice due to the two calls. Instead just call computeKnownBits directly and apply the two masks ourselves.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327251
91177308-0d34-0410-b5e6-
96231b3b80d8
Serguei Katkov [Mon, 12 Mar 2018 03:50:07 +0000 (03:50 +0000)]
[CGP] Fix the remove of matched phis in complex addressing mode
When we replace the Phi we created with matched ones it is possible that
there are two identical phi nodes in IR. And matcher is smart enough to find that
new created phi matches both of them. So we try to replace our phi node with
matched ones twice and what is bad we delete our phi node twice causing a crash.
As soon as we found that we have two identical Phi nodes it makes sense to do
a clean-up and replace one phi node by other one.
The patch implements it.
Reviewers: john.brawn, reames
Reviewed By: john.brawn
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D43758
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327250
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Sun, 11 Mar 2018 19:22:13 +0000 (19:22 +0000)]
[X86][MMX] Support MMX build vectors to avoid SSE usage (PR29222)
64-bit MMX vector generation usually ends up lowering into SSE instructions before being spilled/reloaded as a MMX type.
This patch creates a MMX vector from MMX source values, taking the lowest element from each source and constructing broadcasts/build_vectors with direct calls to the MMX PUNPCKL/PSHUFW intrinsics.
We're missing a few consecutive load combines that could be handled in a future patch if that would be useful - my main interest here is just avoiding a lot of the MMX/SSE crossover.
Differential Revision: https://reviews.llvm.org/D43618
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327247
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Sun, 11 Mar 2018 18:28:37 +0000 (18:28 +0000)]
[X86][AVX512] Added more non-VLX test cases
Cleaned up check prefixes so that they actually share a bit more
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327246
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Sun, 11 Mar 2018 17:23:54 +0000 (17:23 +0000)]
[X86][AVX] createVariablePermute - scale v16i16 variable permutes to use v32i8 codegen
XOP was already doing this, and now AVX performs v32i8 variable permutes as well.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327245
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Sun, 11 Mar 2018 17:00:46 +0000 (17:00 +0000)]
[X86][AVX] createVariablePermute - widen permutes for cases where the source vector is wider than the destination type
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327244
91177308-0d34-0410-b5e6-
96231b3b80d8
Sanjay Patel [Sun, 11 Mar 2018 16:45:31 +0000 (16:45 +0000)]
[InstCombine] add tests for casted sign-bit cmp (PR36682); NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327243
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Sun, 11 Mar 2018 16:28:11 +0000 (16:28 +0000)]
[X86][AVX] createVariablePermute - use PSHUFB+PCMPGT+SELECT for v32i8 variable permutes
Same as the VPERMILPS/VPERMILPD approach for v8f32/v4f64 cases, rely on PSHUFB using bits[3:0] for indexing - we can ignore the sign bit (zero element) as those index vector values are considered undefined. The select between the lo/hi permute results based on the index size.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327242
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Sun, 11 Mar 2018 14:31:55 +0000 (14:31 +0000)]
Fix for buildbots which didn't like makeArrayRef with initializer lists.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327241
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Sun, 11 Mar 2018 14:04:53 +0000 (14:04 +0000)]
[X86][SSE] Generalized SplitBinaryOpsAndApply to SplitOpsAndApply to support any number of ops.
I've kept SplitBinaryOpsAndApply as a wrapper to avoid a lot of makeArrayRef code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327240
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Sun, 11 Mar 2018 11:52:26 +0000 (11:52 +0000)]
[X86][AVX] createVariablePermute - use 2xVPERMIL+PCMPGT+SELECT for v8i32/v8f32 and v4i64/v4f64 variable permutes
As VPERMILPS/VPERMILPD only selects elements based on the bits[1:0]/bit[1] then we can permute both the (repeated) lo/hi 128-bit vectors in each case and then select between these results based on whether the index was for for lo/hi.
For v4i64/v4f64 this avoids some rather nasty v4i64 multiples on the AVX2 implementation, which seems to be worse than the extra port5 pressure from the additional shuffles/blends.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327239
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Sun, 11 Mar 2018 11:19:19 +0000 (11:19 +0000)]
[X86][AVX512] createVariablePermute - Non-VLX targets can widen v4i64/v8f64 variable permutes to v8i64/v8f64
Permutes in the upper elements will be undefined, but they will be discarded anyway.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327238
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Sun, 11 Mar 2018 10:50:48 +0000 (10:50 +0000)]
[x86][SSE] Add widenSubVector helper. NFCI.
Helper function to insert a subvector into the bottom elements of a larger zero/undef vector with the same scalar type.
I've converted a couple of INSERT_SUBVECTOR calls to use it, there are plenty more although in some cases I was worried it might make the code more ambiguous.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327236
91177308-0d34-0410-b5e6-
96231b3b80d8
George Burgess IV [Sun, 11 Mar 2018 04:16:12 +0000 (04:16 +0000)]
[MemorySSA] Fix comment + remove redundant dyn_casts; NFC
StartingAccess is already a MemoryUseOrDef.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327235
91177308-0d34-0410-b5e6-
96231b3b80d8
Michael Bedy [Sun, 11 Mar 2018 03:27:50 +0000 (03:27 +0000)]
Test commit - change comment slightly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327234
91177308-0d34-0410-b5e6-
96231b3b80d8
Nico Weber [Sun, 11 Mar 2018 03:17:34 +0000 (03:17 +0000)]
Add REQUIRES: arm-registered-target to test using an arm-apple-ios triple.
Else, the test fails in LLVM_TARGETS_TO_BUILD=X86 builds like so:
bin/llvm-mc: : error: unable to get target for 'arm64-apple-ios7.0.0'
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327233
91177308-0d34-0410-b5e6-
96231b3b80d8
Andrea Di Biagio [Sun, 11 Mar 2018 00:51:33 +0000 (00:51 +0000)]
[TargetSchedule] Minor refactor in computeInstrLatency. NFC
The intent of revision r300311 was to add a check for invalid scheduling class
descriptors. However, it ended up adding a redundant call in a basic block that
should not be reachable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327231
91177308-0d34-0410-b5e6-
96231b3b80d8
George Burgess IV [Sat, 10 Mar 2018 23:22:46 +0000 (23:22 +0000)]
Revert r327199: "Clean up a temp file on the buildbots"
"I'll revert this tomorrow," I said yesterday. This should've reached
all the bots it can by now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327230
91177308-0d34-0410-b5e6-
96231b3b80d8
Craig Topper [Sat, 10 Mar 2018 21:30:46 +0000 (21:30 +0000)]
[X86] Add comments to the end of FMA3 instructions to make the operation clear
Summary:
There are 3 different operand orders for FMA instructions so figuring out the exact operation being performed requires a lot of thought.
This patch adds a comment to the end of the assembly line to print the exact operation.
I think I've got all the instructions in here except the ones with builtin rounding.
I didn't update all tests, but I assume we can get them as we regenerate tests in the future.
Reviewers: spatel, v_klochkov, RKSimon
Reviewed By: spatel
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D44345
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327225
91177308-0d34-0410-b5e6-
96231b3b80d8
Andrea Di Biagio [Sat, 10 Mar 2018 20:52:59 +0000 (20:52 +0000)]
[llvm-mca] Fix use-of-uninitialized-value error reported by the MemorySanitizer.
This should make the buildbots green again.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327223
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Sat, 10 Mar 2018 19:49:59 +0000 (19:49 +0000)]
[X86][XOP] createVariablePermute - use VPERMIL2 for v8i32/v4i64 variable permutes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327222
91177308-0d34-0410-b5e6-
96231b3b80d8
Martin Storsjo [Sat, 10 Mar 2018 19:05:21 +0000 (19:05 +0000)]
[AArch64] Implement native TLS for Windows
Differential Revision: https://reviews.llvm.org/D43971
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327220
91177308-0d34-0410-b5e6-
96231b3b80d8
Mandeep Singh Grang [Sat, 10 Mar 2018 18:59:14 +0000 (18:59 +0000)]
[ADT] Shuffle containers before sorting to uncover non-deterministic behavior
Summary:
std::sort and array_pod_sort both use non-stable sorting algorithms.
This means that the relative order of elements with the same key is
undefined. This patch is an attempt to uncover such scenarios by
randomly shuffling all containers before sorting, if EXPENSIVE_CHECKS
is enabled.
Here's the bugzilla for this: https://bugs.llvm.org/show_bug.cgi?id=35135
Reviewers: dblaikie, dexonsmith, chandlerc, efriedma, RKSimon
Reviewed By: RKSimon
Subscribers: fhahn, davide, RKSimon, vsk, mgorny, llvm-commits
Differential Revision: https://reviews.llvm.org/D39245
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327219
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Sat, 10 Mar 2018 18:33:29 +0000 (18:33 +0000)]
[X86][XOP] createVariablePermute - use VPPERM for v16i16 variable permutes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327218
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Sat, 10 Mar 2018 18:12:35 +0000 (18:12 +0000)]
[X86][SSE] createVariablePermute - create index scaling helper. NFCI.
This will help in some future changes for custom lowering.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327217
91177308-0d34-0410-b5e6-
96231b3b80d8
Andrea Di Biagio [Sat, 10 Mar 2018 17:40:25 +0000 (17:40 +0000)]
[llvm-mca] BackendStatistics: early exit from method printSchedulerUsage if the
no scheduler resources were consumed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327215
91177308-0d34-0410-b5e6-
96231b3b80d8
Andrea Di Biagio [Sat, 10 Mar 2018 16:55:07 +0000 (16:55 +0000)]
[llvm-mca] Views are now independent from resource masks. NFCI
This change removes method Backend::getProcResourceMasks() and simplifies some
logic in the Views. This effectively removes yet another dependency between the
views and the Backend.
No functional change intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327214
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Sat, 10 Mar 2018 16:51:45 +0000 (16:51 +0000)]
[X86][XOP] createVariablePermute - use VPPERM for v32i8 variable permutes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327213
91177308-0d34-0410-b5e6-
96231b3b80d8
Sanjay Patel [Sat, 10 Mar 2018 16:51:28 +0000 (16:51 +0000)]
[InstSimplify] fp_binop X, undef --> NaN
The variable operand could be NaN, so it's always safe to propagate NaN.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327212
91177308-0d34-0410-b5e6-
96231b3b80d8
Sanjay Patel [Sat, 10 Mar 2018 16:39:59 +0000 (16:39 +0000)]
[AMDGPU] fix tests to be independent of FP undef
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327211
91177308-0d34-0410-b5e6-
96231b3b80d8
Sanjay Patel [Sat, 10 Mar 2018 16:14:05 +0000 (16:14 +0000)]
[PowerPC] fix tests to be independent of FP undef
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327210
91177308-0d34-0410-b5e6-
96231b3b80d8
Matt Arsenault [Sat, 10 Mar 2018 16:05:35 +0000 (16:05 +0000)]
AMDGPU: Fix crash when constant folding with physreg operand
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327209
91177308-0d34-0410-b5e6-
96231b3b80d8
Sanjay Patel [Sat, 10 Mar 2018 15:56:25 +0000 (15:56 +0000)]
[ConstantFold] fp_binop AnyConstant, undef --> NaN
With the updated LangRef ( D44216 / rL327138 ) in place, we can proceed with more constant folding.
I'm intentionally taking the conservative path here: no matter what the constant or the FMF, we can
always fold to NaN. This is because the undef operand can be chosen as NaN, and in our simplified
default FP env, nothing else happens - NaN just propagates to the result. If we find some way/need
to propagate undef instead, that can be added subsequently.
The tests show that we always choose the same quiet NaN constant (0x7FF8000000000000 in IR text).
There were suggestions to improve that with a 'NaN' string token or not always print a 64-bit hex
value, but those are independent changes. We might also consider setting/propagating the payload of
NaN constants as an enhancement.
Differential Revision: https://reviews.llvm.org/D44308
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327208
91177308-0d34-0410-b5e6-
96231b3b80d8
Florian Hahn [Sat, 10 Mar 2018 14:53:44 +0000 (14:53 +0000)]
[PartialInlining] Use isInlineViable to detect constructs preventing inlining.
Use isInlineViable to prevent inlining of functions with non-inlinable
constructs, in case cost analysis is skipped.
Reviewers: efriedma, sfertile, davide, davidxl
Reviewed By: efriedma
Differential Revision: https://reviews.llvm.org/D42846
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327207
91177308-0d34-0410-b5e6-
96231b3b80d8
Craig Topper [Sat, 10 Mar 2018 06:05:13 +0000 (06:05 +0000)]
[X86] Add a missing EVEX instruction to EmitAnyX86InstComments.
The equivalent SSE and VEX instruction are already there.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327205
91177308-0d34-0410-b5e6-
96231b3b80d8
Sam Clegg [Sat, 10 Mar 2018 05:34:04 +0000 (05:34 +0000)]
[WebAssembly] Object: Add accessor for wasm symbols
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327203
91177308-0d34-0410-b5e6-
96231b3b80d8
Craig Topper [Sat, 10 Mar 2018 05:15:22 +0000 (05:15 +0000)]
[X86] Move the AC_EVEX_2_VEX AsmComments enum to X86InstrInfo.h from X86InstComments.h.
X86InstComments.h is used by tools that only have the MC layer. We shouldn't be importing a file from CodeGen into this.
X86InstrInfo.h isn't a great place, but I couldn't find a better one.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327202
91177308-0d34-0410-b5e6-
96231b3b80d8
George Burgess IV [Sat, 10 Mar 2018 03:34:43 +0000 (03:34 +0000)]
[AliasAnalysis] Shrink AliasResults; NFC
We're persisting AliasResults in some places in MemorySSA, so the size
of these now matters a little bit (well, 8 regular-sized bits, to be
precise).
Do the same for ModRefInfo for consistency.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327201
91177308-0d34-0410-b5e6-
96231b3b80d8
Craig Topper [Sat, 10 Mar 2018 03:12:00 +0000 (03:12 +0000)]
[X86] Rewrite printMasking code in X86InstComments to use TSFlags to determine whether the instruction is masked.
This should have been NFC, but it looks like we were missing PUNPCKLHQDQ/PUNPCKLQDQ instructions in there.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327200
91177308-0d34-0410-b5e6-
96231b3b80d8
George Burgess IV [Sat, 10 Mar 2018 02:51:10 +0000 (02:51 +0000)]
Clean up a temp file on the buildbots.
r327100 made us stop producing vecreduce-propagate-sd-flags.s, but it's
still sticking around on some bots. This makes the bots unhappy.
I'll revert this tomorrow.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327199
91177308-0d34-0410-b5e6-
96231b3b80d8
Rafael Espindola [Sat, 10 Mar 2018 02:42:14 +0000 (02:42 +0000)]
Go back to sometimes assuming intristics are local.
This fixes pr36674.
While it is valid for shouldAssumeDSOLocal to return false anytime,
always returning false for intrinsics is not optimal on i386 and also
hits a bug in the backend.
To use a plt, the caller must first setup ebx to handle the case of
that file being linked into a PIE executable or shared library. In
those cases the generated PLT uses ebx.
Currently we can produce "calll expf@plt" without setting ebx. We
could fix that by correctly setting ebx, but this would produce worse
code for the case where the runtime library is statically linked. It
would also required other tools to handle R_386_PLT32.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327198
91177308-0d34-0410-b5e6-
96231b3b80d8
Nirav Dave [Sat, 10 Mar 2018 02:16:15 +0000 (02:16 +0000)]
Revert: r327172 "Correct load-op-store cycle detection analysis"
r327171 "Improve Dependency analysis when doing multi-node Instruction Selection"
r328170 "[DAG] Enforce stricter NodeId invariant during Instruction selection"
Reverting patch as NodeId invariant change is causing pathological
increases in compile time on PPC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327197
91177308-0d34-0410-b5e6-
96231b3b80d8
Craig Topper [Fri, 9 Mar 2018 23:36:58 +0000 (23:36 +0000)]
[TwoAddressInstructionPass] Improve tryInstructionCommute of X86 FMA and vpternlog instructions
These instructions have 3 operands that can be commuted. The first commute we find may not be the best. So we should keep searching if we performed an aggressive commute. There may still be an operand that is killed or a physical register constraint that might be better.
Differential Revision: https://reviews.llvm.org/D44324
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327188
91177308-0d34-0410-b5e6-
96231b3b80d8
Heejin Ahn [Fri, 9 Mar 2018 23:29:06 +0000 (23:29 +0000)]
[WebAssembly] Add EVT::getEVTString() for except_ref type
Summary: This was missing in D43706 (rL326985).
Reviewers:
Subscribers: jfb, sbc100, jgravelle-google, sunfish, llvm-commits
Differential Revision: https://reviews.llvm.org/D44325
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327187
91177308-0d34-0410-b5e6-
96231b3b80d8
Peter Collingbourne [Fri, 9 Mar 2018 22:52:22 +0000 (22:52 +0000)]
ADT: Make MapVector::value_type and MapVector::size_type public. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327180
91177308-0d34-0410-b5e6-
96231b3b80d8
Craig Topper [Fri, 9 Mar 2018 22:24:12 +0000 (22:24 +0000)]
[TargetLowering] Remove redundant term in two ifs in SimplifySetCC. NFC
If we get into the right hand side of the OR, we know that isOpaque is true since the left hand size is just a check that it's false.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327179
91177308-0d34-0410-b5e6-
96231b3b80d8
Ulrich Weigand [Fri, 9 Mar 2018 22:00:10 +0000 (22:00 +0000)]
Revert "[Debug] Retain both sets of debug intrinsics in HoistThenElseCodeToIf"
This reverts commit r327175 as problems in debug info generation were shown.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327176
91177308-0d34-0410-b5e6-
96231b3b80d8
Ulrich Weigand [Fri, 9 Mar 2018 21:37:07 +0000 (21:37 +0000)]
[Debug] Retain both sets of debug intrinsics in HoistThenElseCodeToIf
When hoisting common code from the "then" and "else" branches of a condition
to before the "if", there is no need to require that debug intrinsics match
before moving them (and merging them). Instead, we can simply always keep
all debug intrinsics from both sides of the "if".
This fixes PR36410, which describes a problem where as a result of the attempt
to merge debug locations for two debug intrinsics we end up with an invalid
intrinsic, where the scope indicated in the !dbg location no longer matches
the scope of the variable tracked by the intrinsic.
In addition, this has the benefit that we no longer throw away information
that is actually still valid, helping to generate better debug data.
Reviewed By: vsk
Differential Revision: https://reviews.llvm.org/D44312
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327175
91177308-0d34-0410-b5e6-
96231b3b80d8
Stefan Pintilie [Fri, 9 Mar 2018 21:08:35 +0000 (21:08 +0000)]
[Power9] Code Cleaup and adding Comments for Power 9 Scheduler
Did some code cleanup up removing ItinRW that are not needed and resource types
that are no longer used.
Also added more comments to the td files related to the Power 9 sheduler model.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327174
91177308-0d34-0410-b5e6-
96231b3b80d8
Renato Golin [Fri, 9 Mar 2018 21:05:58 +0000 (21:05 +0000)]
[NFC] Consolidate six getPointerOperand() utility functions into one place
There are six separate instances of getPointerOperand() utility.
LoopVectorize.cpp has one of them,
and I don't want to create a 7th one while I'm trying to move
LoopVectorizationLegality into a separate file
(eventual objective is to move it to Analysis tree).
See http://lists.llvm.org/pipermail/llvm-dev/2018-February/120999.html
for llvm-dev discussions
Closes D43323.
Patch by Hideki Saito <hideki.saito@intel.com>.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327173
91177308-0d34-0410-b5e6-
96231b3b80d8
Nirav Dave [Fri, 9 Mar 2018 20:58:07 +0000 (20:58 +0000)]
Correct load-op-store cycle detection analysis
Add missing cycle dependency checks in load-op-store fusion.
Fixes PR36274.
Reviewers: craig.topper, bogner
Subscribers: hiraditya, llvm-commits
Differential Revision: https://reviews.llvm.org/D43154
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327172
91177308-0d34-0410-b5e6-
96231b3b80d8
Nirav Dave [Fri, 9 Mar 2018 20:57:42 +0000 (20:57 +0000)]
Improve Dependency analysis when doing multi-node Instruction Selection
Relanding after fixing NodeId Invariant.
Cleanup cycle/validity checks in ISel (IsLegalToFold,
HandleMergeInputChains) and X86 (isFusableLoadOpStore). Now do a full
search for cycles / dependencies pruning the search when topological
property of NodeId allows.
As part of this propogate the NodeId-based cutoffs to narrow
hasPreprocessorHelper searches.
Reviewers: craig.topper, bogner
Subscribers: llvm-commits, hiraditya
Differential Revision: https://reviews.llvm.org/D41293
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327171
91177308-0d34-0410-b5e6-
96231b3b80d8
Nirav Dave [Fri, 9 Mar 2018 20:57:15 +0000 (20:57 +0000)]
[DAG] Enforce stricter NodeId invariant during Instruction selection
Instruction Selection makes use of the topological ordering of nodes
by node id (a node's operands have smaller node id than it) when doing
cycle detection. During selection we may violate this property as a
selection of multiple nodes may induce a use dependence (and thus a
node id restriction) between two unrelated nodes. If a selected node
has an unselected successor this may allow us to miss a cycle in
detection an invalid selection.
This patch fixes this by marking all unselected successors of a
selected node have negated node id. We avoid pruning on such negative
ids but still can reconstruct the original id for pruning.
In-tree targets have been updated to replace DAG-level replacements
with ISel-level ones which enforce this property.
This preemptively fixes PR36312 before triggering commit r324359 relands
Reviewers: craig.topper, bogner, jyknight
Subscribers: arsenm, nhaehnle, javed.absar, llvm-commits, hiraditya
Differential Revision: https://reviews.llvm.org/D43198
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327170
91177308-0d34-0410-b5e6-
96231b3b80d8
Nirav Dave [Fri, 9 Mar 2018 20:56:51 +0000 (20:56 +0000)]
Make early exit hasPredecessorHelper return true. NFCI.
All uses conservatively assume in early exit case that it will be a
predecessor. Changing default removes checking code in all uses.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327169
91177308-0d34-0410-b5e6-
96231b3b80d8
Rafael Auler [Fri, 9 Mar 2018 19:13:44 +0000 (19:13 +0000)]
[llvm-objdump] Support disassembling by symbol name
Summary:
Add a new option -df to llvm-objdump that takes function names
as arguments and instructs the disassembler to only dump those function
contents. Based on code originally written by Bill Nell.
Reviewers: espindola, JDevlieghere
Differential Revision: https://reviews.llvm.org/D44224
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327164
91177308-0d34-0410-b5e6-
96231b3b80d8
Peter Collingbourne [Fri, 9 Mar 2018 19:11:44 +0000 (19:11 +0000)]
Use branch funnels for virtual calls when retpoline mitigation is enabled.
The retpoline mitigation for variant 2 of CVE-2017-5715 inhibits the
branch predictor, and as a result it can lead to a measurable loss of
performance. We can reduce the performance impact of retpolined virtual
calls by replacing them with a special construct known as a branch
funnel, which is an instruction sequence that implements virtual calls
to a set of known targets using a binary tree of direct branches. This
allows the processor to speculately execute valid implementations of the
virtual function without allowing for speculative execution of of calls
to arbitrary addresses.
This patch extends the whole-program devirtualization pass to replace
certain virtual calls with calls to branch funnels, which are
represented using a new llvm.icall.jumptable intrinsic. It also extends
the LowerTypeTests pass to recognize the new intrinsic, generate code
for the branch funnels (x86_64 only for now) and lay out virtual tables
as required for each branch funnel.
The implementation supports full LTO as well as ThinLTO, and extends the
ThinLTO summary format used for whole-program devirtualization to
support branch funnels.
For more details see RFC:
http://lists.llvm.org/pipermail/llvm-dev/2018-January/120672.html
Differential Revision: https://reviews.llvm.org/D42453
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327163
91177308-0d34-0410-b5e6-
96231b3b80d8
Alina Sbirlea [Fri, 9 Mar 2018 18:48:20 +0000 (18:48 +0000)]
Avoid creating a Constant for each value in a ConstantDataSequential.
Summary: We create a ConstantDataSequential (ConstantDataArray or ConstantDataVector) to avoid creating a Constant for each element in an array of constants. But them in AsmPrinter, we do create a ConstantFP for each element in the ConstantDataSequential. This triggers excessive memory use when generating large global FP constants.
Reviewers: bogner, lhames, t.p.northover
Subscribers: jlebar, sanjoy, llvm-commits
Differential Revision: https://reviews.llvm.org/D44277
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327161
91177308-0d34-0410-b5e6-
96231b3b80d8
Rafael Espindola [Fri, 9 Mar 2018 18:42:25 +0000 (18:42 +0000)]
Delay creating an alias for @@@.
With this we only create an alias for @@@ once we know if it should
use @ or @@. This avoids last minutes renames and hacks to handle MS
names.
This only handles the ELF writer. LTO still has issues with @@@
aliases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327160
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Fri, 9 Mar 2018 18:37:56 +0000 (18:37 +0000)]
[X86][AVX] createVariablePermute - fix v2i64/v2f64 VPERMILPD index creation.
The input indices vector will put the index in bit0, but VPERMILPD actually selects off bit1 - so we need to scale accordingly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327159
91177308-0d34-0410-b5e6-
96231b3b80d8
Nicolai Haehnle [Fri, 9 Mar 2018 18:32:04 +0000 (18:32 +0000)]
TableGen: Remove space at EOL in TGLexer.{h,cpp}
Change-Id: Ica5f39470174e85f173d3b6db95789033f75ce17
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327158
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Fri, 9 Mar 2018 18:08:08 +0000 (18:08 +0000)]
[X86][SSE] createVariablePermute - move source vector canonicalization to top of function. NFCI.
This is to make it easier to return early from the switch statement with custom lowering.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327157
91177308-0d34-0410-b5e6-
96231b3b80d8
Renato Golin [Fri, 9 Mar 2018 18:02:36 +0000 (18:02 +0000)]
[LV] Adding test for r327109
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327155
91177308-0d34-0410-b5e6-
96231b3b80d8
Farhana Aleen [Fri, 9 Mar 2018 17:41:39 +0000 (17:41 +0000)]
[AMDGPU] Supported ds_read_b128 generation; Widened vector length for local address-space.
Summary: Starting from GCN 2nd generation, ISA supports ds_read_b128 on top of ds_read_b64.
This patch supports ds_read_b128 instruction pattern and generation of this instruction.
In the vectorizer, this patch also widen the vector length so that vectorizer generates
128 bit loads for local address-space which gets translated to ds_read_b128.
Since the performance benefit is not clear; compiler generates ds_read_b128 under -amdgpu-ds128.
Author: FarhanaAleen
Reviewed By: rampitec, arsenm
Subscribers: llvm-commits, AMDGPU
Differential Revision: https://reviews.llvm.org/D44210
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327153
91177308-0d34-0410-b5e6-
96231b3b80d8
Aditya Nandakumar [Fri, 9 Mar 2018 17:31:51 +0000 (17:31 +0000)]
[GISel]: Add helpers for easy building G_FCONSTANT along with matchers
Added helpers to build G_FCONSTANT, along with matching ConstantFP and
unit tests for the same.
Sample usage.
auto MIB = Builder.buildFConstant(s32, 0.5); // Build IEEESingle
For Matching the above
const ConstantFP* Tmp;
mi_match(DstReg, MRI, m_GFCst(Tmp));
https://reviews.llvm.org/D44128
reviewed by: volkan
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327152
91177308-0d34-0410-b5e6-
96231b3b80d8
Chad Rosier [Fri, 9 Mar 2018 16:43:46 +0000 (16:43 +0000)]
[JumpThreading] Don't restrict cast-traversal to i1
In r263618, JumpThreading learned to look trough simple cast instructions, but
only if the source of those cast instructions was a phi/cmp i1 (in an effort to
limit compile time effects). I think this condition is too restrictive. For
switches with limited value range, InstCombine will readily introduce an extra
trunc instruction to a smaller integer type (e.g. from i8 to i2), leaving us in
the somewhat perverse situation that jump-threading would work before running
instcombine, but not after. Since instcombine produces this pattern, I think we
need to consider it canonical and support it in JumpThreading. In general,
for limiting recursion, I think the existing restriction to phi and cmp nodes
should be sufficient to avoid looking through unprofitable chains of
instructions.
Patch by Keno Fischer!
Differential Revision: https://reviews.llvm.org/D42262
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327150
91177308-0d34-0410-b5e6-
96231b3b80d8
Adrian Prantl [Fri, 9 Mar 2018 16:42:05 +0000 (16:42 +0000)]
Move generic test to the Generic directory
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327148
91177308-0d34-0410-b5e6-
96231b3b80d8
Sanjay Patel [Fri, 9 Mar 2018 16:33:34 +0000 (16:33 +0000)]
[AMDGPU] fix test to be independent of FP undef
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327147
91177308-0d34-0410-b5e6-
96231b3b80d8
Nicholas Wilson [Fri, 9 Mar 2018 16:30:44 +0000 (16:30 +0000)]
[WebAssembly] Disallow weak undefined globals in the object format
This implements https://github.com/WebAssembly/tool-conventions/pull/47
Differential Revision: https://reviews.llvm.org/D44201
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327146
91177308-0d34-0410-b5e6-
96231b3b80d8
Sanjay Patel [Fri, 9 Mar 2018 16:14:02 +0000 (16:14 +0000)]
[InstSimplify] fix FP infinite hex constant values in tests; NFC
Really should improve this...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327144
91177308-0d34-0410-b5e6-
96231b3b80d8
Stefan Pintilie [Fri, 9 Mar 2018 16:08:55 +0000 (16:08 +0000)]
Revert "[PowerPC] LSR tunings for PowerPC"
Revert the rest of the LST tune commit.
It seems that the LSR tune commit breaks internal tests.
Reverting the commit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327143
91177308-0d34-0410-b5e6-
96231b3b80d8
Stefan Pintilie [Fri, 9 Mar 2018 16:08:48 +0000 (16:08 +0000)]
Revert "[PowerPC] Move test to correct location."
Revert part of the LSR tune commit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327142
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Fri, 9 Mar 2018 15:50:09 +0000 (15:50 +0000)]
Tidyup comment that was destroyed by clang-format. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327141
91177308-0d34-0410-b5e6-
96231b3b80d8
Simon Pilgrim [Fri, 9 Mar 2018 15:48:56 +0000 (15:48 +0000)]
[X86][SSE] createVariablePermute - move index vector canonicalization to top of function. NFCI.
This is to make it easier to return early from the switch statement with custom lowering.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327140
91177308-0d34-0410-b5e6-
96231b3b80d8