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Wolfgang Pieb [Fri, 14 Sep 2018 09:14:10 +0000 (09:14 +0000)]
[DWARF] reposting r342048, which was reverted in r342056 due to buildbot
errors.
Adjusted 2 test cases for ARM and darwin and fixed a bug with the original
change in dsymutil.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342218
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Sam Parker [Fri, 14 Sep 2018 08:09:09 +0000 (08:09 +0000)]
[ARM] bottom-top mul support in ARMParallelDSP
On failing to find sequences that can be converted into dual macs,
try to find sequential 16-bit loads that are used by muls which we
can then use smultb, smulbt, smultt with a wide load.
Differential Revision: https://reviews.llvm.org/D51983
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342210
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Florian Hahn [Fri, 14 Sep 2018 07:50:20 +0000 (07:50 +0000)]
[LoopInterchange] Preserve ScalarEvolution, by forgetting about interchanged loops.
As preparation for LoopInterchange becoming a loop pass, it needs to
preserve ScalarEvolution. Even though interchanging should not change
the trip count of the loop, it modifies loop entry, latch and exit
blocks.
I added -verify-scev to some loop interchange tests, but the verification does
not catch problems caused by missing invalidation of SE in loop interchange, as
the trip counts themselves do not change. So there might be potential to
make the SE verification covering more stuff in the future.
Reviewers: mkazantsev, efriedma, karthikthecool
Reviewed By: efriedma
Differential Revision: https://reviews.llvm.org/D52026
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342209
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Jonas Paulsson [Fri, 14 Sep 2018 06:46:55 +0000 (06:46 +0000)]
[SystemZ] Adjust cost functions for subtargets that use LI + LOC instead of IPM
After recent improvements which makes better use of LOC instead of IPM, the
TTI cost functions also needs to be updated to reflect this.
This involves sext, zext and xor of i1.
The tests were updated so that for z13 the new costs are expected, while the
old costs are still checked for on zEC12.
Review: Ulrich Weigand
https://reviews.llvm.org/D51339
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342207
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Martin Storsjo [Fri, 14 Sep 2018 06:08:01 +0000 (06:08 +0000)]
[Support] Treat null bytes as separator in windows command line strings
When reading directives from a .drectve section, the directives are
tokenized as a normal windows command line. However in these cases,
link.exe allows the directives to be separated by null bytes, not only by
spaces.
A test case for this change will be added in the lld repo.
Differential Revision: https://reviews.llvm.org/D52014
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342204
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Craig Topper [Fri, 14 Sep 2018 05:16:58 +0000 (05:16 +0000)]
[InstCombine] Add some test cases for (add (sext x), (sext y)) --> (sext (add int x, y)) and (mul (sext x), (sext y)) --> (sext (mul x, y)). NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342203
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Max Kazantsev [Fri, 14 Sep 2018 04:50:38 +0000 (04:50 +0000)]
[NFC] Remove meaningless code from GVN
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342202
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Hideki Saito [Fri, 14 Sep 2018 02:02:57 +0000 (02:02 +0000)]
Fix for the buildbot failure lab.llvm.org:8011/builders/sanitizer-x86_64-linux-fast/builds/23635
from the commit (r342197) of https://reviews.llvm.org/D50820.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342201
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Hideki Saito [Fri, 14 Sep 2018 00:36:00 +0000 (00:36 +0000)]
[VPlan] Implement initial vector code generation support for simple outer loops.
Summary:
[VPlan] Implement vector code generation support for simple outer loops.
Context: Patch Series #1 for outer loop vectorization support in LV using VPlan. (RFC: http://lists.llvm.org/pipermail/llvm-dev/2017-December/119523.html).
This patch introduces vector code generation support for simple outer loops that are currently supported in the VPlanNativePath. Changes here essentially do the following:
- force vector code generation using explicit vectorize_width
- add conservative early returns in cost model and other places for VPlanNativePath
- add code for setting up outer loop inductions
- support for widening non-induction PHIs that can result from inner loops and uniform conditional branches
- support for generating uniform inner branches
We plan to add a handful C outer loop executable tests once the initial code generation support is committed. This patch is expected to be NFC for the inner loop vectorizer path. Since we are moving in the direction of supporting outer loop vectorization in LV, it may also be time to rename classes such as InnerLoopVectorizer.
Reviewers: fhahn, rengolin, hsaito, dcaballe, mkuper, hfinkel, Ayal
Reviewed By: fhahn, hsaito
Subscribers: dmgreen, bollu, tschuett, rkruppe, rogfer01, llvm-commits
Differential Revision: https://reviews.llvm.org/D50820
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342197
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Richard Diamond [Thu, 13 Sep 2018 23:18:33 +0000 (23:18 +0000)]
[NFC] Link LLVMCore into LLVMExegesisARMTests.
Fixes missing `llvm::LLVMContext::~LLVMContext()` symbols w/
`BUILD_SHARED_LIBS`.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342193
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Tim Renouf [Thu, 13 Sep 2018 21:56:25 +0000 (21:56 +0000)]
[AMDGPU] Removed unused method
Summary:
I accidentally left this behind in D50306, and it causes a build warning
when I build with gcc7.
Subscribers: arsenm, kzhuravl, jvesely, wdng, nhaehnle, yaxunl, dstuttard, t-tye, llvm-commits
Differential Revision: https://reviews.llvm.org/D52022
Change-Id: I30f7a47047e9d9d841f652da66d2fea19e74842c
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342189
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Matt Morehouse [Thu, 13 Sep 2018 21:45:55 +0000 (21:45 +0000)]
[SanitizerCoverage] Create comdat for global arrays.
Summary:
Place global arrays in comdat sections with their associated functions.
This makes sure they are stripped along with the functions they
reference, even on the BFD linker.
Reviewers: eugenis
Reviewed By: eugenis
Subscribers: eraman, hiraditya, llvm-commits
Differential Revision: https://reviews.llvm.org/D51902
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342186
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Roman Lebedev [Thu, 13 Sep 2018 21:34:47 +0000 (21:34 +0000)]
[NFC][InstCombine] PR38708 - inefficient pattern for high-bits checking 3.
The last, non-canonical variant:
https://godbolt.org/z/aCMsPk
https://rise4fun.com/Alive/I6f
It can only happen due to the extra use on the inner shift.
But here it is ok.
https://bugs.llvm.org/show_bug.cgi?id=38708
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342184
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Amara Emerson [Thu, 13 Sep 2018 21:28:58 +0000 (21:28 +0000)]
[DAGCombine] Fix crash when store merging created an extract_subvector with invalid index.
Differential Revision: https://reviews.llvm.org/D51831
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342183
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Roman Lebedev [Thu, 13 Sep 2018 21:26:09 +0000 (21:26 +0000)]
LLVMExegesisX86Tests: link to LLVMCore, too.
Fixes build for me.
Refs. D52054
[215/217] Linking CXX executable unittests/tools/llvm-exegesis/X86/LLVMExegesisX86Tests
FAILED: unittests/tools/llvm-exegesis/X86/LLVMExegesisX86Tests
: && /usr/bin/g++ -pipe -O2 -g0 -UNDEBUG -fPIC -fvisibility-inlines-hidden -Werror=date-time -std=c++11 -Wall -Wextra -Wno-unused-parameter -Wwrite-strings -Wcast-qual -Wno-missing-field-initializers -pedantic -Wno-long-long -Wno-maybe-uninitialized -Wno-class-memaccess -Wno-noexcept-type -Wdelete-non-virtual-dtor -Wno-comment -fdiagnostics-color -ffunction-sections -fdata-sections -pipe -O2 -g0 -UNDEBUG -fuse-ld=lld -Wl,--color-diagnostics -Wl,-allow-shlib-undefined -Wl,-O3 -Wl,--gc-sections unittests/tools/llvm-exegesis/X86/CMakeFiles/LLVMExegesisX86Tests.dir/AssemblerTest.cpp.o unittests/tools/llvm-exegesis/X86/CMakeFiles/LLVMExegesisX86Tests.dir/AnalysisTest.cpp.o unittests/tools/llvm-exegesis/X86/CMakeFiles/LLVMExegesisX86Tests.dir/SnippetGeneratorTest.cpp.o unittests/tools/llvm-exegesis/X86/CMakeFiles/LLVMExegesisX86Tests.dir/RegisterAliasingTest.cpp.o unittests/tools/llvm-exegesis/X86/CMakeFiles/LLVMExegesisX86Tests.dir/TargetTest.cpp.o -o unittests/tools/llvm-exegesis/X86/LLVMExegesisX86Tests -Wl,-rpath,/build/llvm-build-GCC-release/lib lib/libLLVMMC.so.8svn lib/libLLVMMCParser.so.8svn lib/libLLVMObject.so.8svn lib/libLLVMSymbolize.so.8svn lib/libLLVMX86CodeGen.so.8svn lib/libLLVMX86AsmParser.so.8svn lib/libLLVMX86AsmPrinter.so.8svn lib/libLLVMX86Desc.so.8svn lib/libLLVMX86Disassembler.so.8svn lib/libLLVMX86Info.so.8svn lib/libLLVMX86Utils.so.8svn lib/libLLVMSupport.so.8svn -lpthread lib/libgtest_main.so.8svn lib/libgtest.so.8svn -lpthread lib/libLLVMExegesis.so.8svn lib/libLLVMExegesisX86.so.8svn && :
ld.lld: error: undefined symbol: llvm::LLVMContext::~LLVMContext()
>>> referenced by AssemblerTest.cpp
>>> unittests/tools/llvm-exegesis/X86/CMakeFiles/LLVMExegesisX86Tests.dir/AssemblerTest.cpp.o:(exegesis::(anonymous namespace)::X86MachineFunctionGeneratorTest_DISABLED_JitFunction_Test::TestBody())
ld.lld: error: undefined symbol: llvm::LLVMContext::~LLVMContext()
>>> referenced by AssemblerTest.cpp
>>> unittests/tools/llvm-exegesis/X86/CMakeFiles/LLVMExegesisX86Tests.dir/AssemblerTest.cpp.o:(exegesis::(anonymous namespace)::X86MachineFunctionGeneratorTest_DISABLED_JitFunctionXOR32rr_Default_Test::TestBody())
ld.lld: error: undefined symbol: llvm::LLVMContext::~LLVMContext()
>>> referenced by AssemblerTest.cpp
>>> unittests/tools/llvm-exegesis/X86/CMakeFiles/LLVMExegesisX86Tests.dir/AssemblerTest.cpp.o:(void exegesis::MachineFunctionGeneratorBaseTest::Check<int, int, int, int, int, int, int, int>(exegesis::ExegesisTarget const&, llvm::ArrayRef<unsigned int>, llvm::MCInst, int, int, int, int, int, int, int, int))
ld.lld: error: undefined symbol: llvm::LLVMContext::~LLVMContext()
>>> referenced by AssemblerTest.cpp
>>> unittests/tools/llvm-exegesis/X86/CMakeFiles/LLVMExegesisX86Tests.dir/AssemblerTest.cpp.o:(exegesis::(anonymous namespace)::X86MachineFunctionGeneratorTest_DISABLED_JitFunctionMOV32ri_Test::TestBody())
collect2: error: ld returned 1 exit status
ninja: build stopped: subcommand failed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342182
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Sam Clegg [Thu, 13 Sep 2018 21:17:16 +0000 (21:17 +0000)]
[llvm-exegesis] Add missing MC dependency to CMakeLists.txt
See rL342148
This probably only shows up in BUILD_SHARED_LIBS=ON builds
which might explain how it crept in.
Differential Revision: https://reviews.llvm.org/D52054
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342180
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Peter Collingbourne [Thu, 13 Sep 2018 21:16:39 +0000 (21:16 +0000)]
[bindings/go] Add DebugLoc parameter to InsertXXXAtEnd()
These functions previously passed nil for the location, which always resulted in a crash.
This is a signature breaking change, but I cannot see how they could have been used before.
Patch by Ben Clayton!
Differential Revision: https://reviews.llvm.org/D51970
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342179
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Richard Smith [Thu, 13 Sep 2018 21:15:34 +0000 (21:15 +0000)]
Add dependency on new llvm-cxxmap tool to check-llvm.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342178
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Craig Topper [Thu, 13 Sep 2018 20:51:27 +0000 (20:51 +0000)]
[MachineInstr] In addRegisterKilled and addRegisterDead, don't remove operands from inline assembly instructions if they have an associated flag operand.
INLINEASM instructions use extra operands to carry flags. If a register operand is removed without removing the flag operand, then the flags will no longer make sense.
This patch fixes this by preventing the removal when a flag operand is present.
The included test case was generated by MS inline assembly. Longer term maybe we should fix the inline assembly parsing to not generate redundant operands.
Differential Revision: https://reviews.llvm.org/D51829
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342176
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Nirav Dave [Thu, 13 Sep 2018 20:33:56 +0000 (20:33 +0000)]
[X86] Fix register resizings for inline assembly register operands.
When replacing a named register input to the appropriately sized
sub/super-register. In the case of a 64-bit value being assigned to a
register in 32-bit mode, match GCC's assignment.
Reviewers: eli.friedman, craig.topper
Subscribers: nickdesaulniers, llvm-commits, hiraditya
Differential Revision: https://reviews.llvm.org/D51502
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342175
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Nirav Dave [Thu, 13 Sep 2018 20:33:27 +0000 (20:33 +0000)]
[X86] Cleanup pair returns. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342174
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Roman Lebedev [Thu, 13 Sep 2018 20:33:12 +0000 (20:33 +0000)]
[InstCombine] Inefficient pattern for high-bits checking 2 (PR38708)
Summary:
It is sometimes important to check that some newly-computed value
is non-negative and only n bits wide (where n is a variable.)
There are many ways to check that:
https://godbolt.org/z/o4RB8D
The last variant seems best?
(I'm sure there are some other variations i haven't thought of..)
More complicated, canonical pattern:
https://rise4fun.com/Alive/uhA
We do need to have two `switch()`'es like this,
to not mismatch the swappable predicates.
https://bugs.llvm.org/show_bug.cgi?id=38708
Reviewers: spatel, craig.topper, RKSimon
Reviewed By: spatel
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D52001
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342173
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George Burgess IV [Thu, 13 Sep 2018 20:33:04 +0000 (20:33 +0000)]
[PartiallyInlineLibCalls] Add DebugCounter support
This adds DebugCounter support to the PartiallyInlineLibCalls pass,
which should make debugging/automated bisection easier in the future.
Patch by Zhizhou Yang!
Differential Revision: https://reviews.llvm.org/D50093
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342172
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Roman Lebedev [Thu, 13 Sep 2018 20:33:02 +0000 (20:33 +0000)]
[NFC][InstCombine] Test what happens if 'unefficient high bit check' pattern is on both sides.
Came up in https://reviews.llvm.org/D52001#
1233827
While we don't do a good job here, we at least want to make
sure that we don't have any inf-loops.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342171
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George Burgess IV [Thu, 13 Sep 2018 20:29:50 +0000 (20:29 +0000)]
[DCE] Add DebugCounter support
Patch by Zhizhou Yang!
Differential Revision: https://reviews.llvm.org/D50092
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342170
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Volodymyr Sapsai [Thu, 13 Sep 2018 20:24:36 +0000 (20:24 +0000)]
Revert "[cmake] Fix a unittest when `LLVM_LINK_LLVM_DYLIB` is requested."
This reverts commit r342150 as it caused test failure
LLVM-Unit :: Passes/./PluginsTests/PluginsTests.LoadPlugin
on multiple bots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342169
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Richard Smith [Thu, 13 Sep 2018 20:22:02 +0000 (20:22 +0000)]
Add flag to llvm-profdata to allow symbols in profile data to be remapped, and
add a tool to generate symbol remapping files.
Summary:
The new tool llvm-cxxmap builds a symbol mapping table from a file containing
a description of partial equivalences to apply to mangled names and files
containing old and new symbol tables.
Reviewers: davidxl
Subscribers: mgorny, llvm-commits
Differential Revision: https://reviews.llvm.org/D51470
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342168
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Richard Smith [Thu, 13 Sep 2018 20:00:21 +0000 (20:00 +0000)]
Fix a couple of mangling canonicalizer corner case bugs.
Summary:
The hash computed for an ArrayType was different when first constructed
versus when later profiled due to the constructor default argument, and
we were not tracking constructor / destructor variant as part of the
mangled name AST, leading to incorrect equivalences.
Reviewers: erik.pilkington
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D51463
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342166
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Craig Topper [Thu, 13 Sep 2018 18:52:58 +0000 (18:52 +0000)]
[InstCombine] Fold (xor (min/max X, Y), -1) -> (max/min ~X, ~Y) when X and Y are freely invertible.
This allows the xor to be removed completely.
This might help with recomitting r341674, but seems good regardless.
Coincidentally fixes PR38915.
Differential Revision: https://reviews.llvm.org/D51964
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342163
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Craig Topper [Thu, 13 Sep 2018 18:52:56 +0000 (18:52 +0000)]
[InstCombine] Add test cases for D51964. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342162
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Richard Smith [Thu, 13 Sep 2018 18:51:44 +0000 (18:51 +0000)]
Common infrastructure for reading a profile remapping file and building
a mangling remapper from it.
Differential Revision: https://reviews.llvm.org/D51246
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342161
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Ana Pazos [Thu, 13 Sep 2018 18:37:23 +0000 (18:37 +0000)]
[RISCV][MC] Reject bare symbols for the simm6 and simm6nonzero operand types
Summary:
Fixed assertions due to invalid fixup when encoding compressed instructions
(c.addi, c.addiw, c.li, c.andi) with bare symbols with/without modifiers.
This matches GAS behavior as well.
This bug was uncovered by a LLVM MC Disassembler Protocol Buffer Fuzzer
for the RISC-V assembly language.
Reviewers: asb
Reviewed By: asb
Subscribers: rbar, johnrusso, simoncook, sabuasal, niosHD, kito-cheng, shiva0217, zzheng, edward-jones, mgrang, rogfer01, MartinMosbeck, brucehoult, the_o, rkruppe, PkmX, jocewei, asb
Differential Revision: https://reviews.llvm.org/D52005
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342160
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Ana Pazos [Thu, 13 Sep 2018 18:21:19 +0000 (18:21 +0000)]
[RISCV] Fix decoding of invalid instruction with C extension enabled.
Summary:
The illegal instruction 0x00 0x00 is being wrongly decoded as
c.addi4spn with 0 immediate.
The invalid instruction 0x01 0x61 is being wrongly decoded as
c.addi16sp with 0 immediate.
This bug was uncovered by a LLVM MC Disassembler Protocol Buffer Fuzzer
for the RISC-V assembly language.
Reviewers: asb
Reviewed By: asb
Subscribers: rbar, johnrusso, simoncook, sabuasal, niosHD, kito-cheng, shiva0217, zzheng, edward-jones, mgrang, rogfer01, MartinMosbeck, brucehoult, the_o, rkruppe, PkmX, jocewei, asb
Differential Revision: https://reviews.llvm.org/D51815
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342159
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Sam Clegg [Thu, 13 Sep 2018 17:13:10 +0000 (17:13 +0000)]
[WebAssembly] Fix signature of `main` in FixFunctionBitcasts
Also, add a check to ensure that when main has the expected signature
we do not create a wrapper.
Differential Revision: https://reviews.llvm.org/D51562
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342157
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Simon Pilgrim [Thu, 13 Sep 2018 17:11:25 +0000 (17:11 +0000)]
[AArch64] Add integer abs testcases for D51873.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342156
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Richard Diamond [Thu, 13 Sep 2018 17:10:44 +0000 (17:10 +0000)]
[cmake] Fix missing DEPENDS.
Not sure how I didn't catch this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342154
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Richard Diamond [Thu, 13 Sep 2018 16:39:52 +0000 (16:39 +0000)]
[cmake] Fix a unittest when `LLVM_LINK_LLVM_DYLIB` is requested.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342150
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Sanjay Patel [Thu, 13 Sep 2018 16:18:12 +0000 (16:18 +0000)]
[InstCombine] remove checks for IsFreeToInvert()
I accidentally committed this diff with rL342147 because
I had applied D51964. We probably do need those checks,
but D51964 has tests and more discussion/motivation,
so they should be re-added with that patch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342149
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Richard Diamond [Thu, 13 Sep 2018 16:15:03 +0000 (16:15 +0000)]
Renovate CMake files in the `llvm-(cfi-verify|exegesis|mca)` tools.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342148
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Sanjay Patel [Thu, 13 Sep 2018 16:04:06 +0000 (16:04 +0000)]
[InstCombine] reorder folds to reduce chance of infinite loops
I don't have a test case for this, but it's motivated by
the discussion in D51964, and I've added TODO comments for
the better fix - move simplifications into instsimplify
because that's more efficient and reduces risk of infinite
loops in instcombine caused by transforms trying to do the
opposite folds.
In this case, we know that the transform that tries to move
'not' through min/max can be fooled by the multiple uses
of a value in another min/max, so try to squash the
foldSPFofSPF() patterns first.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342147
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Sam Parker [Thu, 13 Sep 2018 15:14:12 +0000 (15:14 +0000)]
[ARM] Allow truncs as sources in ARM CGP
We previously only allowed truncs as sinks, but now allow them as
sources too. We do this by checking that the result type is the
narrow type that we're trying to optimise for.
Differential Revision: https://reviews.llvm.org/D51978
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342141
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Sam Parker [Thu, 13 Sep 2018 14:48:10 +0000 (14:48 +0000)]
[ARM] Fix FixConst for ARMCodeGenPrepare
Part of FixConsts wrongly assumes either a 8- or 16-bit constant
which can result in the wrong constants being generated during
promotion.
Differential Revision: https://reviews.llvm.org/D52032
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342140
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Jonas Devlieghere [Thu, 13 Sep 2018 13:13:50 +0000 (13:13 +0000)]
[MC/Dwarf] Unclamp DWARF linetables format on Darwin.
In r319995, we fixed the line table format to version 2 on Darwin
because dsymutil didn't yet understand the new format which caused test
failures for the LLDB bots. This has been resolved in the meantime so
there's no reason to keep this limitation.
rdar://problem/
35968332
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342136
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Matt Arsenault [Thu, 13 Sep 2018 12:14:31 +0000 (12:14 +0000)]
AMDGPU: Fix not preserving alignent in call setups
If an argument was passed on the stack, this
was using the default alignment.
I'm not sure there's an observable change from this. This
was observable due to bugs in expansion of unaligned
loads and stores, but since that is fixed I don't think
this matters much.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342133
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Matt Arsenault [Thu, 13 Sep 2018 12:14:23 +0000 (12:14 +0000)]
DAG: Fix expansion of unaligned FP loads and stores
This was trying to scalarizing a scalar FP type,
resulting in an assert.
Fixes unaligned f64 stack stores for AMDGPU.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342132
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Matt Arsenault [Thu, 13 Sep 2018 11:56:28 +0000 (11:56 +0000)]
AMDGPU: Fix some outdated datalayouts in tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342131
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Simon Pilgrim [Thu, 13 Sep 2018 10:54:23 +0000 (10:54 +0000)]
Fix unused variable warning. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342128
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Tim Northover [Thu, 13 Sep 2018 10:28:05 +0000 (10:28 +0000)]
ARM: align loops to 4 bytes on Cortex-M3 and Cortex-M4.
The Technical Reference Manuals for these two CPUs state that branching
to an unaligned 32-bit instruction incurs an extra pipeline reload
penalty. That's bad.
This also enables the optimization at -Os since it costs on average one
byte per loop in return for 1 cycle per iteration, which is pretty good
going.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342127
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Dean Michael Berris [Thu, 13 Sep 2018 09:25:42 +0000 (09:25 +0000)]
[XRay] Bug fixes for FDR custom event and arg-logging
Summary:
This change has a number of fixes for FDR mode in compiler-rt along with
changes to the tooling handling the traces in llvm.
In the runtime, we do the following:
- Advance the "last record" pointer appropriately when writing the
custom event data in the log.
- Add XRAY_NEVER_INSTRUMENT in the rewinding routine.
- When collecting the argument of functions appropriately marked, we
should not attempt to rewind them (and reset the counts of functions
that can be re-wound).
In the tooling, we do the following:
- Remove the state logic in BlockIndexer and instead rely on the
presence/absence of records to indicate blocks.
- Move the verifier into a loop associated with each block.
Reviewers: mboerger, eizan
Subscribers: llvm-commits, hiraditya
Differential Revision: https://reviews.llvm.org/D51965
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342122
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Alexander Timofeev [Thu, 13 Sep 2018 09:06:56 +0000 (09:06 +0000)]
[AMDGPU] Load divergence predicate refactoring
Differential revision: https://reviews.llvm.org/D51931
Reviewers: rampitec
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342120
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Simon Atanasyan [Thu, 13 Sep 2018 08:38:03 +0000 (08:38 +0000)]
[mips] Enable the mnemonic spell corrector
This implements suggesting alternative mnemonics when an invalid one is
specified. For example `addru $9, $6, 17767` leads to the following
error message:
error: unknown instruction, did you mean: add, addiu, addu, maddu?
Differential revision: https://reviews.llvm.org/D40646
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342119
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Clement Courbet [Thu, 13 Sep 2018 08:06:29 +0000 (08:06 +0000)]
[llvm-exegesis][NFC] Remove dead parameter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342118
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Clement Courbet [Thu, 13 Sep 2018 07:40:53 +0000 (07:40 +0000)]
[llvm-exegesis][NFC] Split BenchmarkRunner class
Summary:
The snippet-generation part goes to the SnippetGenerator class.
This will allow benchmarking arbitrary code (see PR38437).
Reviewers: gchatelet
Subscribers: mgorny, tschuett, llvm-commits
Differential Revision: https://reviews.llvm.org/D51979
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342117
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Alexander Timofeev [Thu, 13 Sep 2018 06:34:56 +0000 (06:34 +0000)]
[AMDGPU] Preliminary patch for divergence driven instruction selection. Load offset inlining pattern changed.
Differential revision: https://reviews.llvm.org/D51975
Reviewers: rampitec
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342115
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Craig Topper [Thu, 13 Sep 2018 06:13:37 +0000 (06:13 +0000)]
[X86] Type legalize v2i32 div/rem by scalarizing rather than promoting
Summary:
Previously we type legalized v2i32 div/rem by promoting to v2i64. But we don't support div/rem of vectors so op legalization would then scalarize it using i64 scalar ops since it doesn't know about the original promotion. 64-bit scalar divides on Intel hardware are known to be slow and in 32-bit mode they require a libcall.
This patch switches type legalization to do the scalarizing itself using i32.
It looks like the division by power of 2 optimization is still kicking in and leaving the code as a vector. The division by other constant optimization doesn't kick in pre type legalization since it ignores illegal types. And previously, after type legalization we scalarized the v2i64 since we don't have v2i64 MULHS/MULHU support.
Another option might be to widen v2i32 to v4i32 so we could do division by constant optimizations, but we'd have to be careful to only do that for constant divisors or we risk scalaring to 4 scalar divides.
Reviewers: RKSimon, spatel
Reviewed By: spatel
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D51325
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342114
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Saleem Abdulrasool [Thu, 13 Sep 2018 04:55:08 +0000 (04:55 +0000)]
ARM: correct the relocation type for `bl` on WoA
The `IMAGE_REL_ARM_BRANCH20T` applies only to a `b.w` instruction. A
thumb-2 `bl` should be relocated using a `IMAGE_REL_ARM_BRANCH24T`.
Correct the relocation that we emit in such a case.
Resolves PR38620! Based on the patch by Jordan Rhee!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342109
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Max Kazantsev [Thu, 13 Sep 2018 04:43:24 +0000 (04:43 +0000)]
[NFC] Add Requires: asserts where needed
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342108
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Max Kazantsev [Thu, 13 Sep 2018 04:00:39 +0000 (04:00 +0000)]
[NFC] Use expensive asserts in relevant LICM tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342107
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Thomas Lively [Thu, 13 Sep 2018 02:50:57 +0000 (02:50 +0000)]
Remove isAsCheapAsAMove from v128.const
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342106
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Thomas Lively [Thu, 13 Sep 2018 02:50:57 +0000 (02:50 +0000)]
Remove isAsCheapAsAMove from mem ops
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342105
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Thomas Lively [Thu, 13 Sep 2018 02:50:56 +0000 (02:50 +0000)]
[WebAssembly] Add missing SIMD instruction attributes
Summary:
These attributes are copied from equivalent instructions in
WebAssemblyInstrInfo.td.
Reviewers: aheejin, dschuff
Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits
Differential Revision: https://reviews.llvm.org/D51518
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342104
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David Blaikie [Thu, 13 Sep 2018 00:02:03 +0000 (00:02 +0000)]
STLExtras: Add some more algorithm wrappers
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342102
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David Blaikie [Thu, 13 Sep 2018 00:02:02 +0000 (00:02 +0000)]
DebugInfo/PDB: Remove unused member
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342101
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David Blaikie [Wed, 12 Sep 2018 23:39:51 +0000 (23:39 +0000)]
dwarfdump: Improve performance on large DWP files
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342099
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Sanjay Patel [Wed, 12 Sep 2018 23:03:50 +0000 (23:03 +0000)]
[DAGCombiner] improve formatting for select+setcc code; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342095
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Adrian Prantl [Wed, 12 Sep 2018 22:57:28 +0000 (22:57 +0000)]
fix 80-column violation with clang-format
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342094
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Zachary Turner [Wed, 12 Sep 2018 22:57:03 +0000 (22:57 +0000)]
[PDB] Remove all clone() methods.
These are dead code and encourage poor usage patterns, so I'm
removing them. They weren't called anywhere anyway.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342093
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Krzysztof Parzyszek [Wed, 12 Sep 2018 22:14:52 +0000 (22:14 +0000)]
[Hexagon] Use shuffles when lowering "gather" shufflevectors
Shufflevector instructions in LLVM IR that extract a subset of elements
of a longer input into a shorter vector can be done using VECTOR_SHUFFLEs.
This will avoid expanding them into constly extracts and inserts.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342091
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Krzysztof Parzyszek [Wed, 12 Sep 2018 22:10:58 +0000 (22:10 +0000)]
[Hexagon] Improve the selection algorithm in scalarizeShuffle
Use topological ordering for newly generated nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342090
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Kristina Brooks [Wed, 12 Sep 2018 22:08:10 +0000 (22:08 +0000)]
[Support] sys::fs::directory_entry includes the file_type.
This is available on most platforms (Linux/Mac/Win/BSD) with no extra syscalls.
On other platforms (e.g. Solaris) we stat() if this information is requested.
This will allow switching clang's VFS to efficiently expose (path, type) when
traversing a directory. Currently it exposes an entire Status, but does so by
calling fs::status() on all platforms.
Almost all callers only need the path, and all callers only need (path, type).
Patch by sammccall (Sam McCall)
Differential Revision: https://reviews.llvm.org/D51918
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342089
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Vedant Kumar [Wed, 12 Sep 2018 21:59:38 +0000 (21:59 +0000)]
[llvm-cov] Delete custom JSON serialization code (NFC)
Teach llvm-cov to use the new llvm JSON library, and remove some
redundant/brittle JSON serialization tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342088
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Lang Hames [Wed, 12 Sep 2018 21:49:02 +0000 (21:49 +0000)]
[ORC] Merge ExecutionSessionBase with ExecutionSession by moving a couple of
template methods in JITDylib out-of-line.
This also splits JITDylib::define into a pair of template methods, one taking an
lvalue reference and the other an rvalue reference. This simplifies the
templates at the cost of a small amount of code duplication.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342087
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Lang Hames [Wed, 12 Sep 2018 21:48:59 +0000 (21:48 +0000)]
[ORC] Add a special 'main' JITDylib that is created on ExecutionSession
construction, a new convenience lookup method, and add-to layer methods.
ExecutionSession now creates a special 'main' JITDylib upon construction. All
subsequently created JITDylibs are added to the main JITDylib's search order by
default (controlled by the AddToMainDylibSearchOrder parameter to
ExecutionSession::createDylib). The main JITDylib's search order will be used in
the future to properly handle cross-JITDylib weak symbols, with the first
definition in this search order selected.
This commit also adds a new ExecutionSession::lookup convenience method that
performs a blocking lookup using the main JITDylib's search order, as this will
be a very common operation for clients.
Finally, new convenience overloads of IRLayer and ObjectLayer's add methods are
introduced that add the given program representations to the main dylib, which
is likely to be the common case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342086
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Heejin Ahn [Wed, 12 Sep 2018 21:34:39 +0000 (21:34 +0000)]
[WebAssembly] Make tied inline asm operands work again
Summary:
rL341389 broke code with tied register operands in inline assembly. For
example, `asm("" : "=r"(var) : "0"(var));`
The code above specifies the input operand to be in the same register
with the output operand, tying the two register. This patch makes this
kind of code work again.
Reviewers: dschuff
Subscribers: sbc100, jgravelle-google, eraman, sunfish, llvm-commits
Differential Revision: https://reviews.llvm.org/D51991
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342084
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Sanjay Patel [Wed, 12 Sep 2018 21:29:11 +0000 (21:29 +0000)]
revert r341288 - [Reassociate] swap binop operands to increase factoring potential
This causes or exposes indeterminism that is visible in the output of -reassociate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342083
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Sanjay Patel [Wed, 12 Sep 2018 21:13:37 +0000 (21:13 +0000)]
[InstCombine] add tests for unsigned add overflow; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342082
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Michael Berg [Wed, 12 Sep 2018 21:09:59 +0000 (21:09 +0000)]
Guard FMF context by excluding some FP operators from FPMathOperator
Summary:
Some FPMathOperators succeed and the retrieve FMF context when they never have it, we should omit these cases to keep from removing FMF context.
For instance when we visit some FPMathOperator mapped Instructions which never have FMF flags and a Node was associated which does have FMF flags, that Node today will have all its flags cleared via the intersect operation. With this change, we exclude associating Nodes that never have FPMathOperator status under FMF.
Reviewers: spatel, wristow, arsenm, hfinkel, aemerson
Reviewed By: spatel
Subscribers: llvm-commits, wdng
Differential Revision: https://reviews.llvm.org/D51145
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342081
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Zachary Turner [Wed, 12 Sep 2018 21:02:01 +0000 (21:02 +0000)]
[PDB] Emit old fpo data to the PDB file.
r342003 added support for emitting FPO data from the
DEBUG_S_FRAMEDATA subsection of the .debug$S section to the PDB
file. However, that is not the end of the story. FPO can end
up in two different destinations in a PDB, each corresponding to
a different FPO data source.
The case handled by r342003 involves copying data from the
DEBUG_S_FRAMEDATA subsection of the .debug$S section to the
"New FPO" stream in the PDB, which is then referred to by the
DBI stream. The case handled by this patch involves copying
records from the .debug$F section of an object file to the "FPO"
stream (or perhaps more aptly, the "Old FPO" stream) in the PDB
file, which is also referred to by the DBI stream.
The formats are largely similar, and the difference is mostly
only visible in masm generated object files, such as some of the
low-level CRT object files like memcpy. MASM doesn't appear to
support writing the DEBUG_S_FRAMEDATA subsection, and instead
just writes these records to the .debug$F section.
Although clang-cl does not emit a .debug$F section ever, lld still
needs to support it so we have good debugging for CRT functions.
Differential Revision: https://reviews.llvm.org/D51958
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342080
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Krzysztof Parzyszek [Wed, 12 Sep 2018 20:58:48 +0000 (20:58 +0000)]
[Hexagon] Use legalized type for extracted elements in scalarizeShuffle
Scalarization of a shuffle will break up the source vectors into individual
elements, and use them to assemble the resulting vector. An element type of
a legal vector type may not necessarily be a legal scalar type, so make
sure that the extracted values are extended to a legal scalar type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342079
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Konstantin Zhuravlyov [Wed, 12 Sep 2018 20:25:39 +0000 (20:25 +0000)]
AMDGPU: Print all kernel descriptor directives (including the ones with default values)
Change by Tony Tye
Differential Revision: https://reviews.llvm.org/D51954
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342077
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Roman Lebedev [Wed, 12 Sep 2018 20:06:46 +0000 (20:06 +0000)]
[NFC][InstCombine] Drop newly-added interference-tests-for-high-bit-check.ll
Now that i have actually double-checked, no,
there is no such interference possible...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342076
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Roman Lebedev [Wed, 12 Sep 2018 19:44:26 +0000 (19:44 +0000)]
[NFC][InstCombine] R38708 - inefficient pattern for high-bits checking.
More complicated, canonical pattern:
https://rise4fun.com/Alive/uhA
https://godbolt.org/z/o4RB8D
Also, we need to be careful not to skip some patters...
https://bugs.llvm.org/show_bug.cgi?id=38708
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342074
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Konstantin Zhuravlyov [Wed, 12 Sep 2018 18:50:47 +0000 (18:50 +0000)]
AMDGPU: Re-apply r341982 after fixing the layering issue
Move isa version determination into TargetParser.
Also switch away from target features to CPU string when
determining isa version. This fixes an issue when we
output wrong isa version in the object code when features
of a particular CPU are altered (i.e. gfx902 w/o xnack
used to result in gfx900).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342069
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Roman Lebedev [Wed, 12 Sep 2018 18:19:43 +0000 (18:19 +0000)]
[InstCombine] Inefficient pattern for high-bits checking (PR38708)
Summary:
It is sometimes important to check that some newly-computed value
is non-negative and only `n` bits wide (where `n` is a variable.)
There are **many** ways to check that:
https://godbolt.org/z/o4RB8D
The last variant seems best?
(I'm sure there are some other variations i haven't thought of..)
Let's handle the second variant first, since it is much simpler.
https://rise4fun.com/Alive/LYjY
https://bugs.llvm.org/show_bug.cgi?id=38708
Reviewers: spatel, craig.topper, RKSimon
Reviewed By: spatel
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D51985
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342067
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Julie Hockett [Wed, 12 Sep 2018 17:56:31 +0000 (17:56 +0000)]
[objcopy] make objcopy follow program header standards
Submitted on behalf of Armando Montanez (amontanez@google.com).
Objects with unused program headers copied by objcopy would always have
nonzero values for program header offset and program header entry size.
While technically valid, this atypical behavior triggers warnings in some
tools. This change sets the two fields to zero when the program header is
unused, better fitting the general expectations for unused program header
data.
Section headers behaved somewhat similarly (though only with the entry size),
and are fixed in this revision as well.
Differential Revision: https://reviews.llvm.org/D51961
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342065
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Thomas Lively [Wed, 12 Sep 2018 17:56:00 +0000 (17:56 +0000)]
[WebAssembly] SIMD comparisons
Summary:
Match the ordering semantics of non-vector comparisons. For
floating point comparisons that do not correspond to instructions, the
tests check that some vector comparison instruction was emitted but do
not care about the full implementation.
Reviewers: aheejin, dschuff
Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits
Differential Revision: https://reviews.llvm.org/D51765
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342064
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Diogo N. Sampaio [Wed, 12 Sep 2018 16:24:43 +0000 (16:24 +0000)]
[ARM] Tighten f64<->f16 conversion requirements
Fix missing Requires fields.
Patch by Bernard Ogden (bogden)
Reviewers: SjoerdMeijer, javed.absar, t.p.northover
Reviewed By: t.p.northover
Differential Revision: https://reviews.llvm.org/D51631
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342061
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Craig Topper [Wed, 12 Sep 2018 15:47:34 +0000 (15:47 +0000)]
[X86] Remove isel patterns for ADCX instruction
There's no advantage to this instruction unless you need to avoid touching other flag bits. It's encoding is longer, it can't fold an immediate, it doesn't write all the flags.
I don't think gcc will generate this instruction either.
Fixes PR38852.
Differential Revision: https://reviews.llvm.org/D51754
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342059
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Florian Hahn [Wed, 12 Sep 2018 14:52:38 +0000 (14:52 +0000)]
[PatternMatch] Use generic One,Two,ThreeOps_match classes (NFC).
Currently we have a few duplicated matcher classes, which all do pretty
much the same thing. This patch introduces generic
One,Tow,ThreeOps_match classes which take the opcode the match as
template argument.
Reviewers: SjoerdMeijer, dneilson, spatel, arsenm
Reviewed By: SjoerdMeijer
Differential Revision: https://reviews.llvm.org/D51044
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342058
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Wolfgang Pieb [Wed, 12 Sep 2018 14:40:04 +0000 (14:40 +0000)]
Reverting r342048, which caused UBSan failures in dsymutil.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342056
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Alexandros Lamprineas [Wed, 12 Sep 2018 14:28:23 +0000 (14:28 +0000)]
[GVNHoist] computeInsertionPoints() miscalculates IDF
Fix for https://bugs.llvm.org/show_bug.cgi?id=38912.
In GVNHoist::computeInsertionPoints() we iterate over the Value
Numbers and calculate the Iterated Dominance Frontiers without
clearing the IDFBlocks vector first. IDFBlocks ends up accumulating
an insane number of basic blocks, which bloats the compilation time
of SemaChecking.cpp with ubsan enabled.
Differential Revision: https://reviews.llvm.org/D51980
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342055
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Roman Lebedev [Wed, 12 Sep 2018 14:11:37 +0000 (14:11 +0000)]
[NFC][InstCombine] R38708 - inefficient pattern for high-bits checking.
The simplest pattern for now:
https://rise4fun.com/Alive/LYjY
https://godbolt.org/z/o4RB8D
https://bugs.llvm.org/show_bug.cgi?id=38708
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342054
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Sander de Smalen [Wed, 12 Sep 2018 12:10:22 +0000 (12:10 +0000)]
[AArch64] Implement aarch64_vector_pcs codegen support.
This patch adds codegen support for the saving/restoring
V8-V23 for functions specified with the aarch64_vector_pcs
calling convention attribute, as added in patch D51477.
Reviewers: t.p.northover, gberry, thegameg, rengolin, javed.absar, MatzeB
Reviewed By: thegameg
Differential Revision: https://reviews.llvm.org/D51479
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342049
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Wolfgang Pieb [Wed, 12 Sep 2018 12:01:19 +0000 (12:01 +0000)]
[DWARF] Refactoring range list dumping to fold DWARF v4 functionality into v5 handling
Eliminating some duplication of rangelist dumping code at the expense of
some version-dependent code in dump and extract routines.
Reviewer: dblaikie, JDevlieghere, vleschuk
Differential revision: https://reviews.llvm.org/D51081
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342048
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Kristof Umann [Wed, 12 Sep 2018 11:20:15 +0000 (11:20 +0000)]
[ADT] Made numerous methods of ImmutableList const
Also added ImmutableList<T>::iterator::operator->.
Differential Revision: https://reviews.llvm.org/D51881
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342045
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David Green [Wed, 12 Sep 2018 10:19:10 +0000 (10:19 +0000)]
[CGP] Ensure splitgep gives deterministic output
The output of splitLargeGEPOffsets does not appear to be deterministic because
of the way that we iterate over a DenseMap. I've changed it to a MapVector for
consistent output.
The test here isn't particularly great, only showing a consmetic difference in
output. The original reproducer is much larger but show a diffierence in
instruction ordering, leading to different codegen.
Differential Revision: https://reviews.llvm.org/D51851
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342043
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Sam Parker [Wed, 12 Sep 2018 09:58:56 +0000 (09:58 +0000)]
[ARM] Follow-up to rL342033
Fixed typo which can cause segfault.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342040
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David Green [Wed, 12 Sep 2018 09:54:17 +0000 (09:54 +0000)]
[SimplifyCFG] Put an alignment on generated switch tables
Previously the alignment on the newly created switch table data was not set,
meaning that DataLayout::getPreferredAlignment was free to overalign it to 16
bytes. This causes unnecessary code bloat.
Differential Revision: https://reviews.llvm.org/D51800
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342039
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Sander de Smalen [Wed, 12 Sep 2018 09:44:46 +0000 (09:44 +0000)]
[AArch64] NFC: Refactoring to prepare for vector PCS.
This patch refactors several parts of AArch64FrameLowering
so that it can be easily extended to support saving/restoring
of FPR128 (Q) registers.
Reviewers: t.p.northover, gberry, thegameg, rengolin, javed.absar
Reviewed By: thegameg
Differential Revision: https://reviews.llvm.org/D51478
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342038
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Clement Courbet [Wed, 12 Sep 2018 09:26:32 +0000 (09:26 +0000)]
[llvm-exegesis][NFC]Remove dead function parameter
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@342035
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