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Pengfei Qu [Wed, 28 Dec 2016 03:22:46 +0000 (11:22 +0800)]
ENC:support more quality level and switch to new AVC encoder solution on SKL
Signed-off-by: Pengfei Qu <Pengfei.Qu@intel.com>
Signed-off-by: Sean V Kelley <seanvk@posteo.de>
Pengfei Qu [Wed, 28 Dec 2016 05:50:27 +0000 (13:50 +0800)]
ENC: add Misc parameter check for AVC encoder
Signed-off-by: Pengfei Qu <Pengfei.Qu@intel.com>
Reviewed-by: Sean V Kelley <seanvk@posteo.de>
Pengfei Qu [Wed, 28 Dec 2016 05:49:38 +0000 (13:49 +0800)]
ENC: add VME/MFX context init for AVC encoder
Signed-off-by: Pengfei Qu <Pengfei.Qu@intel.com>
Reviewed-by: Sean V Kelley <seanvk@posteo.de>
Pengfei Qu [Wed, 28 Dec 2016 05:48:45 +0000 (13:48 +0800)]
ENC: add MFX pipeline init/prepare/run for AVC encoder
Signed-off-by: Pengfei Qu <Pengfei.Qu@intel.com>
Reviewed-by: Sean V Kelley <seanvk@posteo.de>
Pengfei Qu [Wed, 28 Dec 2016 05:47:39 +0000 (13:47 +0800)]
ENC: add MFX Picture/slice level command init for AVC encoder
Signed-off-by: Pengfei Qu <Pengfei.Qu@intel.com>
Reviewed-by: Sean V Kelley <seanvk@posteo.de>
Pengfei Qu [Wed, 28 Dec 2016 05:46:13 +0000 (13:46 +0800)]
ENC: add MFX command for AVC encoder
Signed-off-by: Pengfei Qu <Pengfei.Qu@intel.com>
Reviewed-by: Sean V Kelley <seanvk@posteo.de>
Pengfei Qu [Wed, 28 Dec 2016 05:45:06 +0000 (13:45 +0800)]
ENC: add MFX command for AVC encoder
Signed-off-by: Pengfei Qu <Pengfei.Qu@intel.com>
Reviewed-by: Sean V Kelley <seanvk@posteo.de>
Pengfei Qu [Wed, 28 Dec 2016 05:44:03 +0000 (13:44 +0800)]
ENC: VME pipeline init/prepare/run function for AVC encoder
Signed-off-by: Pengfei Qu <Pengfei.Qu@intel.com>
Reviewed-by: Sean V Kelley <seanvk@posteo.de>
Pengfei Qu [Wed, 28 Dec 2016 05:42:28 +0000 (13:42 +0800)]
ENC: kernel related parameter check function for AVC encoder
Signed-off-by: Pengfei Qu <Pengfei.Qu@intel.com>
Reviewed-by: Sean V Kelley <seanvk@posteo.de>
Pengfei Qu [Wed, 28 Dec 2016 05:41:33 +0000 (13:41 +0800)]
ENC: kernel init/destroy function for AVC encoder
Signed-off-by: Pengfei Qu <Pengfei.Qu@intel.com>
Reviewed-by: Sean V Kelley <seanvk@posteo.de>
Pengfei Qu [Wed, 28 Dec 2016 05:40:39 +0000 (13:40 +0800)]
ENC: WP/SFD kernel for AVC encoder
Signed-off-by: Pengfei Qu <Pengfei.Qu@intel.com>
Reviewed-by: Sean V Kelley <seanvk@posteo.de>
Pengfei Qu [Wed, 28 Dec 2016 05:39:53 +0000 (13:39 +0800)]
ENC: ME kernel for AVC encoder
Signed-off-by: Pengfei Qu <Pengfei.Qu@intel.com>
Reviewed-by: Sean V Kelley <seanvk@posteo.de>
Pengfei Qu [Wed, 28 Dec 2016 05:39:06 +0000 (13:39 +0800)]
ENC: MBENC kernel for AVC encoder
Signed-off-by: Pengfei Qu <Pengfei.Qu@intel.com>
Reviewed-by: Sean V Kelley <seanvk@posteo.de>
Pengfei Qu [Wed, 28 Dec 2016 05:37:56 +0000 (13:37 +0800)]
ENC: add REF frame QA caculation and MB level const data init for AVC MBenc stage
Signed-off-by: Pengfei Qu <Pengfei.Qu@intel.com>
Reviewed-by: Sean V Kelley <seanvk@posteo.de>
Pengfei Qu [Wed, 28 Dec 2016 05:37:05 +0000 (13:37 +0800)]
ENC: add BRC MB level update kernel for AVC RC logic
Signed-off-by: Pengfei Qu <Pengfei.Qu@intel.com>
Reviewed-by: Sean V Kelley <seanvk@posteo.de>
Pengfei Qu [Wed, 28 Dec 2016 05:34:05 +0000 (13:34 +0800)]
ENC: add BRC frame update kernel for AVC RC logic
Signed-off-by: Pengfei Qu <Pengfei.Qu@intel.com>
Reviewed-by: Sean V Kelley <seanvk@posteo.de>
Pengfei Qu [Wed, 28 Dec 2016 02:41:46 +0000 (10:41 +0800)]
ENC: add BRC init/reset kernel for AVC RC logic
Signed-off-by: Pengfei Qu <Pengfei.Qu@intel.com>
Reviewed-by: Sean V Kelley <seanvk@posteo.de>
Pengfei Qu [Wed, 28 Dec 2016 02:36:40 +0000 (10:36 +0800)]
ENC: add const data/table init function for AVC RC logic
Signed-off-by: Pengfei Qu <Pengfei.Qu@intel.com>
Reviewed-by: Sean V Kelley <seanvk@posteo.de>
Pengfei Qu [Wed, 28 Dec 2016 02:35:02 +0000 (10:35 +0800)]
ENC: add scaling kernel for AVC encoder
Signed-off-by: Pengfei Qu <Pengfei.Qu@intel.com>
Reviewed-by: Sean V Kelley <seanvk@posteo.de>
Pengfei Qu [Wed, 28 Dec 2016 02:33:41 +0000 (10:33 +0800)]
ENC: add kernel media object related functions for AVC encoder
Signed-off-by: Pengfei Qu <Pengfei.Qu@intel.com>
Reviewed-by: Sean V Kelley <seanvk@posteo.de>
Pengfei Qu [Wed, 28 Dec 2016 02:31:44 +0000 (10:31 +0800)]
ENC: add resource/surface allocation/free function for AVC encoder
Signed-off-by: Pengfei Qu <Pengfei.Qu@intel.com>
Reviewed-by: Sean V Kelley <seanvk@posteo.de>
Pengfei Qu [Wed, 28 Dec 2016 02:30:18 +0000 (10:30 +0800)]
ENC: add init table for frame/mb brc update
Signed-off-by: Pengfei Qu <Pengfei.Qu@intel.com>
Reviewed-by: Sean V Kelley <seanvk@posteo.de>
Pengfei Qu [Wed, 28 Dec 2016 02:24:46 +0000 (10:24 +0800)]
ENC: add resource and surface allocation and free function for AVC encoder
Signed-off-by: Pengfei Qu <Pengfei.Qu@intel.com>
Reviewed-by: Sean V Kelley <seanvk@posteo.de>
Pengfei Qu [Wed, 28 Dec 2016 02:22:12 +0000 (10:22 +0800)]
ENC: add misc parameter check for AVC encoder
Signed-off-by: Pengfei Qu <Pengfei.Qu@intel.com>
Reviewed-by: Sean V Kelley <seanvk@posteo.de>
Pengfei Qu [Wed, 28 Dec 2016 02:17:02 +0000 (10:17 +0800)]
ENC: add kernel related structure and define for AVC
Signed-off-by: Pengfei Qu <Pengfei.Qu@intel.com>
Reviewed-by: Sean V Kelley <seanvk@posteo.de>
Pengfei Qu [Wed, 28 Dec 2016 04:40:15 +0000 (12:40 +0800)]
ENC: add AVC common structure and functions
Signed-off-by: Pengfei Qu <Pengfei.Qu@intel.com>
Reviewed-by: Sean V Kelley <seanvk@posteo.de>
Pengfei Qu [Wed, 28 Dec 2016 02:13:35 +0000 (10:13 +0800)]
ENC: add AVC kernel binary on SKL
Signed-off-by: Pengfei Qu <Pengfei.Qu@intel.com>
Reviewed-by: Sean V Kelley <seanvk@posteo.de>
Pengfei Qu [Wed, 28 Dec 2016 02:10:06 +0000 (10:10 +0800)]
ENC: add const data/table for AVC encoder
Signed-off-by: Pengfei Qu <Pengfei.Qu@intel.com>
Reviewed-by: Sean V Kelley <seanvk@posteo.de>
Pengfei Qu [Wed, 28 Dec 2016 02:08:45 +0000 (10:08 +0800)]
ENC:add context init function for AVC/HEVC encoder
Signed-off-by: Pengfei Qu <Pengfei.Qu@intel.com>
Reviewed-by: Sean V Kelley <seanvk@posteo.de>
Pengfei Qu [Wed, 28 Dec 2016 02:07:26 +0000 (10:07 +0800)]
ENC: add common structure for AVC/HEVC encoder
Signed-off-by: Pengfei Qu <Pengfei.Qu@intel.com>
Reviewed-by: Sean V Kelley <seanvk@posteo.de>
Pengfei Qu [Wed, 28 Dec 2016 01:48:15 +0000 (09:48 +0800)]
ENC: move gpe related function into src/i965_gpe_utils.h/c
Signed-off-by: Pengfei Qu <Pengfei.Qu@intel.com>
Reviewed-by: Sean V Kelley <seanvk@posteo.de>
Mark Thompson [Tue, 10 Jan 2017 00:04:43 +0000 (00:04 +0000)]
H.264 encoder: add a simple reactive VBR rate control mode
This implements a simple reactive VBR rate control mode for single-layer H.264.
The primary aim here is to avoid the problematic behaviour that the CBR rate
controller displays on scene changes, where the QP can get pushed up by a large
amount in a short period and compromise the quality of following frames to a
very visible degree.
The main idea, then, is to try to keep the HRD buffering above the target level
most of the time, so that when a large frame is generated (on a scene change or
when the stream complexity increases) we have plenty of slack to be able to
encode the more difficult region without compromising quality immediately on
the following frames. It is optimistic about the complexity of future frames,
so even after generating one or more large frames on a significant change it
will try to keep the QP at its current level until the HRD buffer bounds force
a change to maintain the intended rate.
Compared to the CBR rate controller, it keeps the quality level much more
stable - QP does not always spike up as large frames are generated when the
complexity of the stream increases transiently, but equally it does not reduce
as quickly when the complexity of the stream decreases.
Signed-off-by: Mark Thompson <sw@jkqxz.net>
Xiang, Haihao [Mon, 9 Jan 2017 07:00:24 +0000 (15:00 +0800)]
1.8.0.pre1 for development
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Mon, 9 Jan 2017 06:00:06 +0000 (14:00 +0800)]
Merge branch 'v1.7-branch' into fdo--master
Conflicts:
configure.ac
src/gen6_mfc.h
src/gen6_mfc_common.c
src/gen75_picture_process.c
src/gen75_vpp_vebox.h
src/gen8_mfc.c
src/gen9_mfc_hevc.c
src/gen9_vdenc.c
src/gen9_vme.c
src/gen9_vp9_encoder.c
src/i965_drv_video.c
src/i965_drv_video.h
src/i965_encoder.c
src/i965_encoder.h
src/intel_driver.c
src/intel_driver.h
test/i965_avcd_config_test.cpp
test/i965_avce_config_test.cpp
test/i965_jpegd_config_test.cpp
test/i965_jpege_config_test.cpp
Xiang, Haihao [Wed, 4 Jan 2017 01:40:48 +0000 (09:40 +0800)]
Encoder: release all misc parameter buffers
User can still use the old setting if needed because the setting is
stored in a common structure now.
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Reviewed-by: Mark Thompson <sw@jkqxz.net>
Tested-by: Mark Thompson <sw@jkqxz.net>
Xiang, Haihao [Wed, 4 Jan 2017 01:40:47 +0000 (09:40 +0800)]
AVC encoder: use generic ROI parameters
Presently ROI parameters are stored in the common structure, each
codec can use these parameters.
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Mark Thompson [Wed, 4 Jan 2017 09:15:06 +0000 (09:15 +0000)]
H.264 encoder: respect initial QP setting
Signed-off-by: Mark Thompson <sw@jkqxz.net>
Reviewed-by: Xiang, Haihao<haihao.xiang@intel.com>
Mark Thompson [Tue, 3 Jan 2017 23:43:38 +0000 (23:43 +0000)]
H.264 encoder: respect min QP setting
Signed-off-by: Mark Thompson <sw@jkqxz.net>
Reviewed-by: Xiang, Haihao<haihao.xiang@intel.com>
Xiang, Haihao [Fri, 30 Dec 2016 07:21:59 +0000 (15:21 +0800)]
Initialize some buffers to 0 when created
Sometimes user doesn't assign a proper value to each field in a buffer
when calling vaRenderPicture(), which will result in random issues
if we want to use these fields in the future. E.g. recently we used
window_size in VAEncMiscParameterRateControl for bitrate control.
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
Xiang, Haihao [Wed, 14 Dec 2016 03:03:59 +0000 (11:03 +0800)]
Needn't reset brc if the bitrate setting isn't changed in the Begin/Render/End sequence
User can use VAEncMiscParameterRateControl to update bitrate, so we should ignore
the bitrate in the sequence parameter if VAEncMiscParameterRateControl is present.
Hence it is not needed to reset brc if VAEncMiscParameterRateControl doesn't change
the used bitrate.
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
Zhao Yakui [Wed, 28 Dec 2016 05:45:28 +0000 (13:45 +0800)]
Add new sequence flag check for HEVC/VP9 Encoding
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Reviewed-by: Xiang, Haihao<haihao.xiang@intel.com>
Xiang, Haihao [Fri, 23 Dec 2016 16:58:04 +0000 (00:58 +0800)]
Support AVC VDEnc on KBL
I verified AVC VDEnc on KBL with the HuC loading patch from
https://patchwork.freedesktop.org/api/1.0/series/16584/revisions/1/mbox/
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Reviewed-by: Kelley, Sean V <sean.v.kelley@intel.com>
Tested-by: Tang, FuweiX <fuweix.tang@intel.com>
Xiang, Haihao [Fri, 16 Dec 2016 07:21:43 +0000 (15:21 +0800)]
Enable AVC VDEnc on BXT
I verified AVC VDEnc with the HuC loading patch from
https://patchwork.freedesktop.org/api/1.0/series/16584/revisions/1/mbox/
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Tested-by: Tang, FuweiX <fuweix.tang@intel.com>
Xiang, Haihao [Fri, 23 Dec 2016 16:01:53 +0000 (00:01 +0800)]
VDEnc: update the constant buffer
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Reviewed-by: Kelley, Sean V <sean.v.kelley@intel.com>
Xiang, Haihao [Fri, 23 Dec 2016 16:01:52 +0000 (00:01 +0800)]
VDEnc: update the value of inter rounding for CQP mode
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Reviewed-by: Kelley, Sean V <sean.v.kelley@intel.com>
Xiang, Haihao [Fri, 23 Dec 2016 16:01:51 +0000 (00:01 +0800)]
VDEnc: update the MFX_AVC_IMG_STATE command
Don't enable brc domain rate control if HuC is not used.
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Reviewed-by: Kelley, Sean V <sean.v.kelley@intel.com>
Xiang, Haihao [Fri, 23 Dec 2016 16:01:50 +0000 (00:01 +0800)]
VDEnc: always enable bitrate control per mb
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Reviewed-by: Kelley, Sean V <sean.v.kelley@intel.com>
Mark Thompson [Fri, 23 Dec 2016 01:11:38 +0000 (01:11 +0000)]
VP9 encoder: use generic rate control parameters
Also adds support for fractional framerate.
Signed-off-by: Mark Thompson <sw@jkqxz.net>
Reviewed-by: Xiang, Haihao<haihao.xiang@intel.com>
Mark Thompson [Fri, 23 Dec 2016 01:10:49 +0000 (01:10 +0000)]
VP8 encoder: use generic rate control parameters
Signed-off-by: Mark Thompson <sw@jkqxz.net>
Reviewed-by: Xiang, Haihao<haihao.xiang@intel.com>
Mark Thompson [Fri, 23 Dec 2016 01:10:04 +0000 (01:10 +0000)]
HEVC encoder: use generic rate control parameters
Signed-off-by: Mark Thompson <sw@jkqxz.net>
Reviewed-by: Xiang, Haihao<haihao.xiang@intel.com>
Mark Thompson [Fri, 23 Dec 2016 01:08:27 +0000 (01:08 +0000)]
i965_encoder: consistently represent framerate as a fraction
Update references in both H.264 encoders (gen6_mfc and gen9_vdenc).
Signed-off-by: Mark Thompson <sw@jkqxz.net>
Reviewed-by: Xiang, Haihao<haihao.xiang@intel.com>
Mark Thompson [Mon, 5 Dec 2016 17:54:58 +0000 (17:54 +0000)]
H.265 main 10 encoder supports only 10bpp render targets
Signed-off-by: Mark Thompson <sw@jkqxz.net>
Reviewed-by: Sean V Kelley <seanvk@posteo.de>
Xiang, Haihao [Mon, 28 Nov 2016 07:35:21 +0000 (15:35 +0800)]
Check VP8 brc parameters in the common function
These parameters are irrelative to platforms
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Fri, 18 Nov 2016 07:01:37 +0000 (15:01 +0800)]
Add a function table for used GPE functions
It is useful for sharing GPE based code between different platforms
Currently it is available on GEN8+
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
Xiang, Haihao [Tue, 29 Nov 2016 05:22:18 +0000 (13:22 +0800)]
Rename gen9_gpe_mi_load_register_xxx() to gen8_gpe_mi_load_register_xxx()
xxx is mem/imm/reg and the 3 functions can be used for GEN8 too
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Tue, 22 Nov 2016 07:46:22 +0000 (15:46 +0800)]
Don't parse Misc parameters in VDEnc
Instead we can use the parameters saved in the common encoder context.
It also corrects frame rate used in VDEnc
v2: Align the ROI region and fix compile error after rebase
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
peng.chen [Mon, 21 Nov 2016 07:41:37 +0000 (15:41 +0800)]
Save other bitrate control parameters in the common encoder context
These parameters can be used for all codecs
v2: Save mb_rate_control/target_percentage per layer too
Signed-off-by: peng.chen <peng.c.chen@intel.com>
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
peng.chen [Fri, 18 Nov 2016 02:47:01 +0000 (10:47 +0800)]
Save ROI parameters in the common encoder context
These parameters can be used for all codecs
v2: Don't align ROI region, each codec might have
special requirement
Signed-off-by: peng.chen <peng.c.chen@intel.com>
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
Zhao Yakui [Thu, 24 Nov 2016 01:04:12 +0000 (20:04 -0500)]
Rewrite Media_kernel to optimize the YUV420 8Bit-scaling on Gen8
The following conversion is supported:
NV12->NV12
NV12->I420
I420->NV12
I420->I420
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Reviewed-by: Xiang, Haihao<haihao.xiang@intel.com>
Zhao Yakui [Thu, 24 Nov 2016 01:04:11 +0000 (20:04 -0500)]
Rewrite Media_kernel to optimize the YUV420 8Bit-scaling on Gen9+
V1->V2: Add the support of clearing background color for NV12
The following conversion is supported:
NV12->NV12
NV12->I420
I420->NV12
I420->I420
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Reviewed-by: Xiang, Haihao<haihao.xiang@intel.com>
Zhao Yakui [Thu, 24 Nov 2016 01:04:10 +0000 (20:04 -0500)]
Move some VPP structures/functions into the common files to support more platforms
This is to define some common structures/functions so that they can
be used on more platforms when adding new VPP functions.
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Reviewed-by: Xiang, Haihao<haihao.xiang@intel.com>
Daniel Charles [Tue, 22 Nov 2016 00:23:27 +0000 (16:23 -0800)]
i965_GetDisplayAttributes: propagate flags from src to dst
flags need to be propagated for user to know which flags
are supported by VADisplayAttribType.
When only VA_DISPLAY_ATTRIB_SETTABLE is reported as flag
then it has to be propagated back to user. The rest of the
values should be left untouched
Signed-off-by: Daniel Charles <daniel.charles@intel.com>
Zhao Yakui [Sun, 20 Nov 2016 19:41:45 +0000 (14:41 -0500)]
Add the 10bit-scaling conversion for I010 format
I010 format is another kind of 10-bit surface. And its layout is similar to I420.
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Zhao Yakui [Sun, 20 Nov 2016 19:41:44 +0000 (14:41 -0500)]
Add the support of 10bit I010 surface
And it is treated as non-tiling for I010 surfaces, which is like I420.
Every pixel also uses two bytes like P010 but it occupies the lower 10-bit.
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Zhao Yakui [Sun, 20 Nov 2016 19:41:43 +0000 (14:41 -0500)]
Use obtained eu_counts to configure GPU media pipeline on Gen8/Gen9
If it is not supported, it will fall back to the original config.
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Reviewed-by: Charles Daniel <daniel.charles@intel.com>
Zhao Yakui [Sun, 20 Nov 2016 19:41:42 +0000 (14:41 -0500)]
Query the kernel API to check the EU counts of GPU device
This info can be used to configure the max EU threads of GPU device.
>eu_total * 6
V2->V3: Refresh the patches again.
V1->V2: Remove the extra bit_field of has_eu_flag. Instead the eu_total > 0
can be used.
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Reviewed-by: Charles Daniel <daniel.charles@intel.com>
Xiang, Haihao [Thu, 10 Nov 2016 17:42:44 +0000 (01:42 +0800)]
Add a new gpe function gen8_gpe_pipe_control() for GEN8
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
Xiang, Haihao [Thu, 10 Nov 2016 14:13:44 +0000 (22:13 +0800)]
Add a new gpe function gen8_gpe_mi_conditional_batch_buffer_end() for GEN8
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
Xiang, Haihao [Thu, 10 Nov 2016 15:48:06 +0000 (23:48 +0800)]
Add a new gpe function gen8_gpe_context_add_surface() to set surface state on GEN8
v2: Add support for override_offset, clean up the code for 2D surface.
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
Xiang, Haihao [Thu, 10 Nov 2016 14:05:26 +0000 (22:05 +0800)]
Add a new gpe function gen8_gpe_reset_binding_table() to reset binging table
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
Xiang, Haihao [Thu, 10 Nov 2016 16:49:28 +0000 (00:49 +0800)]
Rename gen9_gpe_mi_store_register_mem() to gen8_gpe_mi_store_register_mem()
This function can be used on GEN8 too
v2: rebased
v3: Fix commit log
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
Xiang, Haihao [Thu, 10 Nov 2016 16:48:51 +0000 (00:48 +0800)]
Rename gen9_gpe_mi_flush_dw() to gen8_gpe_mi_flush_dw()
This function can be used on GEN8 too
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
Xiang, Haihao [Thu, 10 Nov 2016 16:48:02 +0000 (00:48 +0800)]
Rename gen9_gpe_mi_store_data_imm() to gen8_gpe_mi_store_data_imm()
This function can be used on GEN8 too
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
Xiang, Haihao [Thu, 10 Nov 2016 16:16:06 +0000 (00:16 +0800)]
Rename gen9_gpe_mi_batch_buffer_start() to gen8_gpe_mi_batch_buffer_start()
This function can be used on GEN8 too
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
Xiang, Haihao [Thu, 10 Nov 2016 16:30:50 +0000 (00:30 +0800)]
Rename gen9_gpe_media_object_walker() to gen8_gpe_media_object_walker()
This function can be used on GEN8 too
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
Xiang, Haihao [Tue, 25 Oct 2016 07:32:49 +0000 (15:32 +0800)]
Rename i965_gpe_dri_object_to_2d_gpe_resource() to i965_dri_object_to_2d_gpe_resource()
Like as i965_dri_object_to_buffer_gpe_resource(), use i965_ instead of i965_gpe_ as prefix
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
Xiang, Haihao [Tue, 25 Oct 2016 07:25:15 +0000 (15:25 +0800)]
Rename gen8p_gpe_context_map_curbe()/gen8p_gpe_context_unmap_curbe() to i965_gpe_context_map_curbe()/i965_gpe_context_unmap_curbe()
gpe_context->curbe.bo always points to the curbe buffer now, and the two functions
can be used on all platforms
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
Xiang, Haihao [Thu, 9 Apr 2015 01:52:44 +0000 (09:52 +0800)]
Fix curbe length in CMD_MEDIA_CURBE_LOAD on GEN8+
It is multiple of 64 bytes
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
Xiang, Haihao [Thu, 9 Apr 2015 01:52:44 +0000 (09:52 +0800)]
Fix the size calculation of the required memory for dynamic state buffer
Make sure the size for each part in dynamic state buffer is multiple of 64 bytes.
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
Xiang, Haihao [Wed, 8 Apr 2015 08:10:25 +0000 (16:10 +0800)]
Move sampler state related settings to the inner structure in i965_gpe_context
User can set sampler entry size and the number of sampler entries now. sampler.bo is
always set even if the sampler state is a part of the dynamic state buffer, hence we
can use the corresponding settings no matter sampler state is a part of the dynamic
state buffer or not.
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
Xiang, Haihao [Wed, 8 Apr 2015 07:58:35 +0000 (15:58 +0800)]
Move interface descriptor remapping table related settings to the inner structure in i965_gpe_context
This patch delete idrt_size and use (idrt.max_entries * idrt.entry_size) instead.
idrt.bo is always set even if the interface descriptor remapping table is a part of
the dynamic state buffer, hence we can use the corresponding settings no matter this
table is a part of the dynamic state buffer or not.
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
Xiang, Haihao [Wed, 8 Apr 2015 07:42:17 +0000 (15:42 +0800)]
Move all curbe related settings to the inner structure in i965_gpe_context
To avoid confusion between curbe.length and curbe_size, this patch uses
curbe.length only. curbe.bo is always set even if curbe is a part of the
dynamic state buffer, hence we can use curbe related settings no matter
it is a part of the dynamic state buffer or not.
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
Xiang, Haihao [Tue, 7 Apr 2015 07:40:30 +0000 (15:40 +0800)]
Change the size calculation of the required memory for all GPE kernels
Make sure the size is multiple of 64 bytes
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
Daniel Charles [Thu, 17 Nov 2016 01:20:02 +0000 (17:20 -0800)]
i965_driver_info: add vp9_enc_profiles
Not all profiles for vp9 are supported by the encoder and user needs
to know about it
Signed-off-by: Daniel Charles <daniel.charles@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
Zhao Yakui [Wed, 16 Nov 2016 17:23:44 +0000 (12:23 -0500)]
Align coordinate/width of DST rect for 10-bit VPP conversion
This is the HW requirement and it is handled internally.
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Reviewed-by: Xiang, Haihao<haihao.xiang@intel.com>
Reviewed-by: Sean V Kelley <seanvk@posteo.de>
Zhao Yakui [Wed, 16 Nov 2016 17:23:43 +0000 (12:23 -0500)]
Execute the 10-bit scaling for P010 surface on Gen9+
Now the 10-bit scaling based on GPU shader is supported on Gen9+. In such
case it will use the 10-bit scaling based on GPU shader instead of three-step
conversions, which leverages the VEBOX(P010->NV12->Scale NV12->P010). Of
course when the size is not changed, it still falls back to VEBOX.
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Reviewed-by: Xiang, Haihao<haihao.xiang@intel.com>
Reviewed-by: Sean V Kelley <seanvk@posteo.de>
Zhao Yakui [Wed, 16 Nov 2016 17:23:42 +0000 (12:23 -0500)]
VPP select the appropriate fourcc for deferred surface based on expected format
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Reviewed-by: Xiang, Haihao<haihao.xiang@intel.com>
Reviewed-by: Sean V Kelley <seanvk@posteo.de>
Zhao Yakui [Wed, 16 Nov 2016 17:23:41 +0000 (12:23 -0500)]
Initialize one 10bit-scaling gpe_context for Gen9
V1->V2: Add the conv_p010.g9b shader into the dist list
V3: remove the compiler warnings
gen9_vme.c: In function 'gen9_intel_init_hevc_surface':
gen9_vme.c:1836:9: warning: implicit declaration of function 'i965_image_processing' [-Wimplicit-function-declaration]
i965_render.c: In function 'intel_render_put_surface':
i965_render.c:3079:5: warning: implicit declaration of function 'i965_post_processing' [-Wimplicit-function-declaration]
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Reviewed-by: Sean V Kelley <seanvk@posteo.de>
Zhao Yakui [Wed, 16 Nov 2016 17:23:40 +0000 (12:23 -0500)]
Initialize internal context based on Render ring earlier
V1->V2: Remove the unnecessary implicit initialization in gen75_vpp_fmt_cvt
as it is already initalized.
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Reviewed-by: Sean V Kelley <seanvk@posteo.de>
Zhao Yakui [Wed, 16 Nov 2016 17:23:39 +0000 (12:23 -0500)]
Add one API to initialize MEDIA_OBJECT_WALKER parameter for video post-processing
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Reviewed-by: Xiang, Haihao<haihao.xiang@intel.com>
Reviewed-by: Sean V Kelley <seanvk@posteo.de>
Zhao Yakui [Wed, 16 Nov 2016 17:23:38 +0000 (12:23 -0500)]
Add the 10-bit flag for MEDIA_BLOCK_RW operation on P010 surface
V1->V2: Use the is_16bpp instead of is_10bit
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Reviewed-by: Sean V Kelley <seanvk@posteo.de>
Zhao Yakui [Wed, 16 Nov 2016 17:23:37 +0000 (12:23 -0500)]
Fix the incorrect sampler_state offset for INTERFACE_DESCRIPTOR_DATA on BDW+
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Reviewed-by: Xiang, Haihao<haihao.xiang@intel.com>
Reviewed-by: Sean V Kelley <seanvk@posteo.de>
Víctor Manuel Jáquez Leal [Mon, 14 Nov 2016 14:44:29 +0000 (15:44 +0100)]
avoid asserts when color convertion fails
This patch exposes the color convertion failure in this case
gst-play-1.0 HPCAMOLQ_BRCM_B.264 --videosink=xvimagesink
This pipeline will ask to the VPP to convert from GRAY8 to YV12,
which is the negotiated format with the XV renderer.
But this conversion fails. Without this patch, an assert will show
up:
i965_proc_picture(VADriverContextP, VAProfile, union codec_state *,
struct hw_context *): Assertion `status == 0x00000000' failed.
With this patch, the error is handled correctly, throwing a
meaningful error in GStreamer:
0:00:00.
802303348 3584 0x7feff0003400 ERROR vaapipostproc
gstvaapipostproc.c:805:gst_vaapipostproc_process_vpp:<vaapipostproc0>
failed to apply VPP filters (error 2)
Though, the correct fix implies to enable VPP with this color
conversion.
Signed-off-by: Víctor Manuel Jáquez Leal <vjaquez@igalia.com>
Reviewed-by: Sean V Kelley <seanvk@posteo.de>
Daniel Charles [Thu, 10 Nov 2016 23:08:20 +0000 (15:08 -0800)]
i965_test_config: return properly unsupported profile
jpege/jpegd and avce/avcd config tests to check against all supported
entrypoints for a profile. UNSUPPORTED_PROFILE is expected
when no entrypoints are available for a given profile, else
expect UNSUPPORTED_ENTRYPOINT.
Signed-off-by: Daniel Charles <daniel.charles@intel.com>
Reviewed-by: U. Artie Eoff <ullysses.a.eoff@intel.com>
Daniel Charles [Thu, 10 Nov 2016 23:08:19 +0000 (15:08 -0800)]
i965_validate_config: return unsupported profile
When all the profiles are not supported return
VA_STATUS_ERROR_UNSUPPORTED_PROFILE instead of
VA_STATUS_ERROR_UNSUPPORTED_ENTRYPOINT.
Also change the style on the code modified to be common
on all cases
Signed-off-by: Daniel Charles <daniel.charles@intel.com>
Reviewed-by: U. Artie Eoff <ullysses.a.eoff@intel.com>
Xiang, Haihao [Thu, 10 Nov 2016 02:29:55 +0000 (10:29 +0800)]
Add the missing filename to the list
Otherwise the package created by 'make dist' doesn't include the
missing file
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
(cherry picked from commit
ed6baee7d523d512ac296d71132c26b37c0d818a)
Xiang, Haihao [Thu, 10 Nov 2016 01:43:06 +0000 (09:43 +0800)]
libva-intel-driver 1.7.3
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Thu, 10 Nov 2016 02:29:55 +0000 (10:29 +0800)]
Add the missing filename to the list
Otherwise the package created by 'make dist' doesn't include the
missing file
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
Xiang, Haihao [Thu, 10 Nov 2016 00:39:56 +0000 (08:39 +0800)]
1.7.4.pre1 for development
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Mon, 31 Oct 2016 05:57:30 +0000 (13:57 +0800)]
Update NEWS
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>