Merge tag 'drm-fsl-dcu-fixes-for-v4.18' of git.agner.ch/git/linux-drm-fsl-dcu into drm-next

drm/fsl-dcu updates

- Update MAINTAINERS file to reflect correct email address

Signed-off-by: Dave Airlie <airlied@redhat.com>
# gpg: Signature made Mon 21 May 2018 05:52:58 AEST
# gpg:                using RSA key 4FC170DF4AEFC52F
# gpg: Can't check signature: public key not found
Link: https://patchwork.freedesktop.org/patch/msgid/20180520220238.5187-1-stefan@agner.ch

Merge branch 'etnaviv/next' of https://git.pengutronix.de/git/lst/linux into drm-next

So what we have for this cycle is a bit of spring cleaning with removal
of unused register logging code and getting rid of the license text in
favor of SPDX, a few smaller MMU handling improvements and a timeout
calculation change, fixing premature fence wait timeouts after 50 days
of uptime.

Signed-off-by: Dave Airlie <airlied@redhat.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1526652437.28565.2.camel@pengutronix.de

Merge branch 'drm-tda998x-devel' of git://git.armlinux.org.uk/~rmk/linux-arm into drm-next

Please incorporate support for TDA998x I2C driver CEC

Signed-off-by: Dave Airlie <airlied@redhat.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180424095456.GA32460@rmk-PC.armlinux.org.uk

MAINTAINERS: drm: fsl-dcu: Update to Alison's NXP email address

The freescale.com email domain is not valid anymore, so use
the nxp.com domain instead.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Stefan Agner <stefan@agner.ch>

drm/etnaviv: replace license text with SPDX tags

This replaces the repetitive GPL-2.0 license text in code and header files
with the SPDX tags. Generated hardware headers aren't changed, as any changes
there need to be done in the upstream rnndb repository.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>

drm/etnaviv: mmuv2: support 40 bit phys address

MMUv2 supports up to 40 bits of physical address by folding the upper
8 bits into bits [4:11] of the PTE.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>

drm/etnaviv: mmuv2: allocate 2nd level page tables on demand

With etnaviv not being tied into the IOMMU framework anymore, the MMU
functions will only be called under sleeping locks. Thus we are able
to allocate the memory for the 2nd level page tables on demand without
having to deal with memory allocation in atomic context.

This speeds up driver intitialization on MMUv2 GPU cores, as we don't
need to preallocate all the page table memory and also reduces memory
consumption for most workloads, as most of them won't use the full
GPU virtual address space.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>

drm/etnaviv: switch MMU page tables to writecombine memory

We are likely to write multiple page entries at once and already ensure
proper write buffer flushing before GPU submit, so this improves CPU
time usage in the submit path without any downsides.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>

drm/etnaviv: remove register logging

I'm not aware of any case where tracing GPU register manipulation at the
kernel level would have been useful. It only adds more indirections and
adds to the code size.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>

drm/etnaviv: remove cycling through MMU address space

This was useful on MMUv1 GPUs, which don't generate proper faults,
when the GPU write caches weren't fully understood and not properly
handled by the kernel driver. As this has been fixed for quite some
time, the cycling though the MMU address space needlessly spreads
out the MMU mappings.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>

drm/etnaviv: correct timeout calculation

The old way did clamp the jiffy conversion and thus caused the timeouts
to become negative after some time. Also it didn't work with userspace
which actually fills the upper 32bits of the 64bit timestamp value.

clock_gettime() is 32-bit on 32-bit architectures. Using 64-bit timespec
math, like we do in this commit, means that when a wrap occurs, the
specified timeout goes into the past and we can't request a timeout in
the future. As the Linux implementation of CLOCK_MONOTONIC is reasonable
and starts at 0, the first such timer wrap will occur after approx. 68
years of system uptime.

Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>

Merge branch 'linux-4.18' of git://github.com/skeggsb/linux into drm-next

The main thing here is the addition of support for Volta GV100 GPUs,
everything else basically restructuring display / graphics init code
to make it possible to fit Volta support in more nicely.

There's a bunch of improvements/fixes scattered in there for earlier
GPUs too, particularly graphics engine init on all GPUs from Fermi
onwards.

Signed-off-by: Dave Airlie <airlied@redhat.com>
Link: https://patchwork.freedesktop.org/patch/msgid/CACAvsv7sjDKyR43n+6=iLC+ExGhBTLRLdKqwrhcfJWjEAndK0g@mail.gmail.com

drm/nouveau/gr/gf100-: insert some WFIs during gr init

Inserted wait-for-gr-idle in the places it seems that RM does it, seems
to prevent some random mmio timeouts on Quadro GV100.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/clk: Use list_for_each_entry_from_reverse

It's better to use "list_for_each_entry_from_reverse" for iterating list
than "for loop" as it makes the code more clear to read.
This patch replace "for loop" with "list_for_each_entry_from_reverse"
and "start" variable with "cstate" which helps in refactoring
the code and also "cstate" variable is more commonly used in the other
functions.

changes in v2:
"start" variable is removed, before "cstate" variable was removed
but "cstate" is more common so preferred "cstate" over "start".

Signed-off-by: Arushi Singhal <arushisinghal19971997@gmail.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau: fix temp/pwm visibility, skip hwmon when no sensors exist

A NV34 GPU was seeing temp and pwm entries in hwmon, which would error
out when read. These should not have been visible, but also the whole
hwmon object should just not have been registered in the first place.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau: fix nouveau_dsm_get_client_id()'s return type

The method struct vga_switcheroo_handler::get_client_id() is defined
as returning an 'enum vga_switcheroo_client_id' but the implementation
in this driver, nouveau_dsm_get_client_id(), returns an 'int'.

Fix this by returning 'enum vga_switcheroo_client_id' in this driver too.

Signed-off-by: Luc Van Oostenryck <luc.vanoostenryck@gmail.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau: fix mode_valid's return type

The method struct drm_connector_helper_funcs::mode_valid is defined
as returning an 'enum drm_mode_status' but the driver implementation
for this method uses an 'int' for it.

Fix this by using 'enum drm_mode_status' in the driver too.

Signed-off-by: Luc Van Oostenryck <luc.vanoostenryck@gmail.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/gr/gv100: initial support

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/ce/gv100: initial support

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/fifo/gv100: initial support

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/kms/gv100: initial support

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/disp/gv100: initial support

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/dma/gv100: initial support

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/therm/gv100: initial support

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/pmu/gv100: initial support

Appears to be compatible with GP102.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/fault/gv100: initial support

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/bar/gv100: initial support

Appears to be compatible with GM107.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/mmu/gv100: initial support

VEID support hacked in here, as it's the most convenient place for now.

Will be refined once it's better understood.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/ltc/gv100: initial support

Appears to be compatible with GP102.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/fb/gv100: initial support

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/imem/gv100: initial support

Can't imagine this will be any different.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/tmr/gv100: initial support

Appears to be compatible with GK20A.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/bus/gv100: initial support

Appears to be compatible with GF100.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/mc/gv100: initial support

Appears to be compatible with GP100.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/fuse/gv100: initial support

Appears to be compatible with GM107.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/i2c/gv100: initial support

Appears to be compatible with GM200.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/gpio/gv100: initial support

Appears to be compatible with GK104.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/ibus/gv100: initial support

Appears to be compatible with GM200.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/top/gv100: initial support

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/devinit/gv100: initial support

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/bios/pll: limits table 5.0

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/bios/gv100: initial support

No real surprises here so far.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/pci/gv100: initial support

Appears to be compatible with GP100.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/core: recognise gv100

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/core: increase maximum number of copy engines to 9

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/kms/nv50-: initial overlay support

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/kms/gk104-: add support for [XA]2R10G10B10 formats

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/kms/gk104-: support additional cursor sizes

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/kms/nv50-: separate blocklinear vs linear pitch

Will be required to support Volta.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/kms/nv50-: handle degamma LUT from window channels

Required to eventually support DRM colour management APIs, and to
support Volta.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/kms/nv50-: plane updates don't always require image_set()

When only the position of a window changes, there's no need to submit
an image update as well.

Will be required to support the overlays, and Volta windows.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/kms/nv50-: store window visibility in state

Window visibility is going to become a little more complicated with the
upcoming LUT changes, so store the calculated value to avoid needing to
recalculate the armed state again.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/kms/nv50-: simplify swap interval handling

This is just cleaning up some left-overs from when we needed a custom
legacy page flip implementation.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/kms/nv50-: decouple window state changes, and update method submisssion

This will be required to support Volta.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/kms/nv50-: simplify tracking of channel interlocks

Instead of windows returning their core channel interlock mask if they
know core has been modified, it's recorded unconditionally and used if
required when update methods are emitted.

This will be required to support Volta.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/kms/nv50-: determine MST support from DP Info Table

GV100 doesn't support MST, use the information provided in VBIOS tables to
detect its presence instead.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/kms/nv50-: extend window image data for stereo/planar formats

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/kms/nv50-: move drm format->hw conversion into common code

This will be required to support additional HW features.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/kms/nv50-: unify set/clr masks

This is a simplification that'll be used to improve interlock handling.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/kms/nv50-: allow specification of valid heads for a window

This will be required to support Volta, where window ID != head.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/kms/nv50-: split base implementation by hardware class

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/kms/nv50-: split core implementation by hardware class

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/kms/nv50-: split each resource type into their own source files

There should be no code changes here, just shuffling stuff around.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/kms/nv50: abstract OR interfaces so the code can be split

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/kms/nv50: handle SetControlOutputResource from head

Removes duplicated code from OR-specific functions.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/kms/nv50-: abstract head interfaces so the code can be split

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/kms/nv50: modify core allocation so the code can be split

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/kms/nv50-: modify base allocation so the code can be split

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/kms/nv50-: modify cursor allocation so the code can be split

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/kms/nv50-: modify overlay allocation so the code can be split

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/kms/nv50-: move fb ctxdma tracking into windows

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/kms/nv50-: fix i2c-over-aux on anx9805

We don't support address-only transactions there.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/kms/nv50-: move code underneath dispnv50/

The code is about to be split up, and this matches dispnv04.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/kms: move display class instantiation to library

This function is useful outside of DRM code.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/drm/nv50-: remove allocation of sw class

Hasn't been required for a long time.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau: no need to create ctxdma for push buffers on fermi and up

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau: remove fence wait code from deferred client work handler

Fences attached to deferred client work items now originate from channels
belonging to the client, meaning we can be certain they've been signalled
before we destroy a client.

This closes a race that could happen if the dma_fence_wait_timeout() call
didn't succeed.  When the fence was later signalled, a use-after-free was
possible.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/gem: tie deferred unmapping of buffers to VMA fence completion

As VMAs are per-client, unlike buffers, this allows us to avoid referencing
foreign fences (those that belong to another client/driver) from the client
deferred work handler, and prevent some not-fun race conditions that can be
triggered when a fence stalls.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/gem: attach fences to VMAs to track GPU usage

An upcoming patch will use these to fix issues related to the deferred
unmapping of GEM objects.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/gem: lookup VMAs for buffers referenced by pushbuf ioctl

We previously only did this for push buffers, but an upcoming patch will
need to attach fences to all VMAs to resolve another issue.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/gr/gp102-: setup stencil zbc

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/gr/gp100-: use correct registers for zbc colour/depth setup

These were missed the first time around due to the driver version I traced
using the older registers still.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/gr/gp100-: fix attrib cb setup

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/gr/gp100-: fix pagepool setup

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/gr/gf100-gm10x: update register lists

There are differences on GM200 and newer too, but we can't fix them there
as they come from firmware packages.

A request has been made to NVIDIA to release updated firmware.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/gr/gf100-: swap bundle and pagepool

Makes it easier to diff against RM traces.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/gr/gf100-: calculate and use sm mapping table

There's a number of places that require this data, so let's separate out
the calculations to ensure they remain consistent.

This is incorrect for GM200 and newer, but will produce the same results
as we did before.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/gr/gf100-: port zcull tile mapping calculations from NVGPU

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/gr/gf100-: port tile mapping calculations from NVGPU

There's also a couple of hardcoded tables for a couple of very specific
configurations that NVGPU's algorithm didn't work for.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/gr/gf100-: virtualise trap_mp

Required to support Volta.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/gr/gf100-: add missing reset sequence before golden context init

RM and NVGPU both have a variant of this, we probably should too.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/gr/gf100-: delete duplicated grctx init code

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/gr/gf100-: update r408840 where required

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/gr/gf100-: update 419a3c where required

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/gr/gf100-: virtualise r418e94

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/gr/gf100-: virtualise r419e00

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/gr/gf100-: update 419eb0 where required

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/gr/gf100-: note missing 418800 modifications

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/gr/gf100-gf119: update 419cb8 where required

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/gr/gf100-: support firmware-provided bundle/method everywhere

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>