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Andres Rodriguez [Wed, 18 Jan 2017 22:48:36 +0000 (17:48 -0500)]
radv: fix include order for installed headers v2
In situations where libdrm_amdgpu and mesa are installed to the same
location, the mesa installed headers will take precedence over the git
source headers.
This is due to the AMDGPU_CFLAGS containing the install directory.
This situation can cause build errors if the git version of a header is
newer than the currently installed version of a header (e.g. git pull
updates vulkan.h)
Note: using the same install prefix for mesa and libdrm is probably a
common occurrence since it is described in the radeonBuildHowTo wiki:
https://www.x.org/wiki/radeonBuildHowTo/
v2: added sign-off
Signed-off-by: Andres Rodriguez <andresx7@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit
a3ad6a34c6ba222ec93a2cfd0cac205c62574eb7)
Andres Rodriguez [Wed, 18 Jan 2017 23:07:56 +0000 (18:07 -0500)]
vulkan/wsi: clarify the severity of lack of DRI3 v2
The current message sounds like a small warning, clarify that it can
result in lack of presentation support and application crashes.
v2: add "if they do" (Bas)
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=98263
Signed-off-by: Andres Rodriguez <andresx7@gmail.com>
Acked-by: Jason ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit
e0674e740bf84085dec898ffd87bdeb2027e620f)
Lionel Landwerlin [Thu, 19 Jan 2017 16:20:00 +0000 (16:20 +0000)]
anv: don't require render target isl bit for depth/stencil surfaces
Blorp can deal with depth/stencil surfaces blits/copies without the
render target requirement. Also having both render target and
depth/stencil requirement is incompatible from isl's point of view.
This fixes an image creation issue in the high level quality settings
of the Unity3D player, which requires a depth texture with src/dst
transfer & 4x multisampling.
v2: Simply aspect checking condition (Jason)
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Cc: 13.0 17.0 <mesa-stable@lists.freedesktop.org>
(cherry picked from commit
74c23bde5b8155a84233265c56bedac8f38de14e)
Lionel Landwerlin [Fri, 13 Jan 2017 16:08:28 +0000 (16:08 +0000)]
spirv: don't assert with location decorations on non i/o variables
Some applications might add location decoration to samplers. Rather
than raising an error it seems it would make more sense to just
discard these decorations.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Cc: 17.0 <mesa-stable@lists.freedesktop.org>
(cherry picked from commit
8a28e764d0e28d0d4dfa3b81b89fa3baf30e94f2)
Samuel Pitoiset [Fri, 20 Jan 2017 00:19:49 +0000 (01:19 +0100)]
gallium/hud: add missing break in hud_cpufreq_graph_install()
Fixes:
e99b9395bef "gallium/hud: Add support for CPU frequency monitoring"
Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
(cherry picked from commit
383fc8e9f340e80695aca2cd585957af0e081eb9)
Marek Olšák [Wed, 18 Jan 2017 21:15:35 +0000 (22:15 +0100)]
radeonsi: don't forget to add HTILE to the buffer list for texturing
This fixes VM faults. Discovered by Samuel Pitoiset.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=98975
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99450
Cc: 17.0 13.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
(cherry picked from commit
e490b7812cae778c61004971d86dc8299b6cd240)
Nicolai Hähnle [Wed, 18 Jan 2017 08:28:47 +0000 (09:28 +0100)]
radeonsi: fix texture gather on stencil textures
At least on VI, texture gather doesn't work with a 24_8 data format, so
use 8_8_8_8 and a modified swizzle instead.
A bit of background: When creating a GL_STENCIL_INDEX8 texture, we select
the X24S8 pipe format because we don't support stencil-only render targets
properly. With mip-mapping this can lead to a setup where the tiling is
incompatible with stencil texturing, and a flushed stencil texture is
used. For the flushed stencil, a literal X24S8 is used because there were
issues with an 8bpp DB->CB copy.
Longer term, it would be good if we could get away from these workarounds,
i.e. properly support an S8 format for stencil-only rendering and flushed
stencil. Since stencil texturing is somewhat rare, it's not a high
priority.
Fixes GL45-CTS.texture_cube_map_array.sampling.
Cc: 17.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Edward O'Callaghan <funfunctor@folklore1984.net>
(cherry picked from commit
3cd092c41508dde2e6259f09df1736911a828548)
Zachary Michaels [Thu, 19 Jan 2017 09:50:16 +0000 (10:50 +0100)]
radeonsi: Always leave poly_offset in a valid state
This commit makes si_update_poly_offset set poly_offset to NULL if
uses_poly_offset is false. This way poly_offset either points into the
currently queued rasterizer, or it is NULL.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99451
Cc: "13.0 17.0" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
(cherry picked from commit
d7d32b3bfe86bd89d94d59393907bce1cb9dab7c)
Nicolai Hähnle [Mon, 16 Jan 2017 11:13:50 +0000 (12:13 +0100)]
mesa/main: fix meta caller of _mesa_ClampColor
Since _mesa_ClampColor properly checks for support of the API function
now, it's meta callers need to check support as well.
Fixes:
963311b71f ("mesa/main: fix version/extension checks in _mesa_ClampColor")
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99401
Tested-by: Mark Janes <mark.a.janes@intel.com>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Cc: "17.0" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit
a7c635ec6589f600f0d52d0097774ea0b938de9f)
Dave Airlie [Thu, 19 Jan 2017 04:39:10 +0000 (14:39 +1000)]
gallivm: use #ifdef not #if for PIPE_ARCH_BIG_ENDIAN
This fixes the build on ppc/s390.
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Cc: "17.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit
ef71b867ee152d8161a8c7320e89843801236249)
Emil Velikov [Wed, 18 Jan 2017 20:12:04 +0000 (20:12 +0000)]
Update version to 17.0.0-rc1
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Emil Velikov [Wed, 18 Jan 2017 19:48:37 +0000 (19:48 +0000)]
utils: really remove the __END_DECLS macro
Fixes:
d1efa09d342 "util: import sha1 implementation from OpenBSD"
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit
ea8b2624c8da1061e93124a760cae2ffb5f027ad)
Emil Velikov [Wed, 18 Jan 2017 19:40:31 +0000 (19:40 +0000)]
utils: build sha1/disk cache only with Android/Autoconf
Earlier commit imported a SHA1 implementation and relaxed the SHA1 and
disk cache handling, broking the Windows builds.
Restrict things for now until we get to a proper fix.
Fixes:
d1efa09d342 "util: import sha1 implementation from OpenBSD"
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit
9f8dc3bf03ec825bae7041858dda6ca2e9a34363)
Emil Velikov [Fri, 13 Jan 2017 16:51:31 +0000 (16:51 +0000)]
util: import sha1 implementation from OpenBSD
At the moment we support 5+ different implementations each with varying
amount of bugs - from thread safely problems [1], to outright broken
implementation(s) [2]
In order to accommodate these we have 150+ lines of configure script and
extra two configure toggles. Whist an actual implementation being
~200loc and our current compat wrapping ~250.
Let's not forget that different people use different code paths, thus
effectively makes it harder to test and debug since the default
implementation is automatically detected.
To minimise all these lovely experiences, import the "100% Public
Domain" OpenBSD sha1 implementation. Clearly document any changes needed
to get building correctly, since many/most of those can be upstreamed
making future syncs easier.
As an added bonus this will avoid all the 'fun' experiences trying to
integrate it with the Android and SCons builds.
v2: Manually expand __BEGIN_DECLS/__END_DECLS and document (Tapani).
Furthermore it seems that some games (or surrounding runtime) static
link against OpenSSL resulting in conflicts. For more information see
the discussion thread [3]
Bugzilla [1]: https://bugs.freedesktop.org/show_bug.cgi?id=94904
Bugzilla [2]: https://bugs.freedesktop.org/show_bug.cgi?id=97967
[3] https://lists.freedesktop.org/archives/mesa-dev/2017-January/140748.html
Cc: Mark Janes <mark.a.janes@intel.com>
Cc: Vinson Lee <vlee@freedesktop.org>
Cc: Tapani Pälli <tapani.palli@intel.com>
Cc: Jonathan Gray <jsg@jsg.id.au>
Tested-by: Jonathan Gray <jsg@jsg.id.au>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Acked-by: Tapani Pälli <tapani.palli@intel.com> (v1)
Acked-by: Jason Ekstrand <jason@jlekstrand.net> (v1)
Kenneth Graunke [Fri, 11 Nov 2016 22:52:36 +0000 (14:52 -0800)]
i965: Make brw_cache_item structure private to brw_program_cache.c.
struct brw_cache_item is an implementation detail of the program cache.
We don't need to make those internals available to the entire driver.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eduardo Lima Mitev <elima@igalia.com>
Marek Olšák [Tue, 17 Jan 2017 21:03:23 +0000 (22:03 +0100)]
radeonsi: determine in advance which VBOs should be added to the buffer list
v2: now it should be correct
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Tue, 17 Jan 2017 20:55:59 +0000 (21:55 +0100)]
radeonsi: use fewer pointer dereferences in upload_vertex_buffer_descriptors
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Tue, 17 Jan 2017 20:49:50 +0000 (21:49 +0100)]
radeonsi: reject invalid vertex buffer indices at state creation
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Tue, 17 Jan 2017 20:30:23 +0000 (21:30 +0100)]
radeonsi: use a global dirty mask for shader pointers
Only vertex buffers use a separate bool flag.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Tue, 17 Jan 2017 19:46:39 +0000 (20:46 +0100)]
radeonsi: use a bitmask-based loop in si_decompress_textures
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Tue, 17 Jan 2017 19:10:15 +0000 (20:10 +0100)]
radeonsi: skip an unnecessary mutex lock for L2 prefetches
the mutex lock is inside util_range_add.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Tue, 17 Jan 2017 17:42:23 +0000 (18:42 +0100)]
radeonsi: si_cp_dma_prepare is a no-op for L2 prefetches
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Tue, 17 Jan 2017 17:40:26 +0000 (18:40 +0100)]
radeonsi: add SI_CPDMA_SKIP_BO_LIST_UPDATE
the next commit will use it in a clever way, because the CP DMA prefetch
doesn't need this.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Tue, 17 Jan 2017 17:04:13 +0000 (18:04 +0100)]
radeonsi: use the correct target machine when building shader variants
If the shader selector is created with a different context than
the shader variant, we should use the calling context's target machine
for the shader variant.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99419
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Tue, 17 Jan 2017 16:39:16 +0000 (17:39 +0100)]
radeonsi: move shader pipe context state into a separate structure
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Ben Widawsky [Fri, 2 Dec 2016 19:10:47 +0000 (11:10 -0800)]
i965: Fix SURFACE_STATE to handle non-zero aux offsets
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Daniel Stone <daniels@collabora.com>
Christian Gmeiner [Wed, 18 Jan 2017 16:32:51 +0000 (17:32 +0100)]
Revert "etnaviv: Fake occlusion query capability"
This reverts commit
b7ac0f567123c96b5cd9e3485b963a5c0a0db66a.
This is a half baked solution needs some rework to fixes issues
with reported counter bits (GL_QUERY_COUNTER_BITS_ARB).
Also it enables PIPE_CAP_QUERY_TIME_ELAPSED accidently.
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Mauro Rossi [Thu, 12 Jan 2017 00:14:12 +0000 (01:14 +0100)]
android: ac/debug: move sid_tables.h generation and IB decode to amd/common
This patch is the porting to android of the following commits:
b838f64 "ac/debug: Move sid_tables.h generation to common code."
0ef1b4d "ac/debug: Move IB decode to common code."
Fixes android building errors due to sid_tables.h
and ac_debug.c, ac_debug.h moved to amd/common
Tested by building nougat-x86
Acked-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Acked-by: Emil Velikov <emil.velikov@collabora.com>
Mauro Rossi [Tue, 10 Jan 2017 00:53:05 +0000 (01:53 +0100)]
android: gallium/auxiliary: fix building error in Android 7.0
Conditional libLLVMCore static library dependency is added,
for the case when MESA_ENABLE_LLVM is true
Fixes the following building error with Android 7.0:
In file included from
external/mesa/src/gallium/auxiliary/gallivm/lp_bld_misc.cpp:62:
...
external/llvm/include/llvm/IR/Attributes.h:68:14: fatal error:
'llvm/IR/Attributes.inc' file not found
#include "llvm/IR/Attributes.inc"
^
1 error generated.
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Mauro Rossi [Tue, 10 Jan 2017 00:53:02 +0000 (01:53 +0100)]
android: amd/common: fix LLVMInitializeAMDGPU* functions declaration
LLVMInitializeAMDGPU* functions need to be explicitly declared
and mesa expects them via <llvm-c/Target.h> header,
but LLVM needs to be instructed to invoke its own LLVM_TARGET(AMDGPU) macro,
or the functions will not be available.
A new llvm cflag (-DFORCE_BUILD_AMDGPU) serves this purpose,
the same mechanism is used also by other llvm targets e.g. FORCE_BUILD_ARM
A necessary prerequisite is to have AMDGPU target handled accordingly
in llvm config files i.e. {Target,AsmParser,AsmPrinter}.def
for llvm device build includes.
This avoids the following building errors:
external/mesa/src/amd/common/ac_llvm_util.c:43:2: error: implicit declaration of function 'LLVMInitializeAMDGPUTargetInfo' is invalid in C99 [-Werror,-Wimplicit-function-declaration]
LLVMInitializeAMDGPUTargetInfo();
^
external/mesa/src/amd/common/ac_llvm_util.c:44:2: error: implicit declaration of function 'LLVMInitializeAMDGPUTarget' is invalid in C99 [-Werror,-Wimplicit-function-declaration]
LLVMInitializeAMDGPUTarget();
^
external/mesa/src/amd/common/ac_llvm_util.c:45:2: error: implicit declaration of function 'LLVMInitializeAMDGPUTargetMC' is invalid in C99 [-Werror,-Wimplicit-function-declaration]
LLVMInitializeAMDGPUTargetMC();
^
external/mesa/src/amd/common/ac_llvm_util.c:46:2: error: implicit declaration of function 'LLVMInitializeAMDGPUAsmPrinter' is invalid in C99 [-Werror,-Wimplicit-function-declaration]
LLVMInitializeAMDGPUAsmPrinter();
^
Acked-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Acked-by: Emil Velikov <emil.velikov@collabora.com>
Mauro Rossi [Tue, 10 Jan 2017 00:53:01 +0000 (01:53 +0100)]
android: radeonsi: fix LLVMInitializeAMDGPU* functions declaration
LLVMInitializeAMDGPU* functions need to be explicitly declared
and mesa expects them via <llvm-c/Target.h> header,
but LLVM needs to be instructed to invoke its own LLVM_TARGET(AMDGPU) macro,
or the functions will not be available.
A new llvm cflag (-DFORCE_BUILD_AMDGPU) serves this purpose,
the same mechanism is used also by other llvm targets e.g. FORCE_BUILD_ARM
A necessary prerequisite is to have AMDGPU target handled accordingly
in llvm config files i.e. {Target,AsmParser,AsmPrinter}.def
for llvm device build includes.
This avoids the following building errors:
external/mesa/src/gallium/drivers/radeonsi/si_shader_tgsi_setup.c:129:2: error: implicit declaration of function 'LLVMInitializeAMDGPUTargetInfo' is invalid in C99 [-Werror,-Wimplicit-function-declaration]
LLVMInitializeAMDGPUTargetInfo();
^
external/mesa/src/gallium/drivers/radeonsi/si_shader_tgsi_setup.c:130:2: error: implicit declaration of function 'LLVMInitializeAMDGPUTarget' is invalid in C99 [-Werror,-Wimplicit-function-declaration]
LLVMInitializeAMDGPUTarget();
^
external/mesa/src/gallium/drivers/radeonsi/si_shader_tgsi_setup.c:131:2: error: implicit declaration of function 'LLVMInitializeAMDGPUTargetMC' is invalid in C99 [-Werror,-Wimplicit-function-declaration]
LLVMInitializeAMDGPUTargetMC();
^
external/mesa/src/gallium/drivers/radeonsi/si_shader_tgsi_setup.c:132:2: error: implicit declaration of function 'LLVMInitializeAMDGPUAsmPrinter' is invalid in C99 [-Werror,-Wimplicit-function-declaration]
LLVMInitializeAMDGPUAsmPrinter();
^
Acked-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Acked-by: Emil Velikov <emil.velikov@collabora.com>
Mauro Rossi [Tue, 10 Jan 2017 00:53:00 +0000 (01:53 +0100)]
android: radeon: fix LLVMInitializeAMDGPU* functions declaration
LLVMInitializeAMDGPU* functions need to be explicitly declared
and mesa expects them via <llvm-c/Target.h> header,
but LLVM needs to be instructed to invoke its own LLVM_TARGET(AMDGPU) macro,
or the functions will not be available.
A new llvm cflag (-DFORCE_BUILD_AMDGPU) serves this purpose,
the same mechanism is used also by other llvm targets e.g. FORCE_BUILD_ARM
A necessary prerequisite is to have AMDGPU target handled accordingly
in llvm config files i.e. {Target,AsmParser,AsmPrinter}.def
for llvm device build includes.
This avoids the following building errors:
external/mesa/src/gallium/drivers/radeon/radeon_llvm_emit.c:121:2: error: implicit declaration of function 'LLVMInitializeAMDGPUTargetInfo' [-Werror=implicit-function-declaration]
LLVMInitializeAMDGPUTargetInfo();
^
external/mesa/src/gallium/drivers/radeon/radeon_llvm_emit.c:122:2: error: implicit declaration of function 'LLVMInitializeAMDGPUTarget' [-Werror=implicit-function-declaration]
LLVMInitializeAMDGPUTarget();
^
external/mesa/src/gallium/drivers/radeon/radeon_llvm_emit.c:123:2: error: implicit declaration of function 'LLVMInitializeAMDGPUTargetMC' [-Werror=implicit-function-declaration]
LLVMInitializeAMDGPUTargetMC();
^
external/mesa/src/gallium/drivers/radeon/radeon_llvm_emit.c:124:2: error: implicit declaration of function 'LLVMInitializeAMDGPUAsmPrinter' [-Werror=implicit-function-declaration]
LLVMInitializeAMDGPUAsmPrinter();
^
Acked-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Acked-by: Emil Velikov <emil.velikov@collabora.com>
Emil Velikov [Mon, 16 Jan 2017 16:25:19 +0000 (16:25 +0000)]
nouveau: remove always false argument in nouveau_fence_new()
No point in having the extra argument considering that it's effectively
unused since the function was introduced.
Cc: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Emil Velikov [Fri, 13 Jan 2017 17:27:56 +0000 (17:27 +0000)]
egl/wayland: resolve quirky try_damage_buffer() implementation
The implementation was added with commit
d085a5dff5b and effectively
provided a hidden dependency.
Namely: the codepath used was determined solely during build time. Thus
if we built again new wayland and then run against older (yet still
within the requirements, as per the configure) one will get undefined
symbols.
As of earlier commit
36b9976e1f9 "egl/wayland: Avoid race conditions
when on non-main thread" the required version was bumped to one which
provides the API, thus we can drop the quirky solution.
Cc: Derek Foreman <derekf@osg.samsung.com>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Derek Foreman <derekf@osg.samsung.com>
Emil Velikov [Wed, 7 Dec 2016 13:25:01 +0000 (13:25 +0000)]
configure: error out when building static XOR shared
Current code warns out in such cases and falls-back to either static or
shared. That can be easily missed amongst the volume produced by our
configure script.
Replace the warning with an error such that one gets direct feedback
when they're doing something wrong.
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Emil Velikov [Wed, 7 Dec 2016 13:25:00 +0000 (13:25 +0000)]
configure: explicitly require shared glapi for enable-dri
We've been using and depending on it for at least a couple of years.
Make it obvious and error out, should one opt for it.
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Emil Velikov [Wed, 7 Dec 2016 13:24:59 +0000 (13:24 +0000)]
configure: factor out commom egl/gbm checks
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Emil Velikov [Wed, 7 Dec 2016 13:24:58 +0000 (13:24 +0000)]
configure: remove HAVE_EGL_DRIVER_DRI[23]
We have them for local purposes in configure, where we can use their
direct dependency.
With the only remaining instance in the makefile(s) being always true,
as it can be seen in the configure snippet.
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Emil Velikov [Wed, 7 Dec 2016 13:24:57 +0000 (13:24 +0000)]
configure: forbid static EGL/GBM
Both libraries implicitly require shared GLAPI which in itself mandates
shared libraries.
Stop pretending that one can use it and error out at configure stage.
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Emil Velikov [Thu, 8 Dec 2016 17:58:22 +0000 (17:58 +0000)]
configure: remove unused AC_SUBST variables
v2: Rebase.
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com> (v1)
Emil Velikov [Thu, 8 Dec 2016 17:58:21 +0000 (17:58 +0000)]
gallium: correctly manage libsensors link flags
We should be using LIBS rather than the LDFLAGS variable. Furthermore
try to keep the linking to the final stage, rather than intermetent
static library.
Cc: Steven Toth <stoth@kernellabs.com>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Emil Velikov [Mon, 28 Nov 2016 18:25:19 +0000 (18:25 +0000)]
egl/wayland: unify dri2_wl_create_surface implementations
Rather than having two almost identical codepaths (one for HW/wl_drm and
another for SW/wl_shm), just factorise and reuse in both places.
v2: Rebase
v3: Rebase
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Daniel Stone <daniels@collabora.com> (v2)
Emil Velikov [Mon, 28 Nov 2016 18:25:18 +0000 (18:25 +0000)]
egl/wayland: use the destroy_window_callback for swrast
As described in commit
690ead4a135 ("egl/wayland-egl: Fix for segfault
in dri2_wl_destroy_surface.") if we attempt to destroy a EGL surface
attached to already destroyed Wayland window we'll get a segfault.
v2: set the correct callback alongside the window->private. (Dan)
Cc: Daniel Stone <daniels@collabora.com>
Cc: "12.0 13.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Emil Velikov [Mon, 5 Dec 2016 19:52:45 +0000 (19:52 +0000)]
glx: unify GLX_SGIX_pbuffer aliased declarations
No point in having an identical code in two places.
Not to mention that the Apple one incorrectly uses GLXDrawable as pbuf
type. This change is both API and ABI safe since the header uses the
correct GLXPbufferSGIX and both types are a typedef of the same
primitive XID.
Cc: Jeremy Huddleston Sequoia <jeremyhu@apple.com>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Jeremy Sequoia <jeremyhu@apple.com>
Emil Velikov [Mon, 5 Dec 2016 19:52:44 +0000 (19:52 +0000)]
glx: use GLX_ALIAS for glXGetProcAddress
Use the macro, rather than open-coding it.
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Emil Velikov [Mon, 5 Dec 2016 19:52:43 +0000 (19:52 +0000)]
mesa: make use of HAVE_FUNC_ATTRIBUTE_ALIAS macro
We must make sure that xserver has an equivalent one-line
change to its configure.ac as the glx/glapi headers get copied over.
Then again, xserver does _not_ seem to set HAVE_ALIAS to begin with so
one might want to look into that first.
Cc: Adam Jackson <ajax@redhat.com>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Emil Velikov [Mon, 5 Dec 2016 19:52:42 +0000 (19:52 +0000)]
android: set HAVE_FUNC_ATTRIBUTE_ALIAS
Analogous to previous two commits.
Strictly speaking it's not be applicable for Android since we don't
build GLX and related code.
Regardless keep things consistent with the other build systems.
Cc: Rob Herring <robh@kernel.org>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Emil Velikov [Mon, 5 Dec 2016 19:52:41 +0000 (19:52 +0000)]
scons: set HAVE_FUNC_ATTRIBUTE_ALIAS
Analogoust to the previous commit were we did so for autotools
Cc: Jose Fonseca <jfonseca@vmware.com>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Emil Velikov [Mon, 5 Dec 2016 19:52:40 +0000 (19:52 +0000)]
configure: use standard check for attribure alias
Currently we have two macros - HAVE_ALIAS and GLX_ALIAS_UNSUPPORTED.
To make it even better former of which is explicitly cleared in some
cases while not in others.
Clear all that up by using a single macro properly set during configure.
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Emil Velikov [Mon, 5 Dec 2016 19:52:39 +0000 (19:52 +0000)]
glx: remove always false ifdef GLX_NO_STATIC_EXTENSION_FUNCTIONS
Quick search through git history (of both mesa and xserver) hows no
instances where this was ever set.
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Wladimir J. van der Laan [Mon, 5 Dec 2016 12:43:55 +0000 (13:43 +0100)]
etnaviv: Fake occlusion query capability
This enables the PIPE_CAP_OCCLUSION_QUERY capability without adding an
occlusion query type.
This is necessary to get Mesa to report desktop GL 2.0 support (to run
exciting things such as ioq3's OpenGL 2 renderer), and should be valid
because exposing the capability does not guarantee that any
counters are actually implemented.
Signed-off-by: Wladimir J. van der Laan <laanwj@gmail.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Christian Gmeiner [Wed, 18 Jan 2017 15:15:01 +0000 (16:15 +0100)]
etnaviv: add flags parameter to texture barrier
Fixes compile warning introduced by commit a1c848.
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Christian Gmeiner [Wed, 18 Jan 2017 15:12:12 +0000 (16:12 +0100)]
etnaviv: handle PIPE_CAP_TGSI_FS_FBFETCH
Fixes compile warning introduced by commit ee3ebe.
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Roland Scheidegger [Wed, 18 Jan 2017 15:30:50 +0000 (16:30 +0100)]
gallivm: (trivial) fix copy/paste bug with big endian code
8bd67a35c50e68c21aed043de11e095c284d151a introduced using undefined variable
on big endian archs due to copy/paste bug.
(compile hack tested only)
Jose Fonseca [Wed, 18 Jan 2017 14:42:47 +0000 (14:42 +0000)]
configure.ac: Revert recent HAVE_LLVM changes.
This reverts changes
903eb09b5fb78d47d0f8a4bdf826a113ca2aff40..
1a0aa468f354f0ee94dd383cd40ae915584624aa:
Tobias Droste (5):
configure.ac: Rename MESA_LLVM to FOUND_LLVM
configure.ac: Only set LLVM_LIBS if LLVM is used
configure.ac: Only define HAVE_LLVM if LLVM is used
configure.ac: Set and use HAVE_GALLIUM_LLVM define
configure.ac: Don't check LLVM version in gallium_require_llvm
They break scons build, and I'm not convinced this is the right fix. In
particular changing HAVE_LLVM in the C code is something I'd rather
avoid no matter what. So it's better to discuss without the pressure of
broken builds.
Elie TOURNIER [Wed, 18 Jan 2017 13:50:11 +0000 (13:50 +0000)]
docs: Fix GLSL compiler link
The doc wasn't update since we moved the glsl compiler to src/compiler/glsl.
I also updated the description of the standalone compiler.
v2:
- Mention that just-log argument removes headers/separators.
- Mention that version argument is mandatory.
Since version argument is mandatory, add --version to the command line
example.
Signed-off-by: Elie Tournier <tournier.elie@gmail.com>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Emil Velikov [Tue, 17 Jan 2017 19:48:37 +0000 (19:48 +0000)]
vulkan: automake: do not use EXTRA_DIST in a conditional
Otherwise the file might not end up in the tarball.
Fixes:
dbd677efb42 "vulkan: add API registry"
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Tomasz Figa [Wed, 14 Dec 2016 08:00:27 +0000 (17:00 +0900)]
configure.ac: Respect LLVM_CFLAGS in LLVM version detection
When compiling LLVM headers, including llvm-config.h, we need to respect
LLVM_CFLAGS. This is especially crucial if LLVM is located in a
non-standard location and it happens that llvm-config.h includes another
header. In such case the detection would fail due to missing header,
because the path is provided in LLVM_CFLAGS.
Let's add LLVM_CFLAGS to global CFLAGS for the time of detection and then
restore the original flags, as done in other places of the script.
Signed-off-by: Tomasz Figa <tfiga@chromium.org>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Tobias Droste [Thu, 8 Dec 2016 02:03:40 +0000 (03:03 +0100)]
configure.ac: Don't check LLVM version in gallium_require_llvm
This is actually not needed because the version is checked later.
Line 2609:
if test "x$enable_gallium_llvm" == "xyes"; then
llvm_require_version $LLVM_REQUIRED_GALLIUM "gallium"
llvm_add_default_components "gallium"
HAVE_GALLIUM_LLVM=xyes
DEFINES="${DEFINES} -DHAVE_GALLIUM_LLVM"
fi
Signed-off-by: Tobias Droste <tdroste@gmx.de>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Tobias Droste [Thu, 8 Dec 2016 02:03:38 +0000 (03:03 +0100)]
configure.ac: Set and use HAVE_GALLIUM_LLVM define
Gallium code used HAVE_LLVM to check if it needs to compile code for
LLVM in header and source files.
With the new logic HAVE_LLVM is always set. Use extra define to figure
out if LLVM is used.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99010
Signed-off-by: Tobias Droste <tdroste@gmx.de>
Tobias Droste [Thu, 8 Dec 2016 02:03:37 +0000 (03:03 +0100)]
configure.ac: Only define HAVE_LLVM if LLVM is used
Make sure that HAVE_LLVM compiler define is only set if LLVM is
actually used.
Signed-off-by: Tobias Droste <tdroste@gmx.de>
v2 [Emil] fold within the existing conditional
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Tobias Droste [Thu, 8 Dec 2016 02:03:36 +0000 (03:03 +0100)]
configure.ac: Only set LLVM_LIBS if LLVM is used
This renames llvm_check_version_for to llvm_require_version and let it
set a variable to mark that LLVM will be used.
Use this to make a usefull configure output and to only check if the
libs are found in LLVM if it is actually used.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99010
Signed-off-by: Tobias Droste <tdroste@gmx.de>
Tobias Droste [Thu, 8 Dec 2016 02:03:35 +0000 (03:03 +0100)]
configure.ac: Rename MESA_LLVM to FOUND_LLVM
This renames MESA_LLVM to FOUND_LLVM and updates the config.log report
to say if LLVM is found or not, to make clear that this does not mean
that it is used.
There are no MESA_LLVM users so drop the AC_SUBST.
v2 [Emil]
- Polish test: -a over && test, = over ==, unquiote xyes
- other ?
Signed-off-by: Tobias Droste <tdroste@gmx.de>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Jose Fonseca [Mon, 16 Jan 2017 14:19:36 +0000 (14:19 +0000)]
gallivm: Cleanup USE_MCJIT.
Split USE_MCJIT macro dual nature into a separate constant time define
and a run-time variable.
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Kenneth Graunke [Sat, 12 Nov 2016 02:05:14 +0000 (18:05 -0800)]
i965: Don't map/unmap in brw_print_program_cache on LLC platforms.
We have a persistent mapping. Don't map it a second time or try to
unmap it. Just use the pointer.
This most likely would wreak havoc except that this code is unused
(it's only called from an if (0) debug block).
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eduardo Lima Mitev <elima@igalia.com>
Kenneth Graunke [Fri, 11 Nov 2016 22:47:53 +0000 (14:47 -0800)]
i965: Move program cache printing to brw_program_cache.c.
It makes sense to put a function which prints out the entire contents
of the program cache in the file that implements the program cache.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eduardo Lima Mitev <elima@igalia.com>
Kenneth Graunke [Fri, 11 Nov 2016 21:31:06 +0000 (13:31 -0800)]
i965: Make a helper for finding an existing shader variant.
We had five copies of the same "walk the cache and look for an
existing shader variant for this program" code. Now we have one
helper function that returns the key.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eduardo Lima Mitev <elima@igalia.com>
Kenneth Graunke [Sat, 10 Dec 2016 03:06:06 +0000 (19:06 -0800)]
glsl: Make copy propagation not panic when it sees an intrinsic.
A number of games have large arrays of constants, which we promote to
uniforms. This introduces copies from the uniform array to the original
temporary array. Normally, copy propagation eliminates those copies,
making everything refer to the uniform array directly.
A number of shaders in "Deus Ex: Mankind Divided" recently exposed a
limitation of copy propagation - if we had any intrinsics (i.e. image
access in a compute shader), we weren't able to get rid of these copies.
That meant that any variable indexing remained on the temporary array
rather being moved to the uniform array. i965's scalar backend
currently doesn't support indirect addressing of temporary arrays,
which meant lowering it to if-ladders. This was horrible.
According to Marek, on radeonsi/GCN, "F1 2015" uses 64% less
spilled-temp-array memory.
On i965/Skylake:
total instructions in shared programs:
13362954 ->
13329878 (-0.25%)
instructions in affected programs: 43745 -> 10669 (-75.61%)
helped: 12
HURT: 0
total cycles in shared programs:
248081010 ->
245949178 (-0.86%)
cycles in affected programs:
4597930 ->
2466098 (-46.37%)
helped: 12
HURT: 0
total spills in shared programs: 9493 -> 9507 (0.15%)
spills in affected programs: 25 -> 39 (56.00%)
helped: 0
HURT: 1
total fills in shared programs: 12127 -> 12197 (0.58%)
fills in affected programs: 110 -> 180 (63.64%)
helped: 0
HURT: 1
Helps Deus Ex: Mankind Divided. The one shader with hurt spills/fills
is from Tomb Raider at Ultra settings, but that same shader has a
-39.55% reduction in instructions and -14.09% reduction in cycle counts,
so it seems like a win there as well.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Timothy Arceri <timothy.arceri@collabora.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Kenneth Graunke [Sun, 15 Jan 2017 07:32:12 +0000 (23:32 -0800)]
i965: Make DCE set null destinations on messages with side effects.
(Co-authored by Matt Turner.)
Image atomics, for example, return a value - but the shader may not
want to use it. We assigned a useless VGRF destination. This seemed
harmless, but it can actually be quite harmful. The register allocator
has to assign that VGRF to a real register. It may assign the same
actual GRF to the destination of an instruction that follows soon after.
This results in a write-after-write (WAW) dependency, and stall.
A number of "Deus Ex: Mankind Divided" shaders use image atomics, but
don't use the return value. Several of these were hitting WAW stalls
for nearly 14,000 (poorly estimated) cycles a pop. Making dead code
elimination null out the destination avoids this issue.
This patch cuts one shader's estimated cycles by -98.39%! Removing the
message response should also help with data cluster bandwidth.
On Skylake:
(instruction counts remain identical)
total cycles in shared programs:
255413890 ->
248081010 (-2.87%)
cycles in affected programs:
12019948 ->
4687068 (-61.01%)
helped: 24
HURT: 10
v2: Make can_omit_write independent of can_eliminate (Curro).
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Kenneth Graunke [Thu, 15 Dec 2016 01:56:35 +0000 (17:56 -0800)]
i965: Combine some dead code elimination NOP'ing code.
In theory we might have incorrectly NOP'd instructions that write the
flag, but where that flag value isn't used, and yet the instruction
either writes the accumulator or has side effects.
I don't believe any such instructions exist, so this is mostly a
code cleanup.
Curro pointed out that FS_OPCODE_FB_WRITE has a null destination and
actually writes the flag on Gen4-5 to dynamically decide whether to
write some payload data. The hunk removed in this patch might have
NOP'd it, except that we don't actually mark flags_written() in the
IR, so it doesn't think the flag is touched at all. That's sketchy,
but it means it wouldn't hit this today (though there are likely other
problems!).
v2: Properly replace the inst->regs_written() check in the second
hunk with the flag being live (mistake caught by Curro).
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Kenneth Graunke [Wed, 18 Jan 2017 03:15:50 +0000 (19:15 -0800)]
i965: Make DCE explicitly not eliminate any control flow instructions.
According to Matt, the dead code pass explicitly avoided IF and WHILE
because on Sandybridge, these could have conditional modifiers and
null destination registers. Normally, those instructions use BAD_FILE
for the destination register. Nowadays, we don't do that anymore, so
we could technically drop these checks.
However, it's clearer to explicitly leave control flow instructions
alone, so change it to the more generic !inst->is_control_flow().
This should have no actual change.
[This patch implements review feedback from Curro and Matt.]
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Dave Airlie [Tue, 17 Jan 2017 20:26:31 +0000 (06:26 +1000)]
radv: disable vertex reuse when writing viewport index
This fixes some issues we'd hit later if using viewport
indexes.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Tue, 17 Jan 2017 00:05:07 +0000 (10:05 +1000)]
radv: add support for layered clears (v2)
Just always use the layer clear pipelines,
the overhead of emitting the layer shouldn't be
too large.
v2: Bas suggested we always use it.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Mon, 16 Jan 2017 22:41:03 +0000 (08:41 +1000)]
radv/ac: split part of llvm compile into a separate function
This is needed to have common code for gs copy shader emission.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Mon, 16 Jan 2017 22:38:14 +0000 (08:38 +1000)]
radv/ac: switch an if to switch
makes it easier to add other shader stages.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Mon, 16 Jan 2017 21:04:52 +0000 (07:04 +1000)]
radv: add support for writing layer/viewport index (v2)
This just adds the infrastructure to allow writing layer
and viewport index. It's just a first patch out of the geom
shader tree, and doesn't do much on its own.
v2: add missing if statement change (Bas)
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Bas Nieuwenhuizen [Sun, 15 Jan 2017 22:01:03 +0000 (23:01 +0100)]
ac/debug: Decrease num_dw for type 2 NOP's.
Otherwise we read past the end of the buffer.
Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Tue, 17 Jan 2017 12:45:42 +0000 (13:45 +0100)]
radeonsi: for the tess barrier, only use emit_waitcnt on SI and LLVM 3.9+
Cc: 17.0 13.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Nayan Deshmukh [Wed, 11 Jan 2017 16:57:15 +0000 (22:27 +0530)]
st/vdpau: remove the delayed rendering hack(v1.1)
the hack was introduced to avoid an extra copying
but now with dri3 we don't need it anymore
v1.1: rebasing
Signed-off-by: Nayan Deshmukh <nayan26deshmukh@gmail.com>
Acked-by: Christian König <christian.koenig@amd.com>
Nayan Deshmukh [Wed, 11 Jan 2017 16:57:14 +0000 (22:27 +0530)]
st/vdpau: use dri3 to directly send the buffer to X(v2)
this avoids an extra copy which occurs in case of dri2
v1.1: fallback to dri2 if dri3 fails to initialize
v2: add PIPE_BIND_SCANOUT to output buffers as they will
be send to X server directly (Michel)
Suggested-by: Christian König <christian.koenig@amd.com>
Tested-by: Andy Furniss <adf.lists@gmail.com>
Signed-off-by: Nayan Deshmukh <nayan26deshmukh@gmail.com>
Nayan Deshmukh [Wed, 11 Jan 2017 16:57:13 +0000 (22:27 +0530)]
vl/dri3: use external texture as back buffers(v4)
dri3 allows us to send handle of a texture directly to X
so this patch allows a state tracker to directly send its
texture to X to be used as back buffer and avoids extra
copying
v2: use clip width/height to display a portion of the surface
v3: remove redundant variables, fix wrapping, rename variables
handle vaapi path
v3.1: we need clip_width/height for every frame so we don't need
to maintain it for each buffer instead use a global variable
v4: In case of single gpu we can cache the buffers as applications
use constant number of buffer and we can avoid calls to present
extension for every frame
Reviewed and Suggested-by: Leo Liu <leo.liu@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Tested-by: Andy Furniss <adf.lists@gmail.com>
Signed-off-by: Nayan Deshmukh <nayan26deshmukh@gmail.com>
Iago Toral Quiroga [Mon, 16 Jan 2017 10:51:50 +0000 (11:51 +0100)]
anv: set UAV coherence required bit when needed
The same we do in the OpenGL driver (comment copied from there).
This is required to ensure that we execute the fragment shader stage when
side-effects (such as image or ssbo stores) are present but there are no
color writes.
I found this while writing a test to check rendering to a framebuffer
without attachments where the fragment shader does not produce any
color outputs but writes to an image via imageStore(). Without this patch
the fragment shader does not execute and the image is not written,
which is not correct.
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Samuel Iglesias Gonsálvez [Tue, 10 Jan 2017 11:44:32 +0000 (12:44 +0100)]
anv: increase ANV_MAX_STATE_SIZE_LOG2 limit to 1 MB
Fixes crash in dEQP-VK.ubo.random.all_shared_buffer.48 due to a
fragment shader code bigger than 128 kB.
This patch increases the allocation size limit to 1 MB.
v2:
- Increase it to 1 MB (Jason)
- Increase device->instruction_block_pool allocation size in
anv_device.c (Jason)
Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Ilia Mirkin [Fri, 13 Jan 2017 05:41:11 +0000 (00:41 -0500)]
nv50/ir: optimize shl + and
Address loading can often end up as shl + shr + shl combinations. The
latter two are equal shifts, which get converted into an and mask.
However if the previous shl is more than the mask is trying to remove
(in terms of low bits), we can just remove the and entirely. This
reduces some large shaders by as many as 3% of instructions (out of 2K).
total instructions in shared programs :
6495509 ->
6491076 (-0.07%)
total gprs used in shared programs : 954621 -> 954623 (0.00%)
local gpr inst bytes
helped 0 0 1014 1014
hurt 0 2 0 0
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Ilia Mirkin [Mon, 2 Jan 2017 05:48:51 +0000 (00:48 -0500)]
nvc0: enable FBFETCH with a special slot for color buffer 0
We don't need to support all the color buffers for advanced blend, just
cb0. For Fermi, we use the special binding slots so that we don't
overlap with user textures, while Kepler+ gets a dedicated position for
the fb handle in the driver constbuf.
This logic is only triggered when a FBFETCH is actually present so it
should be a no-op most of the time.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Ilia Mirkin [Mon, 2 Jan 2017 04:47:25 +0000 (23:47 -0500)]
st/mesa: add support for advanced blend when fb can be fetched from
This implements support for emitting FBFETCH ops, using the existing
lowering pass for advanced blend logic, and disabling hw blend when
advanced blending is enabled.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Ilia Mirkin [Mon, 2 Jan 2017 04:42:17 +0000 (23:42 -0500)]
gallium: add flags parameter to texture barrier
This is so that we can differentiate between flushing any framebuffer
reading caches from regular sampler caches.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Ilia Mirkin [Mon, 2 Jan 2017 04:10:00 +0000 (23:10 -0500)]
gallium: add PIPE_CAP_TGSI_FS_FBFETCH
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Ilia Mirkin [Mon, 2 Jan 2017 04:02:06 +0000 (23:02 -0500)]
gallium: add FBFETCH opcode to retrieve the current sample value
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Ilia Mirkin [Mon, 2 Jan 2017 04:44:25 +0000 (23:44 -0500)]
mesa: allow BlendBarrier to be used without support for full fb fetch
The extension spec is not currently published, so it's a bit premature
to require it for BlendBarrier usage.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Ilia Mirkin [Mon, 2 Jan 2017 04:00:46 +0000 (23:00 -0500)]
glsl: avoid treating fb fetches as output reads to be lowered
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Dave Airlie [Mon, 16 Jan 2017 20:44:14 +0000 (06:44 +1000)]
radv/meta: split color renderpass creation out.
This is just prep work for layered clears, it doesn't change
anything.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Bas Nieuwenhuizen [Mon, 16 Jan 2017 20:25:10 +0000 (21:25 +0100)]
radv: Support multiple devices.
Pretty straightforward. Also deleted the big comment block as it
is a pretty standard pattern for filling in arrays.
Also removed the error message on non-existent devices, as getting
7 errors printed to the console each time you enumerate the
devices is pretty confusing.
v2: Add constant for number of DRM devices.
Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Bas Nieuwenhuizen [Mon, 16 Jan 2017 20:23:48 +0000 (21:23 +0100)]
radv: Get physical device from radv_device instead of the instance.
Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Ilia Mirkin [Sun, 15 Jan 2017 18:19:04 +0000 (13:19 -0500)]
nvc0: true up exposing of the HW_METRIC_QUERY_GROUP for maxwell
This had been updated in one place but not the other.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Dave Airlie [Mon, 16 Jan 2017 20:48:23 +0000 (06:48 +1000)]
radv/ac: use ctx->voidt in more places. (v2)
Just noticed this while in the area.
v2: one replacement was incorrect.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Mon, 16 Jan 2017 20:37:36 +0000 (06:37 +1000)]
radv/meta: consolidate the depth stencil clear renderpasses
We only need one per samples (maybe not even that), reduce
all the unneeded ones.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Ilia Mirkin [Mon, 16 Jan 2017 19:25:15 +0000 (14:25 -0500)]
nv50/ir: handle new DDIV op which will be used for double divisions
The existing lowering is in place to lower that to RCP + MUL, or fancier
things down the line if necessary.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Nicolai Hähnle [Mon, 16 Jan 2017 15:40:41 +0000 (16:40 +0100)]
tgsi: add DDIV instruction
Double-precision division, to allow more precision than a DRCP + DMUL
sequence.
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Mon, 16 Jan 2017 15:44:08 +0000 (16:44 +0100)]
radeonsi: fix R600_DEBUG=nooptvariant
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Vedran Miletić <vedran@miletic.net>