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Hsiangkai Wang [Fri, 19 Oct 2018 01:52:54 +0000 (01:52 +0000)]
[CodeGen] Fix for PR39094.
When using MachineInstr to get SlotIndex, the MI could not be a debug
instruction. mi2iMap does not contain debug instructions in it.
After enabling DBG_LABEL in the generated code, the first instruction in
the bundle may be a debug instruction. In this patch, I use the first
non-debug instruction in the bundle to query SlotIndex in mi2iMap.
Bugzilla report: https://bugs.llvm.org/show_bug.cgi?id=39094
Differential revision: https://reviews.llvm.org/D52927
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344770
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Chandler Carruth [Fri, 19 Oct 2018 00:22:37 +0000 (00:22 +0000)]
[TI removal] Remove `TerminatorInst` from the IR type system!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344769
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Chandler Carruth [Fri, 19 Oct 2018 00:22:10 +0000 (00:22 +0000)]
[TI removal] Switch some newly added code over to use `Instruction`
directly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344768
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Chandler Carruth [Thu, 18 Oct 2018 23:03:55 +0000 (23:03 +0000)]
[TI removal] Update the C API for the move away from `TerminatorInst`.
This updates the C API for the removal of `TerminatorInst`. It converts
the type query to a predicate query and moves the generic methods to
work on `Instruction` instances that satisfy this predicate rather than
requiring a specific type. It also clarifies that the C API wrapping
`BasicBlock::getTerminator` just returns an `Instruction`. Because this
was always wrapped opaquely as a value and the functions consuming these
values will work on `Instruction` objects, this shouldn't break any
clients.
This is a completely compatible change to the C API.
Differential Revision: https://reviews.llvm.org/D52968
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344764
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Lang Hames [Thu, 18 Oct 2018 22:42:32 +0000 (22:42 +0000)]
[ORC] Add a createJITDylib method to LLJIT.
Because I'm about to get on stage at the dev meeting and claim that it exists.
This method creates a JITDylib instance with the given name and returns a
reference to it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344763
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Sylvestre Ledru [Thu, 18 Oct 2018 20:07:44 +0000 (20:07 +0000)]
Support of hurd in llvm-shlib
Svante Signell
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344756
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Mircea Trofin [Thu, 18 Oct 2018 19:49:44 +0000 (19:49 +0000)]
Make Function::getInstructionCount const
Summary: Function::getInstructionCount can be const.
Reviewers: davidxl, paquette
Reviewed By: davidxl
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D53378
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344754
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Eli Friedman [Thu, 18 Oct 2018 19:34:30 +0000 (19:34 +0000)]
Revert r344693 ("[ARM] bottom-top mul support in ARMParallelDSP")
Still causing failures on the polly-aosp buildbot; I'll follow up
with a reduced testcase.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344752
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Sumanth Gundapaneni [Thu, 18 Oct 2018 15:51:16 +0000 (15:51 +0000)]
[Pipeliner] copyToPhi DAG Mutation to improve scheduling.
In a loop, create artificial dependences between the source of a
COPY/REG_SEQUENCE to the use in next iteration.
Eg:
SRC ----Data Dep--> COPY
COPY ---Anti Dep--> PHI (implies, to be used in next iteration)
PHI ----Data Dep--> USE
This patches creates
USE ----Artificial Dep---> SRC
This will effectively schedule the COPY late to eliminate additional copies.
Before this patch, the schedule can be
SRC, COPY, USE : The COPY is used in next iteration and it needs to be
preserved.
After this patch, the schedule can be
USE, SRC, COPY : The COPY is used in next iteration and the live interval is
reduced.
Differential Revision: https://reviews.llvm.org/D53303
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344748
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Ayal Zaks [Thu, 18 Oct 2018 15:03:15 +0000 (15:03 +0000)]
[LV] Fold tail by masking to vectorize loops of arbitrary trip count under opt for size
When optimizing for size, a loop is vectorized only if the resulting vector loop
completely replaces the original scalar loop. This holds if no runtime guards
are needed, if the original trip-count TC does not overflow, and if TC is a
known constant that is a multiple of the VF. The last two TC-related conditions
can be overcome by
1. rounding the trip-count of the vector loop up from TC to a multiple of VF;
2. masking the vector body under a newly introduced "if (i <= TC-1)" condition.
The patch allows loops with arbitrary trip counts to be vectorized under -Os,
subject to the existing cost model considerations. It also applies to loops with
small trip counts (under -O2) which are currently handled as if under -Os.
The patch does not handle loops with reductions, live-outs, or w/o a primary
induction variable, and disallows interleave groups.
(Third, final and main part of -)
Differential Revision: https://reviews.llvm.org/D50480
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344743
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Nicolai Haehnle [Thu, 18 Oct 2018 12:54:39 +0000 (12:54 +0000)]
DivergenceAnalysisTest: fix use of uninitialized memory
Thanks to Simon Moll for chasing it down.
Change-Id: If188f07c4aaec217f40a7a2ca029818f9202f1cb
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344738
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Nicolai Haehnle [Thu, 18 Oct 2018 09:38:44 +0000 (09:38 +0000)]
[DA] DivergenceAnalysis for unstructured, reducible CFGs
Summary:
This is patch 2 of the new DivergenceAnalysis (https://reviews.llvm.org/D50433).
This patch contains a generic divergence analysis implementation for
unstructured, reducible Control-Flow Graphs. It contains two new classes.
The `SyncDependenceAnalysis` class lazily computes sync dependences, which
relate divergent branches to points of joining divergent control. The
`DivergenceAnalysis` class contains the generic divergence analysis
implementation.
Reviewers: nhaehnle
Reviewed By: nhaehnle
Subscribers: sameerds, kristina, nhaehnle, xbolva00, tschuett, mgorny, llvm-commits
Differential Revision: https://reviews.llvm.org/D51491
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344734
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Sam McCall [Thu, 18 Oct 2018 08:47:24 +0000 (08:47 +0000)]
[Support] json::Value construction from std::vector<T> and std::map<string,T>.
Summary: Previously this required a conversion to json::Array/json::Object first.
Reviewers: ioeric
Subscribers: kristina, llvm-commits
Differential Revision: https://reviews.llvm.org/D53385
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344732
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Guillaume Chatelet [Thu, 18 Oct 2018 08:20:50 +0000 (08:20 +0000)]
[llvm-exegesis] Fix off by one error
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344731
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Chandler Carruth [Thu, 18 Oct 2018 07:40:24 +0000 (07:40 +0000)]
[TI removal] Remove discussion of `TerminatorInst` from the LLVM
documentation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344727
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Chandler Carruth [Thu, 18 Oct 2018 07:40:03 +0000 (07:40 +0000)]
[TI removal] Remove TerminatorInst references from bindings.
For the Go bindings, this just removes the no longer useful "isa"-style
wrapper. If there is a user that is interested, they can add a wrapper
for `Instruction::isTerminator`.
For the OCaml bindings, this is just a documentation update.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344726
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Mikael Holmen [Thu, 18 Oct 2018 06:27:53 +0000 (06:27 +0000)]
Add a emitUnaryFloatFnCall version that fetches the function name from TLI
Summary:
In several places in the code we use the following pattern:
if (hasUnaryFloatFn(&TLI, Ty, LibFunc_tan, LibFunc_tanf, LibFunc_tanl)) {
[...]
Value *Res = emitUnaryFloatFnCall(X, TLI.getName(LibFunc_tan), B, Attrs);
[...]
}
In short, we check if there is a lib-function for a certain type, and then
we _always_ fetch the name of the "double" version of the lib function and
construct a call to the appropriate function, that we just checked exists,
using that "double" name as a basis.
This is of course a problem in cases where the target doesn't support the
"double" version, but e.g. only the "float" version.
In that case TLI.getName(LibFunc_tan) returns "", and
emitUnaryFloatFnCall happily appends an "f" to "", and we erroneously end
up with a call to a function called "f".
To solve this, the above pattern is changed to
if (hasUnaryFloatFn(&TLI, Ty, LibFunc_tan, LibFunc_tanf, LibFunc_tanl)) {
[...]
Value *Res = emitUnaryFloatFnCall(X, &TLI, LibFunc_tan, LibFunc_tanf,
LibFunc_tanl, B, Attrs);
[...]
}
I.e instead of first fetching the name of the "double" version and then
letting emitUnaryFloatFnCall() add the final "f" or "l", we let
emitUnaryFloatFnCall() fetch the right name from TLI.
Reviewers: eli.friedman, efriedma
Reviewed By: efriedma
Subscribers: efriedma, bjope, llvm-commits
Differential Revision: https://reviews.llvm.org/D53370
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344725
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Kristina Brooks [Thu, 18 Oct 2018 03:14:37 +0000 (03:14 +0000)]
[X86] Support for the mno-tls-direct-seg-refs flag
Allows to disable direct TLS segment access (%fs or %gs). GCC supports
a similar flag, it can be useful in some circumstances, e.g. when a thread
context block needs to be updated directly from user space. More info
and specific use cases: https://bugs.llvm.org/show_bug.cgi?id=16145
There is another revision for clang as well.
Related: D53102
All X86 CodeGen tests appear to pass:
```
[46/47] Running lit suite /SourceCache/llvm-trunk-8.0/test/CodeGen
Testing Time: 23.17s
Expected Passes : 3801
Expected Failures : 15
Unsupported Tests : 8021
```
Reviewed by: Craig Topper.
Patch by nruslan (Ruslan Nikolaev).
Differential Revision: https://reviews.llvm.org/D53103
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344723
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Krasimir Georgiev [Thu, 18 Oct 2018 02:06:16 +0000 (02:06 +0000)]
[llvm-exegesis] Mark destructor virtual after r344695
This was causing a -Wnon-virtual-dtor warning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344721
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Lang Hames [Thu, 18 Oct 2018 00:51:38 +0000 (00:51 +0000)]
[BuildingAJIT] Update the Ch1 KaleidoscopeJIT class to expose errors to clients.
Returning the error to clients provides an opportunity to introduce readers to
the Expected and Error APIs and makes the tutorial more useful as a starting
point for a real JIT class, while only slightly complicating the code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344720
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Chandler Carruth [Thu, 18 Oct 2018 00:40:26 +0000 (00:40 +0000)]
[TI removal] Switch simple loop unswitch to `Instruction`.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344719
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Chandler Carruth [Thu, 18 Oct 2018 00:39:46 +0000 (00:39 +0000)]
[TI removal] Switch NewGVN to directly use `Instruction`.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344718
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Chandler Carruth [Thu, 18 Oct 2018 00:39:18 +0000 (00:39 +0000)]
[TI removal] Use `Instruction` instead of `TerminatorInst` for
a variable's type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344717
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Chandler Carruth [Thu, 18 Oct 2018 00:38:54 +0000 (00:38 +0000)]
[TI removal] Update CodeExtractor to use Instruction directly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344716
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Chandler Carruth [Thu, 18 Oct 2018 00:38:34 +0000 (00:38 +0000)]
[TI removal] Switch ObjCARC code to directly use the nice range-based
successors API or directly build the iterators out of the terminator
instruction and avoid requiring a TerminatorInst variable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344715
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Chandler Carruth [Thu, 18 Oct 2018 00:37:37 +0000 (00:37 +0000)]
[TI removal] Switch MergeFunctions to directly use Instruction API.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344714
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Chandler Carruth [Thu, 18 Oct 2018 00:36:15 +0000 (00:36 +0000)]
[TI removal] Switch an analysis to just use Instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344713
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Lang Hames [Wed, 17 Oct 2018 22:27:09 +0000 (22:27 +0000)]
[BuildingAJIT] Simplify a tutorial example and fix a syntax error.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344712
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Lang Hames [Wed, 17 Oct 2018 19:35:38 +0000 (19:35 +0000)]
[BuildingAJIT] Fix a function signature in the documentation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344705
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Pavel Labath [Wed, 17 Oct 2018 18:50:25 +0000 (18:50 +0000)]
Port libcxxabi r344607 into llvm
Summary:
The original commit message was:
This uses CRTP (for performance reasons) to allow a user the override
demangler functions to implement custom parsing logic. The motivation
for this is LLDB, which needs to occasionaly modify the mangled names.
One such instance is already implemented via the TypeCallback member,
but this is very specific functionality which does not help with any
other use case. Currently we have a use case for modifying the
constructor flavours, which would require adding another callback. This
approach does not scale.
With CRTP, the user (LLDB) can override any function it needs without
any special support from the demangler library. After LLDB is ported to
use this instead of the TypeCallback mechanism, the callback can be
removed.
The only difference here is the addition of a unit test which exercises
the CRTP mechanism to override a function in the parser.
Reviewers: erik.pilkington, rsmith, EricWF
Subscribers: mgorny, kristina, llvm-commits
Differential Revision: https://reviews.llvm.org/D53300
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344703
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Nicolai Haehnle [Wed, 17 Oct 2018 15:37:48 +0000 (15:37 +0000)]
AMDGPU: Avoid selecting ds_{read,write}2_b32 on SI
Summary:
To workaround a hardware issue in the (base + offset) calculation
when base is negative. The impact on code quality should be limited
since SILoadStoreOptimizer still runs afterwards and is able to
combine loads/stores based on known sign information.
This fixes visible corruption in Hitman on SI (easily reproducible
by running benchmark mode).
Change-Id: Ia178d207a5e2ac38ae7cd98b532ea2ae74704e5f
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99923
Reviewers: arsenm, mareko
Subscribers: jholewinski, kzhuravl, jvesely, wdng, yaxunl, dstuttard, tpr, t-tye, llvm-commits
Differential Revision: https://reviews.llvm.org/D53160
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344698
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Nicolai Haehnle [Wed, 17 Oct 2018 15:37:41 +0000 (15:37 +0000)]
StructurizeCFG: Simplify inserted PHI nodes
Summary:
This improves subsequent divergence analysis in some cases.
Change-Id: I5e95e7ec7fd3fa80d414d1a53a02fea23e3d67d3
Reviewers: arsenm, rampitec
Subscribers: jvesely, wdng, llvm-commits
Differential Revision: https://reviews.llvm.org/D53316
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344697
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Nicolai Haehnle [Wed, 17 Oct 2018 15:37:30 +0000 (15:37 +0000)]
AMDGPU: Divergence-driven selection of scalar buffer load intrinsics
Summary:
Moving SMRD to VMEM in SIFixSGPRCopies is rather bad for performance if
the load is really uniform. So select the scalar load intrinsics directly
to either VMEM or SMRD buffer loads based on divergence analysis.
If an offset happens to end up in a VGPR -- either because a floating
point calculation was involved, or due to other remaining deficiencies
in SIFixSGPRCopies -- we use v_readfirstlane.
There is some unrelated churn in tests since we now select MUBUF offsets
in a unified way with non-scalar buffer loads.
Change-Id: I170e6816323beb1348677b358c9d380865cd1a19
Reviewers: arsenm, alex-t, rampitec, tpr
Subscribers: kzhuravl, jvesely, wdng, yaxunl, dstuttard, t-tye, llvm-commits
Differential Revision: https://reviews.llvm.org/D53283
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344696
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Clement Courbet [Wed, 17 Oct 2018 15:04:15 +0000 (15:04 +0000)]
[llvm-exegesis] Allow measuring several instructions in a single run.
Summary:
We try to recover gracefully on instructions that would crash the
program.
This includes some refactoring of runMeasurement() implementations.
Reviewers: gchatelet
Subscribers: tschuett, llvm-commits
Differential Revision: https://reviews.llvm.org/D53371
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344695
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Sam Parker [Wed, 17 Oct 2018 13:02:48 +0000 (13:02 +0000)]
[ARM] bottom-top mul support in ARMParallelDSP
Previously reverted in rL343082.
Original commit message:
On failing to find sequences that can be converted into dual macs,
try to find sequential 16-bit loads that are used by muls which we
can then use smultb, smulbt, smultt with a wide load.
Differential Revision: https://reviews.llvm.org/D51983
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344693
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Guillaume Chatelet [Wed, 17 Oct 2018 12:27:46 +0000 (12:27 +0000)]
Fix uninitialized variable
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344692
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Nicolai Haehnle [Wed, 17 Oct 2018 12:14:26 +0000 (12:14 +0000)]
AMDGPU: Remove dead TableGen code
Summary: Change-Id: Ic1f2c1d0cf9e90a0baa9fc6bacd0d3c386069fb0
Reviewers: tpr
Subscribers: arsenm, kzhuravl, jvesely, wdng, yaxunl, dstuttard, t-tye, llvm-commits
Differential Revision: https://reviews.llvm.org/D53318
Change-Id: Ib4d143c898801e5cf6cb9999a495d62c91ae77fb
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344691
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Guillaume Chatelet [Wed, 17 Oct 2018 12:09:21 +0000 (12:09 +0000)]
BuildBot fix, compiler complains about array decay to pointer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344690
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Guillaume Chatelet [Wed, 17 Oct 2018 11:37:28 +0000 (11:37 +0000)]
[llvm-exegeis] Computing Latency configuration upfront so we can generate many CodeTemplates at once.
Summary: LatencyGenerator now computes all possible mode of serial execution for an Instruction upfront and generates CodeTemplate for the ones that give the best results (e.g. no need to generate a two instructions snippet when repeating a single one would do). The next step is to generate even more configurations for cases (e.g. for XOR we should generate "XOR EAX, EAX, EAX" and "XOR EAX, EAX, EBX")
Reviewers: courbet
Reviewed By: courbet
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D53320
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344689
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Max Kazantsev [Wed, 17 Oct 2018 11:16:25 +0000 (11:16 +0000)]
[NFC] Remove GOTO from SCEV
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344687
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Fedor Sergeev [Wed, 17 Oct 2018 11:01:15 +0000 (11:01 +0000)]
[NewPM] Fixing test failure on Windows - removed opt binary name from pattern
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344686
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Fedor Sergeev [Wed, 17 Oct 2018 10:36:23 +0000 (10:36 +0000)]
[NewPM] teach -passes= to emit meaningful error messages
All the PassBuilder::parse interfaces now return descriptive StringError
instead of a plain bool. It allows to make -passes/aa-pipeline parsing
errors context-specific and thus less confusing.
TODO: ideally we should also make suggestions for misspelled pass names,
but that requires some extensions to PassBuilder.
Reviewed By: philip.pfaffe, chandlerc
Differential Revision: https://reviews.llvm.org/D53246
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344685
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Petar Jovanovic [Wed, 17 Oct 2018 10:30:03 +0000 (10:30 +0000)]
[MIPS GlobalISel] Legalize constants
Legalize s1, s8, s16 and s64 G_CONSTANT for MIPS32.
Patch by Petar Avramovic.
Differential Revision: https://reviews.llvm.org/D53077
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344684
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Sjoerd Meijer [Wed, 17 Oct 2018 10:05:44 +0000 (10:05 +0000)]
[ARM] Do not fuse VADD and VMUL, continued (2/2)
This is patch 2/2, following up on D53314, and is the functional change
to prevent fusing mul + add sequences into VFMAs.
Differential revision: https://reviews.llvm.org/D53315
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344683
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Fedor Sergeev [Wed, 17 Oct 2018 09:02:54 +0000 (09:02 +0000)]
[LoopPredication] add some simple stats
Just adding some useful statistics to LoopPredication pass
which was lacking any of these.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344681
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Sjoerd Meijer [Wed, 17 Oct 2018 07:51:24 +0000 (07:51 +0000)]
[ARM] Follow up of rL344671, attempt to pacify a buildbot
It was rightfully complaining about an unpretty logical expression.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344677
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Sjoerd Meijer [Wed, 17 Oct 2018 07:26:35 +0000 (07:26 +0000)]
[ARM][NFCI] Do not fuse VADD and VMUL, continued (1/2)
This is a follow up of rL342874, which stopped fusing muls and adds into VMLAs
for performance reasons on the Cortex-M4 and Cortex-M33. This is a serie of 2
patches, that is trying to achieve the same for VFMA. The second column in the
table below shows what we were generating before rL342874, the third column
what changed with rL342874, and the last column what we want to achieve with
these 2 patches:
--------------------------------------------------------
| Opt | < rL342874 | >= rL342874 | |
|------------------------------------------------------|
|-O3 | vmla | vmul | vmul |
| | | vadd | vadd |
|------------------------------------------------------|
|-Ofast | vfma | vfma | vmul |
| | | | vadd |
|------------------------------------------------------|
|-Oz | vmla | vmla | vmla |
--------------------------------------------------------
This patch 1/2, is a cleanup of the spaghetti predicate logic on the different
VMLA and VFMA codegen rules, so that we can make the final functional change in
patch 2/2. This also fixes a typo in the regression test added in rL342874.
Differential revision: https://reviews.llvm.org/D53314
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344671
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Sylvestre Ledru [Wed, 17 Oct 2018 06:35:10 +0000 (06:35 +0000)]
Document the behavior of option passing when using -DCLANG_ENABLE_BOOTSTRAP=On
Also document -DCLANG_BOOTSTRAP_PASSTHROUGH
Reviewers: ecbeckmann
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D53018
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344669
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Lang Hames [Wed, 17 Oct 2018 03:34:09 +0000 (03:34 +0000)]
[BuildingAJIT] Update chapter 1 to use the ORCv2 APIs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344667
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Teresa Johnson [Wed, 17 Oct 2018 00:59:14 +0000 (00:59 +0000)]
New test requires x86-registered-target
New test added in r344658 also requires x86-registered-target.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344662
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Teresa Johnson [Wed, 17 Oct 2018 00:19:21 +0000 (00:19 +0000)]
[ThinLTO] Fix test to require asserts
New test added in r344658 requires asserts due to -stats.
While here, augment it to test new global variable importing
message as well.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344660
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Leonard Chan [Wed, 17 Oct 2018 00:16:07 +0000 (00:16 +0000)]
[Sanitizer][PassManager] Fix for failing ASan tests on arm-linux-gnueabihf
Forgot to initialize the legacy pass in it's constructor.
Differential Revision: https://reviews.llvm.org/D53350
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344659
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Teresa Johnson [Tue, 16 Oct 2018 23:49:50 +0000 (23:49 +0000)]
[ThinLTO] Add importing stats to thin link
Summary:
Previously we could only get the number of imported functions and
variables from the backend. This adds stats to the thin link where the
importing is decided.
Reviewers: wmi
Subscribers: inglorion, dexonsmith, llvm-commits
Differential Revision: https://reviews.llvm.org/D53337
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344658
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Jonathan Metzman [Tue, 16 Oct 2018 23:43:57 +0000 (23:43 +0000)]
[SanitizerCoverage] Don't duplicate code to get section pointers
Summary:
Merge code used to get section start and section end pointers
for SanitizerCoverage constructors. This includes code that handles
getting the start pointers when targeting MSVC.
Reviewers: kcc, morehouse
Reviewed By: morehouse
Subscribers: kcc, hiraditya
Differential Revision: https://reviews.llvm.org/D53211
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344657
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Craig Topper [Tue, 16 Oct 2018 22:29:36 +0000 (22:29 +0000)]
[X86] Match (cmp (and (shr X, C), mask), 0) to BEXTR+TEST.
Without this we match the CMP+AND to a TEST and then match the SHR separately. I'm trusting analyzeCompare to remove the TEST during the peephole pass. Otherwise we need to check the flag users to see if they only use the Z flag.
This recovers a case lost by r344270.
Differential Revision: https://reviews.llvm.org/D53310
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344649
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David Bolvansky [Tue, 16 Oct 2018 21:18:31 +0000 (21:18 +0000)]
[InstCombine] Cleanup libfunc attribute inferring
Reviewers: efriedma
Reviewed By: efriedma
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D53338
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344645
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Lang Hames [Tue, 16 Oct 2018 20:13:06 +0000 (20:13 +0000)]
[ORC] Make the VModuleKey optional, propagate it via MaterializationUnit and
MaterializationResponsibility.
VModuleKeys are intended to enable selective removal of modules from a JIT
session, however for a wide variety of use cases selective removal is not
needed and introduces unnecessary overhead. As of this commit, the default
constructed VModuleKey value is reserved as a "do not track" value, and
becomes the default when adding a new module to the JIT.
This commit also changes the propagation of VModuleKeys. They were passed
alongside the MaterializationResponsibity instance in XXLayer::emit methods,
but are now propagated as part of the MaterializationResponsibility instance
itself (and as part of MaterializationUnit when stored in a JITDylib).
Associating VModuleKeys with MaterializationUnits in this way should allow
for a thread-safe module removal mechanism in the future, even when a module
is in the process of being compiled, by having the
MaterializationResponsibility object check in on its VModuleKey's state
before commiting its results to the JITDylib.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344643
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Krasimir Georgiev [Tue, 16 Oct 2018 18:50:09 +0000 (18:50 +0000)]
Revert "[WebAssembly] LSDA info generation"
This reverts commit r344575.
Newly introduced test eh-lsda.ll.test fails with use-after-free under
ASAN build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344639
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Evandro Menezes [Tue, 16 Oct 2018 17:41:45 +0000 (17:41 +0000)]
[PATCH] [NFC][AArch64] Fix refactoring of macro fusion
Fix compiler error.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344632
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Teresa Johnson [Tue, 16 Oct 2018 17:37:45 +0000 (17:37 +0000)]
[LTO] Call InitLLVM from llvm-lto2
Summary:
D45602 added this to most tools, including llvm-lto, but not to
llvm-lto2. Add it there and test that it works in both lto tools.
Reviewers: ruiu
Subscribers: mehdi_amini, inglorion, eraman, steven_wu, dexonsmith, llvm-commits
Differential Revision: https://reviews.llvm.org/D53330
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344631
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Leonard Chan [Tue, 16 Oct 2018 17:35:41 +0000 (17:35 +0000)]
[Intrinsic] Signed Saturation Addition Intrinsic
Add an intrinsic that takes 2 integers and perform saturation addition on them.
This is a part of implementing fixed point arithmetic in clang where some of
the more complex operations will be implemented as intrinsics.
Differential Revision: https://reviews.llvm.org/D53053
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344629
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Evandro Menezes [Tue, 16 Oct 2018 17:19:51 +0000 (17:19 +0000)]
[NFC][ARM] Refactor macro fusion
Simplify code for wildcards.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344625
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Evandro Menezes [Tue, 16 Oct 2018 17:19:28 +0000 (17:19 +0000)]
[NFC][AArch64] Refactor macro fusion
Simplify API of checking functions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344624
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Chris Lattner [Tue, 16 Oct 2018 16:54:10 +0000 (16:54 +0000)]
fix an out of date paragraph noticed by Bryce Lelbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344621
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Anna Thomas [Tue, 16 Oct 2018 15:46:26 +0000 (15:46 +0000)]
[LV] Teach vectorizer about variant value store into uniform address
Summary:
Teach vectorizer about vectorizing variant value stores to uniform
address. Similar to rL343028, we do not allow vectorization if we have
multiple stores to the same uniform address.
Cost model already has the change for considering the extract
instruction cost for a variant value store. See added test cases for how
vectorization is done.
The patch also contains changes to the ORE messages.
Reviewers: Ayal, mkuper, anemet, hsaito
Subscribers: rkruppe, llvm-commits
Differential Revision: https://reviews.llvm.org/D52656
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344613
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Sanjay Patel [Tue, 16 Oct 2018 15:26:08 +0000 (15:26 +0000)]
revert rL344609: [InstCombine] try harder to form select from logic ops
I noticed a missing check and added it at rL344610, but there actually
are codegen tests that will fail without that, so I'll edit those and
submit a fixed patch with more tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344612
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Sanjay Patel [Tue, 16 Oct 2018 14:44:50 +0000 (14:44 +0000)]
[InstCombine] make sure type is integer before calling ComputeNumSignBits
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344610
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Sanjay Patel [Tue, 16 Oct 2018 14:35:21 +0000 (14:35 +0000)]
[InstCombine] try harder to form select from logic ops
This is part of solving PR37549:
https://bugs.llvm.org/show_bug.cgi?id=37549
The patterns shown here are a special case of something
that we already convert to select. Using ComputeNumSignBits()
catches that case (but not the more complicated motivating
patterns yet).
The backend has hooks/logic to convert back to logic ops
if that's better for the target.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344609
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Ayal Zaks [Tue, 16 Oct 2018 14:25:02 +0000 (14:25 +0000)]
[LV] Add test checks when vectorizing loops under opt for size; NFC
Landing this as a separate part of https://reviews.llvm.org/D50480, recording
current behavior more accurately, to clarify subsequent diff ([LV] Vectorizing
loops of arbitrary trip count without remainder under opt for size).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344606
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Simon Pilgrim [Tue, 16 Oct 2018 10:06:15 +0000 (10:06 +0000)]
[LegalizeDAG] ExpandLegalINT_TO_FP - cleanup UINT_TO_FP i64 -> f64 expansion.
Use SrcVT/DestVT types, correct shift type and AND instead of ZERO_EXTEND_IN_REG.
Part of prep work for D52965
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344602
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Max Kazantsev [Tue, 16 Oct 2018 09:58:09 +0000 (09:58 +0000)]
[NFC] Introduce ICFLoopSafetyInfo
This is an alternative implementation of LoopSafetyInfo that uses the implicit
control flow tracking to give precise answers on queries "whether or not this
block contains throwing instructions". This rules out false-positive answers on
LoopSafetyInfo's queries.
This patch only introduces the new implementation. It is not currently used in
any pass. The enabling patches will go separately, through review.
The plan is to completely replace all uses of LoopSafetyInfo with
ICFLoopSafetyInfo in the future, but to avoid introducing functional problems,
we will do it pass by pass.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344601
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Simon Pilgrim [Tue, 16 Oct 2018 09:50:16 +0000 (09:50 +0000)]
[X86] Fix Skylake ReadAfterLd for PADDrm etc.
Missed in rL343868 as due to their custom InstrRW.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344600
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Renato Golin [Tue, 16 Oct 2018 09:37:52 +0000 (09:37 +0000)]
[VPlan] Script to extract VPlan digraphs from log
The vectoriser's debug log prints VPlan digraphs, but it's a bit
cumbersome to extract them and render them into PNG images. This script
does exactly that, being careful enough to extract all individual plans,
name them appropriately and save in either .dot or .png files.
Example usage:
$ opt -O3 -debug-only=loop-vectorize file.ll -S -o /dev/null 2> debug.log
$ $LLVM_SRC/utils/extract_vplan.py < debug.log
Exporting VF1UF1 to DOT: VPlanVF1UF1.dot
Exporting VF24UF1 to DOT: VPlanVF24UF1.dot
$ $LLVM_SRC/utils/extract_vplan.py --png < debug.log
Exporting VF1UF1 to PNG via dot: VPlanVF1UF1.png
Exporting VF24UF1 to PNG via dot: VPlanVF24UF1.png
$ xdot VPlanVF1UF1.dot
Differential Revision: https://reviews.llvm.org/D53142
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344599
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Max Kazantsev [Tue, 16 Oct 2018 09:11:25 +0000 (09:11 +0000)]
[NFC] Remove obsolete method headerMayThrow
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344596
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Max Kazantsev [Tue, 16 Oct 2018 08:31:05 +0000 (08:31 +0000)]
[NFC] Make LoopSafetyInfo abstract to allow alternative implementations
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344592
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Aleksandar Beserminji [Tue, 16 Oct 2018 08:27:28 +0000 (08:27 +0000)]
[mips][micromips] Fix how values in .gcc_except_table are calculated
When a landing pad is calculated in a program that is compiled
for micromips, it will point to an even address. Such an error will
cause a segmentation fault, as the instructions in micromips are
aligned on odd addresses. This patch sets the last bit of the offset
where a landing pad is, to 1, which will effectively be
an odd address and point to the instruction exactly.
Differential Revision: https://reviews.llvm.org/D52985
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344591
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Max Kazantsev [Tue, 16 Oct 2018 08:07:14 +0000 (08:07 +0000)]
[NFC] Encapsulate work with BlockColors in LoopSafetyInfo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344590
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David Stenberg [Tue, 16 Oct 2018 08:06:48 +0000 (08:06 +0000)]
[DebugInfo][LCSSA] Rewrite pre-existing debug values outside loop
Summary:
Extend LCSSA so that debug values outside loops are rewritten to
use the PHI nodes that the pass creates.
This fixes PR39019. In that case, we ran LCSSA on a loop that
was later on vectorized, which left us with something like this:
for.cond.cleanup:
%add.lcssa = phi i32 [ %add, %for.body ], [ %34, %middle.block ]
call void @llvm.dbg.value(metadata i32 %add,
ret i32 %add.lcssa
for.body:
%add =
[...]
br i1 %exitcond, label %for.cond.cleanup, label %for.body
which later resulted in the debug.value becoming undef when
removing the scalar loop (and the location would have probably
been wrong for the vectorized case otherwise).
As we now may need to query the AvailableVals cache more than
once for a basic block, FindAvailableVals() in SSAUpdaterImpl is
changed so that it updates the cache for blocks that we do not
create a PHI node for, regardless of the block's number of
predecessors. The debug value in the attached IR reproducer
would not be properly rewritten without this.
Debug values residing in blocks where we have not inserted any
PHI nodes are currently left as-is by this patch. I'm not sure
what should be done with those uses.
Reviewers: mattd, aprantl, vsk, probinson
Reviewed By: mattd, aprantl
Subscribers: jmorse, gbedwell, JDevlieghere, llvm-commits
Differential Revision: https://reviews.llvm.org/D53130
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344589
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Max Kazantsev [Tue, 16 Oct 2018 07:50:14 +0000 (07:50 +0000)]
[NFC] Move block throw check inside allLoopPathsLeadToBlock
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344588
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Max Kazantsev [Tue, 16 Oct 2018 06:34:53 +0000 (06:34 +0000)]
[NFC] Turn isGuaranteedToExecute into a method
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344587
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Alexander Shaposhnikov [Tue, 16 Oct 2018 05:40:18 +0000 (05:40 +0000)]
[llvm-objcopy] Factor out Buffer
In this diff we move out the hierarchy of buffers from Object.h/Object.cpp
into separate files since it is not ELF-specific and will be reused later.
After this change Object.h/Object.cpp are almost exclusively ELF-specific.
Test plan: make check-all
Differential revision: https://reviews.llvm.org/D53298
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344585
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Max Kazantsev [Tue, 16 Oct 2018 05:26:21 +0000 (05:26 +0000)]
[SCEV] Limit AddRec "simplifications" to avoid combinatorial explosions
SCEV's transform that turns `{A1,+,A2,+,...,+,An}<L> * {B1,+,B2,+,...,+,Bn}<L>` into
a single AddRec of size `2n+1` with complex combinatorial coefficients can easily
trigger exponential growth of the SCEV (in case if nothing gets folded and simplified).
We tried to restrain this transform using the option `scalar-evolution-max-add-rec-size`,
but its default value seems to be insufficiently small: the test attached to this patch
with default value of this option `16` has a SCEV of >3M symbols (when printed out).
This patch reduces the simplification limit. It is not a cure to combinatorial
explosions, but at least it reduces this corner case to something more or less
reasonable.
Differential Revision: https://reviews.llvm.org/D53282
Reviewed By: sanjoy
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344584
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Sebastian Pop [Tue, 16 Oct 2018 00:42:07 +0000 (00:42 +0000)]
[hot-cold-split] fix failing testcases
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344577
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Heejin Ahn [Tue, 16 Oct 2018 00:09:12 +0000 (00:09 +0000)]
[WebAssembly] LSDA info generation
Summary:
This adds support for LSDA (exception table) generation for wasm EH.
Wasm EH mostly follows the structure of Itanium-style exception tables,
with one exception: a call site table entry in wasm EH corresponds to
not a call site but a landing pad.
In wasm EH, the VM is responsible for stack unwinding. After an
exception occurs and the stack is unwound, the control flow is
transferred to wasm 'catch' instruction by the VM, after which the
personality function is called from the compiler-generated code. (Refer
to WasmEHPrepare pass for more information on this part.)
This patch:
- Changes wasm.landingpad.index intrinsic to take a token argument, to
make this 1:1 match with a catchpad instruction
- Stores landingpad index info and catch type info MachineFunction in
before instruction selection
- Lowers wasm.lsda intrinsic to an MCSymbol pointing to the start of an
exception table
- Adds WasmException class with overridden methods for table generation
- Adds support for LSDA section in Wasm object writer
Reviewers: dschuff, sbc100, rnk
Subscribers: mgorny, jgravelle-google, sunfish, llvm-commits
Differential Revision: https://reviews.llvm.org/D52748
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344575
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Craig Topper [Mon, 15 Oct 2018 23:34:58 +0000 (23:34 +0000)]
[X86] Remove some isel patterns that shouldn't be possible.
These included a bitcast of a load from v4f32 to v2f64, but DAG combine should have already changed the type of the load to remove the cast.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344573
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Lang Hames [Mon, 15 Oct 2018 22:56:10 +0000 (22:56 +0000)]
[ORC] Rename ORC layers to make the "new" ORC layers the default.
This commit adds a 'Legacy' prefix to old ORC layers and utilities, and removes
the '2' suffix from the new ORC layers. If you wish to continue using the old
ORC layers you will need to add a 'Legacy' prefix to your classes. If you were
already using the new ORC layers you will need to drop the '2' suffix.
The legacy layers will remain in-tree until the new layers reach feature
parity with them. This will involve adding support for removing code from the
new layers, and ensuring that performance is comperable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344572
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Nicolai Haehnle [Mon, 15 Oct 2018 22:37:46 +0000 (22:37 +0000)]
StructurizeCFG,AMDGPU: Test case of a redundant phi and codegen consequences
Change-Id: I9681f9e41ca30f82576f3d1f965c3a550a34b171
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344569
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Chris Bieneman [Mon, 15 Oct 2018 22:36:59 +0000 (22:36 +0000)]
[CMake] Fix a missing LLVM_ENABLE_IDE from r344555
This is just one place I missed swapping CMAKE_CONFIGURATION_TYPES with LLVM_ENABLE_IDE.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344568
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Lang Hames [Mon, 15 Oct 2018 22:36:22 +0000 (22:36 +0000)]
[ORC] Rename MultiThreadedSimpleCompiler to ConcurrentIRCompiler.
The new name is a better fit: This class does not actually spawn any new
threads for compilation, it is just safe to call from multiple threads
concurrently.
The "Simple" part of the name did not convey much either, so it was
dropped.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344567
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Lang Hames [Mon, 15 Oct 2018 22:27:03 +0000 (22:27 +0000)]
Change a TerminatorInst* to an Instruction* in HotColdSplitting.cpp.
r344558 added an assignment to a TerminatorInst* from
BasicBlock::getTerminatorInst(), but BasicBlock::getTerminatorInst() returns an
Instruction* rather than a TerminatorInst* since r344504 so this fails to
compile.
Changing the variable to an Instruction* should get the bots building again.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344566
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Lang Hames [Mon, 15 Oct 2018 22:27:02 +0000 (22:27 +0000)]
[ORC] Switch to DenseMap/DenseSet for ORC symbol map/set types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344565
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Erik Pilkington [Mon, 15 Oct 2018 22:03:53 +0000 (22:03 +0000)]
NFC: Fix a -Wsign-conversion warning
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344564
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Craig Topper [Mon, 15 Oct 2018 21:51:32 +0000 (21:51 +0000)]
[X86] Fix a bad bitcast in the load form of vXi16 uniform shift patterns for EVEX encoded instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344563
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Craig Topper [Mon, 15 Oct 2018 21:51:29 +0000 (21:51 +0000)]
[X86] Add test cases showing failure to fold load into vpsrlw when EVEX encoded instructions are used.
There's a bad bitcast being used in the isel patterns for the vXi16 shift instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344562
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Craig Topper [Mon, 15 Oct 2018 21:51:26 +0000 (21:51 +0000)]
[X86] Disable the peephole pass on avx2-intrinsics-x86.ll and avx512bw-intrinsics.ll to ensure any load folding tests are testing isel not load folding tables.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344561
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Craig Topper [Mon, 15 Oct 2018 21:51:22 +0000 (21:51 +0000)]
[X86] Regenerate avx2-intrinsics-x86.ll to compress the 32 vs 64 bit mode checks.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344560
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Sanjay Patel [Mon, 15 Oct 2018 21:43:53 +0000 (21:43 +0000)]
[InstCombine] add tests for bitwise logic --> select; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344559
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Sebastian Pop [Mon, 15 Oct 2018 21:43:11 +0000 (21:43 +0000)]
[hot-cold-split] fix static analysis of cold regions
Make the code of blockEndsInUnreachable to match the function
blockEndsInUnreachable in CodeGen/BranchFolding.cpp. I also have
added a note to make sure the code of this function will not be
modified unless the back-end version is also modified.
An early return before outlining has been added to avoid
outlining the full function body when the first block in the
function is marked cold.
The static analysis of cold code has been amended to avoid
marking the whole function as cold by back-propagation
because the back-propagation would mark blocks with return
statements as cold.
The patch adds debug statements to help discover these problems.
Differential Revision: https://reviews.llvm.org/D52904
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344558
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Chris Bieneman [Mon, 15 Oct 2018 21:20:02 +0000 (21:20 +0000)]
[CMake] Use LLVM_ENABLE_IDE instead of CMAKE_CONFIGURATION_TYPES
There are several places where we use CMAKE_CONFIGURATION_TYPES to determine if we are using an IDE generator and in turn decide not to generate some of the convenience targets (like all the install-* and check-llvm-* targets). This decision is made because IDEs don't always deal well with the thousands of targets LLVM can generate.
This approach does not work for Visual Studio 15's new CMake integration. Because VS15 uses a Ninja generator, it isn't a multi-configuration build, and generating all these extra targets mucks up the UI and adds little value.
With this change we still don't generate these targets by default for Visual Studio and Xcode generators, and LLVM_ENABLE_IDE becomes a switch that can be enabled on the VS15 CMake builds, to improve the IDE experience.
This is a re-land of r340435, with a few minor fix-ups. The issues causing the revert were addressed in r344218, r344219, and r344553.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344555
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Simon Pilgrim [Mon, 15 Oct 2018 21:15:58 +0000 (21:15 +0000)]
[AARCH64] Improve vector popcnt lowering with ADDLP
AARCH64 equivalent to D53257 - uses widening pairwise adds on vXi8 CTPOP to support i16/i32/i64 vectors.
This is a blocker for generic vector CTPOP expansion (P32655) - this will remove the aarch64 diff from D53258.
Differential Revision: https://reviews.llvm.org/D53259
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344554
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