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Teresa Johnson [Tue, 12 Jul 2016 21:13:44 +0000 (21:13 +0000)]
Refactor indirect call promotion profitability analysis (NFC)
Summary:
Refactored the profitability analysis out of the IC promotion pass and
into lib/Analysis so that it can be accessed by the summary index
builder in a follow-on patch to enable IC promotion in ThinLTO (D21932).
Reviewers: davidxl, xur
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D22182
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275216
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Nemanja Ivanovic [Tue, 12 Jul 2016 21:00:10 +0000 (21:00 +0000)]
[Power9] Add codegen for VSX word insert/extract instructions
This patch corresponds to review:
http://reviews.llvm.org/D20239
It adds exploitation of XXINSERTW and XXEXTRACTUW instructions that
are useful in some cases for inserting and extracting vector elements of
v4[if]32 vectors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275215
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Piotr Padlewski [Tue, 12 Jul 2016 20:59:17 +0000 (20:59 +0000)]
Review fixes to lit documentation
Reviewers: mehdi_amini
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D22245
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275214
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David Majnemer [Tue, 12 Jul 2016 20:31:46 +0000 (20:31 +0000)]
[LoopAccessAnalysis] Some minor cleanups
Use range-base for loops.
Use auto when appropriate.
No functional change is intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275213
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Simon Pilgrim [Tue, 12 Jul 2016 20:27:32 +0000 (20:27 +0000)]
[X86][AVX] Add support for target shuffle combining to VPERM2F128/VPERM2I128
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275212
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Davide Italiano [Tue, 12 Jul 2016 19:54:19 +0000 (19:54 +0000)]
[SCCP] Constant fold structs if all the lattice value are constant.
Differential Revision: http://reviews.llvm.org/D22269
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275208
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David Majnemer [Tue, 12 Jul 2016 19:35:15 +0000 (19:35 +0000)]
[LoopVectorize] Assorted cleanups
Use range-based for loops instead of doing everything manually.
Use auto when appropriate.
No functional change is intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275205
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Matthias Braun [Tue, 12 Jul 2016 19:04:30 +0000 (19:04 +0000)]
X86FixupBWInsts: No need for forward liveness analysis.
With r274952 and r275201 in place there are no cases left where a
forward liveness analysis yields different results than a backward one.
So we can remove the forward stepping logic.
Differential Revision: http://reviews.llvm.org/D22083
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275204
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Matt Arsenault [Tue, 12 Jul 2016 19:01:23 +0000 (19:01 +0000)]
AMDGPU: Fix verifier error with kill intrinsic
Don't create a terminator in the middle of the block.
We should probably get rid of this intrinsic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275203
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Dehao Chen [Tue, 12 Jul 2016 18:45:51 +0000 (18:45 +0000)]
[PM] Port LoopIdiomRecognize Pass to new PM
Summary: Port LoopIdiomRecognize Pass to new PM
Reviewers: davidxl
Subscribers: davide, sanjoy, mzolotukhin, llvm-commits
Differential Revision: http://reviews.llvm.org/D22250
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275202
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Matthias Braun [Tue, 12 Jul 2016 18:44:33 +0000 (18:44 +0000)]
BranchFolding: Use LivePhysReg to update live in lists.
Use LivePhysRegs with a backwards walking algorithm to update live in
lists, this way the results do not depend on the presence of kill flags
anymore.
This patch also reduces the number of registers added as live-in.
Previously all pristine registers as well as all sub registers of a
super register were added resulting in unnecessarily large live in
lists. This fixed https://llvm.org/PR25263.
Differential Revision: http://reviews.llvm.org/D22027
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275201
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Matt Arsenault [Tue, 12 Jul 2016 18:41:03 +0000 (18:41 +0000)]
AMDGPU: Set isConvergent on v_cmpx* instructions
No test since these aren't used now, except for one place
in a pre-emit pass.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275200
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Wei Ding [Tue, 12 Jul 2016 18:02:14 +0000 (18:02 +0000)]
AMDGPU: Add LLVM IR Intrinsic for v_lerp_u8
Differential Revision: http://reviews.llvm.org/D22239
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275197
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Krzysztof Parzyszek [Tue, 12 Jul 2016 17:55:28 +0000 (17:55 +0000)]
Fix printing of debugging information in LiveIntervals::shrinkToUses
Print VNI->def before calling VNI->markUnused(), since markUnused makes
the def invalid.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275196
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Krzysztof Parzyszek [Tue, 12 Jul 2016 17:37:44 +0000 (17:37 +0000)]
Add print/dump routines to LiveInterval::SubRange
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275194
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Xinliang David Li [Tue, 12 Jul 2016 17:14:51 +0000 (17:14 +0000)]
[PGO] Don't include full file path in static function profile counter names
Patch by Jake VanAdrighem
Differential Revision: http://reviews.llvm.org/D22028
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275193
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Sanjay Patel [Tue, 12 Jul 2016 17:05:04 +0000 (17:05 +0000)]
add tests for missing DeMorgan's Law folds
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275192
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Sanjay Patel [Tue, 12 Jul 2016 16:21:55 +0000 (16:21 +0000)]
auto-generate checks
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275188
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Sanjay Patel [Tue, 12 Jul 2016 16:17:30 +0000 (16:17 +0000)]
auto-generate checks
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275187
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Sanjay Patel [Tue, 12 Jul 2016 16:13:04 +0000 (16:13 +0000)]
auto-generate checks
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275186
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Nirav Dave [Tue, 12 Jul 2016 15:32:36 +0000 (15:32 +0000)]
[MC] Flip llc's assembly comment preservation flag to have consistent
orientation with llvm-mc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275179
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Haicheng Wu [Tue, 12 Jul 2016 15:31:41 +0000 (15:31 +0000)]
[AArch64] Set FMOVS0 and FMOVD0 as isAsCheapAsAMove when needed.
If a subtarget has both ZCZeroing and CustomCheapAsMoveHandling features (now
only Kryo has both), set FMOVS0 and FMOVD0 isAsCheapAsAMove.
Differential Revision: http://reviews.llvm.org/D22256
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275178
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Nemanja Ivanovic [Tue, 12 Jul 2016 12:16:27 +0000 (12:16 +0000)]
[PowerPC] Cannonicalize applicable vector shift immediates as swaps
This patch corresponds to review:
http://reviews.llvm.org/D21358
Vector shifts that have the same semantics as a vector swap are cannonicalized
as such to provide additional opportunities for swap removal optimization to
remove unnecessary swaps.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275168
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Amjad Aboud [Tue, 12 Jul 2016 12:06:34 +0000 (12:06 +0000)]
[codeview] Improved array type support.
Added support for:
1. Multi dimension array.
2. Array of structure type, which previously was declared incompletely.
3. Dynamic size array.
4. Array where element type is a typedef, volatile or constant (this should resolve PR28311).
Differential Revision: http://reviews.llvm.org/D21526
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275167
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Nicolai Haehnle [Tue, 12 Jul 2016 08:12:16 +0000 (08:12 +0000)]
AMDGPU: Unify MOVRELSOffset and MOVRELDOffset
Summary:
Previously, constant index insertelements would be turned into SI_INDIRECT_DST,
which is bound to prevent some optimization opportunities. Worse, it mislead
the heuristic that decides whether immediates should be lowered to S_MOV_B32
or V_MOV_B32 in a way that resulted in unnecessary v_readfirstlanes.
Reviewers: arsenm, tstellarAMD
Subscribers: arsenm, kzhuravl, llvm-commits
Differential Revision: http://reviews.llvm.org/D22217
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275160
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Vitaly Buka [Tue, 12 Jul 2016 06:25:32 +0000 (06:25 +0000)]
Revert "New pass manager for LICM."
Summary: This reverts commit r275118.
Subscribers: sanjoy, mehdi_amini
Differential Revision: http://reviews.llvm.org/D22259
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275156
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Craig Topper [Tue, 12 Jul 2016 05:27:53 +0000 (05:27 +0000)]
[AVX512] Remove masked logic op intrinsics and autoupgrade them to native IR.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275155
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Rui Ueyama [Tue, 12 Jul 2016 03:33:48 +0000 (03:33 +0000)]
Dump enum unique names.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275152
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Rui Ueyama [Tue, 12 Jul 2016 03:25:03 +0000 (03:25 +0000)]
Re-enable TPI hash verification for enum records.
We didn't read unique names correctly. As a result, we computed
hashes on (non-)unique names instead of unique names.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275150
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Duncan P. N. Exon Smith [Tue, 12 Jul 2016 03:18:50 +0000 (03:18 +0000)]
X86: Avoid implicit iterator conversions, NFC
Avoid implicit conversions from MachineInstrBundleIterator to
MachineInstr*, mainly by preferring MachineInstr& over MachineInstr* and
using range-based for loops.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275149
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NAKAMURA Takumi [Tue, 12 Jul 2016 03:01:22 +0000 (03:01 +0000)]
Fix libdeps in r275125. LTO tools require BitReader.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275148
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Ivan Krasin [Tue, 12 Jul 2016 02:38:37 +0000 (02:38 +0000)]
Print remarks from WholeProgramDevirt pass for each call site.
Summary:
It's useful to have some visibility about which call sites are devirtualized,
especially for debug purposes. Another use case is a regression test on the
application side (like, Chromium).
Reviewers: pcc
Differential Revision: http://reviews.llvm.org/D22252
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275145
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NAKAMURA Takumi [Tue, 12 Jul 2016 02:18:09 +0000 (02:18 +0000)]
llvm/test/CodeGen/AMDGPU/selected-stack-object.ll REQUIRES +Asserts, since it expects assertion failure.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275144
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Haicheng Wu [Tue, 12 Jul 2016 02:04:01 +0000 (02:04 +0000)]
[Kryo] Enable ZCZeroing feature
This feature uses immediate #0 to zero a register.
Differential Revision: http://reviews.llvm.org/D19985
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275143
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Duncan P. N. Exon Smith [Tue, 12 Jul 2016 01:55:32 +0000 (01:55 +0000)]
Hexagon: Avoid implicit iterator conversions, NFC
Avoid implicit iterator conversions from MachineInstrBundleIterator to
MachineInstr* in the Hexagon backend, mostly by preferring MachineInstr&
over MachineInstr* and switching to range-based for loops.
There's a long tail of API cleanup here, but I'm planning to leave the
rest to the Hexagon maintainers. HexagonInstrInfo defines many of its
own predicates, and most of them still take MachineInstr*. Some of
those actually check for nullptr, so I didn't feel comfortable changing
them to MachineInstr& en masse.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275142
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Duncan P. N. Exon Smith [Tue, 12 Jul 2016 01:47:02 +0000 (01:47 +0000)]
Mips: Avoid implicit iterator conversions, NFC
Avoid implicit conversions from MachineInstrBundleIterator to
MachineInstr* in the Mips backend, mainly by preferring MachineInstr&
over MachineInstr* when a pointer isn't nullable and using range-based
for loops.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275141
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Craig Topper [Tue, 12 Jul 2016 01:42:33 +0000 (01:42 +0000)]
[X86,IR] Remove unnecessary or unused LLVMContext parameter from some of the X86 intrinsic upgrade functions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275138
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Duncan P. N. Exon Smith [Tue, 12 Jul 2016 01:39:01 +0000 (01:39 +0000)]
SystemZ: Avoid implicit iterator conversions, NFC
Avoid implicit conversions from MachineInstrBundleIterator to
MachineInstr* in the SystemZ backend, mainly by preferring MachineInstr&
over MachineInstr* and using range-based for loops.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275137
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Nico Weber [Tue, 12 Jul 2016 01:30:35 +0000 (01:30 +0000)]
Teach FastISel about thiscall (and, hence, about callee-pop).
http://reviews.llvm.org/D22115
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275135
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Matt Arsenault [Tue, 12 Jul 2016 00:23:17 +0000 (00:23 +0000)]
AMDGPU: Cleanup pseudoinstructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275133
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Matt Arsenault [Tue, 12 Jul 2016 00:08:14 +0000 (00:08 +0000)]
AMDGPU: Fix missing scc def on control flow pseudos
These are all expanded to instructions that include an scc def.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275132
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Matt Arsenault [Mon, 11 Jul 2016 23:56:30 +0000 (23:56 +0000)]
AMDGPU: Enable trackLivenessAfterRegAlloc
This has caught a number of bugs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275131
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Mehdi Amini [Mon, 11 Jul 2016 23:55:01 +0000 (23:55 +0000)]
Do not use bool in C header lto.h, use lto_bool_t instead
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275130
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Matt Arsenault [Mon, 11 Jul 2016 23:35:48 +0000 (23:35 +0000)]
AMDGPU: Remove superfluous string attributes from tests
Also fix v_mac.ll not testing right thing for fneg
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275129
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George Burgess IV [Mon, 11 Jul 2016 23:18:32 +0000 (23:18 +0000)]
Attempt to make buildbots happy.
Woohoo, unused variable warnings in builds without asserts (as a result
of r275122).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275126
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Mehdi Amini [Mon, 11 Jul 2016 23:10:18 +0000 (23:10 +0000)]
Add a libLTO API to query a memory buffer and check if it contains ObjC categories
The linker supports a feature to force load an object from a static
archive if it defines an Objective-C category.
This API supports this feature by looking at every section in the
module to find if a category is defined in the module.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275125
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George Burgess IV [Mon, 11 Jul 2016 22:59:09 +0000 (22:59 +0000)]
[CFLAA] Simplify CFLGraphBuilder. NFC.
This patch simplifies the graph builder by encoding nodes as {Value,
Dereference Level} pairs. This lets us kill edge types, and allows us to
get rid of hacks in StratifiedSets (like addAttrsBelow/...). This
simplification also allows us to remove InstantiatedRelations and
InstantiatedAttrs.
Patch by Jia Chen.
Differential Revision: http://reviews.llvm.org/D22080
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275122
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Dehao Chen [Mon, 11 Jul 2016 22:45:24 +0000 (22:45 +0000)]
New pass manager for LICM.
Summary: Port LICM to the new pass manager.
Reviewers: davidxl, silvas
Subscribers: silvas, davide, sanjoy, llvm-commits, mehdi_amini
Differential Revision: http://reviews.llvm.org/D21772
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275118
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Alina Sbirlea [Mon, 11 Jul 2016 22:34:29 +0000 (22:34 +0000)]
Correct ordering of loads/stores.
Summary:
Aiming to correct the ordering of loads/stores. This patch changes the
insert point for loads to the position of the first load.
It updates the ordering method for loads to insert before, rather than after.
Before this patch the following sequence:
"load a[1], store a[1], store a[0], load a[2]"
Would incorrectly vectorize to "store a[0,1], load a[1,2]".
The correctness check was assuming the insertion point for loads is at
the position of the first load, when in practice it was at the last
load. An alternative fix would have been to invert the correctness check.
The current fix changes insert position but also requires reordering of
instructions before the vectorized load.
Updated testcases to reflect the changes.
Reviewers: tstellarAMD, llvm-commits, jlebar, arsenm
Subscribers: mzolotukhin
Differential Revision: http://reviews.llvm.org/D22071
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275117
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Tim Northover [Mon, 11 Jul 2016 22:29:37 +0000 (22:29 +0000)]
ARM: validate immediate branch targets in AsmParser.
Immediate branch targets aren't commonly used, but if they are we should make
sure they can actually be encoded. This means they must be divisible by 2 when
targeting Thumb mode, and by 4 when targeting ARM mode.
Also do a little naming cleanup while I was changing everything around anyway.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275116
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Nicolai Haehnle [Mon, 11 Jul 2016 21:59:43 +0000 (21:59 +0000)]
AMDGPU: Treat texture gather instructions more like other MIMG instructions
Summary:
Setting MIMG to 0 has a bunch of unexpected side effects, including that
isVMEM returns false which leads to incorrect treatment in the hazard
recognizer. The reason I noticed it is that it also leads to incorrect
treatment in VGPR-to-SGPR copies, which is one cause of the referenced bug.
The only reason why MIMG was set to 0 is to signal the special handling of
dmasks, but that can be checked differently.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=96877
Reviewers: arsenm, tstellarAMD
Subscribers: arsenm, kzhuravl, llvm-commits
Differential Revision: http://reviews.llvm.org/D22210
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275113
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Zachary Turner [Mon, 11 Jul 2016 21:45:26 +0000 (21:45 +0000)]
Refactor the PDB writing to use a builder approach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275110
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Zachary Turner [Mon, 11 Jul 2016 21:45:09 +0000 (21:45 +0000)]
[pdb] Add a pdb2yaml option to not dump file headers.
This will be useful once we start adding the ability to dump type
records and symbol records, since it will allow us to generate
mergeable information instead of information that specifies an
entire file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275109
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Nicolai Haehnle [Mon, 11 Jul 2016 21:44:40 +0000 (21:44 +0000)]
AMDGPU: fix local stack slot allocation bugs
Summary:
The main bug fix here is using the 32-bit encoding of V_ADD_I32 in
materializeFrameBaseRegister and resolveFrameIndex, so that arbitrary
immediates work.
The second part is that we may now require the SegmentWaveByteOffset
even when there are initially no stack objects and VGPR spilling isn't
enabled, for stack slots that are allocated later. This means that some
bits become effectively dead and can be cleaned up.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=96602
Tested-by: Kai Wasserbäch <kai@dev.carbon-project.org>
Reviewers: arsenm, tstellarAMD
Subscribers: arsenm, llvm-commits, kzhuravl
Differential Revision: http://reviews.llvm.org/D21551
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275108
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Michael Kuperstein [Mon, 11 Jul 2016 21:39:44 +0000 (21:39 +0000)]
[X86] Make some cast costs more precise
Make some AVX and AVX512 cast costs more precise.
Based on part of a patch by Elena Demikhovsky (D15604).
Differential Revision: http://reviews.llvm.org/D22064
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275106
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Kyle Butt [Mon, 11 Jul 2016 21:37:03 +0000 (21:37 +0000)]
Codegen: Fix comment in BranchFolding.cpp
Blocks to be tail-merged may share more than one successor. Correct the
comment to state that they share a specific successor, SuccBB, rather
than a single successor, which is not true.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275104
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Quentin Colombet [Mon, 11 Jul 2016 21:03:03 +0000 (21:03 +0000)]
[X86] Fix tailcall return address clobber bug.
This bug (llvm.org/PR28124) was introduced by r237977, which refactored
the tail call sequence to be generated in two passes instead of one.
Unfortunately, the stack adjustment produced by the first pass was not
recognized by X86FrameLowering::mergeSPUpdates() in all cases, causing
code such as the following, which clobbers the return address, to be
generated:
popl %edi
popl %edi
pushl %eax
jmp tailcallee # TAILCALL
To fix the problem, the entire stack adjustment is performed in
X86ExpandPseudo::ExpandMI() for tail calls.
Patch by Magnus LÃ¥ng <margnus1@gmail.com>
Differential Revision: http://reviews.llvm.org/D21325
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275103
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Sanjay Patel [Mon, 11 Jul 2016 20:50:39 +0000 (20:50 +0000)]
fix documentation comments; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275101
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Alina Sbirlea [Mon, 11 Jul 2016 20:46:17 +0000 (20:46 +0000)]
Add TLI.allowsMisalignedMemoryAccesses to LoadStoreVectorizer
Summary: Extend TTI to access TLI.allowsMisalignedMemoryAccesses(). Check condition when vectorizing load and store chains.
Add additional parameters: AddressSpace, Alignment, Fast.
Reviewers: llvm-commits, jlebar
Subscribers: arsenm, mzolotukhin
Differential Revision: http://reviews.llvm.org/D21935
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275100
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Michael Kuperstein [Mon, 11 Jul 2016 20:40:44 +0000 (20:40 +0000)]
[X86] Disable FixupSetCC for CodeGenOpt::None
It is an optimization pass, and should not run at -O0. Especially since Fast RA
will not do the required register coalescing anyway, so it's a loss even from
the optimization standpoint.
This also works around (but doesn't quite fix) PR28489.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275099
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Chad Rosier [Mon, 11 Jul 2016 18:45:49 +0000 (18:45 +0000)]
[IPRA] Properly compute register usage at call sites.
Differential Revision: http://reviews.llvm.org/D21395
Patch by Vivek Pandya.
PR28144
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275087
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Zhan Jun Liau [Mon, 11 Jul 2016 18:45:03 +0000 (18:45 +0000)]
[SystemZ] Recognize Load On Condition Immediate (LOCHI/LOGHI) opportunities
Summary: Add support for the z13 instructions LOCHI and LOCGHI which
conditionally load immediate values. Add target instruction info hooks so
that if conversion will allow predication of LHI/LGHI.
Author: RolandF
Reviewers: uweigand
Subscribers: zhanjunl
Commiting on behalf of Roland.
Differential Revision: http://reviews.llvm.org/D22117
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275086
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Davide Italiano [Mon, 11 Jul 2016 18:21:29 +0000 (18:21 +0000)]
[SCCP] Try to follow the DRY principle, use `OpSt`.
Thanks to Eli Friedman for pointing out in his post-commit review!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275084
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Jingyue Wu [Mon, 11 Jul 2016 18:13:28 +0000 (18:13 +0000)]
[SLSR] Call getPointerSizeInBits with the correct address space.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275083
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Davide Italiano [Mon, 11 Jul 2016 18:10:06 +0000 (18:10 +0000)]
[PM/IPO] Port LowerTypeTests to the new PassManager.
There's a little bit of churn in this patch because the initialization
mechanism is now shared between the old and the new PM. Other than
that, it's just a pretty mechanical translation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275082
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Jacques Pienaar [Mon, 11 Jul 2016 17:58:16 +0000 (17:58 +0000)]
[lanai] Add more tests for assembly of conditional ALU ops
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275081
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Dehao Chen [Mon, 11 Jul 2016 17:36:02 +0000 (17:36 +0000)]
Fix the assertion failure caused by reviews.llvm.org/D22118
Summary: http://reviews.llvm.org/D22118 uses metadata to store the call count, which makes it possible to have branch weight to have only one elements. Also fix the assertion failure in inliner when checking the instruction type to include "invoke" instruction.
Reviewers: mkuper, dnovillo
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D22228
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275079
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David Majnemer [Mon, 11 Jul 2016 17:09:06 +0000 (17:09 +0000)]
[IR] Stop a -Wsign-compare warning from firing
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275077
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Davide Italiano [Mon, 11 Jul 2016 17:00:31 +0000 (17:00 +0000)]
[LowerTypeTests] Don't rely on doInitialization().
In preparation for porting this pass to the new PM (which has no
doInitialization()).
Differential Revision: http://reviews.llvm.org/D22223
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275074
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Dehao Chen [Mon, 11 Jul 2016 16:48:54 +0000 (16:48 +0000)]
Implement callsite-hotness based inline cost for Sample-based PGO
Summary:
For sample-based PGO, using BFI to calculate callsite count is sometime not accurate. This is because with sampling based approach, if a callsite resides in a hot loop deeply nested in a bunch of cold branches, the callsite's BFI frequency would be inaccurately calculated due to lack of samples in the cold branch.
E.g.
if (A1 && A2 && A3 && ..... && A10) {
for (i=0; i <
100000000; i++) {
callsite();
}
}
Assume that A1 to A100 are all 100% taken, and callsite has 1000 samples and thus is considerred hot. Because the loop's trip count is huge, it's normal that all branches outside the loop has no sample at all. As a result, we can only use static branch probability to derive the the frequency of the loop header. Assuming that static heuristic thinks each branch is 50% taken, then the count calculated from BFI will be 1/(2^10) of the actual value.
In order to get more accurate callsite count, we directly annotate the weight on the call instruction, and directly use it when checking callsite hotness.
Note that this mechanism can also be shared by instrumentation based callsite hotness analysis. The side benefit is that it breaks the dependency from Inliner to BFI as call count is embedded in the IR.
Reviewers: davidxl, eraman, dnovillo
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D22118
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275073
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Dehao Chen [Mon, 11 Jul 2016 16:40:17 +0000 (16:40 +0000)]
Tune the weight propagation algorithm for sample profile.
Summary: Handle the case when there is only one incoming/outgoing edge for a visited basic block: use the block weight to adjust edge weight even when the edge has been visited before. This can help reduce inaccuracies introduced by incorrect basic block profile, as shown in the updated unittest.
Reviewers: davidxl, dnovillo
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D22180
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275072
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Sanjay Patel [Mon, 11 Jul 2016 15:08:37 +0000 (15:08 +0000)]
[x86] make some of the tests 256-bit for testing diversity
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275070
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Nirav Dave [Mon, 11 Jul 2016 14:32:57 +0000 (14:32 +0000)]
Add missing include from previous commit
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275069
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Nirav Dave [Mon, 11 Jul 2016 14:23:53 +0000 (14:23 +0000)]
Fix branch relaxation in 16-bit mode.
Thread through MCSubtargetInfo to relaxInstruction function allowing relaxation
to generate jumps with 16-bit sized immediates in 16-bit mode.
This fixes PR22097.
Reviewers: dwmw2, tstellarAMD, craig.topper, jyknight
Subscribers: jfb, arsenm, jyknight, llvm-commits, dsanders
Differential Revision: http://reviews.llvm.org/D20830
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275068
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Sanjay Patel [Mon, 11 Jul 2016 14:17:54 +0000 (14:17 +0000)]
[x86] specify triple to avoid bot failures
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275067
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Nicolai Haehnle [Mon, 11 Jul 2016 14:11:51 +0000 (14:11 +0000)]
[Sink] Don't move calls to readonly functions across stores
Summary:
Reviewers: hfinkel, majnemer, tstellarAMD, sunfish
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D17279
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275066
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Nicolai Haehnle [Mon, 11 Jul 2016 14:11:45 +0000 (14:11 +0000)]
AliasAnalysis: unify getModRefInfo(I, CS) semantics with other overloads
This subtle change to getModRefInfo(Instruction, ImmutableCallSite) is to
ensure that the semantics are equal to that of getModRefInfo(CS1, CS2) when
the Instruction is a call-site.
This is now more in line with getModRefInfo generally: it returns Mod when
I modifies a memory location that is accessed (read or written) by CS and
Ref when I reads a memory location that is written by CS.
From a grep of the code, the only uses of this particular getModRefInfo
overload are in MemorySSA and MemCpyOptimizer, and they only care about
where the result is MR_NoModRef or not. Therefore, this change should have
no visible effect.
Separated out from D17279 upon request.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275065
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Sanjay Patel [Mon, 11 Jul 2016 14:07:31 +0000 (14:07 +0000)]
[x86] update checks
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275064
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Simon Pilgrim [Mon, 11 Jul 2016 12:49:35 +0000 (12:49 +0000)]
[X86][SSE] Generalise target shuffle combine of shuffles using variable masks
At present the only shuffle with a variable mask we recognise is PSHUFB, which influences if its worth the cost of mask creation/loading of a combined target shuffle with a variable mask. This change sets up the infrastructure to support other shuffles in the future but has no effect yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275059
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Nirav Dave [Mon, 11 Jul 2016 12:42:14 +0000 (12:42 +0000)]
Provide support for preserving assembly comments
Preserve assembly comments from input in output assembly and flags to
toggle property. This is on by default for inline assembly and off in
llvm-mc.
Parsed comments are emitted immediately before an EOL which generally
places them on the expected line.
Reviewers: rtrieu, dwmw2, rnk, majnemer
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D20020
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275058
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Artem Tamazov [Mon, 11 Jul 2016 12:07:18 +0000 (12:07 +0000)]
[AMDGPU][llvm-mc] Quickfix for r272748 to enable labels in branch instructions.
Fixes issue mentioned at:
https://github.com/RadeonOpenCompute/LLVM-AMDGPU-Assembler-Extra/issues/13.
Lit tests added.
Differential Revision: http://reviews.llvm.org/D22133
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275054
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Zlatko Buljan [Mon, 11 Jul 2016 07:41:56 +0000 (07:41 +0000)]
[mips][microMIPS] Implement LDC1, SDC1, LDC2, SDC2, LWC1, SWC1, LWC2 and SWC2 instructions and add CodeGen support
Differential Revision: http://reviews.llvm.org/D18824
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275050
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Elena Demikhovsky [Mon, 11 Jul 2016 06:08:06 +0000 (06:08 +0000)]
AVX-512: DAG lowering for scalar MIN/MAX commutable ops
DAG lowering was missing for the scalar FMINC, FMAXC nodes.
The nodes are generated only in the "unsafe-fp-math" mode.
Added tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275048
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Craig Topper [Mon, 11 Jul 2016 05:36:53 +0000 (05:36 +0000)]
[AVX512] Add support for 512-bit ANDN now that all ones build vectors survive long enough to allow the matching.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275046
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Craig Topper [Mon, 11 Jul 2016 05:36:48 +0000 (05:36 +0000)]
[AVX512] Use vpternlog with an immediate of 0xff to create 512-bit all one vectors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275045
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Craig Topper [Mon, 11 Jul 2016 05:36:41 +0000 (05:36 +0000)]
[X86] Add the AVX512 SET0 pseudos to foldMemoryOperandImpl since they are marked for CanFoldAsLoad.
I don't really know how to test this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275044
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Hal Finkel [Mon, 11 Jul 2016 04:51:23 +0000 (04:51 +0000)]
Revert r275027 - Let FuncAttrs infer the 'returned' argument attribute
Reverting r275027 and r275033. These seem to cause miscompiles on the AArch64 buildbot.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275042
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Daniel Berlin [Mon, 11 Jul 2016 04:37:53 +0000 (04:37 +0000)]
Allow BasicBlockEdge to be used in DenseMap
Summary: Add a DenseMapInfo specialization for BasicBlockEdge
Reviewers: hfinkel, chandlerc, majnemer
Differential Revision: http://reviews.llvm.org/D22207
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275041
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Hal Finkel [Mon, 11 Jul 2016 03:37:59 +0000 (03:37 +0000)]
Pointer-comparison folding should look through returned-argument functions
For functions which are known to return a specific argument, pointer-comparison
folding can look through the function calls as part of its analysis.
Differential Revision: http://reviews.llvm.org/D9387
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275039
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Hal Finkel [Mon, 11 Jul 2016 03:08:49 +0000 (03:08 +0000)]
Teach isDereferenceablePointer to look through returned-argument functions
For functions which are known to return their argument,
isDereferenceableAndAlignedPointer can examine the argument value.
Differential Revision: http://reviews.llvm.org/D9384
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275038
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Hal Finkel [Mon, 11 Jul 2016 02:48:23 +0000 (02:48 +0000)]
Teach SCEV to look through returned-argument functions
When building SCEVs, if a function is known to return its argument, then we can
build the SCEV using the corresponding argument value.
Differential Revision: http://reviews.llvm.org/D9381
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275037
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Hal Finkel [Mon, 11 Jul 2016 02:25:14 +0000 (02:25 +0000)]
Teach computeKnownBits to look through returned-argument functions
If a function is known to return one of its arguments, we can use that in order
to compute known bits of the return value.
Differential Revision: http://reviews.llvm.org/D9397
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275036
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Hal Finkel [Mon, 11 Jul 2016 01:32:20 +0000 (01:32 +0000)]
BasicAA should look through functions with returned arguments
Motivated by the work on the llvm.noalias intrinsic, teach BasicAA to look
through returned-argument functions when answering queries. This is essential
so that we don't loose all other AA information when supplementing with
llvm.noalias.
Differential Revision: http://reviews.llvm.org/D9383
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275035
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Hal Finkel [Mon, 11 Jul 2016 01:28:42 +0000 (01:28 +0000)]
Add a 'Returned' intrinsic property corresponding to the 'returned' argument attribute
This will be used by the upcoming llvm.noalias intrinsic.
Differential Revision: http://reviews.llvm.org/D22201
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275034
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Hal Finkel [Mon, 11 Jul 2016 01:14:21 +0000 (01:14 +0000)]
Don't use a SmallSet for returned attribute inference
Suggested post-commit by David Majnemer on IRC (following-up on a pre-commit
review comment).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275033
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Hal Finkel [Sun, 10 Jul 2016 23:01:32 +0000 (23:01 +0000)]
Add getReturnedArgOperand to Call/InvokeInst, CallSite
In order to make the optimizer smarter about using the 'returned' argument
attribute (generally, but motivated by my llvm.noalias intrinsic work), add a
utility function to Call/InvokeInst, and CallSite, to make it easy to get the
returned call argument (when one exists).
P.S. There is already an unfortunate amount of code duplication between
CallInst and InvokeInst, and this adds to it. We should probably clean that up
separately.
Differential Revision: http://reviews.llvm.org/D22204
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275031
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Simon Pilgrim [Sun, 10 Jul 2016 22:26:05 +0000 (22:26 +0000)]
[X86][SSE] Relax type assertions for matchVectorShuffleAsInsertPS
Calls to matchVectorShuffleAsInsertPS only need to ensure the inputs are 128-bit vectors. Only lowerVectorShuffleAsInsertPS needs to ensure that they are v4f32.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275028
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Hal Finkel [Sun, 10 Jul 2016 22:02:55 +0000 (22:02 +0000)]
Let FuncAttrs infer the 'returned' argument attribute
A function can have one argument with the 'returned' attribute, indicating that
the associated argument is always the return value of the function. Add
FuncAttrs inference logic.
Differential Revision: http://reviews.llvm.org/D22202
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275027
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Hal Finkel [Sun, 10 Jul 2016 21:52:39 +0000 (21:52 +0000)]
Update the LangRef description of the 'returned' attribute
The description of the 'returned' attribute says that it is only used when
code-generating the caller. I'd like to make the optimizer smarter about
looking through functions with returned arguments (generally, but motivated by
my llvm.noalias work). As David pointed out in the review of D22202, the
LangRef should be updated to make its expanded uses clearer.
Differential Revision: http://reviews.llvm.org/D22205
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275026
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Sanjay Patel [Sun, 10 Jul 2016 21:27:06 +0000 (21:27 +0000)]
[DAG] make isConstantSplatVector() available to the rest of lowering
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@275025
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