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David Blaikie [Tue, 24 Oct 2017 21:29:16 +0000 (21:29 +0000)]
HexagonDepTimingClasses.h: Don't mark header functions as file local
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316508
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David Blaikie [Tue, 24 Oct 2017 21:29:15 +0000 (21:29 +0000)]
WebassemblyAsmPrinter.h: Include WebAssemblyMachineFunctionInfo for use with MachineFunction::getInfo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316507
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David Blaikie [Tue, 24 Oct 2017 21:29:15 +0000 (21:29 +0000)]
X86Operand.h: Include X86MCTargetDesc.h for SSE register enum/names
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316506
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David Blaikie [Tue, 24 Oct 2017 21:29:14 +0000 (21:29 +0000)]
X86AsmPrinter.h: Add missing header for complete type needed for MCCodeEmitter dtor.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316505
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David Blaikie [Tue, 24 Oct 2017 21:29:10 +0000 (21:29 +0000)]
RegisterUsageInfo.h: Add missing header for complete type needed for DenseMap traits
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316504
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Eugene Zelenko [Tue, 24 Oct 2017 21:24:53 +0000 (21:24 +0000)]
[Transforms] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316503
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Simon Pilgrim [Tue, 24 Oct 2017 20:56:09 +0000 (20:56 +0000)]
Fix Wdocumentation warning. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316498
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Martin Bohme [Tue, 24 Oct 2017 20:40:02 +0000 (20:40 +0000)]
Revert "[CodeGen][ExpandMemcmp][NFC] Allow memcmp to expand to vector loads (1)"
This reverts commit r316417, which causes internal compiles to OOM.
I don't unfortunately have a self-contained test case but will follow up
with courbet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316497
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Adrian Prantl [Tue, 24 Oct 2017 20:38:00 +0000 (20:38 +0000)]
Use range-based for loop. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316496
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Artem Belevich [Tue, 24 Oct 2017 20:31:44 +0000 (20:31 +0000)]
[NVPTX] allow address space inference for volatile loads/stores.
If particular target supports volatile memory access operations, we can
avoid AS casting to generic AS. Currently it's only enabled in NVPTX for
loads and stores that access global & shared AS.
Differential Revision: https://reviews.llvm.org/D39026
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316495
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Adrian Prantl [Tue, 24 Oct 2017 20:26:17 +0000 (20:26 +0000)]
Delete unused instantiations of DIBuilder. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316494
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Sam Clegg [Tue, 24 Oct 2017 20:21:15 +0000 (20:21 +0000)]
Fix LLVM_LINK_LLVM_DYLIB=On build of llvm-cfi-verify
Subscribers: mgorny, aheejin
Differential Revision: https://reviews.llvm.org/D39250
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316493
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Gadi Haber [Tue, 24 Oct 2017 20:19:47 +0000 (20:19 +0000)]
[X86][Broadwell] Added the instruction scheduling information for the Broadwell CPU.
Adding the scheduling information for the Browadwell (BDW) CPU target.
This patch adds the instruction scheduling information for the Broadwell (BDW) architecture target by adding the file X86SchedBroadwell.td located under the X86 Target.
We used the scheduling information retrieved from the Broadwell architects in order to create the file.
The scheduling information includes latency, number of micro-Ops and used ports by each BDW instruction.
The patch continues the scheduling replacement and insertion effort started with the SandyBridge (SNB) target in r310792, the Haswell (HSW) target in r311879, the SkylakeClient (SKL) target in rL313613 + rL315978 and the SkylakeServer (SKX) in rL315175.
Performance fluctuations may be expected due to code alignment effects.
Reviewers: zvi, RKSimon, craig.topper
Differential Revision: https://reviews.llvm.org/D39054
Change-Id: If6f799e5ff60e1091c8d43b05ea78c53581bae01
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316492
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Vedant Kumar [Tue, 24 Oct 2017 20:03:37 +0000 (20:03 +0000)]
[llvm-cov] Use a stable sort on sub-views
We need to use a stable sort on instantiation and expansion sub-views to
produce consistent output. Fortunately, we've gotten lucky and the tests
have checks for the stable order.
This is needed to unblock D39245. Once that lands, we'll have better
test coverage for sort non-determinism.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316490
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Adrian Prantl [Tue, 24 Oct 2017 19:32:59 +0000 (19:32 +0000)]
Use range-based-for. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316485
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Yonghong Song [Tue, 24 Oct 2017 18:21:10 +0000 (18:21 +0000)]
bpf: fix a bug in trunc-op optimization
Previous implementation for per-function scope
is incorrect and too conservative.
Signed-off-by: Yonghong Song <yhs@fb.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316481
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Daniel Sanders [Tue, 24 Oct 2017 18:11:54 +0000 (18:11 +0000)]
[globalisel][tablegen] Fix future undefined behaviour in r316463.
I missed a dereference of `Matched` that preceeded the new check. Thanks to
Justin Bogner for spotting it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316480
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Justin Bogner [Tue, 24 Oct 2017 18:04:54 +0000 (18:04 +0000)]
MIR: Print the register class or bank in vreg defs
This updates the MIRPrinter to include the regclass when printing
virtual register defs, which is already valid syntax for the
parser. That is, given 64 bit %0 and %1 in a "gpr" regbank,
%1(s64) = COPY %0(s64)
would now be written as
%1:gpr(s64) = COPY %0(s64)
While this change alone introduces a bit of redundancy with the
registers block, it allows us to update the tests to be more concise
and understandable and brings us closer to being able to remove the
registers block completely.
Note: We generally only print the class in defs, but there is one
exception. If there are uses without any defs whatsoever, we'll print
the class on all uses. I'm not completely convinced this comes up in
meaningful machine IR, but for now the MIRParser and MachineVerifier
both accept that kind of stuff, so we don't want to have a situation
where we can print something we can't parse.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316479
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Stefan Pintilie [Tue, 24 Oct 2017 17:44:27 +0000 (17:44 +0000)]
[PowerPC] Try to simplify a Swap if it feeds a Splat
If we have the situation where a Swap feeds a Splat we can sometimes change the
index on the Splat and then remove the Swap instruction.
Fixed the test case that was failing and recommit after pulling the original
commit.
Original revision is here: https://reviews.llvm.org/D39009
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316478
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David Blaikie [Tue, 24 Oct 2017 17:29:14 +0000 (17:29 +0000)]
BinaryFormat/MachO.h Don't mark header functions as file-scope static
This creates ODR violations if the function is called from another inline function in a header and also creates binary bloat from duplicate definitions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316477
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David Blaikie [Tue, 24 Oct 2017 17:29:14 +0000 (17:29 +0000)]
ValueTracking.h Don't mark header functions as file-scope static
This creates ODR violations if the function is called from another inline function in a header and also creates binary bloat from duplicate definitions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316476
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David Blaikie [Tue, 24 Oct 2017 17:29:13 +0000 (17:29 +0000)]
MemoryBuiltins.h: Don't mark header functions as file-scope static
This creates ODR violations if the function is called from another inline function in a header and also creates binary bloat from duplicate definitions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316475
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David Blaikie [Tue, 24 Oct 2017 17:29:12 +0000 (17:29 +0000)]
IndirectCallSiteVisitor.h:findIndirectCallSites Don't mark header functions as file-scope static
This creates ODR violations if the function is called from another inline function in a header and also creates binary bloat from duplicate definitions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316474
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David Blaikie [Tue, 24 Oct 2017 17:29:12 +0000 (17:29 +0000)]
StringExtras.h Don't mark header functions as file-scope static
This creates ODR violations if the function is called from another inline function in a header and also creates binary bloat from duplicate definitions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316473
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David Blaikie [Tue, 24 Oct 2017 17:29:11 +0000 (17:29 +0000)]
SmallVector.h:capacity_in_bytes Don't mark header functions as file-scope static
This creates ODR violations if the function is called from another inline
function in a header and also creates binary bloat from duplicate definitions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316472
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David Blaikie [Tue, 24 Oct 2017 17:29:11 +0000 (17:29 +0000)]
DenseMap.h:capacity_in_bytes Don't mark header functions as file-scope static
This creates ODR violations if the function is called from another inline
function in a header and also creates binary bloat from duplicate definitions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316471
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David Blaikie [Tue, 24 Oct 2017 17:29:08 +0000 (17:29 +0000)]
BitVector.h:capacity_in_bytes Don't mark header functions as file-scope static
This creates ODR violations if the function is called from another
inline function in a header and also creates binary bloat from duplicate
definitions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316470
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Yonghong Song [Tue, 24 Oct 2017 17:29:03 +0000 (17:29 +0000)]
bpf: fix a bug in bpf-isel trunc-op optimization
In BPF backend, we try to optimize away redundant
trunc operations so that kernel verifier rewrite
remains valid. Previous implementation only works
for a single function.
This patch fixed the issue for multiple functions.
It clears internal map data structure before
performing optimization for each function.
Signed-off-by: Yonghong Song <yhs@fb.com>
Acked-by: Alexei Starovoitov <ast@kernel.org>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316469
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Aaron Ballman [Tue, 24 Oct 2017 17:28:39 +0000 (17:28 +0000)]
Added instructions for obtaining clang-tools-extra to the Getting Started page.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316468
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Adrian Prantl [Tue, 24 Oct 2017 17:23:40 +0000 (17:23 +0000)]
Doxygenify comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316466
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Michael Kruse [Tue, 24 Oct 2017 17:17:27 +0000 (17:17 +0000)]
[opt] Initialize WriteBitcode pass.
Probably due to a change of how some pass initializes its dependencies,
the -write-bitcode pass (Bitcode/Writer/BitcodeWriterPass.cpp) is not
initialized in opt anymore and therefore not usable with
opt -write-bitcode
Explicitly call initializeWriteBitcodePassPass() to make it available
in opt again.
Differential Revision: https://reviews.llvm.org/D39223
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316464
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Daniel Sanders [Tue, 24 Oct 2017 17:08:43 +0000 (17:08 +0000)]
[globalisel][tablegen] Multi-insn emission requires that BuildMIAction support not being linked to an InstructionMatcher. NFC
When multi-instruction emission is supported, it will no longer be guaranteed
that every BuildMIAction has a corresponding matched instruction. BuildMIAction
should support not having one to cover the case where a rule produces more
instructions than it matched.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316463
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Simon Pilgrim [Tue, 24 Oct 2017 17:04:57 +0000 (17:04 +0000)]
[X86][AVX] ComputeNumSignBitsForTargetNode - add support for X86ISD::VTRUNC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316462
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Reid Kleckner [Tue, 24 Oct 2017 17:02:40 +0000 (17:02 +0000)]
[codeview] Fix handling of S_HEAPALLOCSITE
The type index is from the TPI stream, not the IPI stream. Fix the
dumper, fix type index discovery, and add a test in LLD.
Also improve the log message we emit when we fail to rewrite type
indices in LLD. That's how I found this bug.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316461
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Simon Pilgrim [Tue, 24 Oct 2017 16:38:38 +0000 (16:38 +0000)]
[SelectionDAG] Add VSELECT support to ComputeNumSignBits
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316457
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Saleem Abdulrasool [Tue, 24 Oct 2017 16:19:56 +0000 (16:19 +0000)]
PowerPC: support the separator character in the IAS
PowerPC uses ; as a comment leader and the @ as a separator character.
Support this properly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316454
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Craig Topper [Tue, 24 Oct 2017 15:50:55 +0000 (15:50 +0000)]
[TableGen] Fix some formatting quirks in the subtarget output file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316450
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Craig Topper [Tue, 24 Oct 2017 15:50:53 +0000 (15:50 +0000)]
[TableGen] Simplify some of the subtarget emission by removing code that avoids printing commas at the end of arrays and enums.
The C++ standard allows for trailing commas. We already do this in many other emitters.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316449
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Simon Pilgrim [Tue, 24 Oct 2017 15:38:16 +0000 (15:38 +0000)]
[X86] truncateVectorCompareWithPACKSS - use PACKSSDW/PACKSSWB instead of just PACKSSWB.
By using the widest type possible for PACKSS truncation we have a better chance of being able to peek through bitcasts and improves other combines driven by ComputeNumSignBits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316448
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Sanjay Patel [Tue, 24 Oct 2017 15:27:47 +0000 (15:27 +0000)]
[x86] add more vector ISA variants for memcmp expansion; NFC
...because every swiss cheese has different holes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316446
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Sanjay Patel [Tue, 24 Oct 2017 14:32:52 +0000 (14:32 +0000)]
[utils] make retq/retl regex an option that is off by default
Ideally, we should compare 32- and 64-bit versions to see if the
ret line is the only difference and then insert the regex only
in that case. But this is a quick hack to avoid a bunch of noise
as existing tests are updated.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316443
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Oliver Stannard [Tue, 24 Oct 2017 14:20:13 +0000 (14:20 +0000)]
[ARM] Tighten up CHECK lines in a test
These tests checked for the line number without a leading ":", so for example,
a missed diagnostic on line 123 could match one on line 1123, 2123, etc,
desynchronising the test for hundreds of lines.
This couldn't cause it to incorrectly pass or fail, but made it hard to track
down test failures.
Differential revision: https://reviews.llvm.org/D39238
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316442
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Oliver Stannard [Tue, 24 Oct 2017 14:19:08 +0000 (14:19 +0000)]
[ARM] Error for invalid shift in memory operand
Report a diagnostic when we fail to parse a shift in a memory operand because
the shift type is not an identifier. Without this, we were silently ignoring
the whole instruction.
Differential revision: https://reviews.llvm.org/D39237
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316441
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Simon Pilgrim [Tue, 24 Oct 2017 14:18:32 +0000 (14:18 +0000)]
[X86] truncateVectorCompareWithPACKSS - remove duplicate variables. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316440
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Andrew V. Tischenko [Tue, 24 Oct 2017 13:38:30 +0000 (13:38 +0000)]
Update f16c instruction scheduling on btver2.
Differential Revision: https://reviews.llvm.org/D39051
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316435
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Zvi Rackover [Tue, 24 Oct 2017 13:24:26 +0000 (13:24 +0000)]
X86CallFrameOptimization: Update comments and variable names. NFCI.
Following up on D38738.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316434
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Zvi Rackover [Tue, 24 Oct 2017 12:13:05 +0000 (12:13 +0000)]
X86CallFrameOptimization: Recognize 'store 0/-1 using and/or' idioms
Summary:
r264440 added or/and patterns for storing -1 or 0 with the intention of decreasing code size. However,
X86CallFrameOptimization does not recognize these memory accesses so it will not replace them with push's when profitable.
This patch fixes this problem by teaching X86CallFrameOptimization these store 0/-1 idioms.
An alternative fix would be to prevent the 'store 0/1 idioms' patterns from firing when accessing the stack. This would save
the need to teach the pass about these idioms. However, because X86CallFrameOptimization does not always fire we may result
in cases where neither X86CallFrameOptimization not the patterns for 'store 0/1 idioms' fire.
Fixes pr34863
Reviewers: DavidKreitzer, guyblank, aymanmus
Reviewed By: aymanmus
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D38738
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316431
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Bjorn Pettersson [Tue, 24 Oct 2017 12:08:11 +0000 (12:08 +0000)]
[ConstantFolding] Avoid assert when folding ptrtoint of vectorized GEP
Summary:
Got asserts in llvm::CastInst::getCastOpcode saying:
`DestBits == SrcBits && "Illegal cast to vector (wrong type or size)"' failed.
Problem seemed to be that llvm::ConstantFoldCastInstruction did
not handle ptrtoint cast of a getelementptr returning a vector
correctly. I assume such situations are quite rare, since the
GEP needs to be considered as a constant value (base pointer
being null).
The solution used here is to simply avoid the constant fold
of ptrtoint when the value is a vector. It is not supported,
and by bailing out we do not fail on assertions later on.
Reviewers: craig.topper, majnemer, davide, filcab, efriedma
Reviewed By: efriedma
Subscribers: efriedma, filcab, llvm-commits
Differential Revision: https://reviews.llvm.org/D38546
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316430
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Bjorn Pettersson [Tue, 24 Oct 2017 11:59:20 +0000 (11:59 +0000)]
[LangRef] Update description of Constant Expressions
Summary:
When describing trunc/zext/sext/ptrtoint/inttoptr in the chapter
about Constant Expressions we now simply refer to the Instruction
Reference. As far as I know there are no difference when it comes
to the semantics and the argument constraints. The only difference
is that the syntax is slighly different for the constant expressions,
regarding the use of parenthesis in constant expressions.
Referring to the Instruction Reference is the same solution as
already used for several other operations, such as bitcast.
The main goal was to add information that vector types are allowed
also in trunc/zext/sext/ptrtoint/inttoptr constant expressions.
That was not explicitly mentioned earlier, and resulted in some
questions in the review of https://reviews.llvm.org/D38546
Reviewers: efriedma, majnemer
Reviewed By: efriedma
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D39165
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316429
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George Rimar [Tue, 24 Oct 2017 11:44:19 +0000 (11:44 +0000)]
[llvm-dwarfdump] - Cleanup of gnu_call_site.s. NFC.
This change fixes values of test so that it passes
-verify without errors and also adds comments.
Test was introduced in D39119 and intention was to check
that tool is able to dump few
DW_*GNU_call_site* tags and attributes, so that
change is NFC cleanup.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316428
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Marek Olsak [Tue, 24 Oct 2017 10:27:13 +0000 (10:27 +0000)]
AMDGPU: Add new intrinsic llvm.amdgcn.kill(i1)
Summary:
Kill the thread if operand 0 == false.
llvm.amdgcn.wqm.vote can be applied to the operand.
Also allow kill in all shader stages.
Reviewers: arsenm, nhaehnle
Subscribers: kzhuravl, wdng, yaxunl, dstuttard, tpr, t-tye, llvm-commits
Differential Revision: https://reviews.llvm.org/D38544
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316427
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Marek Olsak [Tue, 24 Oct 2017 10:26:59 +0000 (10:26 +0000)]
AMDGPU: Add llvm.amdgcn.wqm.vote intrinsic
Reviewers: arsenm, nhaehnle
Subscribers: kzhuravl, wdng, yaxunl, dstuttard, tpr, t-tye
Differential Revision: https://reviews.llvm.org/D38543
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316426
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Jan Korous [Tue, 24 Oct 2017 10:23:10 +0000 (10:23 +0000)]
[docs] Code example fix
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316425
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Oliver Stannard [Tue, 24 Oct 2017 09:46:56 +0000 (09:46 +0000)]
[ARM] Replace development diagnostics with normal DEBUG macro
* Remove the -arm-asm-parser-dev-diags option.
* Use normal DEBUG(dbgs()) printing for the extra development information about
missing diagnostics.
Differential Revision: https://reviews.llvm.org/D39194
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316423
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Serguei Katkov [Tue, 24 Oct 2017 09:42:55 +0000 (09:42 +0000)]
Restore the fix rL316059 eliminated by rL316372
rL316059 fixed the potential build failure when compiling
with -DLLVM_BUILD_LLVM_DYLIB=ON -DLLVM_LINK_LLVM_DYLIB=ON.
rL316372 just reverted the part of the fix, so restore it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316422
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Oliver Stannard [Tue, 24 Oct 2017 09:03:33 +0000 (09:03 +0000)]
[ARM] tSETEND needs IsThumb
This is the Thumb encoding, so the Requires list must include IsThumb.
No test because we happen to select the ARM one first, but that's just luck.
Differential Revision: https://reviews.llvm.org/D39190
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316421
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Oliver Stannard [Tue, 24 Oct 2017 08:55:36 +0000 (08:55 +0000)]
[ARM] Remove tCPS alias which just crashed
This alias caused a crash when trying to print the "cps #0" instruction in a
diagnostic for thumbv6 (which doesn't have that instruction).
The comment was incorrect, this instruction is UNPREDICTABLE if no flag bits
are set, so I don't think it's worth keeping.
Differential Revision: https://reviews.llvm.org/D39191
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316420
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Sam McCall [Tue, 24 Oct 2017 08:30:19 +0000 (08:30 +0000)]
Support formatv of TimePoint with strftime-style formats.
Summary:
Support formatv of TimePoint with strftime-style formats.
Extensions for millis/micros/nanos are added.
Inital use case is HH:MM:SS.MMM timestamps in clangd logs.
Reviewers: bkramer, ilya-biryukov
Subscribers: labath, llvm-commits
Differential Revision: https://reviews.llvm.org/D38992
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316419
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Clement Courbet [Tue, 24 Oct 2017 08:05:07 +0000 (08:05 +0000)]
[CodeGen][ExpandMemcmp][NFC] Allow memcmp to expand to vector loads (1)
Refactor ExpandMemcmp:
- Stop duplicating the logic for computation of the sequence of loads to
generate (thsi was done in three different places), this is now done
only once in MemCmpExpansion::MemCmpExpansion().
- Add a FIXME to expose a bug with the computation of the number of loads
when not all sizes are loadable. For example, on X86-32 + SSE, possible
loads are {16,4,2,1} bytes. The current code considers that all loads
starting at MaxLoadSize are possible. This is not an issue right now as
vector loads are not enabled, so I'm not fixing the issue here to keep
the change as small as possible. I'm going to address this in a
subsequent revision, where I enable vector loads.
See https://bugs.llvm.org/show_bug.cgi?id=34887
Differential Revision: https://reviews.llvm.org/D38498
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316417
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Zvi Rackover [Tue, 24 Oct 2017 07:38:29 +0000 (07:38 +0000)]
X86: Fix X86CallFrameOptimization to search for the COPY StackPointer
SelectionDAG inserts a copy of ESP into a virtual register.
X86CallFrameOptimization assumed that the COPY, if present, is always
right after the call-frame setup instruction (ADJCALLSTACKDOWN). This was a
wrong assumption as the COPY can be located anywhere between the call-frame setup
instruction and its first use. If the COPY happened to be located in a different
location than what X86CallFrameOptimization assumed, visiting it while
processing the call chain would lead to a conservative bail-out.
The fix is quite straightfoward, scan ahead for the stack-pointer copy and make note
of it so it can be ignored while processing the call chain.
Fixes pr34903
Differential Revision: https://reviews.llvm.org/D38730
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316416
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Bruno Cardoso Lopes [Tue, 24 Oct 2017 06:18:52 +0000 (06:18 +0000)]
[Modules] Add module for Config/llvm-config.h
Besides all the goodness from modularizing a header, this is necessary
to compile ToT with modules with the clang host compiler from Xcode 9 in
macOS 10.13, which our bots don't use yet.
rdar://problem/
35038151
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316414
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Omer Paparo Bivas [Tue, 24 Oct 2017 06:16:03 +0000 (06:16 +0000)]
[MC] Adding code padding for performance stability - infrastructure. NFC.
Infrastructure designed for padding code with nop instructions in key places such that preformance improvement will be achieved.
The infrastructure is implemented such that the padding is done in the Assembler after the layout is done and all IPs and alignments are known.
This patch by itself in a NFC. Future patches will make use of this infrastructure to implement required policies for code padding.
Reviewers:
aaboud
zvi
craig.topper
gadi.haber
Differential revision: https://reviews.llvm.org/D34393
Change-Id: I92110d0c0a757080a8405636914a93ef6f8ad00e
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316413
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Zvi Rackover [Tue, 24 Oct 2017 05:47:07 +0000 (05:47 +0000)]
X86: Register the X86CallFrameOptimization pass
Summary:
The motivation of this change is to enable .mir testing for this pass.
Added one test case to cover the functionality, this same case will be improved by
a future patch.
Reviewers: igorb, guyblank, DavidKreitzer
Reviewed By: guyblank, DavidKreitzer
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D38729
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316412
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Daniel Sanders [Tue, 24 Oct 2017 01:48:34 +0000 (01:48 +0000)]
[globalisel][tablegen] Remove unused InstructionMatcher's. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316407
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Bob Haarman [Tue, 24 Oct 2017 01:26:22 +0000 (01:26 +0000)]
[raw_fd_ostream] report actual error in error messages
Summary:
Previously, we would emit error messages like "IO failure on output
stream". This change causes use to include information about what
actually went wrong, e.g. "No space left on device".
Reviewers: sunfish, rnk
Reviewed By: rnk
Subscribers: mehdi_amini, llvm-commits, hiraditya
Differential Revision: https://reviews.llvm.org/D39203
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316404
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Saleem Abdulrasool [Tue, 24 Oct 2017 00:09:10 +0000 (00:09 +0000)]
ObjCARC: do not increment past the end of the BB
The `BasicBlock::getFirstInsertionPt` call may return `std::end` for the
BB. Dereferencing the end iterator results in an assertion failure
"(!NodePtr->isKnownSentinel()), function operator*". Ensure that the
returned iterator is valid before dereferencing it. If the end is
returned, move one position backward to get a valid insertion point.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316401
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Reid Kleckner [Mon, 23 Oct 2017 23:43:40 +0000 (23:43 +0000)]
[codeview] Add support for inlinee lists
This adds type index discovery and dumper support for symbol record kind
0x1168, which is a list of inlined function ids. This symbol kind is
undocumented, but S_INLINEES is consistent with the existing
nomenclature.
Fixes PR34222
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316398
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Justin Lebar [Mon, 23 Oct 2017 23:42:05 +0000 (23:42 +0000)]
[PM] Fix Typo
Patch by Nick Sarnie.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316397
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Jessica Paquette [Mon, 23 Oct 2017 23:36:46 +0000 (23:36 +0000)]
[MachineOutliner] Add optimisation remarks for successful outlining
This commit adds optimisation remarks for outlining which fire when a function
is successfully outlined.
To do this, OutlinedFunctions must now contain references to their Candidates.
Since the Candidates must still be sorted and worked on separately, this is
done by working on everything in terms of shared_ptrs to Candidates. This is
good; it means that we can easily move everything to outlining in terms of
the OutlinedFunctions rather than the individual Candidates. This is far more
intuitive than what's currently there!
(Remarks are output when a function is created for some group of Candidates.
In a later commit, all of the outlining logic should be rewritten so that we
loop over OutlinedFunctions rather than over Candidates.)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316396
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Konstantin Zhuravlyov [Mon, 23 Oct 2017 23:02:39 +0000 (23:02 +0000)]
AMDGPU: Initialize WavefrontSize from TD files
Differential Revision: https://reviews.llvm.org/D39205
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316389
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Aditya Nandakumar [Mon, 23 Oct 2017 22:53:08 +0000 (22:53 +0000)]
[GISel][ARM]: Fix illegal Generic copies in tests
This is in preparation for a verifier check that makes sure
copies are of the same size (when generic virtual registers are involved).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316388
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Aditya Nandakumar [Mon, 23 Oct 2017 22:53:04 +0000 (22:53 +0000)]
[GISel][AArch64]: Fix illegal Generic copies in tests
This is in preparation for a verifier check that makes sure copies are
of the same size (when generic virtual registers are involved).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316387
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Reid Kleckner [Mon, 23 Oct 2017 22:44:24 +0000 (22:44 +0000)]
[codeview] Recognize two records with no type index fields
Thunk records do not have types and frame cookies do not have types.
These were found while linking libconcrt.lib from MSVC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316385
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Rong Xu [Mon, 23 Oct 2017 22:21:29 +0000 (22:21 +0000)]
[PM] Add pgo-memop-opt pass to the new pass manager
This pass adds pgo-memop-opt pass to the new pass manager.
It is in the old pass manager but somehow left out in the new pass manager.
Differential Revision: http://reviews.llvm.org/D39145
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316384
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Simon Pilgrim [Mon, 23 Oct 2017 22:05:02 +0000 (22:05 +0000)]
[X86][SSE] combineBitcastvxi1 - use PACKSSWB directly to pack v8i16 to v16i8
Avoid difficulties determining the number of sign bits later on in shuffle lowering to lower to PACKSS
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316383
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Bob Wilson [Mon, 23 Oct 2017 21:51:50 +0000 (21:51 +0000)]
Add a new Simulator entry for the target triple environment.
Apple's iOS, tvOS and watchOS simulator platforms have never been clearly
distinguished in the target triples. Even though they are intended to
behave similarly to the corresponding device platforms, they have separate
SDKs and are really separate platforms from the compiler's perspective.
Clang now defines a macro when building for one of these simulator platforms
(r297866) but that relies on the very indirect mechanism of checking to see
which option was used to specify the minimum deployment target. That is not
so great. Swift would also like to distinguish these simulator platforms in
a similar way, but unlike Clang, Swift does not use a separate option to
specify the minimum deployment target -- it uses a -target option to
specify the target triple directly, including the OS version number.
Using a different target triple for the simulator platforms is a much
more direct and obvious way to specify this. Putting the "simulator" in
the environment component of the triple means the OS values can stay the
same and existing code the looks at the OS field will not be affected.
https://reviews.llvm.org/D39143
rdar://problem/
34729432
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316380
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George Burgess IV [Mon, 23 Oct 2017 21:08:02 +0000 (21:08 +0000)]
Fix buildbot breakage
SP is only used in an assert. Caused by r316374.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316377
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Mitch Phillips [Mon, 23 Oct 2017 20:54:01 +0000 (20:54 +0000)]
Made llvm-cfi-verify not execute unit tests on non-x86 builds.
Patched out from D38427.
Reviewers: vlad.tsyrklevich
Reviewed By: vlad.tsyrklevich
Subscribers: llvm-commits, kcc, pcc, mgorny
Differential Revision: https://reviews.llvm.org/D39197
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316375
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George Burgess IV [Mon, 23 Oct 2017 20:46:36 +0000 (20:46 +0000)]
Don't crash when we see unallocatable registers in clobbers
This fixes a bug where we'd crash given code like the test-case from
https://bugs.llvm.org/show_bug.cgi?id=30792 . Instead, we let the
offending clobber silently slide through.
This doesn't fully fix said bug, since the assembler will still complain
the moment it sees a crypto/fp/vector op, and we still don't diagnose
calls that require vector regs.
Differential Revision: https://reviews.llvm.org/D39030
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316374
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Mitch Phillips [Mon, 23 Oct 2017 20:25:19 +0000 (20:25 +0000)]
Graph builder implementation.
Implement a localised graph builder for indirect control flow
instructions. Main interface is through GraphBuilder::buildFlowGraph,
which will build a flow graph around an indirect CF instruction. Various
modifications to FileVerifier are also made to const-expose some members
needed for machine code analysis done by the graph builder.
Reviewers: vlad.tsyrklevich
Reviewed By: vlad.tsyrklevich
Subscribers: llvm-commits, kcc, pcc
Differential Revision: https://reviews.llvm.org/D38427
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316372
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Stefan Pintilie [Mon, 23 Oct 2017 20:22:23 +0000 (20:22 +0000)]
Revert "[PowerPC] Try to simplify a Swap if it feeds a Splat"
Revert commit r316366.
Previous commit causes p8-scalar_vector_conversions.ll to fail.
This reverts commit
990e764ad8a2eec206ce5dda6aefab059ccd4e92.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316371
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Mandeep Singh Grang [Mon, 23 Oct 2017 19:56:52 +0000 (19:56 +0000)]
[GVNSink] Fix failing GVNSink tests in the reverse iteration bot
Summary:
The elts of ActivePreds which is defined as a SmallPtrSet are copied
into Blocks using std::copy. This makes the resultant order of Blocks
non-deterministic. We cannot simply sort Blocks as they need to match
the corresponding Values. So a better approach is to define ActivePreds
as SmallSetVector.
This fixes the following failures in
http://lab.llvm.org:8011/builders/reverse-iteration:
LLVM :: Transforms/GVNSink/indirect-call.ll
LLVM :: Transforms/GVNSink/sink-common-code.ll
LLVM :: Transforms/GVNSink/struct.ll
Reviewers: dberlin, jmolloy, bkramer, efriedma
Reviewed By: dberlin
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D39025
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316369
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Krzysztof Parzyszek [Mon, 23 Oct 2017 19:35:25 +0000 (19:35 +0000)]
[Hexagon] Return the correct chain edge for i1 function calls
In HexagonISelLowering, there is code to handle the case when
a function returns an i1 type. In this case, we need to generate
extra nodes to copy the result from R0 to a predicate register.
The code was returning the wrong value for the chain edge which
caused an assert "Wrong topological sorting" when converting the
instructions to MIs.
This patch fixes the problem by returning the chain for the final
copy.
Patch by Brendon Cahoon.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316367
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Stefan Pintilie [Mon, 23 Oct 2017 19:33:31 +0000 (19:33 +0000)]
[PowerPC] Try to simplify a Swap if it feeds a Splat
If we have the situation where a Swap feeds a Splat we can sometimes change the
index on the Splat and then remove the Swap instruction.
Differential Revision: https://reviews.llvm.org/D39009
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316366
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Krzysztof Parzyszek [Mon, 23 Oct 2017 19:07:50 +0000 (19:07 +0000)]
[Hexagon] Add extra pattern for S4_addaddi
One combination was missing: add(add(x,y),c).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316363
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Jonas Hahnfeld [Mon, 23 Oct 2017 18:41:22 +0000 (18:41 +0000)]
Fix FormatVariadicTest with GCC
Looks like GCC didn't like the original specialization, try within namespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316361
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Daniel Sanders [Mon, 23 Oct 2017 18:19:24 +0000 (18:19 +0000)]
[globalisel][tablegen] Import stores and allow GISel to automatically substitute zero regs like WZR/XZR/$zero.
This patch enables the import of stores. Unfortunately, doing so by itself,
loses an optimization where storing 0 to memory makes use of WZR/XZR.
To mitigate this, this patch also introduces a new feature that allows register
operands to nominate a zero register. When this is done, GlobalISel will
substitute (G_CONSTANT 0) with the nominated register automatically. This
is currently configured to only apply to the stores.
Applying it to GPR32/GPR64 register classes in general will be done after
review see (https://reviews.llvm.org/D39150).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316360
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Mitch Phillips [Mon, 23 Oct 2017 18:17:56 +0000 (18:17 +0000)]
Accidently merged an incomplete upstream patch in
10e6ee563a6b5ca498f27972ca6dbe6c308f1ac2 - reverting the changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316359
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Mitch Phillips [Mon, 23 Oct 2017 18:11:31 +0000 (18:11 +0000)]
Patch in
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316358
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Vedant Kumar [Mon, 23 Oct 2017 18:04:34 +0000 (18:04 +0000)]
[wasm] readSection: Avoid reading past eof (fixes oss-fuzz #3219)
A wasm file crafted with a bogus section size can trigger an ASan issue
in the DWARFObjInMemory constructor. Nip the problem in the bud when we
read the wasm section.
Found by OSS-Fuzz:
https://bugs.chromium.org/p/oss-fuzz/issues/detail?id=3219
Differential Revision: https://reviews.llvm.org/D38777
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316357
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Simon Pilgrim [Mon, 23 Oct 2017 17:50:40 +0000 (17:50 +0000)]
[X86][SSE] Regenerate PACKSS tests on 32 + 64-bit targets
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316354
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Mitch Phillips [Mon, 23 Oct 2017 17:37:41 +0000 (17:37 +0000)]
Updated 'Getting Started' to use valid git links (added trailing slashes)
Reviewers: pcc, asl, tonic
Reviewed By: pcc
Subscribers: llvm-commits, kcc
Differential Revision: https://reviews.llvm.org/D38516
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316352
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Sanjay Patel [Mon, 23 Oct 2017 17:30:17 +0000 (17:30 +0000)]
[PassManager] add test to show the new PM uses -latesimplifycfg early; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316351
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Daniel Sanders [Mon, 23 Oct 2017 17:18:44 +0000 (17:18 +0000)]
[globalisel] Add very brief docs summarizing the ISel part of the LLVMDev tutorial.
Also added links to the talks available.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316350
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Matt Arsenault [Mon, 23 Oct 2017 17:16:43 +0000 (17:16 +0000)]
AMDGPU: Cleanup local atomic node names
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316349
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Matt Arsenault [Mon, 23 Oct 2017 17:09:35 +0000 (17:09 +0000)]
AMDGPU: Fix default range in non-kernel functions
The range should be assumed to be the hardware maximum
if a workitem intrinsic is used in a callable function
which does not know the restricted limit of the calling
kernel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316346
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Craig Topper [Mon, 23 Oct 2017 16:49:26 +0000 (16:49 +0000)]
[X86] Fix disassembler table generation to prevent instructions tagged with 'PS' being inherited into PD/XS/XD attribute entries.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316345
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Jessica Paquette [Mon, 23 Oct 2017 16:25:53 +0000 (16:25 +0000)]
[MachineOutliner] NFC: Rename getters/setters to fit coding style
Rename endIdx, startIdx, and length to getEndIdx, getStartIdx, and getLength
in Candidate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316341
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Craig Topper [Mon, 23 Oct 2017 16:22:40 +0000 (16:22 +0000)]
[X86] Change VMPTRST to use PS instead of TB to match VMPTRLD.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316340
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Craig Topper [Mon, 23 Oct 2017 16:22:38 +0000 (16:22 +0000)]
[X86] Change RDRAND to use PS instead of TB.
Should be no functional change for now. A future disassembler change will prevent disassembling with 0xf2/0xf3.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@316339
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