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qmiga/qemu.git
4 years agotarget/alpha: fetch code with translator_ld
Emilio G. Cota [Sat, 8 Dec 2018 02:11:10 +0000 (21:11 -0500)]
target/alpha: fetch code with translator_ld

Signed-off-by: Emilio G. Cota <cota@braap.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
4 years agotarget/m68k: fetch code with translator_ld
Emilio G. Cota [Sat, 8 Dec 2018 02:10:22 +0000 (21:10 -0500)]
target/m68k: fetch code with translator_ld

Signed-off-by: Emilio G. Cota <cota@braap.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
4 years agotarget/hppa: fetch code with translator_ld
Emilio G. Cota [Sat, 8 Dec 2018 02:05:01 +0000 (21:05 -0500)]
target/hppa: fetch code with translator_ld

Signed-off-by: Emilio G. Cota <cota@braap.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
4 years agotarget/i386: fetch code with translator_ld
Emilio G. Cota [Wed, 28 Nov 2018 00:13:42 +0000 (19:13 -0500)]
target/i386: fetch code with translator_ld

Signed-off-by: Emilio G. Cota <cota@braap.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
4 years agotarget/sh4: fetch code with translator_ld
Emilio G. Cota [Sat, 8 Dec 2018 02:02:38 +0000 (21:02 -0500)]
target/sh4: fetch code with translator_ld

There is a small wrinkle with the gUSA instruction. The translator
effectively treats a (known) gUSA sequence as a single instruction.
For the purposes of the plugin we end up with a long multi-instruction
qemu_plugin_insn.

If the known sequence isn't detected we shall never run this
translation anyway.

Signed-off-by: Emilio G. Cota <cota@braap.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
4 years agotarget/ppc: fetch code with translator_ld
Emilio G. Cota [Wed, 28 Nov 2018 01:14:34 +0000 (20:14 -0500)]
target/ppc: fetch code with translator_ld

Signed-off-by: Emilio G. Cota <cota@braap.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Acked-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
4 years agotarget/arm: fetch code with translator_ld
Emilio G. Cota [Wed, 28 Nov 2018 01:09:25 +0000 (20:09 -0500)]
target/arm: fetch code with translator_ld

Now the arm_ld*_code functions are only used at translate time we can
just pass down to translator_ld functions.

Signed-off-by: Emilio G. Cota <cota@braap.org>
[AJB: convert from plugin_insn_append to translator_ld]
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
4 years agotranslator: add translator_ld{ub,sw,uw,l,q}
Emilio G. Cota [Wed, 28 Nov 2018 00:10:51 +0000 (19:10 -0500)]
translator: add translator_ld{ub,sw,uw,l,q}

We don't bother with replicating the fast path (tlb_hit) of the old
cpu_ldst helpers as it has no measurable effect on performance. This
probably indicates we should consider flattening the whole set of
helpers but that is out of scope for this change.

Suggested-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Emilio G. Cota <cota@braap.org>
[AJB: directly plumb into softmmu/user helpers]
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
4 years agocputlb: ensure _cmmu helper functions follow the naming standard
Alex Bennée [Mon, 21 Oct 2019 15:09:10 +0000 (16:09 +0100)]
cputlb: ensure _cmmu helper functions follow the naming standard

We document this in docs/devel/load-stores.rst so lets follow it. The
32 bit and 64 bit access functions have historically not included the
sign so we leave those as is. We also introduce some signed helpers
which are used for loading immediate values in the translator.

Fixes: 282dffc8
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20191021150910.23216-1-alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
4 years agoplugin-gen: add plugin_insn_append
Emilio G. Cota [Sat, 8 Dec 2018 01:53:09 +0000 (20:53 -0500)]
plugin-gen: add plugin_insn_append

By adding it to plugin-gen's header file, we can export is as
an inline, since tcg.h is included in the header (we need tcg_ctx).

Signed-off-by: Emilio G. Cota <cota@braap.org>
[AJB: use g_byte_array]
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
4 years agocpu: hook plugin vcpu events
Emilio G. Cota [Sun, 21 Oct 2018 17:30:35 +0000 (13:30 -0400)]
cpu: hook plugin vcpu events

Signed-off-by: Emilio G. Cota <cota@braap.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
4 years ago*-user: plugin syscalls
Emilio G. Cota [Sun, 21 Oct 2018 17:27:44 +0000 (13:27 -0400)]
*-user: plugin syscalls

To avoid too much duplication add a wrapper that the existing trace
and the new plugin calls can live in. We could move the -strace code
here as well but that is left for a future series as the code is
subtly different between the bsd and linux.

Signed-off-by: Emilio G. Cota <cota@braap.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
[AJB: wrap in syscall-trace.h, expand commit msg]
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
4 years ago*-user: notify plugin of exit
Emilio G. Cota [Sun, 21 Oct 2018 17:27:28 +0000 (13:27 -0400)]
*-user: notify plugin of exit

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Emilio G. Cota <cota@braap.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
4 years agotranslate-all: notify plugin code of tb_flush
Emilio G. Cota [Sun, 21 Oct 2018 17:17:32 +0000 (13:17 -0400)]
translate-all: notify plugin code of tb_flush

Plugins might allocate per-TB data that then they get passed each
time a TB is executed (via the *userdata pointer).

Notify plugin code every time a code cache flush occurs, so
that plugins can then reclaim the memory of the per-TB data.

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Emilio G. Cota <cota@braap.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
4 years agoplugins: implement helpers for resolving hwaddr
Alex Bennée [Wed, 19 Jun 2019 19:20:08 +0000 (20:20 +0100)]
plugins: implement helpers for resolving hwaddr

We need to keep a local per-cpu copy of the data as other threads may
be running. Currently we can provide insight as to if the access was
IO or not and give the offset into a given device (usually the main
RAMBlock). We store enough information to get details such as the
MemoryRegion which might be useful in later expansions to the API.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
4 years agotcg: let plugins instrument virtual memory accesses
Emilio G. Cota [Sun, 21 Oct 2018 17:24:26 +0000 (13:24 -0400)]
tcg: let plugins instrument virtual memory accesses

To capture all memory accesses we need hook into all the various
helper functions that are involved in memory operations as well as the
injected inline helper calls. A later commit will allow us to resolve
the actual guest HW addresses by replaying the lookup.

Signed-off-by: Emilio G. Cota <cota@braap.org>
[AJB: drop haddr handling, just deal in vaddr]
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
4 years agoatomic_template: add inline trace/plugin helpers
Emilio G. Cota [Sat, 20 Oct 2018 23:48:36 +0000 (19:48 -0400)]
atomic_template: add inline trace/plugin helpers

In preparation for plugin support.

Signed-off-by: Emilio G. Cota <cota@braap.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
4 years agoplugin-gen: add module for TCG-related code
Emilio G. Cota [Fri, 7 Dec 2018 20:33:56 +0000 (15:33 -0500)]
plugin-gen: add module for TCG-related code

We first inject empty instrumentation from translator_loop.
After translation, we go through the plugins to see what
they want to register for, filling in the empty instrumentation.
If if turns out that some instrumentation remains unused, we
remove it.

This approach supports the following features:

- Inlining TCG code for simple operations. Note that we do not
  export TCG ops to plugins. Instead, we give them a C API to
  insert inlined ops. So far we only support adding an immediate
  to a u64, e.g. to count events.

- "Direct" callbacks. These are callbacks that do not go via
  a helper. Instead, the helper is defined at run-time, so that
  the plugin code is directly called from TCG. This makes direct
  callbacks as efficient as possible; they are therefore used
  for very frequent events, e.g. memory callbacks.

- Passing the host address to memory callbacks. Most of this
  is implemented in a later patch though.

- Instrumentation of memory accesses performed from helpers.
  See the corresponding comment, as well as a later patch.

Signed-off-by: Emilio G. Cota <cota@braap.org>
[AJB: add alloc_tcg_plugin_context, use glib, rm hwaddr]
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
4 years agotcg: add tcg_gen_st_ptr
Emilio G. Cota [Fri, 7 Dec 2018 20:06:05 +0000 (15:06 -0500)]
tcg: add tcg_gen_st_ptr

Will gain a user soon.

Signed-off-by: Emilio G. Cota <cota@braap.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
4 years agocputlb: introduce get_page_addr_code_hostp
Emilio G. Cota [Sat, 3 Nov 2018 21:40:22 +0000 (17:40 -0400)]
cputlb: introduce get_page_addr_code_hostp

This will be used by plugins to get the host address
of instructions.

Signed-off-by: Emilio G. Cota <cota@braap.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
4 years agocputlb: document get_page_addr_code
Emilio G. Cota [Wed, 6 Feb 2019 22:11:04 +0000 (17:11 -0500)]
cputlb: document get_page_addr_code

Suggested-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Emilio G. Cota <cota@braap.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
4 years agoqueue: add QTAILQ_REMOVE_SEVERAL
Emilio G. Cota [Fri, 7 Dec 2018 00:04:07 +0000 (19:04 -0500)]
queue: add QTAILQ_REMOVE_SEVERAL

This is faster than removing elements one by one.

Will gain a user soon.

Signed-off-by: Emilio G. Cota <cota@braap.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
4 years agoplugin: add implementation of the api
Alex Bennée [Thu, 13 Jun 2019 13:58:58 +0000 (14:58 +0100)]
plugin: add implementation of the api

[AJB: split from the core code commit]
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
4 years agoplugin: add core code
Emilio G. Cota [Wed, 30 Aug 2017 22:39:53 +0000 (18:39 -0400)]
plugin: add core code

Signed-off-by: Emilio G. Cota <cota@braap.org>
[AJB: moved directory and merged various fixes]
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
4 years agoplugin: add user-facing API
Emilio G. Cota [Sun, 21 Oct 2018 00:05:49 +0000 (20:05 -0400)]
plugin: add user-facing API

Add the API first to ease review.

Signed-off-by: Emilio G. Cota <cota@braap.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
4 years agodocs/devel: add plugins.rst design document
Alex Bennée [Mon, 10 Jun 2019 15:10:02 +0000 (16:10 +0100)]
docs/devel: add plugins.rst design document

This is mostly extracted from Emilio's more verbose commit comments
with some additional verbiage from me.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
4 years agotranslate-all: use cpu_in_exclusive_work_context() in tb_flush
Emilio G. Cota [Sat, 2 Dec 2017 00:47:08 +0000 (19:47 -0500)]
translate-all: use cpu_in_exclusive_work_context() in tb_flush

tb_flush will be called by the plugin module from a safe
work environment. Prepare for that.

Suggested-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Emilio G. Cota <cota@braap.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
4 years agocpu: introduce cpu_in_exclusive_context()
Emilio G. Cota [Mon, 26 Nov 2018 22:14:43 +0000 (17:14 -0500)]
cpu: introduce cpu_in_exclusive_context()

Suggested-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Emilio G. Cota <cota@braap.org>
[AJB: moved inside start/end_exclusive fns + cleanup]
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
4 years agotrace: add mmu_index to mem_info
Alex Bennée [Fri, 28 Jun 2019 19:54:11 +0000 (20:54 +0100)]
trace: add mmu_index to mem_info

We are going to re-use mem_info later for plugins and will need to
track the mmu_idx for softmmu code.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
4 years agotrace: expand mem_info:size_shift to 4 bits
Emilio G. Cota [Wed, 22 Nov 2017 02:03:15 +0000 (21:03 -0500)]
trace: expand mem_info:size_shift to 4 bits

This will allow us to trace 32k-long memory accesses (although our
maximum is something like 256 bytes at the moment).

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Emilio G. Cota <cota@braap.org>
[AJB: expanded to 3->4 bits]
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
4 years agoMerge remote-tracking branch 'remotes/mst/tags/for_upstream' into staging
Peter Maydell [Mon, 28 Oct 2019 13:32:40 +0000 (13:32 +0000)]
Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into staging

virtio: features, tests

libqos update with support for virtio 1.
Packed ring support for virtio.

Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
# gpg: Signature made Fri 25 Oct 2019 12:47:59 BST
# gpg:                using RSA key 281F0DB8D28D5469
# gpg: Good signature from "Michael S. Tsirkin <mst@kernel.org>" [full]
# gpg:                 aka "Michael S. Tsirkin <mst@redhat.com>" [full]
# Primary key fingerprint: 0270 606B 6F3C DF3D 0B17  0970 C350 3912 AFBE 8E67
#      Subkey fingerprint: 5D09 FD08 71C8 F85B 94CA  8A0D 281F 0DB8 D28D 5469

* remotes/mst/tags/for_upstream: (25 commits)
  virtio: drop unused virtio_device_stop_ioeventfd() function
  libqos: add VIRTIO PCI 1.0 support
  libqos: extract Legacy virtio-pci.c code
  libqos: make the virtio-pci BAR index configurable
  libqos: expose common virtqueue setup/cleanup functions
  libqos: add MSI-X callbacks to QVirtioPCIDevice
  libqos: pass full QVirtQueue to set_queue_address()
  libqos: add iteration support to qpci_find_capability()
  libqos: access VIRTIO 1.0 vring in little-endian
  libqos: implement VIRTIO 1.0 FEATURES_OK step
  libqos: enforce Device Initialization order
  libqos: add missing virtio-9p feature negotiation
  tests/virtio-blk-test: set up virtqueue after feature negotiation
  virtio-scsi-test: add missing feature negotiation
  libqos: extend feature bits to 64-bit
  libqos: read QVIRTIO_MMIO_VERSION register
  tests/virtio-blk-test: read config space after feature negotiation
  virtio: add property to enable packed virtqueue
  vhost_net: enable packed ring support
  virtio: event suppression support for packed ring
  ...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
4 years agoMerge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into staging
Peter Maydell [Sun, 27 Oct 2019 19:44:59 +0000 (19:44 +0000)]
Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into staging

* Bulgarian translation update (Alexander)
* RTC and PC refactorings (Hervé, Philippe, Sergio)
* RTC fix (Marcelo)
* More comprehensive MCE logging (Mario)
* x86 IGNNE implementation (Paolo)
* Microvm machine type (Sergio)
* Support for UMONITOR/UMWAIT/TPAUSE (Tao)
* Do not use %m in common code (Thomas)
* NoNonArchitecturalCoreSharing Hyper-V enlightenment (Vitaly)
* getpagesize cleanups (Wei)

# gpg: Signature made Sat 26 Oct 2019 14:39:56 BST
# gpg:                using RSA key BFFBD25F78C7AE83
# gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full]
# gpg:                 aka "Paolo Bonzini <pbonzini@redhat.com>" [full]
# Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4  E2F7 7E15 100C CD36 69B1
#      Subkey fingerprint: F133 3857 4B66 2389 866C  7682 BFFB D25F 78C7 AE83

* remotes/bonzini/tags/for-upstream: (39 commits)
  i386: implement IGNNE
  target/i386: introduce cpu_set_fpus
  target/i386: move FERR handling to target/i386
  core: replace getpagesize() with qemu_real_host_page_size
  audio: fix missing break
  mc146818rtc: always register rtc to rtc list
  mc146818rtc: Include mc146818rtc_regs.h directly in mc146818rtc.c
  mc146818rtc: Move RTC_ISA_IRQ definition
  mc146818rtc: move structure to header file
  hw/i386/pc: Remove kvm_i386.h include
  hw/i386/pc: Extract pc_i8259_create()
  hw/i386/pc: Move gsi_state creation code
  hw/i386/pc: Extract pc_gsi_create()
  target/i386: Add support for save/load IA32_UMWAIT_CONTROL MSR
  x86/cpu: Add support for UMONITOR/UMWAIT/TPAUSE
  hw/timer/mc146818rtc: Only include qapi-commands-misc on I386
  runstate: ignore exit request in finish migrate state
  checkpatch: suggest qemu_real_host_page_size instead of getpagesize() or sysconf(_SC_PAGESIZE)
  MAINTAINERS: add microvm related files
  hw/i386: Introduce the microvm machine type
  ...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
4 years agoi386: implement IGNNE
Paolo Bonzini [Wed, 16 Oct 2019 08:34:39 +0000 (10:34 +0200)]
i386: implement IGNNE

Change the handling of port F0h writes and FPU exceptions to implement IGNNE.

The implementation mixes a bit what the chipset and processor do in real
hardware, but the effect is the same as what happens with actual FERR#
and IGNNE# pins: writing to port F0h asserts IGNNE# in addition to lowering
FP_IRQ; while clearing the SE bit in the FPU status word deasserts IGNNE#.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
4 years agotarget/i386: introduce cpu_set_fpus
Paolo Bonzini [Wed, 16 Oct 2019 08:02:57 +0000 (10:02 +0200)]
target/i386: introduce cpu_set_fpus

In the next patch, this will provide a hook to detect clearing of
FSW.ES.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
4 years agotarget/i386: move FERR handling to target/i386
Paolo Bonzini [Wed, 16 Oct 2019 08:18:10 +0000 (10:18 +0200)]
target/i386: move FERR handling to target/i386

Move it out of pc.c since it is strictly tied to TCG.  This is
almost exclusively code movement, the next patch will implement
IGNNE.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
4 years agocore: replace getpagesize() with qemu_real_host_page_size
Wei Yang [Sun, 13 Oct 2019 02:11:45 +0000 (10:11 +0800)]
core: replace getpagesize() with qemu_real_host_page_size

There are three page size in qemu:

  real host page size
  host page size
  target page size

All of them have dedicate variable to represent. For the last two, we
use the same form in the whole qemu project, while for the first one we
use two forms: qemu_real_host_page_size and getpagesize().

qemu_real_host_page_size is defined to be a replacement of
getpagesize(), so let it serve the role.

[Note] Not fully tested for some arch or device.

Signed-off-by: Wei Yang <richardw.yang@linux.intel.com>
Message-Id: <20191013021145.16011-3-richardw.yang@linux.intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
4 years agoaudio: fix missing break
Paolo Bonzini [Wed, 23 Oct 2019 08:24:20 +0000 (10:24 +0200)]
audio: fix missing break

Reported by Coverity (CID 1406449).

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
4 years agoMerge commit 'df84f17' into HEAD
Paolo Bonzini [Sat, 26 Oct 2019 13:36:22 +0000 (15:36 +0200)]
Merge commit 'df84f17' into HEAD

This merge fixes a semantic conflict with the trivial tree.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
4 years agoMerge remote-tracking branch 'remotes/stsquad/tags/pull-testing-next-251019-3' into...
Peter Maydell [Sat, 26 Oct 2019 09:13:48 +0000 (10:13 +0100)]
Merge remote-tracking branch 'remotes/stsquad/tags/pull-testing-next-251019-3' into staging

Testing updates (split from mega PR)

  - various Travis dependency updates
  - enable tcg debug for check-tcg
  - additional Xcode build for Cirrus
  - dependency tweak for gitlab

# gpg: Signature made Fri 25 Oct 2019 20:35:56 BST
# gpg:                using RSA key 6685AE99E75167BCAFC8DF35FBD0DB095A9E2A44
# gpg: Good signature from "Alex Bennée (Master Work Key) <alex.bennee@linaro.org>" [full]
# Primary key fingerprint: 6685 AE99 E751 67BC AFC8  DF35 FBD0 DB09 5A9E 2A44

* remotes/stsquad/tags/pull-testing-next-251019-3:
  tests/docker: update Travis image to a more current version
  tests/docker: set HOST_ARCH if we don't have ARCH
  travis.yml: --enable-debug-tcg to check-tcg
  gitlab-ci.yml: Use libvdeplug-dev to compile-test the VDE network backend
  travis.yml: cache the clang sanitizer build
  tests/vm/netbsd: Disable IPv6
  tests/vm: Let subclasses disable IPv6
  cirrus.yml: add latest Xcode build target
  travis.yml: bump Xcode 10 to latest dot release
  travis.yml: Test the release tarball
  travis.yml: Fix the ccache lines
  travis.yml: Use newer version of libgnutls and libpng
  travis.yml: Use libsdl2 instead of libsdl1.2, and install libsdl2-image
  travis.yml: Add libvdeplug-dev to compile-test net/vde.c
  travis.yml: reduce scope of the --enable-debug build

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
4 years agoMerge remote-tracking branch 'remotes/stefanha/tags/block-pull-request' into staging
Peter Maydell [Fri, 25 Oct 2019 20:57:41 +0000 (21:57 +0100)]
Merge remote-tracking branch 'remotes/stefanha/tags/block-pull-request' into staging

Pull request

# gpg: Signature made Fri 25 Oct 2019 20:18:23 BST
# gpg:                using RSA key 8695A8BFD3F97CDAAC35775A9CA4ABB381AB73C8
# gpg: Good signature from "Stefan Hajnoczi <stefanha@redhat.com>" [full]
# gpg:                 aka "Stefan Hajnoczi <stefanha@gmail.com>" [full]
# Primary key fingerprint: 8695 A8BF D3F9 7CDA AC35  775A 9CA4 ABB3 81AB 73C8

* remotes/stefanha/tags/block-pull-request:
  yield_until_fd_readable: make it work with any AioContect
  virtio-blk: Add blk_drain() to virtio_blk_device_unrealize()

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
4 years agotests/docker: update Travis image to a more current version
Alex Bennée [Thu, 24 Oct 2019 10:14:32 +0000 (11:14 +0100)]
tests/docker: update Travis image to a more current version

This isn't the latest one available on hub.docker.com but it does
match the ID reported by the Xenial builds running on Travis:

  instance: ... travis-ci-sardonyx-xenial-1553530528-f909ac5

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
4 years agotests/docker: set HOST_ARCH if we don't have ARCH
Alex Bennée [Mon, 7 Oct 2019 19:03:44 +0000 (19:03 +0000)]
tests/docker: set HOST_ARCH if we don't have ARCH

As the docker rules want to be able to be run on a virgin unconfigured
checkout add a fallback and use it if we need to.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
4 years agotravis.yml: --enable-debug-tcg to check-tcg
Alex Bennée [Wed, 23 Oct 2019 16:47:51 +0000 (17:47 +0100)]
travis.yml: --enable-debug-tcg to check-tcg

This adds a whole bunch of asserts which will catch bugs you might
introduce into the TCG code.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
4 years agogitlab-ci.yml: Use libvdeplug-dev to compile-test the VDE network backend
Thomas Huth [Wed, 16 Oct 2019 13:10:02 +0000 (15:10 +0200)]
gitlab-ci.yml: Use libvdeplug-dev to compile-test the VDE network backend

The libvdeplug-dev package is required to compile-test net/vde.c.

Signed-off-by: Thomas Huth <thuth@redhat.com>
Message-Id: <20191016131002.29663-1-thuth@redhat.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
4 years agotravis.yml: cache the clang sanitizer build
Alex Bennée [Tue, 22 Oct 2019 13:07:40 +0000 (14:07 +0100)]
travis.yml: cache the clang sanitizer build

Hopefully we'll see the same benefits as the other builds.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
4 years agotests/vm/netbsd: Disable IPv6
Eduardo Habkost [Fri, 18 Oct 2019 18:17:05 +0000 (15:17 -0300)]
tests/vm/netbsd: Disable IPv6

Workaround for issues when the host has no IPv6 connectivity.

Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Message-Id: <20191018181705.17957-4-ehabkost@redhat.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
4 years agotests/vm: Let subclasses disable IPv6
Eduardo Habkost [Fri, 18 Oct 2019 18:17:04 +0000 (15:17 -0300)]
tests/vm: Let subclasses disable IPv6

The mechanism will be used to work around issues related to IPv6
on the netbsd image builder.

Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-Id: <20191018181705.17957-3-ehabkost@redhat.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
4 years agocirrus.yml: add latest Xcode build target
Alex Bennée [Wed, 16 Oct 2019 18:27:13 +0000 (19:27 +0100)]
cirrus.yml: add latest Xcode build target

CirrusCI provides a mojave-xcode alias for the latest Xcode available.
Let's use it to make sure we track the latest releases.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
4 years agotravis.yml: bump Xcode 10 to latest dot release
Alex Bennée [Wed, 16 Oct 2019 18:17:08 +0000 (19:17 +0100)]
travis.yml: bump Xcode 10 to latest dot release

According to:

  https://docs.travis-ci.com/user/reference/osx/#macos-version

we have 10.3 available so lets use it. I don't know what Apple's
deprecation policy is for Xcode because it requires an AppleID to find
out.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
4 years agotravis.yml: Test the release tarball
Philippe Mathieu-Daudé [Mon, 7 Oct 2019 16:04:49 +0000 (18:04 +0200)]
travis.yml: Test the release tarball

Add a job to generate the release tarball and build/install few
QEMU targets from it.

Ideally we should build the 'efi' target from the 'roms' directory,
but it is too time consuming.

This job is only triggered when a tag starting with 'v' is pushed,
which is the case with release candidate tags.

Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-Id: <20191007160450.3619-1-philmd@redhat.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
4 years agotravis.yml: Fix the ccache lines
Thomas Huth [Wed, 9 Oct 2019 17:07:00 +0000 (19:07 +0200)]
travis.yml: Fix the ccache lines

The "command -v ccache && ccache ..." likely were supposed to test
the availability of ccache before running the program. But this
shell construct causes Travis to abort if ccache is not available.
Use an if-statement instead to fix this problem.

Signed-off-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-Id: <20191009170701.14756-5-thuth@redhat.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
4 years agotravis.yml: Use newer version of libgnutls and libpng
Thomas Huth [Wed, 9 Oct 2019 17:06:59 +0000 (19:06 +0200)]
travis.yml: Use newer version of libgnutls and libpng

libgnutls-dev and libpng12-dev are not available in newer versions
of Ubuntu anymore, so installing these packages fails e.g. in the
new arm64 containers on Travis. Let's use newer versions of these
packages by default instead. (The old versions still get tested in
the "gcc-9" build).

Signed-off-by: Thomas Huth <thuth@redhat.com>
Message-Id: <20191009170701.14756-4-thuth@redhat.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
4 years agotravis.yml: Use libsdl2 instead of libsdl1.2, and install libsdl2-image
Thomas Huth [Wed, 9 Oct 2019 17:06:58 +0000 (19:06 +0200)]
travis.yml: Use libsdl2 instead of libsdl1.2, and install libsdl2-image

We've removed support for SDL 1.2 quite a while ago already, so let's
use SDL 2 now in Travis to get test coverage for SDL again.
And while we're at it, also add libsdl2-image-dev which can be used
by QEMU nowadays, too.

Signed-off-by: Thomas Huth <thuth@redhat.com>
Message-Id: <20191009170701.14756-3-thuth@redhat.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
4 years agotravis.yml: Add libvdeplug-dev to compile-test net/vde.c
Thomas Huth [Wed, 9 Oct 2019 17:06:57 +0000 (19:06 +0200)]
travis.yml: Add libvdeplug-dev to compile-test net/vde.c

This library is needed to compile the VDE network backend.

Signed-off-by: Thomas Huth <thuth@redhat.com>
Message-Id: <20191009170701.14756-2-thuth@redhat.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
4 years agotravis.yml: reduce scope of the --enable-debug build
Alex Bennée [Wed, 2 Oct 2019 10:23:29 +0000 (11:23 +0100)]
travis.yml: reduce scope of the --enable-debug build

Adding debug makes things run a bit slower so lets not hammer all the
targets.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
4 years agoMerge remote-tracking branch 'remotes/amarkovic/tags/mips-queue-oct-24-2019-v2' into...
Peter Maydell [Fri, 25 Oct 2019 17:32:26 +0000 (18:32 +0100)]
Merge remote-tracking branch 'remotes/amarkovic/tags/mips-queue-oct-24-2019-v2' into staging

MIPS queue for October 24th, 2019 - v2

# gpg: Signature made Fri 25 Oct 2019 17:37:29 BST
# gpg:                using RSA key D4972A8967F75A65
# gpg: Good signature from "Aleksandar Markovic <amarkovic@wavecomp.com>" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 8526 FBF1 5DA3 811F 4A01  DD75 D497 2A89 67F7 5A65

* remotes/amarkovic/tags/mips-queue-oct-24-2019-v2:
  tests/ssh_linux_malta: Fix 64-bit target tests
  tests/ssh_linux_malta: Refactor how to get image/kernel info
  tests/ssh_linux_malta: Match stricter console output
  tests/ssh_linux_malta: Remove duplicated test
  tests/ssh_linux_malta: Run tests using a snapshot image
  target/mips: Refactor handling of vector compare 'less than' (signed) instructions
  target/mips: Refactor handling of vector compare 'equal' instructions
  target/mips: Demacro LMI decoder
  target/mips: msa: Split helpers for ASUB_<S|U>.<B|H|W|D>
  target/mips: msa: Split helpers for HSUB_<S|U>.<H|W|D>
  target/mips: msa: Split helpers for PCK<EV|OD>.<B|H|W|D>
  target/mips: msa: Split helpers for S<LL|RA|RAR|RL|RLR>.<B|H|W|D>
  target/mips: msa: Split helpers for HADD_<S|U>.<H|W|D>
  target/mips: msa: Split helpers for ADD<_A|S_A|S_S|S_U|V>.<B|H|W|D>
  target/mips: msa: Split helpers for ILV<EV|OD|L|R>.<B|H|W|D>
  target/mips: msa: Split helpers for <MAX|MIN>_<S|U>.<B|H|W|D>
  target/mips: msa: Split helpers for <MAX|MIN>_A.<B|H|W|D>
  MAINTAINERS: Update mail address of Aleksandar Rikalo
  target/mips: Clean up op_helper.c
  target/mips: Clean up helper.c

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
4 years agotests/ssh_linux_malta: Fix 64-bit target tests
Philippe Mathieu-Daudé [Sat, 19 Oct 2019 15:34:37 +0000 (17:34 +0200)]
tests/ssh_linux_malta: Fix 64-bit target tests

Commit 9090d3332cdcc added tests for specific to the 32-bit
machines, which inadvertently make the 64-bit tests failing.
Now than we have this information available in the CPU_INFO
array, use it to have the 64-bit tests back.

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Message-Id: <20191019153437.9820-12-f4bug@amsat.org>

4 years agotests/ssh_linux_malta: Refactor how to get image/kernel info
Philippe Mathieu-Daudé [Sat, 19 Oct 2019 15:34:36 +0000 (17:34 +0200)]
tests/ssh_linux_malta: Refactor how to get image/kernel info

The qcow and kernel images use a similar pattern regarding they
are for big/little endianess, or 32/64 bit.
Refactor using more dictionary keys.

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Message-Id: <20191019153437.9820-11-f4bug@amsat.org>

4 years agotests/ssh_linux_malta: Match stricter console output
Philippe Mathieu-Daudé [Sat, 19 Oct 2019 15:34:35 +0000 (17:34 +0200)]
tests/ssh_linux_malta: Match stricter console output

Match on stricter console output.

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Message-Id: <20191019153437.9820-10-f4bug@amsat.org>

4 years agotests/ssh_linux_malta: Remove duplicated test
Philippe Mathieu-Daudé [Sat, 19 Oct 2019 15:34:34 +0000 (17:34 +0200)]
tests/ssh_linux_malta: Remove duplicated test

Remove duplicated test (probably copy/paste error in
commit 9090d3332cdcc).

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Message-Id: <20191019153437.9820-9-f4bug@amsat.org>

4 years agotests/ssh_linux_malta: Run tests using a snapshot image
Philippe Mathieu-Daudé [Sat, 19 Oct 2019 15:34:33 +0000 (17:34 +0200)]
tests/ssh_linux_malta: Run tests using a snapshot image

If a test fails, it can corrupt the underlying QCow2 image,
making further tests failing.
Fix this by running each test with a snapshot.

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Message-Id: <20191019153437.9820-8-f4bug@amsat.org>

4 years agotarget/mips: Refactor handling of vector compare 'less than' (signed) instructions
Filip Bozuta [Wed, 23 Oct 2019 13:37:05 +0000 (15:37 +0200)]
target/mips: Refactor handling of vector compare 'less than' (signed) instructions

Remove unnecessary argument and provide separate function for each
instruction.

Signed-off-by: Filip Bozuta <Filip.Bozuta@rt-rk.com>
Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Message-Id: <1571837825-24438-3-git-send-email-Filip.Bozuta@rt-rk.com>

4 years agotarget/mips: Refactor handling of vector compare 'equal' instructions
Filip Bozuta [Wed, 23 Oct 2019 13:37:04 +0000 (15:37 +0200)]
target/mips: Refactor handling of vector compare 'equal' instructions

Remove unnecessary argument and provide separate function for each
instruction.

Signed-off-by: Filip Bozuta <Filip.Bozuta@rt-rk.com>
Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Message-Id: <1571837825-24438-2-git-send-email-Filip.Bozuta@rt-rk.com>

4 years agotarget/mips: Demacro LMI decoder
Aleksandar Markovic [Wed, 23 Oct 2019 10:23:47 +0000 (12:23 +0200)]
target/mips: Demacro LMI decoder

This makes searches for instances of opcode usages easier.

Reviewed-by: Aleksandar Rikalo <aleksandar.rikalo@rt-rk.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Message-Id: <1571826227-10583-15-git-send-email-aleksandar.markovic@rt-rk.com>

4 years agotarget/mips: msa: Split helpers for ASUB_<S|U>.<B|H|W|D>
Aleksandar Markovic [Wed, 23 Oct 2019 10:23:45 +0000 (12:23 +0200)]
target/mips: msa: Split helpers for ASUB_<S|U>.<B|H|W|D>

Achieves clearer code and slightly better performance.

Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Reviewed-by: Aleksandar Rikalo <aleksandar.rikalo@rt-rk.com>
Message-Id: <1571826227-10583-13-git-send-email-aleksandar.markovic@rt-rk.com>

4 years agotarget/mips: msa: Split helpers for HSUB_<S|U>.<H|W|D>
Aleksandar Markovic [Wed, 23 Oct 2019 10:23:44 +0000 (12:23 +0200)]
target/mips: msa: Split helpers for HSUB_<S|U>.<H|W|D>

Achieves clearer code and slightly better performance.

Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Reviewed-by: Aleksandar Rikalo <aleksandar.rikalo@rt-rk.com>
Message-Id: <1571826227-10583-12-git-send-email-aleksandar.markovic@rt-rk.com>

4 years agotarget/mips: msa: Split helpers for PCK<EV|OD>.<B|H|W|D>
Aleksandar Markovic [Wed, 23 Oct 2019 10:23:43 +0000 (12:23 +0200)]
target/mips: msa: Split helpers for PCK<EV|OD>.<B|H|W|D>

Achieves clearer code and slightly better performance.

Reviewed-by: Aleksandar Rikalo <aleksandar.rikalo@rt-rk.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Message-Id: <1571826227-10583-11-git-send-email-aleksandar.markovic@rt-rk.com>

4 years agotarget/mips: msa: Split helpers for S<LL|RA|RAR|RL|RLR>.<B|H|W|D>
Aleksandar Markovic [Wed, 23 Oct 2019 10:23:42 +0000 (12:23 +0200)]
target/mips: msa: Split helpers for S<LL|RA|RAR|RL|RLR>.<B|H|W|D>

Achieves clearer code and slightly better performance.

Reviewed-by: Aleksandar Rikalo <aleksandar.rikalo@rt-rk.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Message-Id: <1571826227-10583-10-git-send-email-aleksandar.markovic@rt-rk.com>

4 years agotarget/mips: msa: Split helpers for HADD_<S|U>.<H|W|D>
Aleksandar Markovic [Wed, 23 Oct 2019 10:23:41 +0000 (12:23 +0200)]
target/mips: msa: Split helpers for HADD_<S|U>.<H|W|D>

Achieves clearer code and slightly better performance.

Reviewed-by: Aleksandar Rikalo <aleksandar.rikalo@rt-rk.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Message-Id: <1571826227-10583-9-git-send-email-aleksandar.markovic@rt-rk.com>

4 years agotarget/mips: msa: Split helpers for ADD<_A|S_A|S_S|S_U|V>.<B|H|W|D>
Aleksandar Markovic [Wed, 23 Oct 2019 10:23:40 +0000 (12:23 +0200)]
target/mips: msa: Split helpers for ADD<_A|S_A|S_S|S_U|V>.<B|H|W|D>

Achieves clearer code and slightly better performance.

Reviewed-by: Aleksandar Rikalo <aleksandar.rikalo@rt-rk.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Message-Id: <1571826227-10583-8-git-send-email-aleksandar.markovic@rt-rk.com>

4 years agotarget/mips: msa: Split helpers for ILV<EV|OD|L|R>.<B|H|W|D>
Aleksandar Markovic [Wed, 23 Oct 2019 10:23:39 +0000 (12:23 +0200)]
target/mips: msa: Split helpers for ILV<EV|OD|L|R>.<B|H|W|D>

Achieves clearer code and slightly better performance.

Reviewed-by: Aleksandar Rikalo <aleksandar.rikalo@rt-rk.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Message-Id: <1571826227-10583-7-git-send-email-aleksandar.markovic@rt-rk.com>

4 years agotarget/mips: msa: Split helpers for <MAX|MIN>_<S|U>.<B|H|W|D>
Aleksandar Markovic [Wed, 23 Oct 2019 10:23:38 +0000 (12:23 +0200)]
target/mips: msa: Split helpers for <MAX|MIN>_<S|U>.<B|H|W|D>

Achieves clearer code and slightly better performance.

Reviewed-by: Aleksandar Rikalo <aleksandar.rikalo@rt-rk.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Message-Id: <1571826227-10583-6-git-send-email-aleksandar.markovic@rt-rk.com>

4 years agotarget/mips: msa: Split helpers for <MAX|MIN>_A.<B|H|W|D>
Aleksandar Markovic [Wed, 23 Oct 2019 10:23:37 +0000 (12:23 +0200)]
target/mips: msa: Split helpers for <MAX|MIN>_A.<B|H|W|D>

Achieves clearer code and slightly better performance.

Reviewed-by: Aleksandar Rikalo <aleksandar.rikalo@rt-rk.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Message-Id: <1571826227-10583-5-git-send-email-aleksandar.markovic@rt-rk.com>

4 years agoMAINTAINERS: Update mail address of Aleksandar Rikalo
Aleksandar Markovic [Wed, 23 Oct 2019 10:23:36 +0000 (12:23 +0200)]
MAINTAINERS: Update mail address of Aleksandar Rikalo

Aleksandar Rikalo wishes to change his primary mail address for QEMU.
Some minor line order is corrected in .mailmap to be alphabetical,
too.

Reviewed-by: Aleksandar Rikalo <aleksandar.rikalo@rt-rk.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Message-Id: <1571826227-10583-4-git-send-email-aleksandar.markovic@rt-rk.com>

4 years agotarget/mips: Clean up op_helper.c
Aleksandar Markovic [Wed, 23 Oct 2019 10:23:35 +0000 (12:23 +0200)]
target/mips: Clean up op_helper.c

Mostly fix errors and warnings reported by 'checkpatch.pl -f'.

Reviewed-by: Aleksandar Rikalo <aleksandar.rikalo@rt-rk.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Message-Id: <1571826227-10583-3-git-send-email-aleksandar.markovic@rt-rk.com>

4 years agotarget/mips: Clean up helper.c
Aleksandar Markovic [Wed, 23 Oct 2019 10:23:34 +0000 (12:23 +0200)]
target/mips: Clean up helper.c

Mostly fix errors and warnings reported by 'checkpatch.pl -f'.

Cc: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Aleksandar Rikalo <aleksandar.rikalo@rt-rk.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Message-Id: <1571826227-10583-2-git-send-email-aleksandar.markovic@rt-rk.com>

4 years agoMerge remote-tracking branch 'remotes/kevin/tags/for-upstream' into staging
Peter Maydell [Fri, 25 Oct 2019 13:59:53 +0000 (14:59 +0100)]
Merge remote-tracking branch 'remotes/kevin/tags/for-upstream' into staging

Block layer patches:

- qcow2: Fix data corruption bug that is triggered in partial cluster
  allocation with default options
- qapi: add support for blkreplay driver
- doc: Describe missing generic -blockdev options
- iotests: Fix 118 when run as root
- Minor code cleanups

# gpg: Signature made Fri 25 Oct 2019 14:19:04 BST
# gpg:                using RSA key 7F09B272C88F2FD6
# gpg: Good signature from "Kevin Wolf <kwolf@redhat.com>" [full]
# Primary key fingerprint: DC3D EB15 9A9A F95D 3D74  56FE 7F09 B272 C88F 2FD6

* remotes/kevin/tags/for-upstream:
  qcow2: Fix corruption bug in qcow2_detect_metadata_preallocation()
  coroutine: Add qemu_co_mutex_assert_locked()
  doc: Describe missing generic -blockdev options
  block/backup: drop dead code from backup_job_create
  blockdev: Use error_report() in hmp_commit()
  iotests: Skip read-only cases in 118 when run as root
  qapi: add support for blkreplay driver

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
4 years agoqcow2: Fix corruption bug in qcow2_detect_metadata_preallocation()
Kevin Wolf [Thu, 24 Oct 2019 14:26:58 +0000 (16:26 +0200)]
qcow2: Fix corruption bug in qcow2_detect_metadata_preallocation()

qcow2_detect_metadata_preallocation() calls qcow2_get_refcount() which
requires s->lock to be taken to protect its accesses to the refcount
table and refcount blocks. However, nothing in this code path actually
took the lock. This could cause the same cache entry to be used by two
requests at the same time, for different tables at different offsets,
resulting in image corruption.

As it would be preferable to base the detection on consistent data (even
though it's just heuristics), let's take the lock not only around the
qcow2_get_refcount() calls, but around the whole function.

This patch takes the lock in qcow2_co_block_status() earlier and asserts
in qcow2_detect_metadata_preallocation() that we hold the lock.

Fixes: 69f47505ee66afaa513305de0c1895a224e52c45
Cc: qemu-stable@nongnu.org
Reported-by: Michael Weiser <michael.weiser@gmx.de>
Signed-off-by: Kevin Wolf <kwolf@redhat.com>
Tested-by: Michael Weiser <michael.weiser@gmx.de>
Reviewed-by: Michael Weiser <michael.weiser@gmx.de>
Reviewed-by: Vladimir Sementsov-Ogievskiy <vsementsov@virtuozzo.com>
Reviewed-by: Max Reitz <mreitz@redhat.com>
4 years agocoroutine: Add qemu_co_mutex_assert_locked()
Kevin Wolf [Thu, 24 Oct 2019 14:26:57 +0000 (16:26 +0200)]
coroutine: Add qemu_co_mutex_assert_locked()

Some functions require that the caller holds a certain CoMutex for them
to operate correctly. Add a function so that they can assert the lock is
really held.

Cc: qemu-stable@nongnu.org
Signed-off-by: Kevin Wolf <kwolf@redhat.com>
Tested-by: Michael Weiser <michael.weiser@gmx.de>
Reviewed-by: Michael Weiser <michael.weiser@gmx.de>
Reviewed-by: Vladimir Sementsov-Ogievskiy <vsementsov@virtuozzo.com>
Reviewed-by: Denis V. Lunev <den@openvz.org>
Reviewed-by: Max Reitz <mreitz@redhat.com>
4 years agoMerge remote-tracking branch 'remotes/vivier2/tags/trivial-branch-pull-request' into...
Peter Maydell [Fri, 25 Oct 2019 13:17:08 +0000 (14:17 +0100)]
Merge remote-tracking branch 'remotes/vivier2/tags/trivial-branch-pull-request' into staging

Fix typos and docs, trivial changes and RTC devices split

# gpg: Signature made Fri 25 Oct 2019 09:35:02 BST
# gpg:                using RSA key CD2F75DDC8E3A4DC2E4F5173F30C38BD3F2FBE3C
# gpg:                issuer "laurent@vivier.eu"
# gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" [full]
# gpg:                 aka "Laurent Vivier <laurent@vivier.eu>" [full]
# gpg:                 aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" [full]
# Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F  5173 F30C 38BD 3F2F BE3C

* remotes/vivier2/tags/trivial-branch-pull-request:
  hw/rtc/aspeed_rtc: Remove unused includes
  hw/rtc/xlnx-zynqmp-rtc: Remove unused "ptimer.h" include
  hw/rtc/mc146818: Include mc146818rtc_regs.h a bit less
  hw: Move Aspeed RTC from hw/timer/ to hw/rtc/ subdirectory
  hw: Move Exynos4210 RTC from hw/timer/ to hw/rtc/ subdirectory
  hw: Move Xilinx ZynqMP RTC from hw/timer/ to hw/rtc/ subdirectory
  hw: Move DS1338 device from hw/timer/ to hw/rtc/ subdirectory
  hw: Move TWL92230 device from hw/timer/ to hw/rtc/ subdirectory
  hw: Move sun4v hypervisor RTC from hw/timer/ to hw/rtc/ subdirectory
  hw: Move M41T80 device from hw/timer/ to hw/rtc/ subdirectory
  hw: Move M48T59 device from hw/timer/ to hw/rtc/ subdirectory
  hw: Move MC146818 device from hw/timer/ to hw/rtc/ subdirectory
  hw: Move PL031 device from hw/timer/ to hw/rtc/ subdirectory
  hw/timer: Compile devices not target-dependent as common object
  qemu-timer: reuse MIN macro in qemu_timeout_ns_to_ms
  event_notifier: avoid dandling file descriptor in event_notifier_cleanup
  util/async: avoid useless cast
  pci_bridge: fix a typo in comment
  qemu-options.hx: Update for reboot-timeout parameter

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
# Conflicts:
# hw/timer/trace-events

4 years agodoc: Describe missing generic -blockdev options
Kevin Wolf [Tue, 15 Oct 2019 10:29:58 +0000 (12:29 +0200)]
doc: Describe missing generic -blockdev options

We added more generic options after introducing -blockdev and forgot to
update the documentation (man page and --help output) accordingly. Do
that now.

Signed-off-by: Kevin Wolf <kwolf@redhat.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
4 years agoblock/backup: drop dead code from backup_job_create
Vladimir Sementsov-Ogievskiy [Thu, 17 Oct 2019 14:21:22 +0000 (17:21 +0300)]
block/backup: drop dead code from backup_job_create

After commit 00e30f05de1d195, there is no more "goto error" points
after job creation, so after "error:" @job is always NULL and we don't
need roll-back job creation.

Reported-by: Coverity (CID 1406402)
Signed-off-by: Vladimir Sementsov-Ogievskiy <vsementsov@virtuozzo.com>
Acked-by: Stefano Garzarella <sgarzare@redhat.com>
Signed-off-by: Kevin Wolf <kwolf@redhat.com>
4 years agoblockdev: Use error_report() in hmp_commit()
Kevin Wolf [Mon, 27 May 2019 16:01:41 +0000 (18:01 +0200)]
blockdev: Use error_report() in hmp_commit()

Instead of using monitor_printf() to report errors, hmp_commit() should
use error_report() like other places do.

Signed-off-by: Kevin Wolf <kwolf@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
4 years agoiotests: Skip read-only cases in 118 when run as root
Kevin Wolf [Fri, 18 Oct 2019 11:46:42 +0000 (13:46 +0200)]
iotests: Skip read-only cases in 118 when run as root

Some tests in 118 use chmod to remove write permissions from the file
and assume that the image can indeed not be opened read-write
afterwards. This doesn't work when the test is run as root, because root
can still open the file as writable even when the permission bit isn't
set.

Introduce a @skip_if_root decorator and use it in 118 to skip the tests
in question when the script is run as root.

Signed-off-by: Kevin Wolf <kwolf@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
4 years agoqapi: add support for blkreplay driver
Pavel Dovgalyuk [Wed, 16 Oct 2019 08:40:39 +0000 (11:40 +0300)]
qapi: add support for blkreplay driver

This patch adds support for blkreplay driver to the blockdev options.
Now blkreplay can be used with -blockdev command line option
in the following format:
-blockdev driver=blkreplay,image=file-node-name,node-name=replay-node-name

This option makes possible implementation of the better command
line support for record/replay invocations.

Signed-off-by: Pavel Dovgalyuk <Pavel.Dovgaluk@ispras.ru>
Signed-off-by: Kevin Wolf <kwolf@redhat.com>
4 years agoyield_until_fd_readable: make it work with any AioContect
Dietmar Maurer [Thu, 24 Oct 2019 04:56:10 +0000 (06:56 +0200)]
yield_until_fd_readable: make it work with any AioContect

Simply use qemu_get_current_aio_context().

Signed-off-by: Dietmar Maurer <dietmar@proxmox.com>
Message-Id: <20191024045610.9071-1-dietmar@proxmox.com>
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
4 years agovirtio-blk: Add blk_drain() to virtio_blk_device_unrealize()
Julia Suvorova [Fri, 18 Oct 2019 14:28:56 +0000 (16:28 +0200)]
virtio-blk: Add blk_drain() to virtio_blk_device_unrealize()

QEMU does not wait for completed I/O requests, assuming that the guest
driver will reset the device before calling unrealize(). This does not
happen on Windows, and QEMU crashes in virtio_notify(), getting the
result of a completed I/O request on hot-unplugged device.

Signed-off-by: Julia Suvorova <jusual@redhat.com>
Message-Id: <20191018142856.31870-1-jusual@redhat.com>
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
4 years agoMerge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20191025' into...
Peter Maydell [Fri, 25 Oct 2019 12:12:16 +0000 (13:12 +0100)]
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20191025' into staging

target-arm queue:
 * raspi boards: some cleanup
 * raspi: implement the bcm2835 system timer device
 * raspi: implement a dummy thermal sensor
 * misc devices: switch to ptimer transaction API
 * cache TB flag state to improve performance of cpu_get_tb_cpu_state
 * aspeed: Add an AST2600 eval board

# gpg: Signature made Fri 25 Oct 2019 13:11:25 BST
# gpg:                using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE
# gpg:                issuer "peter.maydell@linaro.org"
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate]
# gpg:                 aka "Peter Maydell <pmaydell@gmail.com>" [ultimate]
# gpg:                 aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate]
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83  15CF 3C25 25ED 1436 0CDE

* remotes/pmaydell/tags/pull-target-arm-20191025: (42 commits)
  hw/arm/highbank: Use AddressSpace when using write_secondary_boot()
  hw/arm/raspi: Use AddressSpace when using arm_boot::write_secondary_boot
  hw/arm/bcm2836: Rename cpus[] as cpu[].core
  hw/arm/bcm2836: Make the SoC code modular
  hw/arm/bcm2835_peripherals: Use the SYS_timer
  hw/timer/bcm2835: Add the BCM2835 SYS_timer
  hw/arm/bcm2835_peripherals: Use the thermal sensor block
  hw/misc/bcm2835_thermal: Add a dummy BCM2835 thermal sensor
  hw/watchdog/milkymist-sysctl.c: Switch to transaction-based ptimer API
  hw/m68k/mcf5206.c: Switch to transaction-based ptimer API
  hw/timer/grlib_gptimer.c: Switch to transaction-based ptimer API
  hw/timer/slavio_timer.c: Switch to transaction-based ptimer API
  hw/timer/slavio_timer: Remove useless check for NULL t->timer
  hw/dma/xilinx_axidma.c: Switch to transaction-based ptimer API
  hw/timer/xilinx_timer.c: Switch to transaction-based ptimer API
  hw/net/fsl_etsec/etsec.c: Switch to transaction-based ptimer API
  target/arm: Rely on hflags correct in cpu_get_tb_cpu_state
  linux-user/arm: Rebuild hflags for TARGET_WORDS_BIGENDIAN
  linux-user/aarch64: Rebuild hflags for TARGET_WORDS_BIGENDIAN
  target/arm: Rebuild hflags for M-profile NVIC
  ...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
4 years agohw/arm/highbank: Use AddressSpace when using write_secondary_boot()
Philippe Mathieu-Daudé [Sat, 19 Oct 2019 23:47:13 +0000 (01:47 +0200)]
hw/arm/highbank: Use AddressSpace when using write_secondary_boot()

write_secondary_boot() is used in SMP configurations where the
CPU address space might not be the main System Bus.
The rom_add_blob_fixed_as() function allow us to specify an
address space. Use it to write each boot blob in the corresponding
CPU address space.

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-id: 20191019234715.25750-15-f4bug@amsat.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
4 years agohw/arm/raspi: Use AddressSpace when using arm_boot::write_secondary_boot
Philippe Mathieu-Daudé [Sat, 19 Oct 2019 23:47:09 +0000 (01:47 +0200)]
hw/arm/raspi: Use AddressSpace when using arm_boot::write_secondary_boot

write_secondary_boot() is used in SMP configurations where the
CPU address space might not be the main System Bus.
The rom_add_blob_fixed_as() function allow us to specify an
address space. Use it to write each boot blob in the corresponding
CPU address space.

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-id: 20191019234715.25750-11-f4bug@amsat.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
4 years agohw/arm/bcm2836: Rename cpus[] as cpu[].core
Philippe Mathieu-Daudé [Sat, 19 Oct 2019 23:47:05 +0000 (01:47 +0200)]
hw/arm/bcm2836: Rename cpus[] as cpu[].core

As we are going to add more core-specific fields, add a 'cpu'
structure and move the ARMCPU field there as 'core'.

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-id: 20191019234715.25750-7-f4bug@amsat.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
4 years agohw/arm/bcm2836: Make the SoC code modular
Philippe Mathieu-Daudé [Sat, 19 Oct 2019 23:47:04 +0000 (01:47 +0200)]
hw/arm/bcm2836: Make the SoC code modular

This file creates the BCM2836/BCM2837 blocks.
The biggest differences with the BCM2838 we are going to add, are
the base addresses of the interrupt controller and the peripherals.
Add these addresses in the BCM283XInfo structure to make this
block more modular. Remove the MCORE_OFFSET offset as it is
not useful and rather confusing.

Reviewed-by: Esteban Bosse <estebanbosse@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-id: 20191019234715.25750-6-f4bug@amsat.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
4 years agohw/arm/bcm2835_peripherals: Use the SYS_timer
Philippe Mathieu-Daudé [Sat, 19 Oct 2019 23:47:03 +0000 (01:47 +0200)]
hw/arm/bcm2835_peripherals: Use the SYS_timer

Connect the recently added SYS_timer.
Now U-Boot does not hang anymore polling a free running counter
stuck at 0.
This timer is also used by the Linux kernel thermal subsystem.

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-id: 20191019234715.25750-5-f4bug@amsat.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
4 years agohw/timer/bcm2835: Add the BCM2835 SYS_timer
Philippe Mathieu-Daudé [Sat, 19 Oct 2019 23:47:02 +0000 (01:47 +0200)]
hw/timer/bcm2835: Add the BCM2835 SYS_timer

Add the 64-bit free running timer. Do not model the COMPARE register
(no IRQ generated).
This timer is used by Linux kernel and recently U-Boot:
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/drivers/clocksource/bcm2835_timer.c?h=v3.7
https://github.com/u-boot/u-boot/blob/v2019.07/include/configs/rpi.h#L19

Datasheet used:
https://www.raspberrypi.org/app/uploads/2012/02/BCM2835-ARM-Peripherals.pdf

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-id: 20191019234715.25750-4-f4bug@amsat.org
[PMM: squashed in switch to using memset in reset]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
4 years agohw/arm/bcm2835_peripherals: Use the thermal sensor block
Philippe Mathieu-Daudé [Sat, 19 Oct 2019 23:47:01 +0000 (01:47 +0200)]
hw/arm/bcm2835_peripherals: Use the thermal sensor block

Map the thermal sensor in the BCM2835 block.

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-id: 20191019234715.25750-3-f4bug@amsat.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
4 years agohw/misc/bcm2835_thermal: Add a dummy BCM2835 thermal sensor
Philippe Mathieu-Daudé [Sat, 19 Oct 2019 23:47:00 +0000 (01:47 +0200)]
hw/misc/bcm2835_thermal: Add a dummy BCM2835 thermal sensor

We will soon implement the SYS_timer. This timer is used by Linux
in the thermal subsystem, so once available, the subsystem will be
enabled and poll the temperature sensors. We need to provide the
minimum required to keep Linux booting.

Add a dummy thermal sensor returning ~25°C based on:
https://github.com/raspberrypi/linux/blob/rpi-5.3.y/drivers/thermal/broadcom/bcm2835_thermal.c

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-id: 20191019234715.25750-2-f4bug@amsat.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
4 years agohw/watchdog/milkymist-sysctl.c: Switch to transaction-based ptimer API
Peter Maydell [Mon, 21 Oct 2019 14:10:40 +0000 (15:10 +0100)]
hw/watchdog/milkymist-sysctl.c: Switch to transaction-based ptimer API

Switch the milkymist-sysctl code away from bottom-half based
ptimers to the new transaction-based ptimer API.  This just requires
adding begin/commit calls around the various places that modify the
ptimer state, and using the new ptimer_init() function to create the
timer.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-id: 20191021141040.11007-1-peter.maydell@linaro.org

4 years agohw/m68k/mcf5206.c: Switch to transaction-based ptimer API
Peter Maydell [Mon, 21 Oct 2019 14:06:00 +0000 (15:06 +0100)]
hw/m68k/mcf5206.c: Switch to transaction-based ptimer API

Switch the mcf5206 code away from bottom-half based ptimers to
the new transaction-based ptimer API.  This just requires adding
begin/commit calls around the various places that modify the ptimer
state, and using the new ptimer_init() function to create the timer.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Message-id: 20191021140600.10725-1-peter.maydell@linaro.org

4 years agohw/timer/grlib_gptimer.c: Switch to transaction-based ptimer API
Peter Maydell [Mon, 21 Oct 2019 13:43:56 +0000 (14:43 +0100)]
hw/timer/grlib_gptimer.c: Switch to transaction-based ptimer API

Switch the grlib_gptimer code away from bottom-half based ptimers to
the new transaction-based ptimer API.  This just requires adding
begin/commit calls around the various places that modify the ptimer
state, and using the new ptimer_init() function to create the timer.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-id: 20191021134357.14266-3-peter.maydell@linaro.org
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
4 years agohw/timer/slavio_timer.c: Switch to transaction-based ptimer API
Peter Maydell [Mon, 21 Oct 2019 13:43:57 +0000 (14:43 +0100)]
hw/timer/slavio_timer.c: Switch to transaction-based ptimer API

Switch the slavio_timer code away from bottom-half based ptimers to
the new transaction-based ptimer API.  This just requires adding
begin/commit calls around the various places that modify the ptimer
state, and using the new ptimer_init() function to create the timer.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20191021134357.14266-4-peter.maydell@linaro.org
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>