OSDN Git Service
Jim Stichnoth [Wed, 9 Dec 2015 01:44:34 +0000 (17:44 -0800)]
Subzero: Improve the Doxygen input filter for TODO extraction.
The previous filter was too aggressive at changing "//" to "///". The new filter does that transformation more selectively, starting at a commented TODO line and ending at the next non-commented line.
BUG= none
Review URL: https://codereview.chromium.org/
1510893004 .
Karl Schimpf [Tue, 8 Dec 2015 23:37:00 +0000 (15:37 -0800)]
Fix problems with sandboxing and the ARM integrated assembler.
Fixes (at least) the obvious problems with sandboxing and the
integrated assembler. This includes:
Added assembly instruction Nop.
Fixed implementation of padWithNop.
Fixed linking to local label to only fire when persistent (i.e. last
pass of assembly generation).
Removed restriction on single register push/pop, since the ARM
integrated assembler converts it to a corresopnding str/ldr.
Fixed OperandARM32FlexImm to use smallest rotation value, so that
external assemblers and the ARM integrated assembler will agree on
encoding.
Fixed ARM sandboxing requires test in sandboxing.ll
BUG=None
R=stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1511653002 .
Karl Schimpf [Tue, 8 Dec 2015 22:45:28 +0000 (14:45 -0800)]
Add CMN instruction to ARM integrated assembler.
BUG= https://bugs.chromium.org/p/nativeclient/issues/detail?id=4334
R=stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1513543002 .
Karl Schimpf [Tue, 8 Dec 2015 21:41:38 +0000 (13:41 -0800)]
Add ASR instruction to the ARM integrated assembler.
BUG= https://bugs.chromium.org/p/nativeclient/issues/detail?id=4334
R=stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1509243002 .
Karl Schimpf [Tue, 8 Dec 2015 19:17:23 +0000 (11:17 -0800)]
Add Sxtb/Sxth instructions to ARM integrated assembler.
Refactors code to take advantage of these instructions with
Uxtb/Uxth.
Note. These instructions are used by Subzero, but not Dart.
BUG= https://bugs.chromium.org/p/nativeclient/issues/detail?id=4334
R=stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1503273002 .
Reed Kotler [Mon, 7 Dec 2015 22:31:01 +0000 (14:31 -0800)]
cleanup main
seems like these two lines are common to both paths and in fact
the different classes allocated are derived from the same common
base class so this makes sense to me.
BUG=
R=stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1494753003 .
Patch from Reed Kotler <rkotlerimgtec@gmail.com>.
Karl Schimpf [Mon, 7 Dec 2015 18:43:34 +0000 (10:43 -0800)]
Implement LSR instructions for the integrated ARM assembler.
Also factors out the body of method lsl() to emitShift(), so
that all forms of shift instructions can use the same code.
BUG= https://bugs.chromium.org/p/nativeclient/issues/detail?id=4334
R=stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1501073002 .
Jim Stichnoth [Mon, 7 Dec 2015 16:37:25 +0000 (08:37 -0800)]
Subzero: Doxygenify TODO comments.
Uses a nasty regexp to turn something like:
// ... TODO(stichnot): Fix
// this.
into:
/// ... @todo TODO(stichnot): Fix
/// this.
so that doxygen can generate the TODO list.
Matches "TODO:" and "TODO " and "TODO(...".
BUG= none
R=rkotlerimgtec@gmail.com
Review URL: https://codereview.chromium.org/
1489413007 .
John Porto [Sat, 5 Dec 2015 22:16:25 +0000 (14:16 -0800)]
Subzero. ARM32. Implements sandboxing.
(See https://codereview.chromium.org/
1491473002/ for the steps taken
while implementing sandboxing.)
BUG= https://code.google.com/p/nativeclient/issues/detail?id=4076
R=stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1499983002 .
Karl Schimpf [Fri, 4 Dec 2015 23:11:43 +0000 (15:11 -0800)]
Add RSB instruction to the ARM integrated assembler.
Adds RSB (immediate) and RSB (register) to the ARM integrated assembler.
Also moves udiv method to corresponding (sorted) position in cpp file.
BUG= https://bugs.chromium.org/p/nativeclient/issues/detail?id=4334
R=stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1494433005 .
Karl Schimpf [Fri, 4 Dec 2015 23:07:01 +0000 (15:07 -0800)]
Add missing form of movt to ARM integrated assembler.
Add allowing movt to work on integer constants that aren't relocatable.
Also clean up code sharing between movw and movt.
BUG= https://bugs.chromium.org/p/nativeclient/issues/detail?id=4334
R=stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1500073002 .
Jim Stichnoth [Fri, 4 Dec 2015 16:28:52 +0000 (08:28 -0800)]
Turn on anonymous namespaces.
Once again, the configuration file that comes with Doxygen
seems to have defaults set for those generating API
Documentation and not for documenting the code in a whole
project.
With this turned off, even todos and such are ignored in
an anonymous namespace.
BUG=
R=stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1501503002 .
Karl Schimpf [Fri, 4 Dec 2015 15:29:10 +0000 (07:29 -0800)]
Improve error handling in the ARM integrated assembler.
Up to now, all error handling in the ARM integrated assembler was
handled by forcing a text fixup. This CL tries to minimize the use of
fixup's to only be applied when there is an unimplemented form of an
instruction. All other cases now generate fatal error messages.
This CL should make it easier to determine what instructions still need
to be extended.
BUG= https://bugs.chromium.org/p/nativeclient/issues/detail?id=4334
R=stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1495093002 .
John Porto [Fri, 4 Dec 2015 15:09:20 +0000 (07:09 -0800)]
Revert "Subzero. ARM32. Initial sandboxing code."
This reverts commit
38ac6bee58b7ef19cbc2b0540315c3c299ca77a9 (mistakenly
TBRed.)
BUG= https://code.google.com/p/nativeclient/issues/detail?id=4076
Review URL: https://codereview.chromium.org/
1499973002 .
John Porto [Fri, 4 Dec 2015 14:51:38 +0000 (06:51 -0800)]
Subzero. ARM32. Initial sandboxing code.
BUG= https://code.google.com/p/nativeclient/issues/detail?id=4076
Review URL: https://codereview.chromium.org/
1491473002 .
John Porto [Thu, 3 Dec 2015 17:45:31 +0000 (09:45 -0800)]
Subzero. ARM32. Folding rematerializable offsets in address operands.
BUG= https://code.google.com/p/nativeclient/issues/detail?id=4076
R=stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1477873002 .
Jim Stichnoth [Thu, 3 Dec 2015 00:52:44 +0000 (16:52 -0800)]
fix doxygen brief in subzero header files
There is a consistent mistake in most of the file level subzero doxygen
comments which stems from a problem with brief.
Basically, there are two types of documentation in Doxygen, inline and
structural documentation. File level documentation is always structural
because inline documentation must either come before or after the entity
and for a file that would be impossible.
When you have structure documentation, the brief and detailed is
handled differently and you have to explicity put the \brief qualifier in.
We were only doing this for a few files so when you looked the doxygen
for the source directory, the description was blank for almost all of them.
If you build docs with this patch and look at the "files" and src
directory, you will see all the brief descriptions now.
In addition I deleted the text "This file ..." from the
beginning of all the file desriptions because it's redundant when you look at the doxygen output and adds
no information but takes up space in the descripton.
BUG=
R=stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1488913002 .
Karl Schimpf [Wed, 2 Dec 2015 22:20:38 +0000 (14:20 -0800)]
Clean up use of encode/decode in the ARM integrated assembler.
Cleans up function names containing "decode" and "encode". Change
"encode" to represent the conversion of values into bit-sequences, as
they appear in instructions. Change "decode" to represent the extraction
of values from bit sequences.
BUG=None
R=stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1490383002 .
Karl Schimpf [Wed, 2 Dec 2015 18:24:15 +0000 (10:24 -0800)]
More coverage of load/stores in ARM integrated assembler.
Adds many more cases of ldr{b,h}/str{b,h} instructions to the ARM
integerated assembler.
Also refactored decodeAddress() to deal with the fact that
immediate/register arguments for LDR/LDRB/STR/STRB differ for
LDRH/LDRD/STRH/STRD, by passing in the layout wanted.
Note: LDRD/STRD instructions are currently not used by Subzero.
BUG=https://bugs.chromium.org/p/nativeclient/issues/detail?id=4334
R=stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1486263002 .
John Porto [Tue, 1 Dec 2015 21:00:43 +0000 (13:00 -0800)]
Subzero. ARM32. Pre-lowers calls to ARM32 Helpers.
BUG= https://code.google.com/p/nativeclient/issues/detail?id=4076
R=stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1474883002 .
Karl Schimpf [Tue, 1 Dec 2015 19:24:53 +0000 (11:24 -0800)]
Clean up implementation reading literal constants.
Moves APInt and corresponding convert to float method into the pnacl
translator. Renames APInt to BitcodeInt to be more clear that we aren't referring to LLVM's APInt. Rather, it is the representation in PNaCl bitcode.
BUG=None
R=stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1484003003 .
Karl Schimpf [Mon, 30 Nov 2015 19:19:16 +0000 (11:19 -0800)]
Fix nits from previous CLs.
Fixes nits found in landed CL's
https://codereview.chromium.org/
1456783003,
https://codereview.chromium.org/
1452293003, and
https://codereview.chromium.org/
1460523005
BUG=None
R=stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1484023002 .
Jim Stichnoth [Fri, 27 Nov 2015 22:22:02 +0000 (14:22 -0800)]
Subzero: Add newlines for bundle lock/unlock textual asm.
BUG= none
R=sehr@chromium.org
Review URL: https://codereview.chromium.org/
1479873002 .
David Sehr [Thu, 26 Nov 2015 21:03:50 +0000 (13:03 -0800)]
1) Move helper creation to separate method, which also computes the maximum outgoing argument size. The computed size is checked against call lowering's size.
2) Make addProlog use the outgoing argument size and remove the adjustments in lowerCall.
3) Remove AdjustStack instructions and friends.
BUG=
R=jpp@chromium.org, stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1472623002 .
Jim Stichnoth [Wed, 25 Nov 2015 23:19:21 +0000 (15:19 -0800)]
Subzero: Add "szbuild_spec2k.py --run" option.
This makes it easier to do bisection debugging.
Note that this could be used to simplify "make -f Makefile.standalone check-spec", but I chose not to do that because shellcmd() buffers all of the stdout until completion, which is not a great user experience (at least for this user).
BUG= none
R=sehr@chromium.org
Review URL: https://codereview.chromium.org/
1472833006 .
John Porto [Tue, 24 Nov 2015 20:30:01 +0000 (12:30 -0800)]
Subzero. ARM32. Strength reduce multiplications.
BUG= https://code.google.com/p/nativeclient/issues/detail?id=4076
R=stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1469113003 .
John Porto [Mon, 23 Nov 2015 19:43:13 +0000 (11:43 -0800)]
Subzero. ARM32. Combine allocas.
BUG= https://code.google.com/p/nativeclient/issues/detail?id=4076
R=stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1465213002 .
Jim Stichnoth [Sun, 22 Nov 2015 14:06:34 +0000 (06:06 -0800)]
Subzero: Add a makefile config for building with g++.
This way, the g++ build for the "make presubmit" target gets a separate build directory, and gets to use ccache.
Also, get rid of the "git diff" test, because uncommitted changes are already checked by "git cl upload" and "git cl land".
BUG= none
R=jpp@chromium.org
Review URL: https://codereview.chromium.org/
1468823002 .
David Sehr [Sat, 21 Nov 2015 05:09:31 +0000 (21:09 -0800)]
Compute the size of the stack space required to send the parameters to a call.
BUG=
R=jpp@chromium.org
Review URL: https://codereview.chromium.org/
1458713002 .
Karl Schimpf [Fri, 20 Nov 2015 22:42:33 +0000 (14:42 -0800)]
Add recognizing register-shifted forms in ARM assembler.
Extends the ARM integrated assembler to understand register-shifted
data processing instructions (add, sub, etc.), as well as cmp/test
instructions.
BUG= https://bugs.chromium.org/p/nativeclient/issues/detail?id=4334
R=jpp@chromium.org
Review URL: https://codereview.chromium.org/
1459673003 .
Karl Schimpf [Fri, 20 Nov 2015 22:26:12 +0000 (14:26 -0800)]
Add MVN (register, immediate) to ARM integrated assembler.
Also removes redundant rule checks in emitType01().
BUG= https://bugs.chromium.org/p/nativeclient/issues/detail?id=4334
R=jpp@chromium.org
Review URL: https://codereview.chromium.org/
1460523005 .
John Porto [Fri, 20 Nov 2015 22:17:23 +0000 (14:17 -0800)]
Subzero. ARM32. No more SP frobbing.
Pre-computes the max stack size outgoing arguments, and pre-allocates
it during prolog, deallocating during epilog.
With this CL, there are no more StackAdjustments needed for the ARM32,
which will simplify rematerializing alloca'd variables.
BUG= https://code.google.com/p/nativeclient/issues/detail?id=4076
R=sehr@chromium.org
Review URL: https://codereview.chromium.org/
1467473003 .
John Porto [Fri, 20 Nov 2015 21:50:36 +0000 (13:50 -0800)]
Subzero. Adds a pass for target-specific helper call generation.
This pass gives Targets the ability to pre-lower high-level
instructions that will later be lowered to a target-specific helper,
e.g., 64-bit division on targets that can't natively handle them.
This is a pre-requirement for correct outargs pre-allocation during
function prolog.
R=sehr@chromium.org
Review URL: https://codereview.chromium.org/
1455033005 .
David Sehr [Fri, 20 Nov 2015 05:47:15 +0000 (21:47 -0800)]
Fix race condition in jump table list creation
BUG=
R=stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1460003003 .
Karl Schimpf [Thu, 19 Nov 2015 16:10:44 +0000 (08:10 -0800)]
Add LSL (register, immediate) to ARM integrated assembler.
Also does some clean up on emitType01 methods (making optional argument
explicit, and moving rule checks to the lowest level).
BUG= https://bugs.chromium.org/p/nativeclient/issues/detail?id=4334
R=jpp@chromium.org
Review URL: https://codereview.chromium.org/
1456783003 .
John Porto [Thu, 19 Nov 2015 13:42:59 +0000 (05:42 -0800)]
Subzero. ARM32. Removes memory legalization warts.
This CL removes two warts from the ARM32 backend:
1) during argument lowering, if a stack parameter is assigned a
register, the backend creates a new Variable that references the stack
location with the incoming argument, and _mov() it to the parameter.
2) During stack slot legalization, all _mov(Mem(), Reg) are converted to
stores; and all _mov(Reg, Mem()) are converted to loads.
BUG= https://code.google.com/p/nativeclient/issues/detail?id=4076
R=kschimpf@google.com
Review URL: https://codereview.chromium.org/
1457683004 .
Karl Schimpf [Wed, 18 Nov 2015 16:19:26 +0000 (08:19 -0800)]
Add BL (immediate) and BLX (register) to ARM assembler.
Adds BL and BLX to ARM integrated assembler.
BUG= https://bugs.chromium.org/p/nativeclient/issues/detail?id=4334
R=jpp@chromium.org
Review URL: https://codereview.chromium.org/
1452293003 .
Jim Stichnoth [Wed, 18 Nov 2015 14:25:46 +0000 (06:25 -0800)]
Make more visible with doxygen.
To see the main effect of this, look at the doxygen for file
IceGlobalContext.h to see the effect of turning this on.
Without it, the nested classes are not available because they
are private.
My guess is that often doxygen is used to generate API documents and for that reason, exporting of private info is excluded by default.
BUG=
R=stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1411123019 .
John Porto [Tue, 17 Nov 2015 22:31:25 +0000 (14:31 -0800)]
Subzero. ARM32. Introduces the ShAmtImm Operand.
Creates a special OperandARM32 for representing imm5 used when
performing a shift operation.
BUG= https://code.google.com/p/nativeclient/issues/detail?id=4076
R=kschimpf@google.com
Review URL: https://codereview.chromium.org/
1449263003 .
Karl Schimpf [Tue, 17 Nov 2015 22:02:02 +0000 (14:02 -0800)]
Add LDR/LDRB (register) to ARM integrated assembler.
BUG= https://bugs.chromium.org/p/nativeclient/issues/detail?id=4334
R=stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1458523002 .
Jim Stichnoth [Tue, 17 Nov 2015 14:14:05 +0000 (06:14 -0800)]
Subzero: Improve the "make check-presubmit" target.
1. Include a test build (but no link) using g++, to identify errors and warnings before they hit the Windows bots.
2. Move "git diff --quiet" to the end so that the presubmit tests can easily be run before committing locally, if desired.
3. Add "make presubmit" as an alias for "make check-presubmit".
4. Document the individual steps.
BUG= none
R=jpp@chromium.org
Review URL: https://codereview.chromium.org/
1453713002 .
John Porto [Tue, 17 Nov 2015 12:58:36 +0000 (04:58 -0800)]
Subzero. ARM32. Improve constant lowering.
BUG= https://code.google.com/p/nativeclient/issues/detail?id=4076
R=stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1438773004 .
Jim Stichnoth [Tue, 17 Nov 2015 05:40:20 +0000 (21:40 -0800)]
Subzero: Fix build warnings/errors under g++.
BUG= none
TEST= make -j32 -f Makefile.standalone CXX=g++ LLVM_EXTRA_WARNINGS="-Wno-unknown-pragmas -Wno-unused-parameter -Wno-comment -Wno-enum-compare -Wno-strict-aliasing" STDLIB_FLAGS=
(this command will compile but fail to link)
R=jpp@chromium.org
Review URL: https://codereview.chromium.org/
1452993002 .
Jim Stichnoth [Tue, 17 Nov 2015 01:17:48 +0000 (17:17 -0800)]
Subzero: Fix a performance regression in the register allocator.
The register allocator does not need to be considering rematerializable variables at all. When it does, there tends to be a big performance cost because the live range of a rematerializable variable tends to be large, leading to lots of expensive overlap computations against register allocation candidates.
BUG= none
R=jpp@chromium.org, sehr@chromium.org
Review URL: https://codereview.chromium.org/
1450233002 .
David Sehr [Tue, 17 Nov 2015 01:00:38 +0000 (17:00 -0800)]
Reserve space for scalar FP returns in the stack frame
Rather than bumping the stack pointer around the scalar return sequence in
_fld, ensure the prolog allocates enough space.
BUG=
R=stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1442753008 .
David Sehr [Tue, 17 Nov 2015 00:51:39 +0000 (16:51 -0800)]
Merge fixed alloca stack adjustments into the prolog
Also removes reliance on lowerAlloca entirely for the fixed allocations.
BUG=
R=jpp@chromium.org, stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1435363002 .
Jim Stichnoth [Mon, 16 Nov 2015 23:59:39 +0000 (15:59 -0800)]
Subzero: Do some cleanup on the regalloc code.
No functional changes, as measured by identical spec2k asm output.
1. Use early "return" and "continue" to reduce "if" nesting.
2. Reflow comments to 80 columns (instead of presumably 79).
3. Add some BuildDefs::dump() tests to reduce translator code size.
BUG= none
R=kschimpf@google.com
Review URL: https://codereview.chromium.org/
1448773002 .
Jim Stichnoth [Mon, 16 Nov 2015 20:47:57 +0000 (12:47 -0800)]
Subzero: Add a "make check-presubmit" target.
BUG= none
R=jpp@chromium.org
Review URL: https://codereview.chromium.org/
1452553002 .
Karl Schimpf [Mon, 16 Nov 2015 20:38:12 +0000 (12:38 -0800)]
Fix translation of instruction "move" in ARM integrated assembler.
Fixes case where the ARM integrated assembler for class InstARM32Mov
did not revert to using the stand-alone assembler (method emit) to
generate the corresponding assembly instructions(s).
This fixes last known problem with method emitIAS (other than
reverting to the stand-alone assembler if not implemented). Removes
use of workaround flag "-unsafe-ias".
BUG= https://bugs.chromium.org/p/nativeclient/issues/detail?id=4334
R=stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1448783004 .
David Sehr [Sat, 14 Nov 2015 00:59:02 +0000 (16:59 -0800)]
Fix MINIMAL=1 build
Lots of definitions of Target outside of asserts.
BUG=
Review URL: https://codereview.chromium.org/
1448673002 .
David Sehr [Sat, 14 Nov 2015 00:32:37 +0000 (16:32 -0800)]
Eliminate stack adjustment for float-returning functions
This involves changing AdjustStack to grow/shrink the stack, and to use that
operation exclusively to move the StackAdjustment variable in lowering, rather
than in call emission as before.
BUG=
R=stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1449523002 .
Jim Stichnoth [Fri, 13 Nov 2015 22:28:23 +0000 (14:28 -0800)]
Subzero: Find rematerializable variables transitively.
There are situations where a variable is assigned as the result of a rematerializable alloca instruction, and then another variable is assigned as essentially a known-offset interior pointer into the alloca space. In this case, the secondary variable is also rematerializable.
We add a pass, after alloca analysis, to find these derived variables and mark them transitively as rematerializable. Because we lack use-def chains (or in fact any map to variable use locations), we need to iterate over the CFG until convergence. Fortunately, this is pretty cheap, and not even done unless the alloca analysis seeds it with an initial set of rematerializable variables.
This analysis is only really needed for arithmetic instructions, but we also need to apply it to assignments and pointer-type bitcasts that are added when the IceConverter directly parses a .ll file rather than a .pexe file.
BUG= none
R=jpp@chromium.org, sehr@chromium.org
Review URL: https://codereview.chromium.org/
1441793002 .
Jim Stichnoth [Fri, 13 Nov 2015 22:20:40 +0000 (14:20 -0800)]
Subzero: Use "pxor reg,reg" to load a floating-point scalar 0.0 value.
BUG= none
R=jpp@chromium.org, sehr@chromium.org
Review URL: https://codereview.chromium.org/
1439363002 .
David Sehr [Thu, 12 Nov 2015 22:41:22 +0000 (14:41 -0800)]
Add a getTarget method that returns the x86 target lowering
Remove a bit of complex repeated template naming.
BUG=
R=jpp@chromium.org, stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1438933002 .
Jim Stichnoth [Thu, 12 Nov 2015 18:26:34 +0000 (10:26 -0800)]
Subzero: Fix a crash in mem operand dumping.
getOffset() was being dereferenced even when it was nullptr.
BUG= none
R=kschimpf@google.com
Review URL: https://codereview.chromium.org/
1435283003 .
Jim Stichnoth [Thu, 12 Nov 2015 18:25:21 +0000 (10:25 -0800)]
Subzero: Add "--verbose=status" option.
This just prints the function being translated, once per function. This is useful if there is a crash or fatal error somewhere, and you want to quickly discover which function to set -verbose-focus on.
Also, fixes some warnings/errors in the MINIMAL build.
BUG= none
R=kschimpf@google.com
Review URL: https://codereview.chromium.org/
1439983002 .
Karl Schimpf [Thu, 12 Nov 2015 18:12:14 +0000 (10:12 -0800)]
Fix push/pop emit methods for ARM assembler.
These two methods introduce multiple instructions. Between each
instruction a newline must be inserted, and a call to startNextInt().
This CL makes sure both cases are met.
BUG=None
R=stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1441023002 .
Karl Schimpf [Wed, 11 Nov 2015 23:42:55 +0000 (15:42 -0800)]
Implement UXTB and UXTH in the ARM integerated assembler.
BUG= https://bugs.chromium.org/p/nativeclient/issues/detail?id=4334
R=stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1432413003 .
Karl Schimpf [Wed, 11 Nov 2015 23:37:50 +0000 (15:37 -0800)]
Fix frame pointer loads/stores in the ARM integrated assembler.
This CL passes in context from the ARM target lowering, so that
it can figure out what register (SP or FP) and offset to use
when loading/storing variables.
BUG= https://bugs.chromium.org/p/nativeclient/issues/detail?id=4334
R=stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1414043015 .
David Sehr [Wed, 11 Nov 2015 23:01:55 +0000 (15:01 -0800)]
Combine allocas
Partition allocas that occur in the entry block into two categories. The first is those whose size is fixed and alignment are less than or equal to the stack alignment. These are emitted relative to a pointer, either in increasing offset relative to the stack pointer or decreasing offset relative to the frame pointer. (Actually, we are not enabling this optimization for frame pointer frames yet) The second category is allocas whose size is dynamic or alignment is creater than the stack alignment. These are emitted relative to a user variable in increasing offset order. This optimization is only enabled for x86 at O2.
BUG=
R=stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1411583007 .
Karl Schimpf [Wed, 11 Nov 2015 22:47:49 +0000 (14:47 -0800)]
Handle another form of MOVW in ARM integrated assembler.
Extends assembler movw method to handle integer constants in addition
to relocatable constants, since (32-bit) integer constants are
frequently used in movw instructions.
BUG= https://bugs.chromium.org/p/nativeclient/issues/detail?id=4334
R=stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1440693002 .
John Porto [Wed, 11 Nov 2015 22:26:57 +0000 (14:26 -0800)]
Subzero. ARM32. New bool folding.
Improves the bool folding logic so that branches are short circuited.
BUG= https://code.google.com/p/nativeclient/issues/detail?id=4076
R=stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1417393003 .
Karl Schimpf [Wed, 11 Nov 2015 21:34:46 +0000 (13:34 -0800)]
Fix line spacing for push instructions in ARM assembly.
Removes blank line after push instructions.
BUG=None
R=stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1439683002 .
David Sehr [Wed, 11 Nov 2015 18:56:58 +0000 (10:56 -0800)]
Improve bool folding
Fold and/or followed by branch to eliminate cmp. Also, fold fcmp instructions into branches similarly to what was done for icmp instructions.
BUG=
R=jpp@chromium.org, stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1436623002 .
Jim Stichnoth [Tue, 10 Nov 2015 22:39:51 +0000 (14:39 -0800)]
Subzero: For filetype=asm, don't print a blank line for pseudo instrs.
Originally, for each non-deleted instruction, CfgNode::emit() would call the virtual Inst::emit() and then print a newline (also printing end-of-live-range info as necessary). This resulted in clumsy blank lines in the asm output, corresponding to non target specific pseudo instructions such as FakeDef, FakeUse, FakeKill.
We change this so that CfgNode::emit() only prints a newline for an InstTarget subclass, or if any end-of-live-range text was printed.
If a high-level instruction still wants to emit something in a comment, it's responsible for printing its own newline.
BUG= none
TEST= ./pydir/szbuild_spec2k.py -O2 --force -v --filetype=asm --sz=--asm-verbose=0
TEST= ./pydir/szbuild_spec2k.py -O2 --force -v --filetype=asm --sz=--asm-verbose=1
TEST= ./pydir/szbuild_spec2k.py -O2 --force -v --filetype=asm --target=arm32
R=kschimpf@google.com
Review URL: https://codereview.chromium.org/
1431353003 .
Karl Schimpf [Tue, 10 Nov 2015 22:12:35 +0000 (14:12 -0800)]
Add POP instruction to ARM integrated assembler.
BUG= https://bugs.chromium.org/p/nativeclient/issues/detail?id=4334
R=jpp@chromium.org, stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1433743002 .
Jim Stichnoth [Tue, 10 Nov 2015 16:41:12 +0000 (08:41 -0800)]
Subzero: Add "szbuild.py --no-sz" arg for suppressing the pnacl-sz run.
This enables the following workflow:
1. Run "szbuild.py --filetype=asm ..." to generate a .s file.
2. Edit the .s file to mock up a Subzero change.
3. Run "szbuild.py --filetype=asm --no-sz ..." to restart the build post pnacl-sz.
This workflow is good for trying out localized changes to hot basic blocks, though it isn't really appropriate for global optimizations like register allocation.
BUG= none
R=kschimpf@google.com
Review URL: https://codereview.chromium.org/
1417003005 .
Reed Kotler [Tue, 10 Nov 2015 00:52:56 +0000 (16:52 -0800)]
Do some small cleanup in IceTLS.h and add some markup for doxygen to it.
BUG=
R=jpp@chromium.org, stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1430273004 .
Patch from Reed Kotler <rkotlerimgtec@gmail.com>.
John Porto [Mon, 9 Nov 2015 22:52:40 +0000 (14:52 -0800)]
Subzero. ARM32. Address mode formation.
BUG= https://code.google.com/p/nativeclient/issues/detail?id=4076
R=kschimpf@google.com, stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1422753010 .
Karl Schimpf [Mon, 9 Nov 2015 20:16:20 +0000 (12:16 -0800)]
Add UMULL to ARM integrated assembler.
Also formatted IceCfg.cpp, since it needed it.
BUG= https://bugs.chromium.org/p/nativeclient/issues/detail?id=4334
R=stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1422253003 .
Karl Schimpf [Mon, 9 Nov 2015 20:09:58 +0000 (12:09 -0800)]
Fixes LDR and STR instructions. Two types of mistakes were being made.
First, the width was not being correctly defined for non-vector
instructions.
Second, the order of the width/condition was incorrect when the
instruction was prefixed with a V. That is, for V prefixed instructions,
the order is predicate/width while for non-V prefixed instructions the
order is width/predicate.
Also fixes bug in target lowering that did not always convert results
of a compare to i1.
BUG= https://bugs.chromium.org/p/nativeclient/issues/detail?id=4334
R=stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1415953007 .
Jim Stichnoth [Mon, 9 Nov 2015 19:38:40 +0000 (11:38 -0800)]
Subzero: Refactor x86 register representation to actively use aliases.
Sets up additional register attributes, plus the notion of register classes, to enable robust usage of the high 8-bit GPRs (ah/bh/ch/dh), for both x86-32 and x86-64. (Note that the x86-64 changes are currently untested.)
We add a Register Class field to the Variable class. The default register class is a value corresponding to the variable's type, but the target can extend the set of register class values, and the target lowering can assign different register classes as needed. The register allocator uses the register class instead of the type to determine the set of registers to draw from.
For x86-64, the high 8-bit registers are not included in the general register allocation pool, but there are explicit references to ah for lowering the div/rem instructions.
The target lowering is modified as needed to make sure types are appropriate and register use in instructions is legalized.
Some other fixes and cleanups are included in this CL:
* Makefile.standalone changes. Source files are reordered so that the more expensive compiles are done earlier, speeding up parallel builds by decreasing fragmentation. A dependency error is fixed for check-spec.
* A bug is fixed in advanced phi lowering. When a temporary is introduced to break a cycle, we were neglecting to updated the predecessor count for one of the operands, leading to an assertion failure. (Applying that fix to master resulted in no changes to spec2k code generation.) A consistency check is added to help find future problems like this. Also, refactored iteration over the Phi descriptor array to use range-based for loops and avoid directly indexing the array.
* Removed most of the "IceType_" prefixes in x-macro tables for brevity.
* Fix a correctness TODO in the register allocator. This had no effect on spec2k code generation in master or in this CL, so we were probably just lucky.
* Made some much-needed s/Dest->getType()/Ty/ changes for brevity, in the target lowering sections that needed other changes.
BUG= https://bugs.chromium.org/p/nativeclient/issues/detail?id=4095
R=jpp@chromium.org
Review URL: https://codereview.chromium.org/
1427973003 .
Jim Stichnoth [Mon, 9 Nov 2015 19:19:11 +0000 (11:19 -0800)]
Subzero: Fix a bug in advanced phi lowering.
When a temporary is introduced to break a cycle, we neglected to update the predecessor count for one of the operands, leading to a possible assertion failure.
This problem isn't currently seen in master, but it arises when we enable register aliases, as in https://codereview.chromium.org/
1427973003/ . No changes are seen in spec2k code generation as a result of this fix.
A consistency check is added to help find future problems like this.
Also, refactored iteration over the Phi descriptor array to use range-based for loops and avoid directly indexing the array.
BUG= none
R=jpp@chromium.org
Review URL: https://codereview.chromium.org/
1435543002 .
Jim Stichnoth [Mon, 9 Nov 2015 18:46:14 +0000 (10:46 -0800)]
Subzero: Recognize single-block loops during loop depth analysis.
BUG= none
R=jpp@chromium.org
Review URL: https://codereview.chromium.org/
1416113007 .
David Sehr [Fri, 6 Nov 2015 19:25:41 +0000 (11:25 -0800)]
Sort allocas, compute frame pointer in Cfg pass
Split allocas in the entry block into two categories. The first has alignment <= stack alignment and constant size. The second violates one or both of those conditions. Sort both of these lists in descending alignment order and emit. Also, compute the need for a frame pointer during the pass.
BUG=
R=jpp@chromium.org, stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1414343010 .
Karl Schimpf [Fri, 6 Nov 2015 17:14:10 +0000 (09:14 -0800)]
Add the PUSH instruction to ARM integrated assembler.
BUG= https://bugs.chromium.org/p/nativeclient/issues/detail?id=4334
R=stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1412963008 .
Karl Schimpf [Fri, 6 Nov 2015 16:52:42 +0000 (08:52 -0800)]
Fix textual emission of label instructions in ARM assembler.
The integrated ARM assembler was incorrectly assuming that an
(instruction) label defines a corresponding assembler instruction.
Therefore, placement into the buffer was incorrect.
This CL fixes this mistake. This fixes assembler translator problems
with ARM branch, movw, and movt instructions.
BUG= https://bugs.chromium.org/p/nativeclient/issues/detail?id=4334
R=stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1430973003 .
Reed Kotler [Fri, 6 Nov 2015 01:07:19 +0000 (17:07 -0800)]
Lower a few basic MIPS binops for i{8,16,32,64}.
This is basically the same patch as for ARM issue
1127003003
https://codereview.chromium.org/
1127003003
BUG= https://code.google.com/p/nativeclient/issues/detail?id=4167
R=stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1414383004 .
Patch from Reed Kotler <rkotlerimgtec@gmail.com>.
Karl Schimpf [Thu, 5 Nov 2015 16:27:51 +0000 (08:27 -0800)]
Add MLA instruction to ARM integerated assembler.
BUG= https://bugs.chromium.org/p/nativeclient/issues/detail?id=4334
R=stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1429073005 .
Karl Schimpf [Thu, 5 Nov 2015 16:18:26 +0000 (08:18 -0800)]
Fix ARM emit() methods to count instructions generated.
Previously, the code assumed that the emit() method of all ARM
instructions emitted a single instruction. This is false. Instructions
like PUSH and POP may generate multiple instructions.
This is only a problem when the hybrid ARM assembler reverts back to
using the stand-alone assembler to generate instructions the
integrated assembler can't handle.
The fix is to add infrastructure to allow ARM instructions to
communicate to the assembler, the number of instructions they
generate, so that the correct-sized filler is added to the assembly
buffer.
This fixes all cross-test failures for (pc-relative) branches, except
one.
BUG= https://bugs.chromium.org/p/nativeclient/issues/detail?id=4334
R=stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1426513004 .
Jim Stichnoth [Thu, 5 Nov 2015 00:06:16 +0000 (16:06 -0800)]
Subzero: Refactor some common TargetLowering initializations.
Each TargetLowering subclass has several fields (generally register allocation related) that are initialized to the same values every time a TargetLowering object is created. These fields are essentially const once initialized, so there is no reason to repeatedly initialize them.
The solution is to make them static fields, and statically initialize them at program startup.
This also makes it practical to access such fields without needing a TargetLowering object.
There are likely more items that should also get this treatment, but those can be changed later.
The staticInit() method needs a run-once guard because the unit tests actually cause it to be called more than once.
BUG= none
R=kschimpf@google.com
Review URL: https://codereview.chromium.org/
1418853005 .
Karl Schimpf [Wed, 4 Nov 2015 22:54:52 +0000 (14:54 -0800)]
Add TST(register, immediate) to ARM32 integrated assembler.
Also cleans up instructions that use emitType01 to share more common
code.
BUG= https://bugs.chromium.org/p/nativeclient/issues/detail?id=4334
R=stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1413473005 .
David Sehr [Wed, 4 Nov 2015 22:46:29 +0000 (14:46 -0800)]
Match index adds as well as base
BUG=
R=stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1421603003 .
John Porto [Wed, 4 Nov 2015 17:32:55 +0000 (09:32 -0800)]
Subzero. ARM32. Implements bool folding.
BUG= https://code.google.com/p/nativeclient/issues/detail?id=4076
R=stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1414883007 .
Karl Schimpf [Wed, 4 Nov 2015 16:10:43 +0000 (08:10 -0800)]
Fix base register for stack variables in ARM integrated assembler.
When translating an Variable without a register, the code assumes the
variable is on the stack using sp. This is still true. However, if it
is a (derived class) StackVariable, the register defined by
getBaseRegNum() should be used instead.
BUG= https://code.google.com/p/nativeclient/issues/detail?id=4334
R=jpp@chromium.org, stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1432453003 .
Karl Schimpf [Wed, 4 Nov 2015 16:02:07 +0000 (08:02 -0800)]
Add workaround to allow testing of ARM integrated assembler.
It turns out that there are several instruction in the ARM integrated
assembler that do not get translated correctly. This results in the
spec2k tests not being compilable.
To workaround this problem, this CL adds a (temporary) flag that allows all translations to be applied by the integrated assembler. When this flag is false (the default) only correctly working translations to be applied by the integrated assembler. This allows lit tests to still be applied to the correct portions of broken translations.
This CL also fixes a bug with local (instruction) labels that did not
generate a corresponding label to the -filetype=iasm assembly file.
BUG= https://code.google.com/p/nativeclient/issues/detail?id=4334
R=stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1424923005 .
Karl Schimpf [Mon, 2 Nov 2015 23:01:56 +0000 (15:01 -0800)]
Add BIC(register) and BIC(immediate) to ARM integrated assembler.
BUG= https://code.google.com/p/nativeclient/issues/detail?id=4334
R=jpp@chromium.org, stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1415943009 .
Jim Stichnoth [Mon, 2 Nov 2015 16:25:57 +0000 (08:25 -0800)]
Subzero: Add a "make check-spec" target.
"make -f Makefile.standalone check-spec" will translate and run all the spec2k components for a given target.
The advantages are that this can be done all within the subzero directory, and the spec components can be run in parallel via "make -j" (particularly helpful for arm32/qemu).
Default target is x8632, and arm32 is also available.
Example:
make -j32 -f Makefile.standalone check-spec TARGET=arm32 SPEC="-O2 --filetype=iasm"
Also removes unnecessary tab characters from the makefile, fixes >80-column lines, and gives more consistent indentation.
BUG= none
R=jpp@chromium.org
Review URL: https://codereview.chromium.org/
1413033009 .
Jim Stichnoth [Sat, 31 Oct 2015 19:55:27 +0000 (12:55 -0700)]
Subzero: Force ebp-based frame when an alloca has a large alignment.
If the alloca alignment exceeds the known ABI stack alignment, the lowering sequence adds an "and esp, xxx" instruction. In this case, the esp adjustment is no longer statically known, so we must force an ebp-based frame.
BUG= none
R=sehr@google.com
Review URL: https://codereview.chromium.org/
1426933003 .
Karl Schimpf [Fri, 30 Oct 2015 22:26:32 +0000 (15:26 -0700)]
Add MOV (register) to ARM integrated assembler.
BUG= https://code.google.com/p/nativeclient/issues/detail?id=4334
R=stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1403403009 .
Karl Schimpf [Fri, 30 Oct 2015 22:09:18 +0000 (15:09 -0700)]
Fix more movw/movt ARM integrated assembler tests.
BUG=None
R=stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1425243002 .
Karl Schimpf [Fri, 30 Oct 2015 22:06:35 +0000 (15:06 -0700)]
Add CMP(register) and CMP(Immediate) to ARM integerated assembler.
Also cleans up comments on rotated immediate 8 constants.
BUG= https://code.google.com/p/nativeclient/issues/detail?id=4334
R=stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1414483008 .
Karl Schimpf [Fri, 30 Oct 2015 22:00:24 +0000 (15:00 -0700)]
Add UDIV to ARM integrated assembler.
BUG= https://code.google.com/p/nativeclient/issues/detail?id=4334
R=stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1427023004 .
Jim Stichnoth [Fri, 30 Oct 2015 21:41:43 +0000 (14:41 -0700)]
Subzero: Add a missing absolute path to llvm-mc command.
Somehow missed this in https://codereview.chromium.org/
1419173006 .
BUG= none
R=kschimpf@google.com
Review URL: https://codereview.chromium.org/
1410813004 .
Karl Schimpf [Fri, 30 Oct 2015 20:21:59 +0000 (13:21 -0700)]
Add SDIV to ARM integrated assembler.
Also clean up some comments on where code was moved from in Dart
sourced.
BUG= https://code.google.com/p/nativeclient/issues/detail?id=4334
R=stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1429003002 .
Karl Schimpf [Fri, 30 Oct 2015 20:19:17 +0000 (13:19 -0700)]
Don't allow hybrid assembler unless filetype=iasm.
BUG=None
R=stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1424353003 .
Jim Stichnoth [Fri, 30 Oct 2015 19:02:44 +0000 (12:02 -0700)]
Subzero: Use explicit paths to PNaCl tools invoked in szbuild.py.
This makes it easier to copy the commands and run them manually.
BUG= none
R=kschimpf@google.com
Review URL: https://codereview.chromium.org/
1419173006 .
Karl Schimpf [Fri, 30 Oct 2015 15:06:44 +0000 (08:06 -0700)]
Add EOR(register) and EOR(immediate) to ARM integrated assembler.
Also factor out code to process arguments for data operations into
new method Arm32::Assembler32::emitType01().
BUG= https://code.google.com/p/nativeclient/issues/detail?id=4334
R=stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1406153011 .
Karl Schimpf [Fri, 30 Oct 2015 14:42:00 +0000 (07:42 -0700)]
Add orr (register) and orr (immediate) to ARM integrated assembler.
Also cleans up comments about handling a rotated imm8 value.
BUG= https://code.google.com/p/nativeclient/issues/detail?id=4334
R=stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1412923006 .
Karl Schimpf [Fri, 30 Oct 2015 14:30:14 +0000 (07:30 -0700)]
Add new form of ldr/str (immediate) to ARM integrated assembler.
BUG= https://code.google.com/p/nativeclient/issues/detail?id=4334
R=stichnot@chromium.org
Review URL: https://codereview.chromium.org/
1431453002 .