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Ken Wang [Tue, 19 Jan 2016 06:03:24 +0000 (14:03 +0800)]
drm/amdgpu: add display controller implementation for si v10
v4: rebase fixups
v5: more fixes based on dce8 code
v6: squash in dmif offset fix
v7: rebase fixups
v8: rebase fixups, drop some debugging remnants
v9: fix BE build
v10: include Marek's tiling fixes, add support for
page_flip_target, set MASTER_UDPATE_MODE=0,
fix cursor
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Ken Wang <Qingqing.Wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Ken Wang [Tue, 19 Jan 2016 06:02:14 +0000 (14:02 +0800)]
drm/amdgpu: add interupt handler implementation for si v3
v3: rebase fixups
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Ken Wang <Qingqing.Wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Ken Wang [Tue, 19 Jan 2016 06:01:19 +0000 (14:01 +0800)]
drm/amdgpu: add graphic memory controller implementation for si v7
v4: rebase fixups
v5: rebase fixups
v5: rebase fixups
v6: rebase fixups for gart size changes
v7: add gmc v6 firmware versions for sysfs dump
Signed-off-by: Ken Wang <Qingqing.Wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Ken Wang [Tue, 19 Jan 2016 05:53:10 +0000 (13:53 +0800)]
drm/amdgpu: add si header files v4
v4: drop unused DCE6 macro
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Ken Wang <Qingqing.Wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Ken Wang [Thu, 21 Jan 2016 09:00:06 +0000 (17:00 +0800)]
drm/amdgpu: add SI asics types v2
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Ken Wang <Qingqing.Wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Monk Liu [Fri, 26 Aug 2016 06:12:37 +0000 (14:12 +0800)]
drm/amdgpu:add switch buffer to end of CS (v2)
sync switch buffer scheme with windows kmd for gfx v8,
step1: append a switch_buffer to the end of CS
v2:rebase on latest staging
Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tom St Denis [Mon, 29 Aug 2016 12:39:29 +0000 (08:39 -0400)]
drm/amd/amdgpu: debugfs SMC addresses are byte addresses
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Jordan Lazare [Fri, 26 Aug 2016 21:10:28 +0000 (17:10 -0400)]
drm/amd/powerplay: Remove unused variable causing compile warning
If treating warnings as errors this causes a build error
Signed-off-by: Jordan Lazare <Jordan.Lazare@amd.com>
Reviewed-by: Alex Deucher <Alexander.Deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tom St Denis [Fri, 26 Aug 2016 16:44:01 +0000 (12:44 -0400)]
drm/amd/powerplay: Only load SDMA0/MEC firmware once on Stoney (v2)
Only load the SDMA0/MEC1 firmware once in the Carrizo SMU manager
driver.
(v2) Avoid loading SDMA0 twice too.
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tom St Denis [Fri, 26 Aug 2016 16:43:14 +0000 (12:43 -0400)]
drm/amd/powerplay: Fix up return codes in cz SMU manager
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tom St Denis [Fri, 26 Aug 2016 16:42:36 +0000 (12:42 -0400)]
drm/amd/powerplay: Tidy up cz SMU manager
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tom St Denis [Fri, 26 Aug 2016 14:29:19 +0000 (10:29 -0400)]
drm/amd/powerplay: Fix CZ SMU firmware load check (v4)
Remove an errant return in the middle of the check
function as well as check for success in the start
function.
(v2) Add return check to smu_load_fw()
(v3) Don't return early if SMU load check fails
(v4) No returns! :-)
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Marek Olšák [Wed, 17 Aug 2016 21:49:27 +0000 (23:49 +0200)]
drm/amdgpu: throttle buffer migrations at CS using a fixed MBps limit (v2)
The old mechanism used a per-submission limit that didn't take previous
submissions within the same time frame into account. It also filled VRAM
slowly when VRAM usage dropped due to a big eviction or buffer deallocation.
This new method establishes a configurable MBps limit that is obeyed when
VRAM usage is very high. When VRAM usage is not very high, it gives
the driver the freedom to fill it quickly. The result is more consistent
performance.
It can't keep the BO move rate low if lots of evictions are happening due
to VRAM fragmentation, or if a big buffer is being migrated.
The amdgpu.moverate parameter can be used to set a non-default limit.
Measurements can be done to find out which amdgpu.moverate setting gives
the best results.
Mainly APUs and cards with small VRAM will benefit from this. For F1 2015,
anything with 2 GB VRAM or less will benefit.
Some benchmark results - F1 2015 (Tonga 2GB):
Limit MinFPS AvgFPS
Old code: 14 32.6
128 MB/s: 28 41
64 MB/s: 15.5 43
32 MB/s: 28.7 43.4
8 MB/s: 27.8 44.4
8 MB/s: 21.9 42.8 (different run)
Random drops in Min FPS can still occur (due to fragmented VRAM?), but
the average FPS is much better. 8 MB/s is probably a good limit for this
game & the current VRAM management. The random FPS drops are still to be
tackled.
v2: use a spinlock
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tom St Denis [Thu, 25 Aug 2016 17:02:06 +0000 (13:02 -0400)]
drm/amd/amdgpu: Tidy up cz_dpm.c
Various minor formatting changes.
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tom St Denis [Thu, 25 Aug 2016 16:41:15 +0000 (12:41 -0400)]
drm/amd/amdgpu: Clean up memory leak in cz_dpm_init().
If init fails free up any allocated memory.
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tom St Denis [Thu, 25 Aug 2016 16:16:24 +0000 (12:16 -0400)]
drm/amd/amdgpu: Fix memleak in cz_parse_power_table()
If one of the entries fails to be allocated then free
all of the previous entries before freeing the array which
holds their pointers.
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rex Zhu [Wed, 24 Aug 2016 11:39:06 +0000 (19:39 +0800)]
drm/amdgpu: refine uvd gate logic for CI.
uvd dpm will be controlled by uvd.
dpm just disable uvd dpm in case of suspend when play video.
due to the new logic of uvd_begin_use/end_use,
if disable uvd dpm in late init, will have no chance to
enable uvd dpm after resume until play video again.
Change-Id: I70e3d7efe63edad37f26e6c5ea089da1135c0ab5
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rex Zhu [Mon, 22 Aug 2016 12:47:28 +0000 (20:47 +0800)]
drm/amd/powerplay: simplify struct amd_pp_init.
delete the members not needed when amd_powerplay_init.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rex Zhu [Mon, 22 Aug 2016 12:47:01 +0000 (20:47 +0800)]
drm/amd/powerplay: get system info by cgs interface.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rex Zhu [Mon, 22 Aug 2016 12:48:13 +0000 (20:48 +0800)]
drm/amdgpu: add support for getting sub_device id and
sub_vendor_id in cgs interface.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rex Zhu [Thu, 18 Aug 2016 10:27:14 +0000 (18:27 +0800)]
drm/amdgpu: add vce bypass mode for tonga.
fix issue that encode test failed on the second time when
vce dpm enabled on tonga.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rex Zhu [Thu, 18 Aug 2016 05:02:46 +0000 (13:02 +0800)]
drm/amd/powerplay: add bypass mode for vce 2.0.
fix issue after vce encode, the eclk stay high.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rex Zhu [Thu, 18 Aug 2016 04:37:02 +0000 (12:37 +0800)]
drm/amdgpu: refine function name for consistency
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Wed, 24 Aug 2016 21:15:33 +0000 (17:15 -0400)]
drm/amdgpu/vce3: add support for third vce ring
Not of much use at the moment (we don't really use
the second ring either), but may be useful later.
Reviewed-by: JimQu <Jim.Qu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Wed, 24 Aug 2016 20:56:21 +0000 (16:56 -0400)]
drm/amdgpu: track the number of vce rings
Rather than using a hardcoded value. This allows
different versions to expose more or less rings.
No functional change.
Reviewed-by: JimQu <Jim.Qu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Tue, 23 Aug 2016 17:25:49 +0000 (13:25 -0400)]
drm/amdgpu: rename suspend_kms and resume_kms
The old names were dragged over from radeon. The new ones
better match the naming conventions used in the driver.
No functional change.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Tue, 23 Aug 2016 09:18:59 +0000 (11:18 +0200)]
drm/amdgpu: use memcpy_toio for VCE firmware upload
Try to be clean here, even when it's a noop on x86.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Tue, 23 Aug 2016 09:00:17 +0000 (11:00 +0200)]
drm/amdgpu: use memcpy_to/fromio for UVD fw upload
Also use the firmware size from the header instead of calculating it.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rex Zhu [Mon, 22 Aug 2016 12:49:36 +0000 (20:49 +0800)]
drm/amd/powerplay: delete useless code in iceland_hwmgr.c.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Tue, 23 Aug 2016 14:07:28 +0000 (10:07 -0400)]
drm/radeon: switch UVD code to use UVD_NO_OP for padding
Replace packet2's with packet0 writes to UVD_NO_OP. The
value written to UVD_NO_OP does not matter.
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Tue, 23 Aug 2016 13:12:21 +0000 (09:12 -0400)]
drm/amdgpu: switch UVD code to use UVD_NO_OP for padding
Replace packet2's with packet0 writes to UVD_NO_OP. The
value written to UVD_NO_OP does not matter.
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Mon, 22 Aug 2016 22:03:22 +0000 (18:03 -0400)]
drm/radeon: add support for UVD_NO_OP register
Writes to this register are the preferred way to do NOPs.
Bump the driver version as well.
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Mon, 22 Aug 2016 21:58:14 +0000 (17:58 -0400)]
drm/amdgpu: add support for UVD_NO_OP register
Writes to this register are the preferred way to do NOPs.
Bump the driver version as well.
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Tue, 23 Aug 2016 14:44:16 +0000 (10:44 -0400)]
drm/amdgpu: fix VCE ib alignment value
The VCE rings only require single dword alignment.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Mon, 22 Aug 2016 20:31:36 +0000 (16:31 -0400)]
drm/amdgpu: fix IB alignment for UVD
According to the hw team, it should be 16, not 8.
Cc: Peter Fang <peter.fang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
Tom St Denis [Mon, 22 Aug 2016 14:54:28 +0000 (10:54 -0400)]
drm/amd/amdgpu: Print ring name in amdgpu_ib_schedule()
If the ring isn't ready lets print out which ring name
to help debugging.
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Heinrich Schuchardt [Sun, 21 Aug 2016 20:36:29 +0000 (22:36 +0200)]
drm/radeon: remove dead code, si_mc_load_microcode (v2)
In an if block for (running == 0) running cannot be non-zero.
v2: agd: remove unused variable
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Heinrich Schuchardt [Sun, 21 Aug 2016 19:41:49 +0000 (21:41 +0200)]
drm/radeon/cik: remove dead code (v2)
In an if block for (running == 0) running cannot be non-zero.
v2: agd: remove unused variable
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Heinrich Schuchardt [Sun, 21 Aug 2016 18:27:02 +0000 (20:27 +0200)]
drm/amd/powerplay: avoid NULL dereference, cz_hwmgr.c
if (a == NULL || a->b == NULL)
leads to a NULL pointer dereference if a == NULL.
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Heinrich Schuchardt [Sun, 21 Aug 2016 18:21:27 +0000 (20:21 +0200)]
drm/amd/powerplay: avoid NULL pointer dereference
if (a == NULL || a->b == NULL)
leads to a NULL pointer dereference if a == NULL.
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Heinrich Schuchardt [Sun, 21 Aug 2016 18:10:41 +0000 (20:10 +0200)]
drm/amdgpu/gmc8: remove dead code (v2)
In an if block for (running == 0) running cannot be non-zero.
v2: agd: remove unused variable
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Heinrich Schuchardt [Sun, 21 Aug 2016 18:06:32 +0000 (20:06 +0200)]
drm/amdgpu/gmc7: remove dead code (v2)
In an if block for (running == 0) running cannot be non-zero.
v2: agd: remove unused variable
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alexandre Demers [Mon, 22 Aug 2016 00:38:26 +0000 (20:38 -0400)]
drm/amdgpu: Fix indentation in dce_v8_0_audio_write_sad_regs()
Fixed indentation for readability.
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Signed-off-by: Alexandre Demers <alexandre.f.demers@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alexandre Demers [Mon, 22 Aug 2016 00:38:41 +0000 (20:38 -0400)]
drm/amdgpu: Use correct mask in dce_v8_0_afmt_setmode() and fix comment typos.
We were using the same mask twice. Looking at radeon, it seems
we should be using HDMI_AVI_INFO_CONT instead as the second mask.
Being there, fix typos in comments and improved readability.
I haven't looked at other DCEs, the mask may also be wrong for them.
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alexandre Demers <alexandre.f.demers@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Tue, 16 Aug 2016 12:43:17 +0000 (14:43 +0200)]
drm/amdgpu: cleanup amdgpu_vm_bo_update params
Make it more obvious what we are doing here.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Mon, 15 Aug 2016 12:08:54 +0000 (14:08 +0200)]
drm/amdgpu: stop adding dummy entry in amdgpu_ttm_placement_init
AMDGPU_GEM_CREATE_NO_CPU_ACCESS and AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED are
obviously mutual exclusive. So stop adding a dummy entry without effect when
both are specified.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Mon, 15 Aug 2016 12:06:50 +0000 (14:06 +0200)]
drm/amdgpu: cleanup amdgpu_ttm_placement_init
Make it more clear what this function does. No intendet functional change.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Wed, 17 Aug 2016 11:44:20 +0000 (13:44 +0200)]
drm/amdgpu: fix lru size grouping v2
Adding a BO can make it the insertion point for larger sizes as well.
v2: add a comment about the guard structure.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Felix Kuehling <felix.kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tom St Denis [Thu, 18 Aug 2016 14:25:52 +0000 (10:25 -0400)]
drm/amd/powerplay: Tidy up cz_hwmgr.c
Clean up whitespace and formatting.
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Marek Olšák [Wed, 17 Aug 2016 21:58:58 +0000 (23:58 +0200)]
drm/amdgpu: add AMDGPU_INFO_NUM_EVICTIONS
For profiling.
v2: really bump the minor version
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Chunming Zhou [Thu, 21 Jul 2016 09:20:52 +0000 (17:20 +0800)]
drm/amdgpu: recover vram bo from shadow after gpu reset V2
V2:
1. don't directly submit to many jobs at the same time.
2. delete unrelated printk.
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Chunming Zhou [Wed, 17 Aug 2016 03:41:30 +0000 (11:41 +0800)]
drm/amdgpu: link all shadow bo V2
V2:
1. use mutex instead of spinlock for shadow list, since its process could
sleep.
2. move list_del to bo destroy phase.
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Chunming Zhou [Mon, 15 Aug 2016 03:46:21 +0000 (11:46 +0800)]
drm/amdgpu: update pt shadow while updating pt V2
V2:
move shadow parameter to amdgpu_pte_update_params.
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Cc: minutemaidpark@hotmail.com
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Chunming Zhou [Mon, 15 Aug 2016 03:36:54 +0000 (11:36 +0800)]
drm/amdgpu: update pd shadow while updating pd V2
V2:
Checking if shadow is valid.
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Chunming Zhou [Thu, 4 Aug 2016 08:51:18 +0000 (16:51 +0800)]
drm/amdgpu: sync bo and shadow V3
Use shadow flag to judge which direction to sync.
V2:
Don't need bo pin, so remove it.
V3:
1. Split to two functions, one is backup_to_shadow, another is
restore_from_shadow.
2. Clean up previous shadow direction difinitions.
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Chunming Zhou [Mon, 15 Aug 2016 02:46:04 +0000 (10:46 +0800)]
drm/amdgpu: add direct submision option for copy_buffer
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Chunming Zhou [Fri, 5 Aug 2016 09:30:17 +0000 (17:30 +0800)]
drm/amdgpu: add need backup function V2
V2:
add checking if need backup in amdgpu_bo_create.
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
jimqu [Fri, 19 Aug 2016 01:31:50 +0000 (09:31 +0800)]
drm/amd/amdgpu: S3 resumed failed after 4-5 times loop
Phenomenon: software hang when device resume back, read UVD fence is 0xffffffff
and read pcie pid is 0xffff.
The issue is caused by VCE reset when update cg setting. according to HW programming
guide, adjust update VCE cg sequence.
The patch apply to VCE2.0.
Signed-off-by: JimQu <Jim.Qu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Flora Cui [Thu, 18 Aug 2016 05:18:09 +0000 (13:18 +0800)]
drm/amdgpu: use domain's gpu_offset for start addr
Signed-off-by: Flora Cui <Flora.Cui@amd.com>
Reviewed-by: Ken Wang <Qingqing.Wang@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Flora Cui [Thu, 18 Aug 2016 05:17:07 +0000 (13:17 +0800)]
drm/amdgpu: update gart_pin_size only if the bo is pined to GTT
Signed-off-by: Flora Cui <Flora.Cui@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Flora Cui [Thu, 18 Aug 2016 04:55:13 +0000 (12:55 +0800)]
drm/amdgpu: check domain sanity in amdgpu_bo_pin_restricted()
abort if the bo is pined to other domain already
Signed-off-by: Flora Cui <Flora.Cui@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Flora Cui [Tue, 2 Aug 2016 03:32:41 +0000 (11:32 +0800)]
amdgpu: move ttm stuff to amdgpu_ttm.h
Signed-off-by: Flora Cui <Flora.Cui@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rex Zhu [Wed, 17 Aug 2016 07:48:30 +0000 (15:48 +0800)]
drm/amd/powerplay: enable power containment features for tonga.
v2: fix build error introduced when fix code style problems.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tom St Denis [Wed, 17 Aug 2016 16:00:51 +0000 (12:00 -0400)]
drm/amd/amdgpu: Add more debugfs config data
Adds family and external_rev_id to config data
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Emily Deng [Wed, 17 Aug 2016 06:59:20 +0000 (14:59 +0800)]
drm/amdgpu: Hardcode virtual DCE vblank / scanout position return values
For virtual display feature, by hardcoding 0 for the vblank counter and
-EINVAL for the scanout position return value, we signal to the core DRM code that there are
no hardware counters we can use for these.
Signed-off-by: Emily Deng <Emily.Deng@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tom St Denis [Fri, 12 Aug 2016 19:14:31 +0000 (15:14 -0400)]
drm/amd/amdgpu: Add more config data for debugfs
Adds rev_id as well as cg/pg flags to help debug runtime.
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Fri, 12 Aug 2016 14:50:12 +0000 (16:50 +0200)]
drm/amdgpu: fix coding style in amdgpu_object.c
Just a few 80 chars problems.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Fri, 12 Aug 2016 11:29:18 +0000 (13:29 +0200)]
drm/amdgpu: add function pointer to the pte_update_params
Remember what function to call while planning the commands instead
of figuring it our later on.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Fri, 12 Aug 2016 10:59:59 +0000 (12:59 +0200)]
drm/amdgpu: stop splitting PTE commands into smaller ones
It doesn't make much sense to create bigger commands first which we then need
to split into smaller one again. Just make sure the commands we create aren't
to big in the first place.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Fri, 12 Aug 2016 09:40:11 +0000 (11:40 +0200)]
drm/amdgpu: remove AMDGPU_VM_NO_FLUSH define
Not used any more.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Fri, 12 Aug 2016 09:33:30 +0000 (11:33 +0200)]
drm/amdgpu: cleanup the write_pte implementations
We don't need the gart mapping handling here any more.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Thu, 11 Aug 2016 14:44:15 +0000 (16:44 +0200)]
drm/amdgpu: remove pages_addr handling from the VM code
Not needed any more.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Thu, 11 Aug 2016 12:06:54 +0000 (14:06 +0200)]
drm/amdgpu: write PTEs directly into the IB.
Write the PTEs at the end of the IB instead of directly into the SDMA commands.
This can save quite some CPU cycles building the entries.
This doesn't change the DW estimation because PTEs where embedded into the IB
before as well. It just moves them to the end of the IB.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Chunming Zhou [Thu, 4 Aug 2016 07:47:50 +0000 (15:47 +0800)]
drm/amdgpu: add shadow flag V2
Indicate if need to sync between bo and shadow, where sync to where.
V2:
Rename to backup_shadow
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Chunming Zhou [Thu, 4 Aug 2016 05:59:32 +0000 (13:59 +0800)]
drm/amdgpu: allocate shadow for pd/pt bo V2
The pd/pt shadow bo will be used to backup page table, when gpu reset
happens, we can restore the page table by them.
V2:
Free shadow bo.
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Chunming Zhou [Thu, 4 Aug 2016 05:05:46 +0000 (13:05 +0800)]
drm/amdgpu: validate shadow as well when validating bo
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Chunming Zhou [Tue, 26 Jul 2016 06:13:21 +0000 (14:13 +0800)]
drm/amdgpu: add shadow bo support V2
shadow bo is the shadow of a bo, which is always in GTT,
which can be used to backup the original bo.
V2:
reference shadow parent, shadow bo will be freed by who allocted him.
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tom St Denis [Thu, 11 Aug 2016 14:08:22 +0000 (10:08 -0400)]
drm/amd/amdgpu: UVD v6 register cleanup
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tom St Denis [Thu, 11 Aug 2016 13:59:12 +0000 (09:59 -0400)]
drm/amd/amdgpu: VCE v2 register cleanup
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tom St Denis [Thu, 11 Aug 2016 13:55:51 +0000 (09:55 -0400)]
drm/amd/amdgpu: add mutex in check_soft for VCE v3
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tom St Denis [Thu, 11 Aug 2016 13:44:53 +0000 (09:44 -0400)]
drm/amd/amdgpu: Cleanup register access in VCE v3
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alexandre Demers [Wed, 10 Aug 2016 07:02:04 +0000 (03:02 -0400)]
Fixing copy-paste errors and removing unneeded newlines
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alexandre Demers <alexandre.f.demers@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Michel Dänzer [Mon, 8 Aug 2016 07:23:39 +0000 (16:23 +0900)]
drm: Add DRM_MODE_PAGE_FLIP_TARGET_ABSOLUTE/RELATIVE flags v2
These flags allow userspace to explicitly specify the target vertical
blank period when a flip should take effect.
v2:
* Add new struct drm_mode_crtc_page_flip_target instead of modifying
struct drm_mode_crtc_page_flip, to make sure all existing userspace
code keeps compiling (Daniel Vetter)
Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Michel Dänzer [Thu, 4 Aug 2016 03:39:40 +0000 (12:39 +0900)]
drm/radeon: Set MASTER_UPDATE_MODE to 0 again
With the previous change, it's safe to let page flips take effect
anytime during a vertical blank period.
This can avoid delaying a flip by a frame in some cases where we get to
radeon_flip_work_func -> adev->mode_info.funcs->page_flip during a
vertical blank period.
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Michel Dänzer [Thu, 4 Aug 2016 03:39:39 +0000 (12:39 +0900)]
drm/radeon: Provide page_flip_target hook
Now we can program a flip during a vertical blank period, if it's the
one targeted by the flip (or a later one). This allows simplifying
radeon_flip_work_func considerably.
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Michel Dänzer [Thu, 4 Aug 2016 03:39:38 +0000 (12:39 +0900)]
drm/amdgpu: Set MASTER_UPDATE_MODE to 0 again
With the previous change, it's safe to let page flips take effect
anytime during a vertical blank period.
This can avoid delaying a flip by a frame in some cases where we get to
amdgpu_flip_work_func -> adev->mode_info.funcs->page_flip during a
vertical blank period.
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Michel Dänzer [Thu, 4 Aug 2016 03:39:37 +0000 (12:39 +0900)]
drm/amdgpu: Provide page_flip_target hook
Now we can program a flip during a vertical blank period, if it's the
one targeted by the flip (or a later one). This allows simplifying
amdgpu_flip_work_func considerably.
agd: update dce_virtual.c as well.
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Michel Dänzer [Mon, 8 Aug 2016 07:23:03 +0000 (16:23 +0900)]
drm: Add page_flip_target CRTC hook v2
Mostly the same as the existing page_flip hook, but takes an additional
parameter specifying the target vertical blank period when the flip
should take effect.
v2:
* Add curly braces around else statement corresponding to an if block
with curly braces (Alex Deucher)
* Call drm_crtc_vblank_put in the error case (Daniel Vetter)
* Clarify entry point documentation comment (Daniel Vetter)
Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Wolfram Sang [Tue, 9 Aug 2016 11:30:30 +0000 (13:30 +0200)]
gpu: drm: radeon: radeon_i2c: don't print error when adding adapter fails
The core will do this for us now.
Signed-off-by: Wolfram Sang <wsa-dev@sang-engineering.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Wolfram Sang [Tue, 9 Aug 2016 11:30:27 +0000 (13:30 +0200)]
gpu: drm: amd: amdgpu: amdgpu_i2c: don't print error when adding adapter fails
The core will do this for us now.
Signed-off-by: Wolfram Sang <wsa-dev@sang-engineering.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Mon, 8 Aug 2016 12:40:18 +0000 (14:40 +0200)]
drm/amdgpu: use more than 64KB fragment size if possible
We align to 64KB, but when userspace aligns even more we can easily use more.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Fri, 5 Aug 2016 11:56:35 +0000 (13:56 +0200)]
drm/amdgpu: flip frag_ptes and update_pts
We can add the fragment params before we split the update for the page tables.
That should save a few CPU cycles for larger updates.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Thu, 4 Aug 2016 13:02:49 +0000 (15:02 +0200)]
drm/amdgpu: add adev to the pte_update_params
No need to carry that forward as a separate parameter.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Thu, 4 Aug 2016 12:52:50 +0000 (14:52 +0200)]
drm/amdgpu: rename amdgpu_vm_update_params
Well those are actually page table entry parameters.
This also makes the variable names used a bit shorter.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Wed, 3 Aug 2016 15:46:42 +0000 (17:46 +0200)]
drm/amdgpu: cleanup VM fragment defines
We can actually do way more than just the 64KB we currently used as default.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Wed, 3 Aug 2016 15:39:26 +0000 (17:39 +0200)]
drm/amdgpu: remove unused VM defines
Not used for a long time.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tom St Denis [Tue, 9 Aug 2016 14:13:21 +0000 (10:13 -0400)]
drm/amd/amdgpu: Simplify bitfield operations in gfx v8
This patch introduces a new macro WREG32_FIELD which is used
to write to a register with a new value in a field. It's designed
to replace the pattern:
tmp = RREG32(mmFoo);
tmp &= ~REG__FIELD_MASK;
tmp |= new_value << REG__FIELD__SHIFT;
WREG32(mmFoo, tmp)
with:
WREG32_FIELD(Foo, FIELD, new_value);
Unlike WREG32_P() it understands offsets/masks and doesn't
require the caller to shift the value (or mask properly).
It's applied where suitable in the gfx_v8_0.c driver to start
with.
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tom St Denis [Tue, 9 Aug 2016 14:10:30 +0000 (10:10 -0400)]
drm/amd/amdgpu: Simplify various gfx v8 functions
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tom St Denis [Tue, 9 Aug 2016 14:07:36 +0000 (10:07 -0400)]
drm/amd/amdgpu: Correct whitespace in GFX v8
Fix various whitespace issues in gfx v8 driver.
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Emily Deng [Wed, 10 Aug 2016 08:01:25 +0000 (16:01 +0800)]
drm/amdgpu: Change the virtual_display type from int to char*.
For virtual display feature, as there may be multiple GPUs,
for user could choose whiche GPU need to enable this feature, change
the type of virtual_display from int to char*. The variable will be set
like this virtual_display="xxxx:xx:xx.x;xxxx:xx:xx.x;".
Signed-off-by: Emily Deng <Emily.Deng@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>