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Richard Sandiford [Wed, 18 Sep 2013 09:56:40 +0000 (09:56 +0000)]
[SystemZ] Add unsigned compare-and-branch instructions
For some reason I never got around to adding these at the same time as
the signed versions. No idea why.
I'm not sure whether this SystemZII::BranchC* stuff is useful, or whether
it should just be replaced with an "is normal" flag. I'll leave that
for later though.
There are some boundary conditions that can be tweaked, such as preferring
unsigned comparisons for equality with [128, 256), and "<= 255" over "< 256",
but again I'll leave those for a separate patch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190930
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Joey Gouly [Wed, 18 Sep 2013 09:46:49 +0000 (09:46 +0000)]
'svn add' the test cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190929
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Joey Gouly [Wed, 18 Sep 2013 09:45:55 +0000 (09:45 +0000)]
[ARMv8] Add CRC instructions.
Patch by Bradley Smith!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190928
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Filip Pizlo [Wed, 18 Sep 2013 06:37:55 +0000 (06:37 +0000)]
Revert r190921. It broke Windows.
I'll roll it back in when I have a chance to look at it in detail.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190923
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Filip Pizlo [Wed, 18 Sep 2013 06:03:27 +0000 (06:03 +0000)]
Make DynamicLibrary use ManagedStatic. This is pretty simple and should just work as
advertised - but it does have the caveat that calls to DynamicLibrary::AddSymbol will
"reset" if you shutdown llvm and try to come back for seconds. This is a subtle
behavior change, but I'm assuming that nobody is affected by it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190921
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Craig Topper [Wed, 18 Sep 2013 06:01:53 +0000 (06:01 +0000)]
Prevent extra calls to ToggleFeature for Feature64Bit and FeatureCMOV if they've already been enabled. The extra call ends up clearing the bit in FeatureBits since its a 'toggle'. Can't prove that anything was broken because of this since I don't think the FeatureBits for these are used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190920
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Craig Topper [Wed, 18 Sep 2013 05:54:09 +0000 (05:54 +0000)]
Fix X86 subtarget to not overwrite the autodetected features by calling InitMCProcessorInfo right after detecting them. Instead add a new function that only updates the scheduling model and call that.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190919
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Craig Topper [Wed, 18 Sep 2013 04:10:17 +0000 (04:10 +0000)]
Revert accidental commit I had to make to get the test case in PR17268 to still work correctly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190917
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Craig Topper [Wed, 18 Sep 2013 03:55:53 +0000 (03:55 +0000)]
Lift alignment restrictions for load/store folding on VINSERTF128/VEXTRACTF128. Fixes PR17268.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190916
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David Blaikie [Wed, 18 Sep 2013 00:11:27 +0000 (00:11 +0000)]
ifndef NDEBUG-out an asserts-only constant committed in r190863
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190905
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Matt Arsenault [Tue, 17 Sep 2013 23:23:16 +0000 (23:23 +0000)]
Fix a constant folding address space place I missed.
If address space 0 was smaller than the address space
in a constant inttoptr/ptrtoint pair, the wrong mask size
would be used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190899
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Reid Kleckner [Tue, 17 Sep 2013 23:18:05 +0000 (23:18 +0000)]
COFF: Ensure that objects produced by LLVM link with /safeseh
Summary:
We indicate that the object files are safe by emitting a @feat.00
absolute address symbol. The address is presumably interpreted as a
bitfield of features that the compiler would like to enable. Bit 0 is
documented in the PE COFF spec to opt in to "registered SEH", which is
what /safeseh enables.
LLVM's object files are safe by default because LLVM doesn't know how to
produce SEH handlers.
Reviewers: Bigcheese
CC: llvm-commits
Differential Revision: http://llvm-reviews.chandlerc.com/D1691
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190898
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Matt Arsenault [Tue, 17 Sep 2013 23:15:35 +0000 (23:15 +0000)]
Missed using check type enum in one place
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190897
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Matt Arsenault [Tue, 17 Sep 2013 22:45:57 +0000 (22:45 +0000)]
Use function's argument instead of the global flag.
For now it happens the argument is always the same.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190896
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Matt Arsenault [Tue, 17 Sep 2013 22:30:02 +0000 (22:30 +0000)]
FileCheck refactor: use enum instead of bunch of bools
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190893
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Quentin Colombet [Tue, 17 Sep 2013 22:01:26 +0000 (22:01 +0000)]
Revert the load slicing done in r190870.
To avoid regressions with bitfield optimizations, this slicing should take place
later, like ISel time.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190891
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Reid Kleckner [Tue, 17 Sep 2013 21:24:44 +0000 (21:24 +0000)]
COFF: Emit all MCSymbols rather than filtering out some of them
In particular, this means we emit non-external symbols defined to
variables, such as aliases or absolute addresses.
This is needed to implement /safeseh, and it appears there was some
confusion about what symbols to emit previously.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190888
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Reid Kleckner [Tue, 17 Sep 2013 21:24:02 +0000 (21:24 +0000)]
COFF: Remove ExportSection, which has been dead since r114823
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190887
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Eric Christopher [Tue, 17 Sep 2013 21:13:57 +0000 (21:13 +0000)]
Move variable into assert to avoid unused variable warning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190886
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Matt Arsenault [Tue, 17 Sep 2013 21:10:14 +0000 (21:10 +0000)]
Cleanup handling of constant function casts.
Some of this code is no longer necessary since int<->ptr casts are no
longer occur as of r187444.
This also fixes handling vectors of pointers, and adds a bunch of new
testcases for vectors and address spaces.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190885
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Bill Schmidt [Tue, 17 Sep 2013 20:22:05 +0000 (20:22 +0000)]
[PowerPC] Add a FIXME.
Documenting a design choice to generate only medium model sequences for TLS
addresses at this time. Small and large code models could be supported if
necessary.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190883
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Bill Schmidt [Tue, 17 Sep 2013 20:03:25 +0000 (20:03 +0000)]
[PowerPC] Fix problems with large code model (PR17169).
Large code model on PPC64 requires creating and referencing TOC entries when
using the addis/ld form of addressing. This was not being done in all cases.
The changes in this patch to PPCAsmPrinter::EmitInstruction() fix this. Two
test cases are also modified to reflect this requirement.
Fast-isel was not creating correct code for loading floating-point constants
using large code model. This also requires the addis/ld form of addressing.
Previously we were using the addis/lfd shortcut which is only applicable to
medium code model. One test case is modified to reflect this requirement.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190882
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Arnold Schwaighofer [Tue, 17 Sep 2013 18:06:50 +0000 (18:06 +0000)]
Costmodel: Add support for horizontal vector reductions
Upcoming SLP vectorization improvements will want to be able to estimate costs
of horizontal reductions. Add infrastructure to support this.
We model reductions as a series of (shufflevector,add) tuples ultimately
followed by an extractelement. For example, for an add-reduction of <4 x float>
we could generate the following sequence:
(v0, v1, v2, v3)
\ \ / /
\ \ /
+ +
(v0+v2, v1+v3, undef, undef)
\ /
((v0+v2) + (v1+v3), undef, undef)
%rdx.shuf = shufflevector <4 x float> %rdx, <4 x float> undef,
<4 x i32> <i32 2, i32 3, i32 undef, i32 undef>
%bin.rdx = fadd <4 x float> %rdx, %rdx.shuf
%rdx.shuf7 = shufflevector <4 x float> %bin.rdx, <4 x float> undef,
<4 x i32> <i32 1, i32 undef, i32 undef, i32 undef>
%bin.rdx8 = fadd <4 x float> %bin.rdx, %rdx.shuf7
%r = extractelement <4 x float> %bin.rdx8, i32 0
This commit adds a cost model interface "getReductionCost(Opcode, Ty, Pairwise)"
that will allow clients to ask for the cost of such a reduction (as backends
might generate more efficient code than the cost of the individual instructions
summed up). This interface is excercised by the CostModel analysis pass which
looks for reduction patterns like the one above - starting at extractelements -
and if it sees a matching sequence will call the cost model interface.
We will also support a second form of pairwise reduction that is well supported
on common architectures (haddps, vpadd, faddp).
(v0, v1, v2, v3)
\ / \ /
(v0+v1, v2+v3, undef, undef)
\ /
((v0+v1)+(v2+v3), undef, undef, undef)
%rdx.shuf.0.0 = shufflevector <4 x float> %rdx, <4 x float> undef,
<4 x i32> <i32 0, i32 2 , i32 undef, i32 undef>
%rdx.shuf.0.1 = shufflevector <4 x float> %rdx, <4 x float> undef,
<4 x i32> <i32 1, i32 3, i32 undef, i32 undef>
%bin.rdx.0 = fadd <4 x float> %rdx.shuf.0.0, %rdx.shuf.0.1
%rdx.shuf.1.0 = shufflevector <4 x float> %bin.rdx.0, <4 x float> undef,
<4 x i32> <i32 0, i32 undef, i32 undef, i32 undef>
%rdx.shuf.1.1 = shufflevector <4 x float> %bin.rdx.0, <4 x float> undef,
<4 x i32> <i32 1, i32 undef, i32 undef, i32 undef>
%bin.rdx.1 = fadd <4 x float> %rdx.shuf.1.0, %rdx.shuf.1.1
%r = extractelement <4 x float> %bin.rdx.1, i32 0
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190876
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Arnold Schwaighofer [Tue, 17 Sep 2013 17:03:29 +0000 (17:03 +0000)]
SLPVectorizer: Don't vectorize phi nodes that use invoke values
We can't insert an insertelement after an invoke. We would have to split a
critical edge. So when we see a phi node that uses an invoke we just give up.
radar://
14990770
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190871
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Quentin Colombet [Tue, 17 Sep 2013 16:57:34 +0000 (16:57 +0000)]
[InstCombiner] Slice a big load in two loads when the elements are next to each
other in memory.
The motivation was to get rid of truncate and shift right instructions that get
in the way of paired load or floating point load.
E.g.,
Consider the following example:
struct Complex {
float real;
float imm;
};
When accessing a complex, llvm was generating a 64-bits load and the imm field
was obtained by a trunc(lshr) sequence, resulting in poor code generation, at
least for x86.
The idea is to declare that two load instructions is the canonical form for
loading two arithmetic type, which are next to each other in memory.
Two scalar loads at a constant offset from each other are pretty
easy to detect for the sorts of passes that like to mess with loads.
<rdar://problem/
14477220>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190870
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Preston Gurd [Tue, 17 Sep 2013 16:53:36 +0000 (16:53 +0000)]
Remove unused code, which had been commented out.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190869
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Serge Pavlov [Tue, 17 Sep 2013 16:24:42 +0000 (16:24 +0000)]
Added documentation to getMemsetStores.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190866
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Ben Langmuir [Tue, 17 Sep 2013 13:44:39 +0000 (13:44 +0000)]
Add llvm.x86.* intrinsics for Intel SHA Extensions
Add llvm.x86.* intrinsics for all of the Intel SHA Extensions instructions, as
well as tests. Also remove mayLoad and hasSideEffects, which can be inferred
from the instruction patterns.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190864
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Kostya Serebryany [Tue, 17 Sep 2013 12:14:50 +0000 (12:14 +0000)]
[asan] inline the calls to __asan_stack_free_* with small sizes. Yet another 10%-20% speedup for use-after-return
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190863
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Joey Gouly [Tue, 17 Sep 2013 09:54:57 +0000 (09:54 +0000)]
[ARM] Fix the deprecation of MCR encodings that map to CP15{ISB,DSB,DMB}.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190862
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Stepan Dyatkovskiy [Tue, 17 Sep 2013 09:36:11 +0000 (09:36 +0000)]
Bugfix for PR17099:
Wrong cast operation.
MergeFunctions emits Bitcast instead of pointer-to-integer operation.
Patch fixes MergeFunctions::writeThunk function. It replaces
unconditional Bitcast creation with "Value* createCast(...)" method, that
checks operand types and selects proper instruction.
See unit-test as example.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190859
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Elena Demikhovsky [Tue, 17 Sep 2013 07:34:34 +0000 (07:34 +0000)]
AVX-512: Converted to Unix style
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190851
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Craig Topper [Tue, 17 Sep 2013 06:50:11 +0000 (06:50 +0000)]
Add AES and SHA instructions to the load folding tables.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190850
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Craig Topper [Tue, 17 Sep 2013 06:05:17 +0000 (06:05 +0000)]
Fix column alignment. No functional change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190849
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Craig Topper [Tue, 17 Sep 2013 03:34:09 +0000 (03:34 +0000)]
Make a more clear AVX-512 section header that matches similar in the file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190843
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Kevin Qin [Tue, 17 Sep 2013 02:21:02 +0000 (02:21 +0000)]
Implement 3 AArch64 neon instructions : umov smov ins.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190839
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Quentin Colombet [Tue, 17 Sep 2013 00:26:56 +0000 (00:26 +0000)]
[SelectionDAG] Teach the vector scalarizer about TRUNCATE.
When a truncate node defines a legal vector type but uses an illegal
vector type, the legalization process was splitting the vector until
<1 x vector> type, but then it was failing to scalarize the node because
it did not know how to handle TRUNCATE.
<rdar://problem/
14989896>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190830
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Adrian Prantl [Tue, 17 Sep 2013 00:15:36 +0000 (00:15 +0000)]
mention command line parameters
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190827
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Adrian Prantl [Tue, 17 Sep 2013 00:15:33 +0000 (00:15 +0000)]
simplify expression
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190826
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Adrian Prantl [Mon, 16 Sep 2013 23:48:45 +0000 (23:48 +0000)]
Be sure we run ARM tests only when an ARM backend is present.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190822
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Adrian Prantl [Mon, 16 Sep 2013 23:29:03 +0000 (23:29 +0000)]
Debug info: Fix PR16736 and rdar://problem/
14990587.
A DBG_VALUE is register-indirect iff the first operand is a register
_and_ the second operand is an immediate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190821
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Matt Arsenault [Mon, 16 Sep 2013 22:43:16 +0000 (22:43 +0000)]
MemCpyOptimizer: Use max legal int size instead of pointer size
If there are no legal integers, assume 1 byte.
This makes more sense than using the pointer size as
a guess for the maximum GPR width.
It is conceivable to want to use some 64-bit pointers
on a target where 64-bit integers aren't legal.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190817
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Preston Gurd [Mon, 16 Sep 2013 22:22:07 +0000 (22:22 +0000)]
Add Atom Silvermont (slm) tests
- check that -mcpu=slm uses the call register indirect optimization
- check that -mcpu=slm runs the scheduler
- check that -mcpu=slm supports the movbe instruction
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190814
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Jakub Staszak [Mon, 16 Sep 2013 22:03:38 +0000 (22:03 +0000)]
Use reference instead of copy.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190813
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Jordan Rose [Mon, 16 Sep 2013 21:38:01 +0000 (21:38 +0000)]
[CMake] Hack GetSVN.cmake to handle unusual terminals.
I got a report of a hang in git's helper functions trying to figure out
how to display results of "git svn info" when run inside ninja, even though
the result is immediately piped to grep. This seems to avoid that.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190808
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Krzysztof Parzyszek [Mon, 16 Sep 2013 21:24:30 +0000 (21:24 +0000)]
Add testcase for r190631
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190807
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Tim Northover [Mon, 16 Sep 2013 17:33:40 +0000 (17:33 +0000)]
TableGen: fix constness of new comparison function.
libc++ didn't seem to like a non-const call operator.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190797
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Bill Schmidt [Mon, 16 Sep 2013 17:25:12 +0000 (17:25 +0000)]
[PowerPC] Fix PR17155 - Ignore COPY_TO_REGCLASS during emit.
Fast-isel generates a COPY_TO_REGCLASS for widening f32 to f64, which
is a nop on PPC64. This is needed to keep the register class system
happy, but on the fast-isel path it is not removed before emit as it
is for DAG select. Ignore this op when emitting instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190795
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Tim Northover [Mon, 16 Sep 2013 16:43:19 +0000 (16:43 +0000)]
TableGen: give asm match classes deterministic order.
TableGen was sorting the entries in some of its internal data
structures by pointer. This order filtered through to the final
matching table and affected the diagnostics produced on bad assembly
occasionally.
It also turns out STL algorithms are ridiculously easy to misuse on
containers with custom order methods. (No bugs before, or now that I
know of, but plenty in the middle).
This should fix the sanitizer bot, which ends up with weird pointers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190793
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Tim Northover [Mon, 16 Sep 2013 16:43:16 +0000 (16:43 +0000)]
AsmMatcher: emit subtarget feature enum in deterministic order.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190792
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Arnold Schwaighofer [Mon, 16 Sep 2013 16:17:24 +0000 (16:17 +0000)]
Don't vectorize if there are outside loop users of the induction variable.
We would have to compute the pre increment value, either by computing it on
every loop iteration or by splitting the edge out of the loop and inserting a
computation for it there.
For now, just give up vectorizing such loops.
Fixes PR17179.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190790
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Evgeniy Stepanov [Mon, 16 Sep 2013 13:24:32 +0000 (13:24 +0000)]
[msan] Check return value of main().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190782
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Vladimir Medic [Mon, 16 Sep 2013 10:29:42 +0000 (10:29 +0000)]
This patch implements Mips load/store instructions from/to coprocessor 2. Test cases are added.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190780
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Benjamin Kramer [Mon, 16 Sep 2013 10:17:31 +0000 (10:17 +0000)]
ARM: Deduplicate ConstantPoolValues.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190779
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Daniel Sanders [Mon, 16 Sep 2013 09:25:49 +0000 (09:25 +0000)]
Fix the build for git repositories with multiple remotes.
Summary:
When a git repository had multiple remotes, ${repository} will be set to a multiline string. This causes compilation errors in SVNVersion.inc.
Fix this by limiting the output of utils/GetRepositoryPath to the first remote (which is reasonably likely to be 'origin').
Reviewers: jordan_rose
CC: llvm-commits, t.p.northover
Differential Revision: http://llvm-reviews.chandlerc.com/D1659
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190778
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Richard Sandiford [Mon, 16 Sep 2013 09:03:10 +0000 (09:03 +0000)]
[SystemZ] Improve extload handling
The port originally had special patterns for extload, mapping them to the
same instructions as sextload. It seemed neater to have patterns that
match "an extension that is allowed to be signed" and "an extension that
is allowed to be unsigned".
This was originally meant to be a clean-up, but it does improve the handling
of promoted integers a little, as shown by args-06.ll.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190777
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Craig Topper [Mon, 16 Sep 2013 04:29:58 +0000 (04:29 +0000)]
Make F16C feature flag imply AVX rather than just checking both at the patterns.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190775
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Peter Collingbourne [Mon, 16 Sep 2013 01:08:15 +0000 (01:08 +0000)]
Implement function prefix data as an IR feature.
Previous discussion:
http://lists.cs.uiuc.edu/pipermail/llvmdev/2013-July/063909.html
Differential Revision: http://llvm-reviews.chandlerc.com/D1191
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190773
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Hal Finkel [Sun, 15 Sep 2013 22:09:58 +0000 (22:09 +0000)]
PPC: Don't restrict lvsl generation to after type legalization
This is a re-commit of r190764, with an extra check to make sure that we're not
performing the transformation on illegal types (a small test case has been
added for this as well).
Original commit message:
The PPC backend uses a target-specific DAG combine to turn unaligned Altivec
loads into a permutation-based sequence when possible. Unfortunately, the
target-specific DAG combine is not always called on all loads of interest
(sometimes the routines in DAGCombine call CombineTo such that the new node and
users are not added to the worklist); allowing the combine to trigger early
(before type legalization) mitigates this problem. Because the autovectorizers
only create legal vector types, I don't expect a lot of cases where this
optimization is enabled by type legalization in practice.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190771
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Benjamin Kramer [Sun, 15 Sep 2013 22:04:42 +0000 (22:04 +0000)]
Replace some unnecessary vector copies with references.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190770
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Benjamin Kramer [Sun, 15 Sep 2013 19:53:20 +0000 (19:53 +0000)]
ELF: Add support for the exclude section bit for gas compat.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190769
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David Majnemer [Sun, 15 Sep 2013 19:24:16 +0000 (19:24 +0000)]
MC: Add support for '?' flags in .section directives
Summary:
The '?' flag uses the last section group if the last had a section
group. We treat combining an explicit section group and the '?' as a
hard error.
This fixes PR17198.
Reviewers: rafael, bkramer
Reviewed By: bkramer
CC: llvm-commits
Differential Revision: http://llvm-reviews.chandlerc.com/D1686
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190768
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Kai Nacke [Sun, 15 Sep 2013 18:01:09 +0000 (18:01 +0000)]
Fix alignment of unwind data.
For alignment purposes, the instruction array will always have an even
number of entries, with the final entry potentially unused (in which
case the array will be one longer than indicated by the count of unwind
codes field).
Reviewed by Anton Korobeynikov, Charles Davis and Nico Rieck.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190767
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Kai Nacke [Sun, 15 Sep 2013 17:46:46 +0000 (17:46 +0000)]
Generate IMAGE_REL_AMD64_ADDR32NB relocations for SEH
data structures.
The Win64 EH data structures must be of type IMAGE_REL_AMD64_ADDR32NB
instead of IMAGE_REL_AMD64_ADDR32. This is easiely achieved by adding
the VK_COFF_IMGREL32 modifier to the symbol reference.
Change also references to start and end of the SEH range of a function
as offsets to start of the function.
Reviewed by Jim Grosbach, Charles Davis and Nico Rieck.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190766
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Hal Finkel [Sun, 15 Sep 2013 15:41:11 +0000 (15:41 +0000)]
Revert r190764: PPC: Don't restrict lvsl generation to after type legalization
This is causing test-suite failures.
Original commit message:
The PPC backend uses a target-specific DAG combine to turn unaligned Altivec
loads into a permutation-based sequence when possible. Unfortunately, the
target-specific DAG combine is not always called on all loads of interest
(sometimes the routines in DAGCombine call CombineTo such that the new node and
users are not added to the worklist); allowing the combine to trigger early
(before type legalization) mitigates this problem. Because the autovectorizers
only create legal vector types, I don't expect a lot of cases where this
optimization is enabled by type legalization in practice.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190765
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Hal Finkel [Sun, 15 Sep 2013 15:20:54 +0000 (15:20 +0000)]
PPC: Don't restrict lvsl generation to after type legalization
The PPC backend uses a target-specific DAG combine to turn unaligned Altivec
loads into a permutation-based sequence when possible. Unfortunately, the
target-specific DAG combine is not always called on all loads of interest
(sometimes the routines in DAGCombine call CombineTo such that the new node and
users are not added to the worklist); allowing the combine to trigger early
(before type legalization) mitigates this problem. Because the autovectorizers
only create legal vector types, I don't expect a lot of cases where this
optimization is enabled by type legalization in practice.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190764
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Hal Finkel [Sun, 15 Sep 2013 02:19:49 +0000 (02:19 +0000)]
Prevent assert in CombinerGlobalAA with null values
DAGCombiner::isAlias can be called with SrcValue1 or SrcValue2 null, and we
can't use AA in this case (if we try, then the casting code in AA will assert).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190763
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Reed Kotler [Sun, 15 Sep 2013 02:09:08 +0000 (02:09 +0000)]
Expand the mask capability for deciding which functions are mips16 and mips32
so it can be better used for general interoperability testing between mips32
and mips16.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190762
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Benjamin Kramer [Sat, 14 Sep 2013 22:55:54 +0000 (22:55 +0000)]
Remove unused StringRef that no compiler warned about, I wonder why.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190759
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Ben Langmuir [Sat, 14 Sep 2013 15:03:21 +0000 (15:03 +0000)]
Add the remaining Intel SHA instructions
Also assembly/disassembly tests, and for sha256rnds2, aliases with an explicit
xmm0 dependency.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190754
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Robert Wilhelm [Sat, 14 Sep 2013 09:34:59 +0000 (09:34 +0000)]
Fix spelling.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190750
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Robert Wilhelm [Sat, 14 Sep 2013 09:34:24 +0000 (09:34 +0000)]
Fix spelling.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190749
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Chandler Carruth [Sat, 14 Sep 2013 09:28:14 +0000 (09:28 +0000)]
Remove the long, long defunct IR block placement pass.
This pass was based on the previous (essentially unused) profiling
infrastructure and the assumption that by ordering the basic blocks at
the IR level in a particular way, the correct layout would happen in the
end. This sometimes worked, and mostly didn't. It also was a really
naive implementation of the classical paper that dates from when branch
predictors were primarily directional and when loop structure wasn't
commonly available. It also didn't factor into the equation
non-fallthrough branches and other machine level details.
Anyways, for all of these reasons and more, I wrote
MachineBlockPlacement, which completely supercedes this pass. It both
uses modern profile information infrastructure, and actually works. =]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190748
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Zoran Jovanovic [Sat, 14 Sep 2013 07:35:41 +0000 (07:35 +0000)]
Fixed bug when generating Load Upper Immediate microMIPS instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190746
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Zoran Jovanovic [Sat, 14 Sep 2013 07:15:21 +0000 (07:15 +0000)]
Support for microMIPS DIV instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190745
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Zoran Jovanovic [Sat, 14 Sep 2013 06:49:25 +0000 (06:49 +0000)]
Support for misc microMIPS instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190744
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Matt Arsenault [Sat, 14 Sep 2013 02:44:06 +0000 (02:44 +0000)]
Add missing CHECK-LABEL
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190740
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Matt Arsenault [Sat, 14 Sep 2013 02:44:02 +0000 (02:44 +0000)]
Add test for untested path in SimplifyCFG
This case wasn't checked with a pointer condition.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190739
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Daniel Dunbar [Sat, 14 Sep 2013 01:19:17 +0000 (01:19 +0000)]
[lit] Add an --output option, for writing results in a machine readable form.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190738
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Filip Pizlo [Fri, 13 Sep 2013 22:59:47 +0000 (22:59 +0000)]
Make PrettyStackTraceEntry use ManagedStatic for its ThreadLocal.
This was somewhat tricky because ~PrettyStackTraceEntry() may run after
llvm_shutdown() has been called. This is rare and only happens for a common idiom
used in the main() functions of command-line tools. This works around the idiom by
skipping the stack clean-up if the PrettyStackTraceHead ManagedStatic is not
constructed (i.e. llvm_shutdown() has been called).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190730
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Hal Finkel [Fri, 13 Sep 2013 20:09:02 +0000 (20:09 +0000)]
Add missing break statement in PPCISelLowering
As it turns out, not a problem in practice, but it should be there.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190720
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Preston Gurd [Fri, 13 Sep 2013 19:23:28 +0000 (19:23 +0000)]
Adds support for Atom Silvermont (SLM) - -march=slm
Implements Instruction scheduler latencies for Silvermont,
using latencies from the Intel Silvermont Optimization Guide.
Auto detects SLM.
Turns on post RA scheduler when generating code for SLM.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190717
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Quentin Colombet [Fri, 13 Sep 2013 18:26:31 +0000 (18:26 +0000)]
[Peephole] Rewrite copies to avoid cross register banks copies.
By definition copies across register banks are not coalescable. Still, it may be
possible to get rid of such a copy when the value is available in another
register of the same register file.
Consider the following example, where capital and lower letters denote different
register file:
b = copy A <-- cross-bank copy
...
C = copy b <-- cross-bank copy
This could have been optimized this way:
b = copy A <-- cross-bank copy
...
C = copy A <-- same-bank copy
Note: b and C's definitions may be in different basic blocks.
This patch adds a peephole optimization that looks through a chain of copies
leading to a cross-bank copy and reuses a source that is on the same register
file if available.
This solution could also be used to get rid of some copies (e.g., A could have
been used instead of C). However, we do not do so because:
- It may over constrain the coloring of the source register for coalescing.
- The register allocator may not be able to find a nice split point for the
longer live-range, leading to more spill.
<rdar://problem/
14742333>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190713
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Benjamin Kramer [Fri, 13 Sep 2013 17:33:24 +0000 (17:33 +0000)]
Add warn_unused_result to empty() on various containers.
empty() doesn't actually empty out the container, making this a common typo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190708
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Nuno Lopes [Fri, 13 Sep 2013 15:01:54 +0000 (15:01 +0000)]
typo fix: use BUILD_ARCHIVE to build .a libs and not ARCHIVE_LIBRARY
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190696
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Amaury de la Vieuville [Fri, 13 Sep 2013 14:37:52 +0000 (14:37 +0000)]
Fix tests for hasFPARMv8 name change (r190692)
Patch by Bradley Smith
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190694
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Joey Gouly [Fri, 13 Sep 2013 13:46:57 +0000 (13:46 +0000)]
[ARMv8] Change hasV8Fp to hasFPARMv8, and other command line options
to be more consistent.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190692
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Evgeniy Stepanov [Fri, 13 Sep 2013 12:54:49 +0000 (12:54 +0000)]
[msan] Add source file:line to stack origin reports.
Compiler part.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190689
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Daniel Sanders [Fri, 13 Sep 2013 12:41:38 +0000 (12:41 +0000)]
Fix build failure reported by Tobias Markmann in bug 17203.
svn 1.8.0 emits an additional line matching 'URL:' in its 'svn info' command
('Relative URL:').
Changed the grep to match only the intended line so that a valid SVNVersion.inc
is generated.
The problem doesnt occur with the svn version I'm using (1.7.5) but Tobias has
confirmed that the change fixes the problem.
See http://llvm.org/bugs/show_bug.cgi?id=17203
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190685
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Joey Gouly [Fri, 13 Sep 2013 11:51:52 +0000 (11:51 +0000)]
[ARMv8] Emit the proper .fpu directive.
Patch by Bradley Smith!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190683
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Amaury de la Vieuville [Fri, 13 Sep 2013 10:59:01 +0000 (10:59 +0000)]
Add "native" to config.available_features, to make it easier to disable non-x-compile-safe tests
Patch by Artyom Skrobov!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190679
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Patrik Hagglund [Fri, 13 Sep 2013 10:29:42 +0000 (10:29 +0000)]
Fix for executing AutoRegen.sh. Revert a part of r187209.
Since r187209, which modified ltdl.m4, I was unable to execute
AutoRegen.sh, getting:
../configure:10779: error: possibly undefined macro: AC_LTDL_FUNC_ARGZ
This commit re-adds AC_LTDL_FUNC_ARGZ to ltdl.m4, as a quick fix. For me, this
corresponds to the configure file currently checked in.
(However, the ltdl library seems to be unused since r74924 in 2009,
except for the use of the LTDL_SHLIB_EXT macro in
bugpoint(?). Therefore, the right solution seems to try to get rid of
the local ltdl.m4 file, specified by autoconf/README.TXT.)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190677
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Zoran Jovanovic [Fri, 13 Sep 2013 10:08:05 +0000 (10:08 +0000)]
Test commit to verify that commit access works.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190676
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Richard Sandiford [Fri, 13 Sep 2013 09:12:44 +0000 (09:12 +0000)]
[SystemZ] Use getTarget{Insert,Extract}Subreg rather than getMachineNode
Just a clean-up, no behavioral change intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190673
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Richard Sandiford [Fri, 13 Sep 2013 09:09:50 +0000 (09:09 +0000)]
[SystemZ] Try to fold shifts into TMxx
E.g. "SRL %r2, 2; TMLL %r2, 1" => "TMLL %r2, 4".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190672
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Duncan Sands [Fri, 13 Sep 2013 08:16:06 +0000 (08:16 +0000)]
Avoid a compiler warning about Found not being used when assertions are
disabled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190668
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Tim Northover [Fri, 13 Sep 2013 07:26:52 +0000 (07:26 +0000)]
AArch64: use RegisterOperand for NEON registers.
Previously we modelled VPR128 and VPR64 as essentially identical
register-classes containing V0-V31 (which had Q0-Q31 as "sub_alias"
sub-registers). This model is starting to cause significant problems
for code generation, particularly writing EXTRACT/INSERT_SUBREG
patterns for converting between the two.
The change here switches to classifying VPR64 & VPR128 as
RegisterOperands, which are essentially aliases for RegisterClasses
with different parsing and printing behaviour. This fits almost
exactly with their real status (VPR128 == FPR128 printed strangely,
VPR64 == FPR64 printed strangely).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190665
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Craig Topper [Fri, 13 Sep 2013 04:41:06 +0000 (04:41 +0000)]
Move operator to end of previous line to match coding standards.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190659
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Eric Christopher [Fri, 13 Sep 2013 00:35:05 +0000 (00:35 +0000)]
Add initial support for handling gnu style pubnames accepted by some
versions of gold. This support is designed to allow gold to produce
gdb_index sections similar to the accelerator tables and consumable
by gdb.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190649
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Eric Christopher [Fri, 13 Sep 2013 00:34:58 +0000 (00:34 +0000)]
Reformat and hoist section grabbing to top level.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190648
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