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Craig Topper [Sun, 13 May 2018 00:58:23 +0000 (00:58 +0000)]
[X86] Remove some unused CHECK lines from tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332188
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Craig Topper [Sun, 13 May 2018 00:29:40 +0000 (00:29 +0000)]
[X86] Remove an autoupgrade legacy cvtss2sd intrinsics.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332187
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Craig Topper [Sat, 12 May 2018 23:14:39 +0000 (23:14 +0000)]
[X86] Remove and autoupgrade cvtsi2ss/cvtsi2sd intrinsics to match what clang has used for a very long time.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332186
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Chandler Carruth [Sat, 12 May 2018 21:28:53 +0000 (21:28 +0000)]
[x86] Remove a comment obviated by r330269. Should have deleted the
comment in the same revision but missed it.
Thanks to Dimitry Andric for catching this!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332177
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Dimitry Andric [Sat, 12 May 2018 19:59:54 +0000 (19:59 +0000)]
Clear converters map after X86 Domain Reassignment to avoid crashes
Summary:
As reported in PR37264, in some cases the X86 Domain Reassignment
`runOnMachineFunction()` is called twice. Because it only deletes the
`.second` members of its `InstrConverterBaseMap`, and does not clean up
the map itself, this can lead to double frees and crashes.
Use `DeleteContainerSeconds()` instead, so the `Converters` map can
safely be reinitialized and its members re-deleted for each X86 Domain
Reassignment pass.
Reviewers: guyblank, craig.topper
Reviewed By: craig.topper
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D46425
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332176
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JF Bastien [Sat, 12 May 2018 19:39:34 +0000 (19:39 +0000)]
[NFC] Remove inaccurate comment
Summary:
r271558 moved getManagedStaticMutex's mutex from a function-local
static to using call_once, but left a comment added in r211424. That comment is
now erroneous, remove it.
Reviewers: zturner, chandlerc
Subscribers: aheejin, llvm-commits
Differential Revision: https://reviews.llvm.org/D46784
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332175
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JF Bastien [Sat, 12 May 2018 19:38:44 +0000 (19:38 +0000)]
llc: don't call llvm_shutdown twice
Summary:
InitLLVM already calls llvm_shutdown, but llc registers for shutdown
with llvm_shutdown_obj so it gets called twice. It's not hurting anything, but
it's also not useful, so don't do it.
Reviewers: ruiu
Subscribers: aheejin, llvm-commits
Differential Revision: https://reviews.llvm.org/D46788
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332174
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Simon Pilgrim [Sat, 12 May 2018 18:07:07 +0000 (18:07 +0000)]
[X86] Add WriteFCMOV scheduler class for x87 CMOVs
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332173
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Simon Dardis [Sat, 12 May 2018 16:57:26 +0000 (16:57 +0000)]
[mips] Initialize the long branch pass for testing purposes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332172
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Craig Topper [Sat, 12 May 2018 02:34:28 +0000 (02:34 +0000)]
[X86] Remove some unused masked conversion intrinsics that can be replaced with an older intrinsic and a select.
This is what clang already uses.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332170
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Michael Zolotukhin [Sat, 12 May 2018 01:52:36 +0000 (01:52 +0000)]
Reapply "[PR16756] Use SSAUpdaterBulk in JumpThreading."
Stage3/stage4 bootstrap miscompares should be fixed by a non-determinism
fix in IDF (r332167).
This reverts commit r330446.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332168
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Michael Zolotukhin [Sat, 12 May 2018 01:44:32 +0000 (01:44 +0000)]
[IDF] Enforce the returned blocks to be sorted.
Summary:
Currently the order of blocks returned by `IDF::calculate` can be
non-deterministic. This was discovered in several attempts to enable
SSAUpdaterBulk for JumpThreading (which led to miscompare in bootstrap between
stage 3 and stage4). Originally, the blocks were put into a priority queue with
a depth level as their key, and this patch adds a DFSIn number as a second key
to specify a deterministic order across blocks from one level.
The solution was suggested by Daniel Berlin.
Reviewers: dberlin, davide
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D46646
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332167
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Stanislav Mekhanoshin [Sat, 12 May 2018 01:41:56 +0000 (01:41 +0000)]
[AMDGPU] Fix amdgpu-waves-per-eu accounting in scheduler
We cannot query this attribute from a subtarget given a machine function.
At this point attribute itself is already unavailable and can only be
obtained through MFI.
Differential Revision: https://reviews.llvm.org/D46781
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332166
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Chris Matthews [Sat, 12 May 2018 00:13:54 +0000 (00:13 +0000)]
Requirements can have & in them!
Lets escape those so the XML is valid!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332161
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Chris Matthews [Fri, 11 May 2018 23:15:11 +0000 (23:15 +0000)]
Add the message attribute to skipped
JUnit xml allows for a message attribute to be displayed on skips. Lets
populate that with an analysis of why we skipped the test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332156
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Sanjay Patel [Fri, 11 May 2018 23:13:36 +0000 (23:13 +0000)]
[DAG] add convenience function to propagate FMF; NFC
There's only one use of this currently, but that could
change with D46563. Either way, we shouldn't have to
update code outside of the flags struct when those
flag definitions change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332155
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Tom Stellard [Fri, 11 May 2018 23:12:49 +0000 (23:12 +0000)]
AMDGPU/GlobalISel: Implement select() for >32-bit G_STORE
Reviewers: arsenm, nhaehnle
Subscribers: kzhuravl, wdng, yaxunl, rovka, kristof.beyls, dstuttard, tpr, llvm-commits, t-tye
Differential Revision: https://reviews.llvm.org/D46153
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332154
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Alina Sbirlea [Fri, 11 May 2018 22:59:37 +0000 (22:59 +0000)]
[MemorySSA] getIncomingValueForBlock should return a MemoryAccess.
Summary: getIncomingValueForBlock is just a wrapper API that should return a MemoryAccess, instead of a generic Value.
Reviewers: george.burgess.iv
Subscribers: sanjoy, jlebar, Prazek, llvm-commits
Differential Revision: https://reviews.llvm.org/D46779
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332153
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Sergey Dmitriev [Fri, 11 May 2018 22:49:49 +0000 (22:49 +0000)]
[CodeExtractor] Allow extracting blocks with exception handling
This is a CodeExtractor improvement which adds support for extracting blocks
which have exception handling constructs if that is legal to do. CodeExtractor
performs validation checks to ensure that extraction is legal when it finds
invoke instructions or EH pads (landingpad, catchswitch, or cleanuppad) in
blocks to be extracted.
I have also added an option to allow extraction of blocks with alloca
instructions, but no validation is done for allocas. CodeExtractor caller has
to validate it himself before allowing alloca instructions to be extracted.
By default allocas are still not allowed in extraction blocks.
Differential Revision: https://reviews.llvm.org/D45904
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332151
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Sanjay Patel [Fri, 11 May 2018 22:45:22 +0000 (22:45 +0000)]
[DAG] clean up flag propagation for binops; NFCI
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332150
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Chris Matthews [Fri, 11 May 2018 22:18:22 +0000 (22:18 +0000)]
Overhaul unicode handling in xunit output
I have seen a lot of errors where the xunit does not encode unicode
test output correctly. Handle that explicitly now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332148
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Changpeng Fang [Fri, 11 May 2018 22:17:57 +0000 (22:17 +0000)]
AMDGPU/SI: Don't promote alloca to vector for AddrSpaceCast instruction.
Summary:
We have no logic to promote alloca to vector for an AddrSpaceCast instruction.
Reviewer:
arsenm
Differential Revision:
https://reviews.llvm.org/D45993
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332147
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Craig Topper [Fri, 11 May 2018 21:59:34 +0000 (21:59 +0000)]
[X86] Remove and autoupgrade a bunch of FMA instrinsics that are no longer used by clang.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332146
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Artem Belevich [Fri, 11 May 2018 21:13:19 +0000 (21:13 +0000)]
[Split GEP] handle trunc() in separate-const-offset-from-gep pass.
Let separate-const-offset-from-gep pass handle trunc() when it calculates
constant offset relative to base. The pass itself may insert trunc()
instructions when it canonicalises array indices to pointer-size integers
and needs to handle trunc() in order to evaluate the offset.
Differential Revision: https://reviews.llvm.org/D46732
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332142
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Yaxun Liu [Fri, 11 May 2018 20:40:14 +0000 (20:40 +0000)]
[AMDGPU] Fix compilation failure when IR contains comdat
Remove a useless SwitchSection which also causes compilation failure
when IR contains comdat.
The SwitchSection is useless because the current section is already
correct text section for the function therefore no need to switch.
It causes compilation failure for comdat because functions with comdat
has specific text section, not the default .text section.
Since HIP uses comdat, this bug caused failures for HIP.
Differential Revision: https://reviews.llvm.org/D46770
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332137
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Sanjay Patel [Fri, 11 May 2018 20:08:23 +0000 (20:08 +0000)]
[DAG] reduce code duplication; NFCI
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332133
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Daniel Neilson [Fri, 11 May 2018 20:04:50 +0000 (20:04 +0000)]
[InstCombine] Handle atomic memset in the same way as regular memset
Summary:
This change adds handling of the atomic memset intrinsic to the
code path that simplifies the regular memset. In practice this means
that we will now also expand a small constant-length atomic memset
into a single unordered atomic store.
Reviewers: apilipenko, skatkov, mkazantsev, anna, reames
Reviewed By: reames
Subscribers: reames, llvm-commits
Differential Revision: https://reviews.llvm.org/D46660
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332132
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David Blaikie [Fri, 11 May 2018 19:21:40 +0000 (19:21 +0000)]
Move standard library inclusions to after internal inclusions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332124
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Vedant Kumar [Fri, 11 May 2018 18:40:10 +0000 (18:40 +0000)]
[DAGCombiner] Set the right SDLoc on extended SETCC uses (7/N)
ExtendSetCCUses updates SETCC nodes which use a load (OriginalLoad) to
reflect a simplification to the load (ExtLoad).
Based on my reading, ExtendSetCCUses may create new nodes to extend a
constant attached to a SETCC. It also creates fresh SETCC nodes which
refer to any updated operands.
ISTM that the location applied to the new constant and SETCC nodes
should be the same as the location of the ExtLoad.
This was suggested by Adrian in https://reviews.llvm.org/D45995.
Part of: llvm.org/PR37262
Differential Revision: https://reviews.llvm.org/D46216
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332119
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Vedant Kumar [Fri, 11 May 2018 18:40:08 +0000 (18:40 +0000)]
[DAGCombiner] Set the right SDLoc on a newly-created sextload (6/N)
This teaches tryToFoldExtOfLoad to set the right location on a
newly-created extload. With that in place, the logic for performing a
certain ([s|z]ext (load ...)) combine becomes identical for sexts and
zexts, and we can get rid of one copy of the logic.
The test case churn is due to dependencies on IROrders inherited from
the wrong SDLoc.
Part of: llvm.org/PR37262
Differential Revision: https://reviews.llvm.org/D46158
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332118
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Vedant Kumar [Fri, 11 May 2018 18:40:02 +0000 (18:40 +0000)]
[DAGCombiner] Factor out duplicated logic for an extload combine, NFC (5/N)
Part of the logic for combining (zext (load ...)) and (sext (load ...))
is duplicated. This creates problems because bugs in one version have to
be fixed again in the other version.
To address this, as a first step, I've extracted the duplicate logic
into a helper. I'll fix the debug location bug in the helper and
eliminate the copy of its logic in a followup.
Part of: llvm.org/PR37262
Differential Revision: https://reviews.llvm.org/D46157
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332117
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Chris Matthews [Fri, 11 May 2018 18:38:02 +0000 (18:38 +0000)]
[LIT] replace output escapes wit a cdata block
CDATA blocks don't need to have XML stuff escaped. Makes sense to wrap
output in them instead of escaping.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332116
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Nico Weber [Fri, 11 May 2018 17:58:52 +0000 (17:58 +0000)]
make add_llvm_fuzzer calls slightly more consisten with other cmake
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332112
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David Bolvansky [Fri, 11 May 2018 17:50:49 +0000 (17:50 +0000)]
[InstCombine] snprintf optimizations
Reviewers: spatel, efriedma, majnemer, rja, bkramer
Reviewed By: rja, bkramer
Subscribers: mstorsjo, rja, llvm-commits
Differential Revision: https://reviews.llvm.org/D46285
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332110
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Simon Pilgrim [Fri, 11 May 2018 17:38:36 +0000 (17:38 +0000)]
[X86][BtVer2] Model ymm move as double pumped instructions
We still need to handle mmx/xmm moves as 'decode-only' no-pipe instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332109
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Alex Bradbury [Fri, 11 May 2018 17:30:28 +0000 (17:30 +0000)]
[RISCV] Support .option rvc and norvc assembler directives
These directives allow the 'C' (compressed) extension to be enabled/disabled
within a single file.
Differential Revision: https://reviews.llvm.org/D45864
Patch by Kito Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332107
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Martin Storsjo [Fri, 11 May 2018 16:53:56 +0000 (16:53 +0000)]
[Analysis] Validate the return type of s(n)printf like libcalls
If the sprintf function is static (as on mingw-w64, where many stdio
functions are static inline wrappers), earlier optimization passes
could optimize out the return value altogether, and make it void,
which could break optimizations of this libcall that touch the
return value.
This fixes the issue discussed in PR37408 for the sprintf function.
Differential Revision: https://reviews.llvm.org/D46752
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332106
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Simon Pilgrim [Fri, 11 May 2018 16:38:59 +0000 (16:38 +0000)]
[X86][MMX] Tag MMX Move/Load/Store as WriteVec schedule classes
Fixes an issue on SLM/Btver2 where we had instructions were being treated as scalar loads/stores
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332104
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Geoff Berry [Fri, 11 May 2018 16:25:06 +0000 (16:25 +0000)]
[AArch64] Fix performPostLD1Combine to check for constant lane index.
Summary:
performPostLD1Combine in AArch64ISelLowering looks for vector
insert_vector_elt of a loaded value which it can optimize into a single
LD1LANE instruction. The code checking for the pattern was not checking
if the lane index was a constant which could cause two problems:
- an assert when lowering the LD1LANE ISD node since it assumes an
constant operand
- an assert in isel if the lane index value depends on the
post-incremented base register
Both of these issues are avoided by simply checking that the lane index
is a constant.
Fixes bug 35822.
Reviewers: t.p.northover, javed.absar
Subscribers: rengolin, kristof.beyls, mcrosier, llvm-commits
Differential Revision: https://reviews.llvm.org/D46591
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332103
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Simon Dardis [Fri, 11 May 2018 16:13:53 +0000 (16:13 +0000)]
[mips] Rename Filler to MipsDelaySlotFiller and initialize the pass
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332102
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Sanjoy Das [Fri, 11 May 2018 15:54:46 +0000 (15:54 +0000)]
Use iteration instead of recursion in CFIInserter
Summary: This recursive step can overflow the stack.
Reviewers: djokov, petarj
Subscribers: mcrosier, jlebar, bixia, llvm-commits
Differential Revision: https://reviews.llvm.org/D46671
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332101
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Davide Italiano [Fri, 11 May 2018 15:45:36 +0000 (15:45 +0000)]
[Reassociate] Prevent infinite loops when processing PHIs.
Phi nodes can reside in live blocks but one of their incoming
arguments can come from a dead block. Dead blocks and reassociate
don't play nice together. In fact, reassociate performs an RPO
as a first step to avoid processing dead blocks.
The reason why Reassociate might not fixpoint when examining
dead blocks is that the following:
%xor0 = xor i16 %xor1, undef
%xor1 = xor i16 %xor0, undef
is perfectly valid LLVM IR (if it appears in a dead block),
so the worklist algorithm keeps pushing the two instructions for
reexamination. Note that this is not Reassociate fault, at least
not entirely. It's llvm that has a weird definition of dominance.
Fixes PR37390.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332100
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Nico Weber [Fri, 11 May 2018 15:25:38 +0000 (15:25 +0000)]
Remove unused SyncExecutor and make it clearer that the whole file is only used if LLVM_ENABLE_THREADS
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332098
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Simon Dardis [Fri, 11 May 2018 15:21:40 +0000 (15:21 +0000)]
[mips] Enable disassembly of fused (negative) multiply add/sub instructions
Reviewers: atanasyan, smaksimovic, abeserminji
Differential Revision: https://reviews.llvm.org/D46392
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332097
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Simon Pilgrim [Fri, 11 May 2018 15:16:15 +0000 (15:16 +0000)]
[X86][SLM] Vector stores only use the MEC port.
Confirmed by both Agner and Intel's AOM - the IEC/FPC are not required for pure load/stores (even if its a partial update).
Can't fix WriteStore until all RMW instructions are cleaned up though....
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332096
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Simon Pilgrim [Fri, 11 May 2018 14:30:54 +0000 (14:30 +0000)]
[X86] Split WriteF/WriteVec Move/Load/Store scheduler classes by vector width
Fixes a SNB issue that was missing vlddqu/vmovntdqa ymm instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332094
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Daniel Neilson [Fri, 11 May 2018 14:30:02 +0000 (14:30 +0000)]
[InstCombine] Unify handling of atomic memtransfer with non-atomic memtransfer
Summary:
This change reworks the handling of atomic memcpy within the instcombine pass.
Previously, a constant length atomic memcpy would be lowered into loads & stores
as long as no more than 16 load/store pairs are created. This is quite different
from the lowering done for a non-atomic memcpy; which only ever lowers into a single
load/store pair of no more than 8 bytes. Larger constant-sized memcpy calls are
expanded to load/stores in later passes, such as SelectionDAG lowering.
In this change the behaviour for atomic memcpy is unified with non-atomic memcpy;
atomic memcpy is now treated in the same was as non-atomic memcpy has always been.
We leave it to later passes to lower longer-length atomic memcpy calls.
Due to the structure of the pass's handling of memtransfer intrinsics, this change
also gives us handling of atomic memmove that we did not previously have.
Reviewers: apilipenko, skatkov, mkazantsev, anna, reames
Reviewed By: reames
Subscribers: reames, llvm-commits
Differential Revision: https://reviews.llvm.org/D46658
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332093
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Simon Pilgrim [Fri, 11 May 2018 12:46:54 +0000 (12:46 +0000)]
[X86] Added scheduler helper classes to split move/load/store by size
Nothing uses this yet but this will allow us to specialize MMX/XMM/YMM/ZMM vector moves.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332090
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Sven van Haastregt [Fri, 11 May 2018 09:45:42 +0000 (09:45 +0000)]
[APFloat] Set losesInfo on no-op convert
losesInfo would be left unset when no conversion needs to be done. A
caller such as InstCombine's fitsInFPType would then branch on an
uninitialized value.
Caught using valgrind on an out-of-tree target.
Differential Revision: https://reviews.llvm.org/D46645
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332087
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Jakub Kuderski [Fri, 11 May 2018 09:30:29 +0000 (09:30 +0000)]
[IRTests] Verify PDT instead of DT
Summary: Fix two typos which result in verifying wrong data structures (DT) instead of PDT in DominatorTreeBatchUpdatesTest.
Reviewers: davide, kuhar, grosser, dberlin
Reviewed By: davide, kuhar, dberlin
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D46696
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332086
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Tom Stellard [Fri, 11 May 2018 05:44:16 +0000 (05:44 +0000)]
AMDGPU/GlobalISel: Implement select() for 32-bit G_FPTOUI
Reviewers: arsenm, nhaehnle
Subscribers: kzhuravl, wdng, yaxunl, rovka, kristof.beyls, dstuttard, tpr, t-tye, llvm-commits
Differential Revision: https://reviews.llvm.org/D45883
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332082
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Alexander Shaposhnikov [Fri, 11 May 2018 05:27:06 +0000 (05:27 +0000)]
[llvm-strip] Add support for -remove-section
This diff adds support for -remove-section to llvm-strip.
Test plan: make check-all
Differential revision: https://reviews.llvm.org/D46567
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332081
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Craig Topper [Fri, 11 May 2018 04:33:18 +0000 (04:33 +0000)]
[X86] Remove and autoupgrade the avx512.mask.store.ss intrinsic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332079
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Alexander Shaposhnikov [Fri, 11 May 2018 04:30:57 +0000 (04:30 +0000)]
[llvm-objcopy] Update remove-section.test
Verify that the input binary is not getting modified
and add an invocation which uses -remove-section instead of -R.
Test plan: make check-all
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332078
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Brian Gesiak [Fri, 11 May 2018 03:12:28 +0000 (03:12 +0000)]
[Coroutines] PR34897: Fix incorrect elisions
Summary:
https://bugs.llvm.org/show_bug.cgi?id=34897 demonstrates an incorrect
coroutine frame allocation elision in the coro-elide pass. The elision
is performed on the basis that the SSA variables from all llvm.coro.begin
are directly referenced in subsequent llvm.coro.destroy instructions.
However, this ignores the fact that the function may exit through paths
that do not run these destroy instructions. In the sample program from
PR34897, for example, the llvm.coro.destroy instruction is only
executed in exception handling code. When the coroutine function exits
normally, llvm.coro.destroy is not called. Eliding the allocation in
this case causes a subsequent reference to the coroutine handle from
outside of the function to access freed memory.
To fix the issue, when finding an llvm.coro.destroy for each llvm.coro.begin,
only consider llvm.coro.destroy that are executed along non-exceptional paths.
Test Plan:
1. Download the sample program from
https://bugs.llvm.org/show_bug.cgi?id=34897, compile it with
`clang++ -fcoroutines-ts -stdlib=libc++ -std=c++1z -O2`, and run it.
It should print `"run1\ncheck1\nrun2\ncheck2"` and then exit
successfully.
2. Compile https://godbolt.org/g/mCKfnr and confirm it is still
optimized to a single instruction, 'return 1190'.
3. `check-llvm`
Reviewers: rsmith, GorNishanov, eric_niebler
Reviewed By: GorNishanov
Subscribers: andrewrk, lewissbaker, EricWF, llvm-commits
Differential Revision: https://reviews.llvm.org/D43242
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332077
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Brian Gesiak [Fri, 11 May 2018 01:47:27 +0000 (01:47 +0000)]
[Support] Add docs for 'openFileFor{Write,Read}'
Summary:
Add documentation for the LLVM Support functions `openFileForWrite` and
`openFileForRead`. The `openFileForRead` parameter `RealPath`, in
particular, I think warranted some explanation.
In addition, make the behavior of the functions more consistent across
platforms. Prior to this patch, Windows would set or not set the result
file descriptor based on the nature of the error, whereas Unix would
consistently set it to `-1` if the open failed. Make Windows
consistently set it to `-1` as well.
Test Plan:
1. `ninja check-llvm`
2. `ninja docs-llvm-html`
Reviewers: zturner, rnk, danielmartin, scanon
Reviewed By: danielmartin, scanon
Subscribers: scanon, danielmartin, llvm-commits
Differential Revision: https://reviews.llvm.org/D46499
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332075
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Kostya Serebryany [Fri, 11 May 2018 01:09:39 +0000 (01:09 +0000)]
[sanitizer-coverage] don't instrument a function if it's entry block ends with 'unreachable'
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332072
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Kamil Rytarowski [Fri, 11 May 2018 00:58:01 +0000 (00:58 +0000)]
Register NetBSD/i386 in AddressSanitizer.cpp
Summary:
Ship kNetBSD_ShadowOffset32 set to 1ULL << 30.
This is prepared for the amd64 kernel runtime.
Sponsored by <The NetBSD Foundation>
Reviewers: vitalybuka, joerg, kcc
Reviewed By: vitalybuka
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D46724
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332069
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Craig Topper [Fri, 11 May 2018 00:46:09 +0000 (00:46 +0000)]
[InstCombine] Add tests for cases where we don't recognize type promoted rotate idioms.
These rotates take the form
(x << (n & mask)) | (x >> (-n & mask)) where mask is bitwidth - 1.
If x has been promoted to a wider type than its original bit width due to type promotion we fail to narrower it and therefore don't recognize it as a rotate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332068
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Chris Matthews [Fri, 11 May 2018 00:25:43 +0000 (00:25 +0000)]
Support Unsupported Tests in xunit output
We were reporting "Unsupported" tests in xunit as passes, however since
they are not run, it make more sense to mark them as skipped. The Junit
xml standard has support for that, so lets use it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332065
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Chris Matthews [Fri, 11 May 2018 00:25:42 +0000 (00:25 +0000)]
Refactor xunit test case builder to not use as much str addition
String concatenation in python is slow. Refactor to not concatenate the
possibly large strings of test output and instead write them directly
to the output file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332064
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Wei Mi [Thu, 10 May 2018 23:02:27 +0000 (23:02 +0000)]
[SampleFDO] Don't treat warm callsite with inline instance in the profile as cold
We found current sampleFDO had a performance issue when triaging a regression.
For a callsite with inline instance in the profile, even if hot callsite inliner
cannot inline it, it may still execute enough times and should not be treated as
cold in regular inliner later. However, currently if such callsite is not inlined
by hot callsite inliner, and the BB where the callsite locates doesn't get
samples from other instructions inside of it, the callsite will have no profile
metadata annotated. In regular inliner cost analysis, if the callsite has no
profile annotated and its caller has profile information, it will be treated as
cold.
The fix changes the isCallsiteHot check and chooses to compare
CallsiteTotalSamples with hot cutoff value computed by ProfileSummaryInfo.
Differential Revision: https://reviews.llvm.org/D45377
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332058
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Vedant Kumar [Thu, 10 May 2018 23:01:54 +0000 (23:01 +0000)]
[STLExtras] Add distance() for ranges, pred_size(), and succ_size()
This commit adds a wrapper for std::distance() which works with ranges.
As it would be a common case to write `distance(predecessors(BB))`, this
also introduces `pred_size()` and `succ_size()` helpers to make that
easier to write.
Differential Revision: https://reviews.llvm.org/D46668
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332057
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Chris Matthews [Thu, 10 May 2018 22:51:28 +0000 (22:51 +0000)]
[LIT] Move xunit tests tests into their own location, and and add failures
Failures will increase coverage.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332056
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Craig Topper [Thu, 10 May 2018 22:45:28 +0000 (22:45 +0000)]
[InstCombine] Replace an 'if' that should always be true with an assert.
The bitwidth of the operation should always be wider than the result width of the truncate since we don't recurse through any width changing operations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332055
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Sam Clegg [Thu, 10 May 2018 22:16:44 +0000 (22:16 +0000)]
[WebAssembly] Initial Disassembler.
This implements a new table-gen emitter to create tables for
a wasm disassembler, and a dissassembler to use them.
Comes with 2 tests, that tests a few instructions manually. Is also able to
disassemble large .wasm files with objdump reasonably.
Not working so well, to be addressed in followups:
- objdump appears to be passing an incorrect starting point.
- since the disassembler works an instruction at a time, and it is
disassembling stack instruction, it has no idea of pseudo register assignments.
These registers are required for the instruction printing code that follows.
For now, all such registers appear in the output as $0.
Patch by Wouter van Oortmerssen
Differential Revision: https://reviews.llvm.org/D45848
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332052
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Craig Topper [Thu, 10 May 2018 21:49:16 +0000 (21:49 +0000)]
[X86] Add new patterns for masked scalar load/store to match clang's codegen from r331958.
Clang's codegen now uses 128-bit masked load/store intrinsics in IR. The backend will widen to 512-bits on AVX512F targets.
So this patch adds patterns to detect codegen's widening and patterns for AVX512VL that don't get widened.
We may be able to drop some of the old patterns, but I leave that for a future patch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332049
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Martin Storsjo [Thu, 10 May 2018 21:23:36 +0000 (21:23 +0000)]
Revert "[InstCombine] snprintf optimizations"
This reverts commit SVN r331889, which could trigger failed
assertions for cases where the snprintf function is declared
with a vaguely differing signature (e.g. being defined as
static inline), see PR37408.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332043
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Tom Stellard [Thu, 10 May 2018 21:20:10 +0000 (21:20 +0000)]
AMDGPU/GlobalISel: Implement select() for G_BITCAST s32 <--> <2 x s16>
Reviewers: arsenm, nhaehnle
Subscribers: kzhuravl, wdng, yaxunl, rovka, kristof.beyls, dstuttard, tpr, t-tye, llvm-commits
Differential Revision: https://reviews.llvm.org/D45881
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332042
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Robert Widmann [Thu, 10 May 2018 21:10:06 +0000 (21:10 +0000)]
[LLVM-C] Consolidate llgo's DIBuilder Bindings
Summary: Move and correct LLVMDIBuilderCreateTypedef. This is the last API in DIBuilderBindings.h, so it is being removed and the C API will now be re-exported from IRBindings.h.
Reviewers: whitequark, harlanhaskins, deadalnix
Reviewed By: whitequark
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D46725
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332041
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Tom Stellard [Thu, 10 May 2018 20:53:06 +0000 (20:53 +0000)]
AMDGPU/GlobalISel: Enable TableGen'd instruction selector
Reviewers: arsenm, nhaehnle
Reviewed By: arsenm
Subscribers: kzhuravl, wdng, mgorny, yaxunl, rovka, kristof.beyls, dstuttard, tpr, t-tye, llvm-commits
Differential Revision: https://reviews.llvm.org/D45994
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332039
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Sanjay Patel [Thu, 10 May 2018 20:03:13 +0000 (20:03 +0000)]
[InstCombine] add folds for minnum(-a, -b) --> -maxnum(a, b)
This is similar to what we do for integer min/max with 'not'
ops (rL321882).
This should fix:
https://bugs.llvm.org/show_bug.cgi?id=37404
https://bugs.llvm.org/show_bug.cgi?id=37405
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332031
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Wolfgang Pieb [Thu, 10 May 2018 20:02:34 +0000 (20:02 +0000)]
[DWARF] Fixing a bug in DWARF v5 string offsets tables where the length encoded the contribution
length excluding the table header. Instead it must encode the contribution length minus the length
field itself.
Reviewer: JDevliegehere
Differential Revision: https://reviews.llvm.org/D45922
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332030
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Omer Paparo Bivas [Thu, 10 May 2018 19:46:19 +0000 (19:46 +0000)]
[InstCombine] Moving overflow computation logic from InstCombine to ValueTracking; NFC
Differential Revision: https://reviews.llvm.org/D46704
Change-Id: Ifabcbe431a2169743b3cc310f2a34fd706f13f02
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332026
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Sanjay Patel [Thu, 10 May 2018 19:21:08 +0000 (19:21 +0000)]
[InstCombine] add minnum/maxnum tests (PR37404, PR37405); NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332025
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Gabor Buella [Thu, 10 May 2018 19:15:10 +0000 (19:15 +0000)]
[X86] Initialize HasPTWRITE member of X86Subtarget
This was missing from r331961.
Caught by sanitizer bots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332024
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Simon Pilgrim [Thu, 10 May 2018 19:08:06 +0000 (19:08 +0000)]
[X86] Convert/Merge more instregex patterns to reduce InstrRW compile time.
Use instrs lists or merge multiple instregex patterns.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332022
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George Burgess IV [Thu, 10 May 2018 18:37:54 +0000 (18:37 +0000)]
Add regression test for r331976
In general, it's difficult to poke the ConstantExpr code in CFLAA, since
LLVM is so great at eagerly reducing ConstantExprs. :)
Sadly, this only shows a functional difference from before the patch
because CFLAA has some special logic around taking loads of non-pointers
into account. Namely, with the broken select behavior, CFLAA will
completely fail to take note of @g3. Since CFLAA doesn't have any record
about @g3 when we do an alias query for @g3 and %a, it conservatively
answers MayAlias. When we properly take @g3 into account with the new
select logic, we get NoAlias for this query.
I suspect that the aforementioned "special logic" isn't completely
correct, but this test-case should prevent future wonky aliasing results
from appearing for these flavors of ConstantExprs, so I think it's still
worth having.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332017
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Haicheng Wu [Thu, 10 May 2018 18:27:36 +0000 (18:27 +0000)]
[CGP] Split large data structres to sink more GEPs
Accessing the members of a large data structures needs a lot of GEPs which
usually have large offsets due to the size of the underlying data structure. If
the offsets are too large to fit into the r+i addressing mode, these GEPs cannot
be sunk to their users' blocks and many extra registers are needed then to carry
the values of these GEPs.
This patch tries to split a large data struct starting from %base like the
following.
Before:
BB0:
%base =
BB1:
%gep0 = gep %base, off0
%gep1 = gep %base, off1
%gep2 = gep %base, off2
BB2:
%load1 = load %gep0
%load2 = load %gep1
%load3 = load %gep2
After:
BB0:
%base =
%new_base = gep %base, off0
BB1:
%new_gep0 = %new_base
%new_gep1 = gep %new_base, off1 - off0
%new_gep2 = gep %new_base, off2 - off0
BB2:
%load1 = load i32, i32* %new_gep0
%load2 = load i32, i32* %new_gep1
%load3 = load i32, i32* %new_gep2
In the above example, the struct is split into two parts. The first part still
starts from %base and the second part starts from %new_base. After the
splitting, %new_gep1 and %new_gep2 have smaller offsets and then can be sunk to
BB2 and folded into their users.
The algorithm to split data structure is simple and very similar to the work of
merging SExts. First, it collects GEPs that have large offsets when iterating
the blocks. Second, it splits the underlying data structures and updates the
collected GEPs to use smaller offsets.
Differential Revision: https://reviews.llvm.org/D42759
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332015
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Robert Widmann [Thu, 10 May 2018 18:23:55 +0000 (18:23 +0000)]
[LLVM-C] Add Accessors for Common DIType and DILocation Properties
Summary:
- Adds getters for the line, column, and scope of a DILocation
- Adds getters for the name, size in bits, offset in bits, alignment in bits, line, and flags of a DIType
Reviewers: whitequark, harlanhaskins, deadalnix
Reviewed By: whitequark
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D46627
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332014
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Robert Widmann [Thu, 10 May 2018 18:09:53 +0000 (18:09 +0000)]
[LLVM-C] Move DIBuilder Bindings For Temporary MDNodes
Summary: Move LLVMTemporaryMDNode and LLVMMetadataReplaceAllUsesWith to the C bindings and add LLVMDeleteTemporaryMDNode for deleting non-RAUW'ed temporary nodes.
Reviewers: whitequark, harlanhaskins, deadalnix
Reviewed By: whitequark
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D46632
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332010
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Sam Clegg [Thu, 10 May 2018 17:49:11 +0000 (17:49 +0000)]
[WebAsembly] Update default triple in test files to wasm32-unknown-unkown.
Summary: The final -wasm component has been the default for some time now.
Subscribers: jfb, dschuff, jgravelle-google, eraman, aheejin, JDevlieghere, sunfish, llvm-commits
Differential Revision: https://reviews.llvm.org/D46342
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332007
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Simon Pilgrim [Thu, 10 May 2018 17:42:26 +0000 (17:42 +0000)]
[X86][Znver1] Remove unnecessary SchedWritePMULLD InstRW overrides.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332006
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Sam Clegg [Thu, 10 May 2018 17:38:35 +0000 (17:38 +0000)]
[WebAssembly] Create section start symbols automatically for all sections
These symbols only get included in the output symbols table if
they are used in a relocation.
This behaviour matches more closely the ELF object writer.
Differential Revision: https://reviews.llvm.org/D46561
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332005
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Chandler Carruth [Thu, 10 May 2018 17:33:20 +0000 (17:33 +0000)]
[PM/LoopUnswitch] Avoid pointlessly creating an exit block set.
This code can just test whether blocks are *in* the loop, which we
already have a dedicated set tracking in the loop itself.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332004
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Simon Pilgrim [Thu, 10 May 2018 17:30:49 +0000 (17:30 +0000)]
[X86][SNB] Fix typo in PEXTRDmr instregex, was missing VPEXTRDmr.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@332002
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Simon Pilgrim [Thu, 10 May 2018 17:06:09 +0000 (17:06 +0000)]
[X86] Split WriteVecALU/WriteVecLogic/WriteShuffle/WriteVarShuffle/WritePSADBW/WritePHAdd scheduler classes
Split off XMM classes from the default (MMX) classes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@331999
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Sanjay Patel [Thu, 10 May 2018 17:05:38 +0000 (17:05 +0000)]
[InstCombine] regenerate full checks; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@331998
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Simon Atanasyan [Thu, 10 May 2018 16:01:36 +0000 (16:01 +0000)]
[mips] Accept 32-bit offsets for ld/sd/lld commands
This is a follow up to the rL330983. The patch teaches ld, sd, and lld
commands accept 32-bit memory offsets by replacing `mem_simm16` operand
to `mem_simmptr`. In fact, these commands should accept 64-bit offsets,
but so large offsets require another command expanding and will be
supported by a separate patch.
Differential Revision: https://reviews.llvm.org/D46629
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@331997
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Simon Atanasyan [Thu, 10 May 2018 16:01:18 +0000 (16:01 +0000)]
[mips] Accept 32-bit offsets for lh and lhu commands
This is a follow up to the rL330983. The patch teaches lh and lhu
commands accepts 32-bit memory offsets by replacing `mem_simm16` operand
to `mem_simmptr`.
Differential Revision: https://reviews.llvm.org/D46513
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@331996
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Alexander Shaposhnikov [Thu, 10 May 2018 15:56:04 +0000 (15:56 +0000)]
[llvm-objcopy] Add tests for help messages
This diff slightly reorganizes the tests and improves
the test coverage of help messages / error reports.
Test plan: make check-all
Differential revision: https://reviews.llvm.org/D46589
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@331993
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Sanjay Patel [Thu, 10 May 2018 15:40:49 +0000 (15:40 +0000)]
[x86] fix fmaxnum/fminnum with nnan
With nnan, there's no need for the masked merge / blend
sequence (that probably costs much more than the min/max
instruction).
Somewhere between clang 5.0 and 6.0, we started producing
these intrinsics for fmax()/fmin() in C source instead of
libcalls or fcmp/select. The backend wasn't prepared for
that, so we regressed perf in those cases.
Note: it's possible that other targets have similar problems
as seen here.
Noticed while investigating PR37403 and related bugs:
https://bugs.llvm.org/show_bug.cgi?id=37403
The IR FMF propagation cases still don't work. There's
a proposal that might fix those cases in D46563.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@331992
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Daniel Neilson [Thu, 10 May 2018 15:12:49 +0000 (15:12 +0000)]
[DSE] Teach the pass about partial overwrite of atomic memory intrinsics
Summary:
This change teaches DSE that the atomic memory intrinsics can be overwriten
partially in the same way as the non-atomic forms. Specifically, that the
atomic memcpy & memset can be shortened at the end and that the atomic memset
can be shortened at the beginning, if they partially overwritten
by later stores.
Reviewers: mkazantsev, skatkov, apilipenko, efriedma, rsmith, spatel, filcab, sanjoy
Reviewed By: efriedma
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D45584
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@331991
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whitequark [Thu, 10 May 2018 15:05:47 +0000 (15:05 +0000)]
[PR37339] Fix assertion in FunctionComparator::cmpInlineAsm
Fixes bug https://bugs.llvm.org/show_bug.cgi?id=37339.
InlineAsm is only uniqued if the FunctionTypes are exactly the
same, while cmpTypes() for example considers all pointer types
in the default address space to be the same. For this reason
the end of cmpInlineAsm() can be reached.
This patch replaces the unreachable assertion with a check that
the function types are not identical.
Differential Revision: https://reviews.llvm.org/D46495
Reviewers: jfb
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@331990
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Sanjay Patel [Thu, 10 May 2018 14:58:47 +0000 (14:58 +0000)]
[x86] fix test names; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@331989
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Sanjay Patel [Thu, 10 May 2018 14:48:42 +0000 (14:48 +0000)]
[x86] add tests for maxnum/minnum intrinsics with nnan; NFC
Clang 6.0 was updated to create these intrinsics rather than
libcalls or fcmp/select, but the backend wasn't prepared to
handle that optimally.
This bug is not the primary reason for PR37403:
https://bugs.llvm.org/show_bug.cgi?id=37403
...but it's probably more important for x86 perf.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@331988
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Nico Weber [Thu, 10 May 2018 14:45:05 +0000 (14:45 +0000)]
Don't redefine a bunch of defines from llvm-config.h in config.h.
r210144 made config.h include llvm-config.h and deduplicated defines. Then
rL239987 later added back some of the duplication.
http://lists.llvm.org/pipermail/llvm-commits/Week-of-Mon-
20150914/300329.html
suggests this was done for the configure/make build, which no longer exists.
No intended behavior change.
https://reviews.llvm.org/D46288
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@331987
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James Henderson [Thu, 10 May 2018 14:36:24 +0000 (14:36 +0000)]
[DWARF] Remove unused member and fix(?) the unit-tests on big endian hosts
I can't verified the fix on a big endian host, so I'm not 100% certain it
will work.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@331986
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Nirav Dave [Thu, 10 May 2018 14:28:54 +0000 (14:28 +0000)]
[DAG] Avoid using deleted node in rebuildSetCC
Summary:
The combine in rebuildSetCC may be combined to another
node leaving our references stale. Keep a handle on
it to avoid stale references.
Fixes PR36602.
Reviewers: dbabokin, RKSimon, eli.friedman, davide
Subscribers: hiraditya, uabelho, JesperAntonsson, qcolombet, llvm-commits
Differential Revision: https://reviews.llvm.org/D46404
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@331985
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Roman Lebedev [Thu, 10 May 2018 14:16:45 +0000 (14:16 +0000)]
[DWARF] DwarfGenerator.h LineTable: explicitly mark DG as unused
Just want to unbreak the build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@331984
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