OSDN Git Service
Nikita Popov [Sun, 9 Jun 2019 14:39:47 +0000 (14:39 +0000)]
[InstCombine] Add tests for usub.sat(x,y)+y etc; NFC
For PR42178.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362905
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Sanjay Patel [Sun, 9 Jun 2019 13:58:46 +0000 (13:58 +0000)]
[InstSimplify] reduce code duplication for fcmp folds; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362904
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Sanjay Patel [Sun, 9 Jun 2019 13:48:59 +0000 (13:48 +0000)]
[InstSimplify] enhance fcmp fold with never-nan operand
This is another step towards correcting our usage of fast-math-flags when applied on an fcmp.
In this case, we are checking for 'nnan' on the fcmp itself rather than the operand of
the fcmp. But I'm leaving that clause in until we're more confident that we can stop
relying on fcmp's FMF.
By using the more general "isKnownNeverNaN()", we gain a simplification shown on the
tests with 'uitofp' regardless of the FMF on the fcmp (uitofp never produces a NaN).
On the tests with 'fabs', we are now relying on the FMF for the call fabs instruction
in addition to the FMF on the fcmp.
This is a continuation of D62979 / rL362879.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362903
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Sanjay Patel [Sun, 9 Jun 2019 13:30:14 +0000 (13:30 +0000)]
[InstSimplify] add tests for fcmp with known-never-nan operands; NFC
Opposite predicate for rL362742 / rL362879 / D62979
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362902
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Anton Afanasyev [Sun, 9 Jun 2019 12:15:47 +0000 (12:15 +0000)]
[MIR] Add simple PRE pass to MachineCSE
This is the second part of the commit fixing PR38917 (hoisting
partitially redundant machine instruction). Most of PRE (partitial
redundancy elimination) and CSE work is done on LLVM IR, but some of
redundancy arises during DAG legalization. Machine CSE is not enough
to deal with it. This simple PRE implementation works a little bit
intricately: it passes before CSE, looking for partitial redundancy
and transforming it to fully redundancy, anticipating that the next
CSE step will eliminate this created redundancy. If CSE doesn't
eliminate this, than created instruction will remain dead and eliminated
later by Remove Dead Machine Instructions pass.
The third part of the commit is supposed to refactor MachineCSE,
to make it more clear and to merge MachinePRE with MachineCSE,
so one need no rely on further Remove Dead pass to clear instrs
not eliminated by CSE.
First step: https://reviews.llvm.org/D54839
Fixes llvm.org/PR38917
This is fixed recommit of r361356 after PowerPC64 multistage build failure.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362901
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Ayke van Laethem [Sun, 9 Jun 2019 10:20:33 +0000 (10:20 +0000)]
[CaptureTracking] Don't let comparisons against null escape inbounds pointers
Pointers that are in-bounds (either through dereferenceable_or_null or
thorough a getelementptr inbounds) cannot be captured with a comparison
against null. There is no way to construct a pointer that is still in
bounds but also NULL.
This helps safe languages that insert null checks before load/store
instructions. Without this patch, almost all pointers would be
considered captured even for simple loads. With this patch, an icmp with
null will not be seen as escaping as long as certain conditions are met.
There was a lot of discussion about this patch. See the Phabricator
thread for detals.
Differential Revision: https://reviews.llvm.org/D60047
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362900
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Ayke van Laethem [Sun, 9 Jun 2019 10:06:35 +0000 (10:06 +0000)]
[bindings/go] Add wrappers for atomic operations.
This patch adds Go bindings for atomic operations in LLVM.
Differential Revision: https://reviews.llvm.org/D61034
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362899
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Jatin Bhateja [Sun, 9 Jun 2019 09:59:26 +0000 (09:59 +0000)]
[X86] NFCI : Comment updation for EVEX to VEX translation.
Reviewers: llvm-commits, jbhateja
Reviewed By: jbhateja
Subscribers: llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D63055
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362898
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Simon Pilgrim [Sun, 9 Jun 2019 09:07:30 +0000 (09:07 +0000)]
Use for-range loop. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362897
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Amara Emerson [Sun, 9 Jun 2019 07:31:25 +0000 (07:31 +0000)]
[AArch64][GlobalISel] Select immediate forms of cmp instructions.
A simple re-use of the immediate operand matcher and renderer functions.
rdar://
43795178
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362896
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Craig Topper [Sun, 9 Jun 2019 03:21:33 +0000 (03:21 +0000)]
[X86] Remove (store (f32 (extractelt (v4f32))) isel patterns which is redundant.
We emit a MOVSSmr and a COPY_TO_REGCLASS, but that's what we would get from
selecting the store and extractelt independently.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362895
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Craig Topper [Sat, 8 Jun 2019 23:53:31 +0000 (23:53 +0000)]
[X86] Mutate scalar fceil/ffloor/ftrunc/fnearbyint/frint into X86ISD::RNDSCALE during PreProcessIselDAG to cut down on number of isel patterns.
Similar was done for vectors in r362535. Removes about 1200 bytes from the isel table.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362894
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Ayke van Laethem [Sat, 8 Jun 2019 22:21:37 +0000 (22:21 +0000)]
[bindings/go] Add bindings to LLVMGet?CmpPredicate
Add bindings so that predicates on comparisons (icmp/fcmp) can be
inspected from IR.
Note: I considered adding Value.ICmpPredicate() etc. instead but
Value.IntPredicate() seemed easier to read and matches the name of the
returned type.
(This change was also pushed two commits ago but accidentally had the
wrong title and description.)
Revision: https://reviews.llvm.org/D53884
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362893
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Ayke van Laethem [Sat, 8 Jun 2019 22:17:51 +0000 (22:17 +0000)]
Revert "[bindings/go] Add Go bindings for CalledValue"
This reverts commit
f675a60ca7a93f22e22dd4209504a9846dd04630.
The commit had the wrong title/description. Sorry about the mess!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362892
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Ayke van Laethem [Sat, 8 Jun 2019 22:15:38 +0000 (22:15 +0000)]
[bindings/go] Add Go bindings for CalledValue
This is very useful for inspecting generated IR, there appears to be no
other way to get the called function from a CallInst.
Differential Revision: https://reviews.llvm.org/D52972
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362891
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Ayke van Laethem [Sat, 8 Jun 2019 22:08:52 +0000 (22:08 +0000)]
[bindings/go] Add Go bindings for CalledValue
This is very useful for inspecting generated IR, there appears to be no
other way to get the called function from a CallInst.
Revision: https://reviews.llvm.org/D52972
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362890
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Ayke van Laethem [Sat, 8 Jun 2019 22:00:19 +0000 (22:00 +0000)]
[bindings/go] Add EraseFromParent
After using ReplaceAllUsesWith on an instruction, it may be necessary to
erase it even though it is dead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362889
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Ayke van Laethem [Sat, 8 Jun 2019 21:42:00 +0000 (21:42 +0000)]
[NFC] Test commit
Add a newline, which is missing according to go fmt.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362888
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Roman Lebedev [Sat, 8 Jun 2019 19:38:14 +0000 (19:38 +0000)]
[X86][Codegen] Add missed pattern that may be a lea+neg
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362886
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Simon Pilgrim [Sat, 8 Jun 2019 17:02:00 +0000 (17:02 +0000)]
[DAGCombine] visitAND - merge (zext_inreg ((s)extload x)) -> (zextload x) combines. NFCI.
Same codegen, only differ by the oneuse limit for the sextload case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362880
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Sanjay Patel [Sat, 8 Jun 2019 15:12:33 +0000 (15:12 +0000)]
[InstSimplify] enhance fcmp fold with never-nan operand
This is 1 step towards correcting our usage of fast-math-flags when applied on an fcmp.
In this case, we are checking for 'nnan' on the fcmp itself rather than the operand of
the fcmp. But I'm leaving that clause in until we're more confident that we can stop
relying on fcmp's FMF.
By using the more general "isKnownNeverNaN()", we gain a simplification shown on the
tests with 'uitofp' regardless of the FMF on the fcmp (uitofp never produces a NaN).
On the tests with 'fabs', we are now relying on the FMF for the call fabs instruction
in addition to the FMF on the fcmp.
I'll update the 'ult' case below here as a follow-up assuming no problems here.
Differential Revision: https://reviews.llvm.org/D62979
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362879
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Sylvestre Ledru [Sat, 8 Jun 2019 15:07:55 +0000 (15:07 +0000)]
fix a typo unavaliable=>unavailable
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362878
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David Bolvansky [Sat, 8 Jun 2019 12:07:59 +0000 (12:07 +0000)]
[NFC] Added tests for D63038
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362875
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David Green [Sat, 8 Jun 2019 10:32:53 +0000 (10:32 +0000)]
[ARM] Adjust isLegalT1AddressImmediate for non-legal types
Types such as float and i64's do not have legal loads in Thumb1, but will still
be loaded with a LDR (or potentially multiple LDR's). As such we can treat the
cost of addressing mode calculations the same as an i32 and get some optimisation
benefits.
Differential Revision: https://reviews.llvm.org/D62968
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362874
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David Green [Sat, 8 Jun 2019 10:18:23 +0000 (10:18 +0000)]
[ARM] Add MVE addressing to isLegalT2AddressImmediate
Now with MVE being added, we can add the vector addressing mode costs for it.
These are generally imm7 multiplied by the size of the type being loaded /
stored.
Differential Revision: https://reviews.llvm.org/D62967
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362873
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David Green [Sat, 8 Jun 2019 10:09:02 +0000 (10:09 +0000)]
[ARM] Add fp16 addressing to isLegalT2AddressImmediate
The fp16 version of VLDR takes a imm8 multiplied by 2. This updates the costs
to account for those, and adds extra testing. It is dependant upon hasFPRegs16
as this is what the load/store instructions require.
Differential Revision: https://reviews.llvm.org/D62966
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362872
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David Green [Sat, 8 Jun 2019 09:58:05 +0000 (09:58 +0000)]
[ARM] Add extra gep costmodel tests for MVE and half float. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362871
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David Green [Sat, 8 Jun 2019 09:36:49 +0000 (09:36 +0000)]
[ARM] Add HasNEON for all Neon patterns in ARMInstrNEON.td. NFCI
We are starting to add an entirely separate vector architecture to the ARM
backend. To do that we need at least some separation between the existing NEON
and the new MVE code. This patch just goes through the Neon patterns and
ensures that they are predicated on HasNEON, giving MVE a stable place to start
from.
No tests yet as this is largely an NFC, and we don't have the other target that
will treat any of these intructions as legal.
Differential Revision: https://reviews.llvm.org/D62945
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362870
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Jonas Paulsson [Sat, 8 Jun 2019 06:42:02 +0000 (06:42 +0000)]
[SystemZ] Fix CMakeLists.txt for alphabetical order (NFC).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362869
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Jonas Paulsson [Sat, 8 Jun 2019 06:19:15 +0000 (06:19 +0000)]
[SystemZ, RegAlloc] Favor 3-address instructions during instruction selection.
This patch aims to reduce spilling and register moves by using the 3-address
versions of instructions per default instead of the 2-address equivalent
ones. It seems that both spilling and register moves are improved noticeably
generally.
Regalloc hints are passed to increase conversions to 2-address instructions
which are done in SystemZShortenInst.cpp (after regalloc).
Since the SystemZ reg/mem instructions are 2-address (dst and lhs regs are
the same), foldMemoryOperandImpl() can no longer trivially fold a spilled
source register since the reg/reg instruction is now 3-address. In order to
remedy this, new 3-address pseudo memory instructions are used to perform the
folding only when the dst and lhs virtual registers are known to be allocated
to the same physreg. In order to not let MachineCopyPropagation run and
change registers on these transformed instructions (making it 3-address), a
new target pass called SystemZPostRewrite.cpp is run just after
VirtRegRewriter, that immediately lowers the pseudo to a target instruction.
If it would have been possibe to insert a COPY instruction and change a
register operand (convert to 2-address) in foldMemoryOperandImpl() while
trusting that the caller (e.g. InlineSpiller) would update/repair the
involved LiveIntervals, the solution involving pseudo instructions would not
have been needed. This is perhaps a potential improvement (see Phabricator
post).
Common code changes:
* A new hook TargetPassConfig::addPostRewrite() is utilized to be able to run a
target pass immediately before MachineCopyPropagation.
* VirtRegMap is passed as an argument to foldMemoryOperand().
Review: Ulrich Weigand, Quentin Colombet
https://reviews.llvm.org/D60888
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362868
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Nico Weber [Sat, 8 Jun 2019 01:27:47 +0000 (01:27 +0000)]
gn build: Merge r362857
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362864
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Seiya Nuta [Sat, 8 Jun 2019 01:22:54 +0000 (01:22 +0000)]
[llvm-objcopy][MachO] Recompute and update offset/size fields in the writer
Summary:
Recompute and update offset/size fields so that we can implement llvm-objcopy options like --only-section.
This patch is the first step and focuses on supporting load commands that covered by existing tests: executable files and
dynamic libraries are not supported.
Reviewers: alexshap, rupprecht, jhenderson
Reviewed By: alexshap, rupprecht
Subscribers: compnerd, jakehehrlich, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D62652
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362863
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Mike Spertus [Sat, 8 Jun 2019 00:23:08 +0000 (00:23 +0000)]
Visualizer for APInt and remove obsolete visualizer
Visualizer for the simple case of APInt (uints < 2^64)
as will be required for Clang ConstantArrayType visualizer.
Also, removed obsolete VS2013 SmallVectorVisualizer as VS2013
is no longer supported.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362860
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Amara Emerson [Sat, 8 Jun 2019 00:05:17 +0000 (00:05 +0000)]
Factor out SelectionDAG's switch analysis and lowering into a separate component.
In order for GlobalISel to re-use the significant amount of analysis and
optimization code in SDAG's switch lowering, we first have to extract it and
create an interface to be used by both frameworks.
No test changes as it's NFC.
Differential Revision: https://reviews.llvm.org/D62745
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362857
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Matt Arsenault [Fri, 7 Jun 2019 23:17:38 +0000 (23:17 +0000)]
LoopDistribute: Add testcase where SCEV wants to insert a runtime
check.
Only the memory based checks were being tested. Prepare for fix in
convergent handling.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362854
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Keno Fischer [Fri, 7 Jun 2019 23:08:38 +0000 (23:08 +0000)]
[GVN] non-functional code movement
Summary: Move some code around, in preparation for later fixes
to the non-integral addrspace handling (D59661)
Patch By Jameson Nash <jameson@juliacomputing.com>
Reviewed By: reames, loladiro
Differential Revision: https://reviews.llvm.org/D59729
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362853
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Matt Arsenault [Fri, 7 Jun 2019 23:02:52 +0000 (23:02 +0000)]
AMDGPU: Force skips around traps
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362852
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Reid Kleckner [Fri, 7 Jun 2019 22:05:12 +0000 (22:05 +0000)]
[COFF] Fix /export:foo=bar when bar is a weak alias
Summary:
When handling exports from the command line or from .def files, the
linker does a "fuzzy" string lookup to allow finding mangled symbols.
However, when the symbol is re-exported under a new name, the linker has
to transfer the decorations from the exported symbol over to the new
name. This is implemented by taking the mangled symbol that was found in
the object and replacing the original symbol name with the export name.
Before this patch, LLD implemented the fuzzy search by adding an
undefined symbol with the unmangled name, and then during symbol
resolution, checking if similar mangled symbols had been added after the
last round of symbol resolution. If so, LLD makes the original symbol a
weak alias of the mangled symbol. Later, to get the original symbol
name, LLD would look through the weak alias and forward it on to the
import library writer, which copies the symbol decorations. This
approach doesn't work when bar is itself a weak alias, as is the case in
asan. It's especially bad when the aliasee of bar contains the string
"bar", consider "bar_default". In this case, we would end up exporting
the symbol "foo_default" when we should've exported just "foo".
To fix this, don't look through weak aliases to find the mangled name.
Save the mangled name earlier during fuzzy symbol lookup.
Fixes PR42074
Reviewers: mstorsjo, ruiu
Subscribers: thakis, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D62984
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362849
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Alexander Shaposhnikov [Fri, 7 Jun 2019 22:03:02 +0000 (22:03 +0000)]
[llvm-lipo] Add docs for llvm-lipo
Add docs (llvm-lipo.rst) for llvm-lipo.
Test plan:
make -j8 sphinx
check that ./docs/html/CommandGuide/llvm-lipo.html is built correctly and looks okay.
Differential revision: https://reviews.llvm.org/D62706
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362848
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Jordan Rupprecht [Fri, 7 Jun 2019 21:49:26 +0000 (21:49 +0000)]
[llvm-objdump] Fix Bugzilla ID 41862 to support checking addresses of disassembled object
Summary:
This fixes the bugzilla id,41862 to support dealing with checking
stop address against start address to support this not being a
proper object to check the disasembly against like gnu objdump
currently does.
Reviewers: jakehehrlich, rupprecht, echristo, jhenderson, grimar
Reviewed By: jhenderson
Subscribers: MaskRay, smeenai, rupprecht, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D61969
Patch by Nicholas Krause!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362847
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Adrian McCarthy [Fri, 7 Jun 2019 21:14:33 +0000 (21:14 +0000)]
Fix string literals to avoid deprecation warnings in regexp patterns
In LLDB, where tests run with the debug version of Python, we get a
series of deprecation warnings because escape sequences like `\(` are
being treated as part of the string literal rather than an escape for
the regexp pattern.
NFC intended.
Differential Revision: https://reviews.llvm.org/D62882
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362846
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Shoaib Meenai [Fri, 7 Jun 2019 20:52:17 +0000 (20:52 +0000)]
[llvm-lipo] Drop unneeded braces. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362841
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Shoaib Meenai [Fri, 7 Jun 2019 20:47:58 +0000 (20:47 +0000)]
[llvm-lipo] Implement -archs
Displays the architecture names of an input file.
Unknown architectures are represented by unknown(cputype,cpusubtype).
Patch by Anusha Basana <anusha.basana@gmail.com>
Differential Revision: https://reviews.llvm.org/D62753
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362840
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Alina Sbirlea [Fri, 7 Jun 2019 20:43:55 +0000 (20:43 +0000)]
[DomTreeUpdater] Add all insert before all delete updates to reduce compile time.
Summary:
The cleanup in D62751 introduced a compile-time regression due to the way DT updates are performed.
Add all insert edges then all delete edges in DTU to match the previous compile time.
Compile time on the test provided by @mstorsjo before and after this patch on my machine:
113.046s vs 35.649s
Repro: clang -target x86_64-w64-mingw32 -c -O3 glew-preproc.c; on https://martin.st/temp/glew-preproc.c.
Reviewers: kuhar, NutshellySima, mstorsjo
Subscribers: jlebar, mstorsjo, dmgreen, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D62981
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362839
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Michael Pozulp [Fri, 7 Jun 2019 20:34:31 +0000 (20:34 +0000)]
[llvm-objdump] Add warning if --disassemble-functions specifies an unknown symbol
Summary:
Fixes Bug 41904 https://bugs.llvm.org/show_bug.cgi?id=41904
Re-land r362768 after it was reverted in r362826.
Reviewers: jhenderson, rupprecht, grimar, MaskRay
Reviewed By: jhenderson, rupprecht, MaskRay
Subscribers: dexonsmith, rupprecht, kristina, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D62275
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362838
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Craig Topper [Fri, 7 Jun 2019 20:30:40 +0000 (20:30 +0000)]
[X86] Remove unnecessary new line escape from the end of a macro. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362837
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Michael Pozulp [Fri, 7 Jun 2019 20:23:03 +0000 (20:23 +0000)]
[ADT] Enable set_difference() to be used on StringSet
Summary: Re-land r362766 after it was reverted in r362823.
Reviewers: jhenderson, dsanders, aaron.ballman, MatzeB, lhames, dblaikie
Reviewed By: dblaikie
Subscribers: smeenai, mgrang, mgorny, dexonsmith, kristina, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D62369
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362835
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Volkan Keles [Fri, 7 Jun 2019 20:19:27 +0000 (20:19 +0000)]
[GlobalISel] IRTranslator: Translate the intrinsics ignored by CodeGen
Summary:
Translate `llvm.assume`, `llvm.var.annotation` and `llvm.sideeffect` to nothing
as they have no effect on CodeGen.
Reviewers: qcolombet, aditya_nandakumar, dsanders, paquette, aemerson, arsenm
Reviewed By: arsenm
Subscribers: hiraditya, wdng, rovka, kristof.beyls, javed.absar, Petar.Avramovic, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D63022
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362834
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Nick Desaulniers [Fri, 7 Jun 2019 19:51:22 +0000 (19:51 +0000)]
[APFloat] APFloat::Storage::Storage - refix use after move
Summary:
Re-land r360675 after it was reverted in r360770.
This was reported in:
https://llvm.org/reports/scan-build/
Based on feedback in:
https://lists.llvm.org/pipermail/llvm-commits/Week-of-Mon-
20190513/652286.html
Reviewers: RKSimon, efriedma
Reviewed By: RKSimon, efriedma
Subscribers: eli.friedman, hiraditya, llvm-commits, srhines
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D62767
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362833
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Lang Hames [Fri, 7 Jun 2019 19:33:51 +0000 (19:33 +0000)]
[ORC] Update symbol lookup to use a single callback with a required symbol state
rather than two callbacks.
The asynchronous lookup API (which the synchronous lookup API wraps for
convenience) used to take two callbacks: OnResolved (called once all requested
symbols had an address assigned) and OnReady to be called once all requested
symbols were safe to access). This patch updates the asynchronous lookup API to
take a single 'OnComplete' callback and a required state (SymbolState) to
determine when the callback should be made. This simplifies the common use case
(where the client is interested in a specific state) and will generalize neatly
as new states are introduced to track runtime initialization of symbols.
Clients who were making use of both callbacks in a single query will now need to
issue two queries (one for SymbolState::Resolved and another for
SymbolState::Ready). Synchronous lookup API clients who were explicitly passing
the WaitOnReady argument will now need neeed to pass a SymbolState instead (for
'WaitOnReady == true' use SymbolState::Ready, for 'WaitOnReady == false' use
SymbolState::Resolved). Synchronous lookup API clients who were using default
arugment values should see no change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362832
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Cameron McInally [Fri, 7 Jun 2019 18:59:51 +0000 (18:59 +0000)]
[IR] Add UnaryOperator::CreateFNegFMF(...)
Differential Revision: https://reviews.llvm.org/D62705
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362828
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Peter Collingbourne [Fri, 7 Jun 2019 18:57:32 +0000 (18:57 +0000)]
Unbreak 32-bit build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362827
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Vlad Tsyrklevich [Fri, 7 Jun 2019 18:55:12 +0000 (18:55 +0000)]
Revert "[llvm-objdump] Add warning if --disassemble-functions specifies an unknown symbol"
This reverts commit
50f61af3f304a03f10d9ecb0828829f0a72d0099, it used
the function introduced in the previous revert of
0bddef79019a23ab14fcdb27028e55e484674c88.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362826
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Simon Pilgrim [Fri, 7 Jun 2019 18:36:43 +0000 (18:36 +0000)]
[DAGCombine] visitAND - fix local shadow variable warnings. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362825
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Vlad Tsyrklevich [Fri, 7 Jun 2019 18:34:29 +0000 (18:34 +0000)]
Revert "[ADT] Enable set_difference() to be used on StringSet"
This reverts commit
0bddef79019a23ab14fcdb27028e55e484674c88, it was
causing ASan failures on the sanitizer bots:
http://lab.llvm.org:8011/builders/sanitizer-x86_64-linux-fast/builds/32800
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362823
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Simon Pilgrim [Fri, 7 Jun 2019 18:20:09 +0000 (18:20 +0000)]
Fix -Wunused-lambda-capture warning. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362822
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Simon Pilgrim [Fri, 7 Jun 2019 18:07:06 +0000 (18:07 +0000)]
[DAGCombine] Use APInt::extractBits in "sub-splat" constant mask detection. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362820
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Peter Collingbourne [Fri, 7 Jun 2019 17:57:48 +0000 (17:57 +0000)]
llvm-objcopy: Implement --extract-partition and --extract-main-partition.
This implements the functionality described in
https://lld.llvm.org/Partitions.html. It works as follows:
- Reads the section headers using the ELF header at file offset 0;
- If extracting a loadable partition:
- Finds the section containing the required partition ELF header by looking it up in the section table;
- Reads the ELF and program headers from the section.
- If extracting the main partition:
- Reads the ELF and program headers from file offset 0.
- Filters the section table according to which sections are in the program headers that it read:
- If ParentSegment != nullptr or section is not SHF_ALLOC, then it goes in.
- Sections containing partition ELF headers or program headers are excluded as there are no headers for these in ordinary ELF files.
Differential Revision: https://reviews.llvm.org/D62364
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362818
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Matt Arsenault [Fri, 7 Jun 2019 17:55:07 +0000 (17:55 +0000)]
AMDGPU: Fix MIR test verifier error
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362817
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Jonas Devlieghere [Fri, 7 Jun 2019 17:35:19 +0000 (17:35 +0000)]
[dsymutil] Use the number of threads specified.
Before this patch we used either a single thread, or the number of
hardware threads available, effectively ignoring the number of threads
specified on the command line.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362815
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James Henderson [Fri, 7 Jun 2019 16:43:44 +0000 (16:43 +0000)]
[docs]Move llvm-readobj from "Developer Tools" to "Basic Commands"
On the Command Guide page, there are multiple sections with links to the
different documentation pages available for LLVM tools. The "Basic
Tools" section includes tools like llvm-objdump, llvm-nm and so on. The
"Developer Tools" section contains things like FileCheck and lit. This
change moves llvm-readobj into the former block, from the latter.
Reviewed by: MaskRay
Differential Revision: https://reviews.llvm.org/D63011
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362813
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Sanjay Patel [Fri, 7 Jun 2019 16:09:54 +0000 (16:09 +0000)]
[Analysis] simplify code for getSplatValue(); NFC
AFAIK, this is only currently called by TTI, but it could be
used from instcombine or CGP to help solve problems like:
https://bugs.llvm.org/show_bug.cgi?id=37428
https://bugs.llvm.org/show_bug.cgi?id=42174
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362810
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Nico Weber [Fri, 7 Jun 2019 16:06:27 +0000 (16:06 +0000)]
Attempt to fix nm-archive.test after r362798
llvm-lib now needs a `target triple` for bitcode, so add a new file
that's like trivial.ll but has one, and use that in the test.
(trivial.ll had a comment that looked like it wasn't supposed to be used
in tests directly, so I don't want to change that file.)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362809
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David Tenty [Fri, 7 Jun 2019 15:45:25 +0000 (15:45 +0000)]
Build with _XOPEN_SOURCE defined on AIX
Summary:
It is useful to build with _XOPEN_SOURCE defined on AIX, enabling X/Open
and POSIX compatibility mode, to work around stray macros and other
bugs in the headers provided by the system and build compiler.
This patch adds the config to cmake to build with _XOPEN_SOURCE defined
on AIX with a few exceptions. Google Test internals require access to
platform specific thread info constructs on AIX so in that case we build
with _ALL_SOURCE defined instead. Libclang also uses header which needs
_ALL_SOURCE on AIX so we leave that as is as well.
We also add building on AIX with the large file API and doing CMake
header checks with X/OPEN definitions so the results are consistent with
the environment that will be present in the build.
Reviewers: hubert.reinterpretcast, xingxue, andusy
Reviewed By: hubert.reinterpretcast
Subscribers: mgorny, jsji, cfe-commits, llvm-commits
Tags: #llvm, #clang
Differential Revision: https://reviews.llvm.org/D62533
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362808
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Jinsong Ji [Fri, 7 Jun 2019 14:54:47 +0000 (14:54 +0000)]
[MachineScheduler] checkResourceLimit boundary condition update
When we call checkResourceLimit in bumpCycle or bumpNode, and we
know the resource count has just reached the limit (the equations
are equal). We should return true to mark that we are resource
limited for next schedule, or else we might continue to schedule
in favor of latency for 1 more schedule and create a schedule that
actually overbook the resource.
When we call checkResourceLimit to estimate the resource limite before
scheduling, we don't need to return true even if the equations are
equal, as it shouldn't limit the schedule for it .
Differential Revision: https://reviews.llvm.org/D62345
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362805
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Stefan Stipanovic [Fri, 7 Jun 2019 14:18:02 +0000 (14:18 +0000)]
test-commit
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362802
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David Bolvansky [Fri, 7 Jun 2019 14:05:42 +0000 (14:05 +0000)]
[NFC] Added tests for D63004
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362801
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Matt Arsenault [Fri, 7 Jun 2019 13:33:34 +0000 (13:33 +0000)]
TailDuplicator: Remove no-op analyzeBranch call
This could fail, which looked concerning. However nothing was actually
using the results of this. I assume this was intended to use the
anti-feature of analyzeBranch of removing instructions, but wasn't
actually calling it with AllowModify = true.
Fixes bug 42162.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362800
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Joerg Sonnenberger [Fri, 7 Jun 2019 13:28:52 +0000 (13:28 +0000)]
[NFC] Don't export helpers of ConstantFoldCall
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362799
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Nico Weber [Fri, 7 Jun 2019 13:24:34 +0000 (13:24 +0000)]
llvm-lib: Disallow mixing object files with different machine types
lib.exe doesn't allow creating .lib files with object files that have
differing machine types. Update llvm-lib to match.
The motivation is to make it possible to infer the machine type of a
.lib file in lld, so that it can warn when e.g. a 32-bit .lib file is
passed to a 64-bit link (PR38965).
Fixes PR38782.
Differential Revision: https://reviews.llvm.org/D62913
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362798
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Sanjay Patel [Fri, 7 Jun 2019 13:17:46 +0000 (13:17 +0000)]
[x86] narrow extract subvector of vector select
This is a potentially large perf win for AVX1 targets because of the way we
auto-vectorize to 256-bit but then expect the backend to legalize/optimize
for the half-implemented AVX1 ISA.
On the motivating example from PR37428 (even though this patch doesn't solve
the vector shift issue):
https://bugs.llvm.org/show_bug.cgi?id=37428
...there's a 16% speedup when compiling with "-mavx" (perf tested on Haswell)
because we eliminate the remaining 256-bit vblendv ops.
I added comments on a couple of tests that require further work. If we have
256-bit logic ops separating the vselect and extract, we should probably narrow
everything to 128-bit, but that requires a larger pattern match.
Differential Revision: https://reviews.llvm.org/D62969
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362797
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Nico Weber [Fri, 7 Jun 2019 13:09:40 +0000 (13:09 +0000)]
gn build: Merge r362766
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362796
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Nico Weber [Fri, 7 Jun 2019 13:08:17 +0000 (13:08 +0000)]
gn build: Merge r362774
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362795
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Nico Weber [Fri, 7 Jun 2019 13:07:00 +0000 (13:07 +0000)]
gn build: Run `git ls-files '*.gn' '*.gni' | xargs llvm/utils/gn/gn.py format`
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362794
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Simon Tatham [Fri, 7 Jun 2019 12:42:54 +0000 (12:42 +0000)]
[ARM] Fix bugs introduced by the fp64/d32 rework.
Change D60691 caused some knock-on failures that weren't caught by the
existing tests. Firstly, selecting a CPU that should have had a
restricted FPU (e.g. `-mcpu=cortex-m4`, which should have 16 d-regs
and no double precision) could give the unrestricted version, because
`ARM::getFPUFeatures` returned a list of features including subtracted
ones (here `-fp64`,`-d32`), but `ARMTargetInfo::initFeatureMap` threw
away all the ones that didn't start with `+`. Secondly, the
preprocessor macros didn't reliably match the actual compilation
settings: for example, `-mfpu=softvfp` could still set `__ARM_FP` as
if hardware FP was available, because the list of features on the cc1
command line would include things like `+vfp4`,`-vfp4d16` and clang
didn't realise that one of those cancelled out the other.
I've fixed both of these issues by rewriting `ARM::getFPUFeatures` so
that it returns a list that enables every FP-related feature
compatible with the selected FPU and disables every feature not
compatible, which is more verbose but means clang doesn't have to
understand the dependency relationships between the backend features.
Meanwhile, `ARMTargetInfo::handleTargetFeatures` is testing for all
the various forms of the FP feature names, so that it won't miss cases
where it should have set `HW_FP` to feed into feature test macros.
That in turn caused an ordering problem when handling `-mcpu=foo+bar`
together with `-mfpu=something_that_turns_off_bar`. To fix that, I've
arranged that the `+bar` suffixes on the end of `-mcpu` and `-march`
cause feature names to be put into a separate vector which is
concatenated after the output of `getFPUFeatures`.
Another side effect of all this is to fix a bug where `clang -target
armv8-eabi` by itself would fail to set `__ARM_FEATURE_FMA`, even
though `armv8` (aka Arm v8-A) implies FP-Armv8 which has FMA. That was
because `HW_FP` was being set to a value including only the `FPARMV8`
bit, but that feature test macro was testing only the `VFP4FPU` bit.
Now `HW_FP` ends up with all the bits set, so it gives the right
answer.
Changes to tests included in this patch:
* `arm-target-features.c`: I had to change basically all the expected
results. (The Cortex-M4 test in there should function as a
regression test for the accidental double-precision bug.)
* `arm-mfpu.c`, `armv8.1m.main.c`: switched to using `CHECK-DAG`
everywhere so that those tests are no longer sensitive to the order
of cc1 feature options on the command line.
* `arm-acle-6.5.c`: been updated to expect the right answer to that
FMA test.
* `Preprocessor/arm-target-features.c`: added a regression test for
the `mfpu=softvfp` issue.
Reviewers: SjoerdMeijer, dmgreen, ostannard, samparker, JamesNagurne
Reviewed By: ostannard
Subscribers: srhines, javed.absar, kristof.beyls, hiraditya, cfe-commits, llvm-commits
Tags: #clang, #llvm
Differential Revision: https://reviews.llvm.org/D62998
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362791
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Sam Elliott [Fri, 7 Jun 2019 12:20:14 +0000 (12:20 +0000)]
[RISCV] Support Bit-Preserving FP in F/D Extensions
Summary:
This allows some integer bitwise operations to instead be performed by
hardware fp instructions. This is correct because the RISC-V spec
requires the F and D extensions to use the IEEE-754 standard
representation, and fp register loads and stores to be bit-preserving.
This is tested against the soft-float ABI, but with hardware float
extensions enabled, so that the tests also ensure the optimisation also
fires in this case.
Reviewers: asb, luismarques
Reviewed By: asb
Subscribers: hiraditya, rbar, johnrusso, simoncook, apazos, sabuasal, niosHD, kito-cheng, shiva0217, jrtc27, zzheng, edward-jones, rogfer01, MartinMosbeck, brucehoult, the_o, rkruppe, PkmX, jocewei, psnobl, benna, Jim, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D62900
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362790
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Valery Pykhtin [Fri, 7 Jun 2019 12:16:46 +0000 (12:16 +0000)]
[AMDGPU] Constrain the AMDGPU inliner on maximum number of basic blocks in a caller function (compile time performance)
Differential revision: https://reviews.llvm.org/D62917
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362789
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Dmitri Gribenko [Fri, 7 Jun 2019 09:28:19 +0000 (09:28 +0000)]
Work around a circular dependency between IR and MC introduced in r362735
I replaced the circular library dependency with a forward declaration,
but it is only a workaround, not a real fix.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362782
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Cullen Rhodes [Fri, 7 Jun 2019 08:46:56 +0000 (08:46 +0000)]
[AArch64][AsmParser] error on unexpected SVE predicate type suffix
Summary:
This patch fixes a bug in the assembler that permitted a type suffix on
predicate registers when not expected. For instance, the following was
previously valid:
faddv h0, p0.q, z1.h
This bug was present in all SVE instructions containing predicates with
no type suffix and no predication form qualifier, i.e. /z or /m. The
latter instructions are already caught with an appropiate error message
by the assembler, e.g.:
.text
<stdin>:1:13: error: not expecting size suffix
cmpne p1.s, p0.b/z, z2.s, 0
^
A similar issue for SVE vector registers was fixed in:
https://reviews.llvm.org/D59636
Reviewed By: SjoerdMeijer
Differential Revision: https://reviews.llvm.org/D62942
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362780
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Cullen Rhodes [Fri, 7 Jun 2019 08:37:00 +0000 (08:37 +0000)]
[AArch64][AsmParser] Provide better diagnostics for SVE predicates
Patch by Sander de Smalen (sdesmalen)
Reviewed By: SjoerdMeijer
Differential Revision: https://reviews.llvm.org/D62941
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362779
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George Rimar [Fri, 7 Jun 2019 08:34:18 +0000 (08:34 +0000)]
[llvm-objcopy] - Emit error and don't crash if program header reaches past end of file.
This is https://bugs.llvm.org/show_bug.cgi?id=42122.
If an object file has a size less than program header's file [offset + size]
(i.e. if we have overflow), llvm-objcopy crashes instead of reporting a
error.
The patch fixes this issue.
Differential revision: https://reviews.llvm.org/D62898
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362778
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George Rimar [Fri, 7 Jun 2019 08:31:36 +0000 (08:31 +0000)]
[yaml2elf] - Refactoring followup for D62809
This is a refactoring follow-up for D62809
"Change how we handle implicit sections.".
It allows to simplify the code.
Differential revision: https://reviews.llvm.org/D62912
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362777
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Pengfei Wang [Fri, 7 Jun 2019 08:31:35 +0000 (08:31 +0000)]
[X86] -march=cooperlake (llvm)
Support intel -march=cooperlake in llvm
Patch by Shengchen Kan (skan)
Differential Revision: https://reviews.llvm.org/D62836
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362776
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Sam Parker [Fri, 7 Jun 2019 08:04:18 +0000 (08:04 +0000)]
Fix for lld buildbot
Removed unused (in non-debug builds) variable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362775
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Sam Parker [Fri, 7 Jun 2019 07:35:30 +0000 (07:35 +0000)]
[CodeGen] Generic Hardware Loop Support
Patch which introduces a target-independent framework for generating
hardware loops at the IR level. Most of the code has been taken from
PowerPC CTRLoops and PowerPC has been ported over to use this generic
pass. The target dependent parts have been moved into
TargetTransformInfo, via isHardwareLoopProfitable, with
HardwareLoopInfo introduced to transfer information from the backend.
Three generic intrinsics have been introduced:
- void @llvm.set_loop_iterations
Takes as a single operand, the number of iterations to be executed.
- i1 @llvm.loop_decrement(anyint)
Takes the maximum number of elements processed in an iteration of
the loop body and subtracts this from the total count. Returns
false when the loop should exit.
- anyint @llvm.loop_decrement_reg(anyint, anyint)
Takes the number of elements remaining to be processed as well as
the maximum numbe of elements processed in an iteration of the loop
body. Returns the updated number of elements remaining.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362774
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Dylan McKay [Fri, 7 Jun 2019 06:55:00 +0000 (06:55 +0000)]
[AVR] Expand 16-bit rotations during the legalization stage
In r356860, the legalization logic for BSWAP was modified to ISD::ROTL,
rather than the old ISD::{SHL, SRL, OR} nodes.
This works fine on AVR for 8-bit rotations, but 16-bit rotations are
currently unimplemented - they always trigger an assertion error in the
AVRExpandPseudoInsts pass ("RORW unimplemented").
This patch instructions the legalizer to expand 16-bit rotations into
the previous SHL, SRL, OR pattern it did previously.
This fixes the 'issue-cannot-select-bswap.ll' test. Interestingly, this
test failure seems flaky - it passes successfully on the avr-build-01
buildbot, but fails locally on my Arch Linux install.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362773
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Michael Pozulp [Fri, 7 Jun 2019 06:28:43 +0000 (06:28 +0000)]
[NFC] Delete trailing whitespace character.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362772
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Michael Pozulp [Fri, 7 Jun 2019 06:23:54 +0000 (06:23 +0000)]
[llvm-objdump] Print source when subsequent lines in the translation unit come from the same line in two different headers.
Reviewers: grimar, rupprecht, jhenderson
Reviewed By: grimar, jhenderson
Subscribers: llvm-commits, jhenderson
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D62461
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362771
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Michael Pozulp [Fri, 7 Jun 2019 05:11:13 +0000 (05:11 +0000)]
[llvm-objdump] Add warning if --disassemble-functions specifies an unknown symbol
Summary: Fixes Bug 41904 https://bugs.llvm.org/show_bug.cgi?id=41904
Reviewers: jhenderson, rupprecht, grimar, MaskRay
Reviewed By: jhenderson, rupprecht, MaskRay
Subscribers: dexonsmith, rupprecht, kristina, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D62275
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362768
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Fangrui Song [Fri, 7 Jun 2019 03:47:22 +0000 (03:47 +0000)]
[MC][ELF] Don't create relocations with section symbols for STB_LOCAL ifunc
We should keep the symbol type (STT_GNU_IFUNC) for a local ifunc because
it may result in an IRELATIVE reloc that the dynamic loader will use to
resolve the address at startup time.
There is another problem that is not fixed by this patch: a PC relative
relocation should also create a relocation with the ifunc symbol.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362767
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Michael Pozulp [Fri, 7 Jun 2019 03:23:00 +0000 (03:23 +0000)]
[ADT] Enable set_difference() to be used on StringSet
Subscribers: mgorny, mgrang, dexonsmith, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D62992
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362766
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Michael Pozulp [Fri, 7 Jun 2019 01:55:59 +0000 (01:55 +0000)]
[NFC] Test commit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362763
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Fangrui Song [Fri, 7 Jun 2019 01:48:26 +0000 (01:48 +0000)]
[LV] Fix -Wunused-function after r362736
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362762
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Matt Arsenault [Fri, 7 Jun 2019 00:14:55 +0000 (00:14 +0000)]
AMDGPU: Don't count mask branch pseudo towards skip threshold
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362761
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Matt Arsenault [Fri, 7 Jun 2019 00:14:45 +0000 (00:14 +0000)]
AMDGPU: Insert skips for blocks with FLAT
This already forced a skip for VMEM, so it should also be done for
flat. I'm somewhat skeptical about the benefit of this though.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362760
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Nemanja Ivanovic [Thu, 6 Jun 2019 23:49:01 +0000 (23:49 +0000)]
[PowerPC] Exploit the vector min/max instructions
Use the PPC vector min/max instructions for computing the corresponding
operation as these should be faster than the compare/select sequences
we currently emit.
Differential revision: https://reviews.llvm.org/D47332
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362759
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Matt Arsenault [Thu, 6 Jun 2019 22:51:51 +0000 (22:51 +0000)]
AMDGPU: Insert skip branches over return blocks
SIInsertSkips really doesn't understand the control flow, and makes
very stupid assumptions about the block layout. This was able to get
away with not skipping return blocks, since usually after
structurization there is only one placed at the end of the
function. Tail duplication can break this assumption.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362754
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David Tenty [Thu, 6 Jun 2019 22:07:14 +0000 (22:07 +0000)]
[NFC] Test commit, whitespace change
As per the Developer Policy, upon obtaining commit access.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362753
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Cameron McInally [Thu, 6 Jun 2019 21:49:59 +0000 (21:49 +0000)]
[NFC][CodeGen] Add unary fneg tests to X86/fma4-intrinsics-x86.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362752
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Alexey Lapshin [Thu, 6 Jun 2019 21:19:39 +0000 (21:19 +0000)]
[DebugInfo] Incorrect debug info record generated for loop counter.
Incorrect Debug Variable Range was calculated while "COMPUTING LIVE DEBUG VARIABLES" stage.
Range for Debug Variable("i") computed according to current state of instructions
inside of basic block. But Register Allocator creates new instructions which were not taken
into account when Live Debug Variables computed. In the result DBG_VALUE instruction for
the "i" variable was put after these newly inserted instructions. This is incorrect.
Debug Value for the loop counter should be inserted before any loop instruction.
Differential Revision: https://reviews.llvm.org/D62650
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362750
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